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cmsis/TARGET_CORTEX_M/cmsis_iccarm.h@0:b74591d5ab33, 2017-12-11 (annotated)

Committer:
be_bryan
Date:
Mon Dec 11 17:54:04 2017 +0000
Revision:
0:b74591d5ab33
motor ++

Who changed what in which revision?

UserRevisionLine numberNew contents of line
be_bryan 0:b74591d5ab33 1 /**************************************************************************//**
be_bryan 0:b74591d5ab33 2 * @file cmsis_iccarm.h
be_bryan 0:b74591d5ab33 3 * @brief CMSIS compiler ICCARM (IAR compiler) header file
be_bryan 0:b74591d5ab33 4 * @version V5.0.3
be_bryan 0:b74591d5ab33 5 * @date 29. August 2017
be_bryan 0:b74591d5ab33 6 ******************************************************************************/
be_bryan 0:b74591d5ab33 7
be_bryan 0:b74591d5ab33 8 //------------------------------------------------------------------------------
be_bryan 0:b74591d5ab33 9 //
be_bryan 0:b74591d5ab33 10 // Copyright (c) 2017 IAR Systems
be_bryan 0:b74591d5ab33 11 //
be_bryan 0:b74591d5ab33 12 // Licensed under the Apache License, Version 2.0 (the "License")
be_bryan 0:b74591d5ab33 13 // you may not use this file except in compliance with the License.
be_bryan 0:b74591d5ab33 14 // You may obtain a copy of the License at
be_bryan 0:b74591d5ab33 15 // http://www.apache.org/licenses/LICENSE-2.0
be_bryan 0:b74591d5ab33 16 //
be_bryan 0:b74591d5ab33 17 // Unless required by applicable law or agreed to in writing, software
be_bryan 0:b74591d5ab33 18 // distributed under the License is distributed on an "AS IS" BASIS,
be_bryan 0:b74591d5ab33 19 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
be_bryan 0:b74591d5ab33 20 // See the License for the specific language governing permissions and
be_bryan 0:b74591d5ab33 21 // limitations under the License.
be_bryan 0:b74591d5ab33 22 //
be_bryan 0:b74591d5ab33 23 //------------------------------------------------------------------------------
be_bryan 0:b74591d5ab33 24
be_bryan 0:b74591d5ab33 25
be_bryan 0:b74591d5ab33 26 #ifndef __CMSIS_ICCARM_H__
be_bryan 0:b74591d5ab33 27 #define __CMSIS_ICCARM_H__
be_bryan 0:b74591d5ab33 28
be_bryan 0:b74591d5ab33 29 #ifndef __ICCARM__
be_bryan 0:b74591d5ab33 30 #error This file should only be compiled by ICCARM
be_bryan 0:b74591d5ab33 31 #endif
be_bryan 0:b74591d5ab33 32
be_bryan 0:b74591d5ab33 33 #pragma system_include
be_bryan 0:b74591d5ab33 34
be_bryan 0:b74591d5ab33 35 #define __IAR_FT _Pragma("inline=forced") __intrinsic
be_bryan 0:b74591d5ab33 36
be_bryan 0:b74591d5ab33 37 #if (__VER__ >= 8000000)
be_bryan 0:b74591d5ab33 38 #define __ICCARM_V8 1
be_bryan 0:b74591d5ab33 39 #else
be_bryan 0:b74591d5ab33 40 #define __ICCARM_V8 0
be_bryan 0:b74591d5ab33 41 #endif
be_bryan 0:b74591d5ab33 42
be_bryan 0:b74591d5ab33 43 #ifndef __ALIGNED
be_bryan 0:b74591d5ab33 44 #if __ICCARM_V8
be_bryan 0:b74591d5ab33 45 #define __ALIGNED(x) __attribute__((aligned(x)))
be_bryan 0:b74591d5ab33 46 #elif (__VER__ >= 7080000)
be_bryan 0:b74591d5ab33 47 /* Needs IAR language extensions */
be_bryan 0:b74591d5ab33 48 #define __ALIGNED(x) __attribute__((aligned(x)))
be_bryan 0:b74591d5ab33 49 #else
be_bryan 0:b74591d5ab33 50 #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
be_bryan 0:b74591d5ab33 51 #define __ALIGNED(x)
be_bryan 0:b74591d5ab33 52 #endif
be_bryan 0:b74591d5ab33 53 #endif
be_bryan 0:b74591d5ab33 54
be_bryan 0:b74591d5ab33 55
be_bryan 0:b74591d5ab33 56 /* Define compiler macros for CPU architecture, used in CMSIS 5.
be_bryan 0:b74591d5ab33 57 */
be_bryan 0:b74591d5ab33 58 #if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
be_bryan 0:b74591d5ab33 59 /* Macros already defined */
be_bryan 0:b74591d5ab33 60 #else
be_bryan 0:b74591d5ab33 61 #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
be_bryan 0:b74591d5ab33 62 #define __ARM_ARCH_8M_MAIN__ 1
be_bryan 0:b74591d5ab33 63 #elif defined(__ARM8M_BASELINE__)
be_bryan 0:b74591d5ab33 64 #define __ARM_ARCH_8M_BASE__ 1
be_bryan 0:b74591d5ab33 65 #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
be_bryan 0:b74591d5ab33 66 #if __ARM_ARCH == 6
be_bryan 0:b74591d5ab33 67 #define __ARM_ARCH_6M__ 1
be_bryan 0:b74591d5ab33 68 #elif __ARM_ARCH == 7
be_bryan 0:b74591d5ab33 69 #if __ARM_FEATURE_DSP
be_bryan 0:b74591d5ab33 70 #define __ARM_ARCH_7EM__ 1
be_bryan 0:b74591d5ab33 71 #else
be_bryan 0:b74591d5ab33 72 #define __ARM_ARCH_7M__ 1
be_bryan 0:b74591d5ab33 73 #endif
be_bryan 0:b74591d5ab33 74 #endif /* __ARM_ARCH */
be_bryan 0:b74591d5ab33 75 #endif /* __ARM_ARCH_PROFILE == 'M' */
be_bryan 0:b74591d5ab33 76 #endif
be_bryan 0:b74591d5ab33 77
be_bryan 0:b74591d5ab33 78 /* Alternativ core deduction for older ICCARM's */
be_bryan 0:b74591d5ab33 79 #if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
be_bryan 0:b74591d5ab33 80 !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
be_bryan 0:b74591d5ab33 81 #if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
be_bryan 0:b74591d5ab33 82 #define __ARM_ARCH_6M__ 1
be_bryan 0:b74591d5ab33 83 #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
be_bryan 0:b74591d5ab33 84 #define __ARM_ARCH_7M__ 1
be_bryan 0:b74591d5ab33 85 #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
be_bryan 0:b74591d5ab33 86 #define __ARM_ARCH_7EM__ 1
be_bryan 0:b74591d5ab33 87 #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
be_bryan 0:b74591d5ab33 88 #define __ARM_ARCH_8M_BASE__ 1
be_bryan 0:b74591d5ab33 89 #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
be_bryan 0:b74591d5ab33 90 #define __ARM_ARCH_8M_MAIN__ 1
be_bryan 0:b74591d5ab33 91 #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
be_bryan 0:b74591d5ab33 92 #define __ARM_ARCH_8M_MAIN__ 1
be_bryan 0:b74591d5ab33 93 #else
be_bryan 0:b74591d5ab33 94 #error "Unknown target."
be_bryan 0:b74591d5ab33 95 #endif
be_bryan 0:b74591d5ab33 96 #endif
be_bryan 0:b74591d5ab33 97
be_bryan 0:b74591d5ab33 98
be_bryan 0:b74591d5ab33 99
be_bryan 0:b74591d5ab33 100 #if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1
be_bryan 0:b74591d5ab33 101 #define __IAR_M0_FAMILY 1
be_bryan 0:b74591d5ab33 102 #elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1
be_bryan 0:b74591d5ab33 103 #define __IAR_M0_FAMILY 1
be_bryan 0:b74591d5ab33 104 #else
be_bryan 0:b74591d5ab33 105 #define __IAR_M0_FAMILY 0
be_bryan 0:b74591d5ab33 106 #endif
be_bryan 0:b74591d5ab33 107
be_bryan 0:b74591d5ab33 108
be_bryan 0:b74591d5ab33 109 #ifndef __ASM
be_bryan 0:b74591d5ab33 110 #define __ASM __asm
be_bryan 0:b74591d5ab33 111 #endif
be_bryan 0:b74591d5ab33 112
be_bryan 0:b74591d5ab33 113 #ifndef __INLINE
be_bryan 0:b74591d5ab33 114 #define __INLINE inline
be_bryan 0:b74591d5ab33 115 #endif
be_bryan 0:b74591d5ab33 116
be_bryan 0:b74591d5ab33 117 #ifndef __NO_RETURN
be_bryan 0:b74591d5ab33 118 #if __ICCARM_V8
be_bryan 0:b74591d5ab33 119 #define __NO_RETURN __attribute__((noreturn))
be_bryan 0:b74591d5ab33 120 #else
be_bryan 0:b74591d5ab33 121 #define __NO_RETURN _Pragma("object_attribute=__noreturn")
be_bryan 0:b74591d5ab33 122 #endif
be_bryan 0:b74591d5ab33 123 #endif
be_bryan 0:b74591d5ab33 124
be_bryan 0:b74591d5ab33 125 #ifndef __PACKED
be_bryan 0:b74591d5ab33 126 #if __ICCARM_V8
be_bryan 0:b74591d5ab33 127 #define __PACKED __attribute__((packed, aligned(1)))
be_bryan 0:b74591d5ab33 128 #else
be_bryan 0:b74591d5ab33 129 /* Needs IAR language extensions */
be_bryan 0:b74591d5ab33 130 #define __PACKED __packed
be_bryan 0:b74591d5ab33 131 #endif
be_bryan 0:b74591d5ab33 132 #endif
be_bryan 0:b74591d5ab33 133
be_bryan 0:b74591d5ab33 134 #ifndef __PACKED_STRUCT
be_bryan 0:b74591d5ab33 135 #if __ICCARM_V8
be_bryan 0:b74591d5ab33 136 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
be_bryan 0:b74591d5ab33 137 #else
be_bryan 0:b74591d5ab33 138 /* Needs IAR language extensions */
be_bryan 0:b74591d5ab33 139 #define __PACKED_STRUCT __packed struct
be_bryan 0:b74591d5ab33 140 #endif
be_bryan 0:b74591d5ab33 141 #endif
be_bryan 0:b74591d5ab33 142
be_bryan 0:b74591d5ab33 143 #ifndef __PACKED_UNION
be_bryan 0:b74591d5ab33 144 #if __ICCARM_V8
be_bryan 0:b74591d5ab33 145 #define __PACKED_UNION union __attribute__((packed, aligned(1)))
be_bryan 0:b74591d5ab33 146 #else
be_bryan 0:b74591d5ab33 147 /* Needs IAR language extensions */
be_bryan 0:b74591d5ab33 148 #define __PACKED_UNION __packed union
be_bryan 0:b74591d5ab33 149 #endif
be_bryan 0:b74591d5ab33 150 #endif
be_bryan 0:b74591d5ab33 151
be_bryan 0:b74591d5ab33 152 #ifndef __RESTRICT
be_bryan 0:b74591d5ab33 153 #define __RESTRICT restrict
be_bryan 0:b74591d5ab33 154 #endif
be_bryan 0:b74591d5ab33 155
be_bryan 0:b74591d5ab33 156
be_bryan 0:b74591d5ab33 157 #ifndef __STATIC_INLINE
be_bryan 0:b74591d5ab33 158 #define __STATIC_INLINE static inline
be_bryan 0:b74591d5ab33 159 #endif
be_bryan 0:b74591d5ab33 160
be_bryan 0:b74591d5ab33 161 #ifndef __UNALIGNED_UINT16_READ
be_bryan 0:b74591d5ab33 162 #pragma language=save
be_bryan 0:b74591d5ab33 163 #pragma language=extended
be_bryan 0:b74591d5ab33 164 __IAR_FT uint16_t __iar_uint16_read(void const *ptr) {
be_bryan 0:b74591d5ab33 165 return *(__packed uint16_t*)(ptr);
be_bryan 0:b74591d5ab33 166 }
be_bryan 0:b74591d5ab33 167 #pragma language=restore
be_bryan 0:b74591d5ab33 168 #define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
be_bryan 0:b74591d5ab33 169 #endif
be_bryan 0:b74591d5ab33 170
be_bryan 0:b74591d5ab33 171
be_bryan 0:b74591d5ab33 172 #ifndef __UNALIGNED_UINT16_WRITE
be_bryan 0:b74591d5ab33 173 #pragma language=save
be_bryan 0:b74591d5ab33 174 #pragma language=extended
be_bryan 0:b74591d5ab33 175 __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val) {
be_bryan 0:b74591d5ab33 176 *(__packed uint16_t*)(ptr) = val;;
be_bryan 0:b74591d5ab33 177 }
be_bryan 0:b74591d5ab33 178 #pragma language=restore
be_bryan 0:b74591d5ab33 179 #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
be_bryan 0:b74591d5ab33 180 #endif
be_bryan 0:b74591d5ab33 181
be_bryan 0:b74591d5ab33 182 #ifndef __UNALIGNED_UINT32_READ
be_bryan 0:b74591d5ab33 183 #pragma language=save
be_bryan 0:b74591d5ab33 184 #pragma language=extended
be_bryan 0:b74591d5ab33 185 __IAR_FT uint32_t __iar_uint32_read(void const *ptr) {
be_bryan 0:b74591d5ab33 186 return *(__packed uint32_t*)(ptr);
be_bryan 0:b74591d5ab33 187 }
be_bryan 0:b74591d5ab33 188 #pragma language=restore
be_bryan 0:b74591d5ab33 189 #define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
be_bryan 0:b74591d5ab33 190 #endif
be_bryan 0:b74591d5ab33 191
be_bryan 0:b74591d5ab33 192 #ifndef __UNALIGNED_UINT32_WRITE
be_bryan 0:b74591d5ab33 193 #pragma language=save
be_bryan 0:b74591d5ab33 194 #pragma language=extended
be_bryan 0:b74591d5ab33 195 __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val) {
be_bryan 0:b74591d5ab33 196 *(__packed uint32_t*)(ptr) = val;;
be_bryan 0:b74591d5ab33 197 }
be_bryan 0:b74591d5ab33 198 #pragma language=restore
be_bryan 0:b74591d5ab33 199 #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
be_bryan 0:b74591d5ab33 200 #endif
be_bryan 0:b74591d5ab33 201
be_bryan 0:b74591d5ab33 202 #ifndef __UNALIGNED_UINT32 /* deprecated */
be_bryan 0:b74591d5ab33 203 #pragma language=save
be_bryan 0:b74591d5ab33 204 #pragma language=extended
be_bryan 0:b74591d5ab33 205 __packed struct __iar_u32 { uint32_t v; };
be_bryan 0:b74591d5ab33 206 #pragma language=restore
be_bryan 0:b74591d5ab33 207 #define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
be_bryan 0:b74591d5ab33 208 #endif
be_bryan 0:b74591d5ab33 209
be_bryan 0:b74591d5ab33 210 #ifndef __USED
be_bryan 0:b74591d5ab33 211 #if __ICCARM_V8
be_bryan 0:b74591d5ab33 212 #define __USED __attribute__((used))
be_bryan 0:b74591d5ab33 213 #else
be_bryan 0:b74591d5ab33 214 #define __USED _Pragma("__root")
be_bryan 0:b74591d5ab33 215 #endif
be_bryan 0:b74591d5ab33 216 #endif
be_bryan 0:b74591d5ab33 217
be_bryan 0:b74591d5ab33 218 #ifndef __WEAK
be_bryan 0:b74591d5ab33 219 #if __ICCARM_V8
be_bryan 0:b74591d5ab33 220 #define __WEAK __attribute__((weak))
be_bryan 0:b74591d5ab33 221 #else
be_bryan 0:b74591d5ab33 222 #define __WEAK _Pragma("__weak")
be_bryan 0:b74591d5ab33 223 #endif
be_bryan 0:b74591d5ab33 224 #endif
be_bryan 0:b74591d5ab33 225
be_bryan 0:b74591d5ab33 226
be_bryan 0:b74591d5ab33 227 #ifndef __ICCARM_INTRINSICS_VERSION__
be_bryan 0:b74591d5ab33 228 #define __ICCARM_INTRINSICS_VERSION__ 0
be_bryan 0:b74591d5ab33 229 #endif
be_bryan 0:b74591d5ab33 230
be_bryan 0:b74591d5ab33 231 #if __ICCARM_INTRINSICS_VERSION__ == 2
be_bryan 0:b74591d5ab33 232
be_bryan 0:b74591d5ab33 233 #if defined(__CLZ)
be_bryan 0:b74591d5ab33 234 #undef __CLZ
be_bryan 0:b74591d5ab33 235 #endif
be_bryan 0:b74591d5ab33 236 #if defined(__REVSH)
be_bryan 0:b74591d5ab33 237 #undef __REVSH
be_bryan 0:b74591d5ab33 238 #endif
be_bryan 0:b74591d5ab33 239 #if defined(__RBIT)
be_bryan 0:b74591d5ab33 240 #undef __RBIT
be_bryan 0:b74591d5ab33 241 #endif
be_bryan 0:b74591d5ab33 242 #if defined(__SSAT)
be_bryan 0:b74591d5ab33 243 #undef __SSAT
be_bryan 0:b74591d5ab33 244 #endif
be_bryan 0:b74591d5ab33 245 #if defined(__USAT)
be_bryan 0:b74591d5ab33 246 #undef __USAT
be_bryan 0:b74591d5ab33 247 #endif
be_bryan 0:b74591d5ab33 248
be_bryan 0:b74591d5ab33 249 #include "iccarm_builtin.h"
be_bryan 0:b74591d5ab33 250
be_bryan 0:b74591d5ab33 251 #define __disable_fault_irq __iar_builtin_disable_fiq
be_bryan 0:b74591d5ab33 252 #define __disable_irq __iar_builtin_disable_interrupt
be_bryan 0:b74591d5ab33 253 #define __enable_fault_irq __iar_builtin_enable_fiq
be_bryan 0:b74591d5ab33 254 #define __enable_irq __iar_builtin_enable_interrupt
be_bryan 0:b74591d5ab33 255 #define __arm_rsr __iar_builtin_rsr
be_bryan 0:b74591d5ab33 256 #define __arm_wsr __iar_builtin_wsr
be_bryan 0:b74591d5ab33 257
be_bryan 0:b74591d5ab33 258
be_bryan 0:b74591d5ab33 259 #define __get_APSR() (__arm_rsr("APSR"))
be_bryan 0:b74591d5ab33 260 #define __get_BASEPRI() (__arm_rsr("BASEPRI"))
be_bryan 0:b74591d5ab33 261 #define __get_CONTROL() (__arm_rsr("CONTROL"))
be_bryan 0:b74591d5ab33 262 #define __get_FAULTMASK() (__arm_rsr("FAULTMASK"))
be_bryan 0:b74591d5ab33 263
be_bryan 0:b74591d5ab33 264 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
be_bryan 0:b74591d5ab33 265 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
be_bryan 0:b74591d5ab33 266 #define __get_FPSCR() (__arm_rsr("FPSCR"))
be_bryan 0:b74591d5ab33 267 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
be_bryan 0:b74591d5ab33 268 #else
be_bryan 0:b74591d5ab33 269 #define __get_FPSCR() ( 0 )
be_bryan 0:b74591d5ab33 270 #define __set_FPSCR(VALUE) ((void)VALUE)
be_bryan 0:b74591d5ab33 271 #endif
be_bryan 0:b74591d5ab33 272
be_bryan 0:b74591d5ab33 273 #define __get_IPSR() (__arm_rsr("IPSR"))
be_bryan 0:b74591d5ab33 274 #define __get_MSP() (__arm_rsr("MSP"))
be_bryan 0:b74591d5ab33 275 #define __get_MSPLIM() (__arm_rsr("MSPLIM"))
be_bryan 0:b74591d5ab33 276 #define __get_PRIMASK() (__arm_rsr("PRIMASK"))
be_bryan 0:b74591d5ab33 277 #define __get_PSP() (__arm_rsr("PSP"))
be_bryan 0:b74591d5ab33 278 #define __get_PSPLIM() (__arm_rsr("PSPLIM"))
be_bryan 0:b74591d5ab33 279 #define __get_xPSR() (__arm_rsr("xPSR"))
be_bryan 0:b74591d5ab33 280
be_bryan 0:b74591d5ab33 281 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
be_bryan 0:b74591d5ab33 282 #define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE)))
be_bryan 0:b74591d5ab33 283 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
be_bryan 0:b74591d5ab33 284 #define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE)))
be_bryan 0:b74591d5ab33 285 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
be_bryan 0:b74591d5ab33 286 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
be_bryan 0:b74591d5ab33 287 #define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE)))
be_bryan 0:b74591d5ab33 288 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
be_bryan 0:b74591d5ab33 289 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
be_bryan 0:b74591d5ab33 290
be_bryan 0:b74591d5ab33 291 #define __TZ_get_CONTROL_NS() (__arm_rsr("CONTROL_NS"))
be_bryan 0:b74591d5ab33 292 #define __TZ_set_CONTROL_NS(VALUE) (__arm_wsr("CONTROL_NS", (VALUE)))
be_bryan 0:b74591d5ab33 293 #define __TZ_get_PSP_NS() (__arm_rsr("PSP_NS"))
be_bryan 0:b74591d5ab33 294 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
be_bryan 0:b74591d5ab33 295 #define __TZ_get_MSP_NS() (__arm_rsr("MSP_NS"))
be_bryan 0:b74591d5ab33 296 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
be_bryan 0:b74591d5ab33 297 #define __TZ_get_SP_NS() (__arm_rsr("SP_NS"))
be_bryan 0:b74591d5ab33 298 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE)))
be_bryan 0:b74591d5ab33 299 #define __TZ_get_PRIMASK_NS() (__arm_rsr("PRIMASK_NS"))
be_bryan 0:b74591d5ab33 300 #define __TZ_set_PRIMASK_NS(VALUE) (__arm_wsr("PRIMASK_NS", (VALUE)))
be_bryan 0:b74591d5ab33 301 #define __TZ_get_BASEPRI_NS() (__arm_rsr("BASEPRI_NS"))
be_bryan 0:b74591d5ab33 302 #define __TZ_set_BASEPRI_NS(VALUE) (__arm_wsr("BASEPRI_NS", (VALUE)))
be_bryan 0:b74591d5ab33 303 #define __TZ_get_FAULTMASK_NS() (__arm_rsr("FAULTMASK_NS"))
be_bryan 0:b74591d5ab33 304 #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE)))
be_bryan 0:b74591d5ab33 305 #define __TZ_get_PSPLIM_NS() (__arm_rsr("PSPLIM_NS"))
be_bryan 0:b74591d5ab33 306 #define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE)))
be_bryan 0:b74591d5ab33 307 #define __TZ_get_MSPLIM_NS() (__arm_rsr("MSPLIM_NS"))
be_bryan 0:b74591d5ab33 308 #define __TZ_set_MSPLIM_NS(VALUE) (__arm_wsr("MSPLIM_NS", (VALUE)))
be_bryan 0:b74591d5ab33 309
be_bryan 0:b74591d5ab33 310 #define __NOP __iar_builtin_no_operation
be_bryan 0:b74591d5ab33 311
be_bryan 0:b74591d5ab33 312 __IAR_FT uint8_t __CLZ(uint32_t val) {
be_bryan 0:b74591d5ab33 313 return __iar_builtin_CLZ(val);
be_bryan 0:b74591d5ab33 314 }
be_bryan 0:b74591d5ab33 315
be_bryan 0:b74591d5ab33 316 #define __CLREX __iar_builtin_CLREX
be_bryan 0:b74591d5ab33 317
be_bryan 0:b74591d5ab33 318 #define __DMB __iar_builtin_DMB
be_bryan 0:b74591d5ab33 319 #define __DSB __iar_builtin_DSB
be_bryan 0:b74591d5ab33 320 #define __ISB __iar_builtin_ISB
be_bryan 0:b74591d5ab33 321
be_bryan 0:b74591d5ab33 322 #define __LDREXB __iar_builtin_LDREXB
be_bryan 0:b74591d5ab33 323 #define __LDREXH __iar_builtin_LDREXH
be_bryan 0:b74591d5ab33 324 #define __LDREXW __iar_builtin_LDREX
be_bryan 0:b74591d5ab33 325
be_bryan 0:b74591d5ab33 326 #define __RBIT __iar_builtin_RBIT
be_bryan 0:b74591d5ab33 327 #define __REV __iar_builtin_REV
be_bryan 0:b74591d5ab33 328 #define __REV16 __iar_builtin_REV16
be_bryan 0:b74591d5ab33 329
be_bryan 0:b74591d5ab33 330 __IAR_FT int32_t __REVSH(int32_t val) {
be_bryan 0:b74591d5ab33 331 return __iar_builtin_REVSH((int16_t)val);
be_bryan 0:b74591d5ab33 332 }
be_bryan 0:b74591d5ab33 333
be_bryan 0:b74591d5ab33 334 #define __ROR __iar_builtin_ROR
be_bryan 0:b74591d5ab33 335 #define __RRX __iar_builtin_RRX
be_bryan 0:b74591d5ab33 336
be_bryan 0:b74591d5ab33 337 #define __SEV __iar_builtin_SEV
be_bryan 0:b74591d5ab33 338
be_bryan 0:b74591d5ab33 339 #if !__IAR_M0_FAMILY
be_bryan 0:b74591d5ab33 340 #define __SSAT __iar_builtin_SSAT
be_bryan 0:b74591d5ab33 341 #endif
be_bryan 0:b74591d5ab33 342
be_bryan 0:b74591d5ab33 343 #define __STREXB __iar_builtin_STREXB
be_bryan 0:b74591d5ab33 344 #define __STREXH __iar_builtin_STREXH
be_bryan 0:b74591d5ab33 345 #define __STREXW __iar_builtin_STREX
be_bryan 0:b74591d5ab33 346
be_bryan 0:b74591d5ab33 347 #if !__IAR_M0_FAMILY
be_bryan 0:b74591d5ab33 348 #define __USAT __iar_builtin_USAT
be_bryan 0:b74591d5ab33 349 #endif
be_bryan 0:b74591d5ab33 350
be_bryan 0:b74591d5ab33 351 #define __WFE __iar_builtin_WFE
be_bryan 0:b74591d5ab33 352 #define __WFI __iar_builtin_WFI
be_bryan 0:b74591d5ab33 353
be_bryan 0:b74591d5ab33 354 #if __ARM_MEDIA__
be_bryan 0:b74591d5ab33 355 #define __SADD8 __iar_builtin_SADD8
be_bryan 0:b74591d5ab33 356 #define __QADD8 __iar_builtin_QADD8
be_bryan 0:b74591d5ab33 357 #define __SHADD8 __iar_builtin_SHADD8
be_bryan 0:b74591d5ab33 358 #define __UADD8 __iar_builtin_UADD8
be_bryan 0:b74591d5ab33 359 #define __UQADD8 __iar_builtin_UQADD8
be_bryan 0:b74591d5ab33 360 #define __UHADD8 __iar_builtin_UHADD8
be_bryan 0:b74591d5ab33 361 #define __SSUB8 __iar_builtin_SSUB8
be_bryan 0:b74591d5ab33 362 #define __QSUB8 __iar_builtin_QSUB8
be_bryan 0:b74591d5ab33 363 #define __SHSUB8 __iar_builtin_SHSUB8
be_bryan 0:b74591d5ab33 364 #define __USUB8 __iar_builtin_USUB8
be_bryan 0:b74591d5ab33 365 #define __UQSUB8 __iar_builtin_UQSUB8
be_bryan 0:b74591d5ab33 366 #define __UHSUB8 __iar_builtin_UHSUB8
be_bryan 0:b74591d5ab33 367 #define __SADD16 __iar_builtin_SADD16
be_bryan 0:b74591d5ab33 368 #define __QADD16 __iar_builtin_QADD16
be_bryan 0:b74591d5ab33 369 #define __SHADD16 __iar_builtin_SHADD16
be_bryan 0:b74591d5ab33 370 #define __UADD16 __iar_builtin_UADD16
be_bryan 0:b74591d5ab33 371 #define __UQADD16 __iar_builtin_UQADD16
be_bryan 0:b74591d5ab33 372 #define __UHADD16 __iar_builtin_UHADD16
be_bryan 0:b74591d5ab33 373 #define __SSUB16 __iar_builtin_SSUB16
be_bryan 0:b74591d5ab33 374 #define __QSUB16 __iar_builtin_QSUB16
be_bryan 0:b74591d5ab33 375 #define __SHSUB16 __iar_builtin_SHSUB16
be_bryan 0:b74591d5ab33 376 #define __USUB16 __iar_builtin_USUB16
be_bryan 0:b74591d5ab33 377 #define __UQSUB16 __iar_builtin_UQSUB16
be_bryan 0:b74591d5ab33 378 #define __UHSUB16 __iar_builtin_UHSUB16
be_bryan 0:b74591d5ab33 379 #define __SASX __iar_builtin_SASX
be_bryan 0:b74591d5ab33 380 #define __QASX __iar_builtin_QASX
be_bryan 0:b74591d5ab33 381 #define __SHASX __iar_builtin_SHASX
be_bryan 0:b74591d5ab33 382 #define __UASX __iar_builtin_UASX
be_bryan 0:b74591d5ab33 383 #define __UQASX __iar_builtin_UQASX
be_bryan 0:b74591d5ab33 384 #define __UHASX __iar_builtin_UHASX
be_bryan 0:b74591d5ab33 385 #define __SSAX __iar_builtin_SSAX
be_bryan 0:b74591d5ab33 386 #define __QSAX __iar_builtin_QSAX
be_bryan 0:b74591d5ab33 387 #define __SHSAX __iar_builtin_SHSAX
be_bryan 0:b74591d5ab33 388 #define __USAX __iar_builtin_USAX
be_bryan 0:b74591d5ab33 389 #define __UQSAX __iar_builtin_UQSAX
be_bryan 0:b74591d5ab33 390 #define __UHSAX __iar_builtin_UHSAX
be_bryan 0:b74591d5ab33 391 #define __USAD8 __iar_builtin_USAD8
be_bryan 0:b74591d5ab33 392 #define __USADA8 __iar_builtin_USADA8
be_bryan 0:b74591d5ab33 393 #define __SSAT16 __iar_builtin_SSAT16
be_bryan 0:b74591d5ab33 394 #define __USAT16 __iar_builtin_USAT16
be_bryan 0:b74591d5ab33 395 #define __UXTB16 __iar_builtin_UXTB16
be_bryan 0:b74591d5ab33 396 #define __UXTAB16 __iar_builtin_UXTAB16
be_bryan 0:b74591d5ab33 397 #define __SXTB16 __iar_builtin_SXTB16
be_bryan 0:b74591d5ab33 398 #define __SXTAB16 __iar_builtin_SXTAB16
be_bryan 0:b74591d5ab33 399 #define __SMUAD __iar_builtin_SMUAD
be_bryan 0:b74591d5ab33 400 #define __SMUADX __iar_builtin_SMUADX
be_bryan 0:b74591d5ab33 401 #define __SMMLA __iar_builtin_SMMLA
be_bryan 0:b74591d5ab33 402 #define __SMLAD __iar_builtin_SMLAD
be_bryan 0:b74591d5ab33 403 #define __SMLADX __iar_builtin_SMLADX
be_bryan 0:b74591d5ab33 404 #define __SMLALD __iar_builtin_SMLALD
be_bryan 0:b74591d5ab33 405 #define __SMLALDX __iar_builtin_SMLALDX
be_bryan 0:b74591d5ab33 406 #define __SMUSD __iar_builtin_SMUSD
be_bryan 0:b74591d5ab33 407 #define __SMUSDX __iar_builtin_SMUSDX
be_bryan 0:b74591d5ab33 408 #define __SMLSD __iar_builtin_SMLSD
be_bryan 0:b74591d5ab33 409 #define __SMLSDX __iar_builtin_SMLSDX
be_bryan 0:b74591d5ab33 410 #define __SMLSLD __iar_builtin_SMLSLD
be_bryan 0:b74591d5ab33 411 #define __SMLSLDX __iar_builtin_SMLSLDX
be_bryan 0:b74591d5ab33 412 #define __SEL __iar_builtin_SEL
be_bryan 0:b74591d5ab33 413 #define __QADD __iar_builtin_QADD
be_bryan 0:b74591d5ab33 414 #define __QSUB __iar_builtin_QSUB
be_bryan 0:b74591d5ab33 415 #define __PKHBT __iar_builtin_PKHBT
be_bryan 0:b74591d5ab33 416 #define __PKHTB __iar_builtin_PKHTB
be_bryan 0:b74591d5ab33 417 #endif
be_bryan 0:b74591d5ab33 418
be_bryan 0:b74591d5ab33 419 #else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
be_bryan 0:b74591d5ab33 420
be_bryan 0:b74591d5ab33 421 #if __IAR_M0_FAMILY
be_bryan 0:b74591d5ab33 422 /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
be_bryan 0:b74591d5ab33 423 #define __CLZ __cmsis_iar_clz_not_active
be_bryan 0:b74591d5ab33 424 #define __SSAT __cmsis_iar_ssat_not_active
be_bryan 0:b74591d5ab33 425 #define __USAT __cmsis_iar_usat_not_active
be_bryan 0:b74591d5ab33 426 #define __RBIT __cmsis_iar_rbit_not_active
be_bryan 0:b74591d5ab33 427 #define __get_APSR __cmsis_iar_get_APSR_not_active
be_bryan 0:b74591d5ab33 428 #endif
be_bryan 0:b74591d5ab33 429
be_bryan 0:b74591d5ab33 430
be_bryan 0:b74591d5ab33 431 #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
be_bryan 0:b74591d5ab33 432 (defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
be_bryan 0:b74591d5ab33 433 #define __get_FPSCR __cmsis_iar_get_FPSR_not_active
be_bryan 0:b74591d5ab33 434 #define __set_FPSCR __cmsis_iar_set_FPSR_not_active
be_bryan 0:b74591d5ab33 435 #endif
be_bryan 0:b74591d5ab33 436
be_bryan 0:b74591d5ab33 437 #include <intrinsics.h>
be_bryan 0:b74591d5ab33 438
be_bryan 0:b74591d5ab33 439 #if __IAR_M0_FAMILY
be_bryan 0:b74591d5ab33 440 /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
be_bryan 0:b74591d5ab33 441 #undef __CLZ
be_bryan 0:b74591d5ab33 442 #undef __SSAT
be_bryan 0:b74591d5ab33 443 #undef __USAT
be_bryan 0:b74591d5ab33 444 #undef __RBIT
be_bryan 0:b74591d5ab33 445 #undef __get_APSR
be_bryan 0:b74591d5ab33 446
be_bryan 0:b74591d5ab33 447 __STATIC_INLINE uint8_t __CLZ(uint32_t data) {
be_bryan 0:b74591d5ab33 448 if (data == 0u) { return 32u; }
be_bryan 0:b74591d5ab33 449
be_bryan 0:b74591d5ab33 450 uint32_t count = 0;
be_bryan 0:b74591d5ab33 451 uint32_t mask = 0x80000000;
be_bryan 0:b74591d5ab33 452
be_bryan 0:b74591d5ab33 453 while ((data & mask) == 0)
be_bryan 0:b74591d5ab33 454 {
be_bryan 0:b74591d5ab33 455 count += 1u;
be_bryan 0:b74591d5ab33 456 mask = mask >> 1u;
be_bryan 0:b74591d5ab33 457 }
be_bryan 0:b74591d5ab33 458 return (count);
be_bryan 0:b74591d5ab33 459 }
be_bryan 0:b74591d5ab33 460
be_bryan 0:b74591d5ab33 461 __STATIC_INLINE uint32_t __RBIT(uint32_t v) {
be_bryan 0:b74591d5ab33 462 uint8_t sc = 31;
be_bryan 0:b74591d5ab33 463 uint32_t r = v;
be_bryan 0:b74591d5ab33 464 for (v >>= 1U; v; v >>= 1U)
be_bryan 0:b74591d5ab33 465 {
be_bryan 0:b74591d5ab33 466 r <<= 1U;
be_bryan 0:b74591d5ab33 467 r |= v & 1U;
be_bryan 0:b74591d5ab33 468 sc--;
be_bryan 0:b74591d5ab33 469 }
be_bryan 0:b74591d5ab33 470 return (r << sc);
be_bryan 0:b74591d5ab33 471 }
be_bryan 0:b74591d5ab33 472
be_bryan 0:b74591d5ab33 473 __STATIC_INLINE uint32_t __get_APSR(void) {
be_bryan 0:b74591d5ab33 474 uint32_t res;
be_bryan 0:b74591d5ab33 475 __asm("MRS %0,APSR" : "=r" (res));
be_bryan 0:b74591d5ab33 476 return res;
be_bryan 0:b74591d5ab33 477 }
be_bryan 0:b74591d5ab33 478
be_bryan 0:b74591d5ab33 479 #endif
be_bryan 0:b74591d5ab33 480
be_bryan 0:b74591d5ab33 481 #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
be_bryan 0:b74591d5ab33 482 (defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
be_bryan 0:b74591d5ab33 483 #undef __get_FPSCR
be_bryan 0:b74591d5ab33 484 #undef __set_FPSCR
be_bryan 0:b74591d5ab33 485 #define __get_FPSCR() (0)
be_bryan 0:b74591d5ab33 486 #define __set_FPSCR(VALUE) ((void)VALUE)
be_bryan 0:b74591d5ab33 487 #endif
be_bryan 0:b74591d5ab33 488
be_bryan 0:b74591d5ab33 489 #pragma diag_suppress=Pe940
be_bryan 0:b74591d5ab33 490 #pragma diag_suppress=Pe177
be_bryan 0:b74591d5ab33 491
be_bryan 0:b74591d5ab33 492 #define __enable_irq __enable_interrupt
be_bryan 0:b74591d5ab33 493 #define __disable_irq __disable_interrupt
be_bryan 0:b74591d5ab33 494 #define __NOP __no_operation
be_bryan 0:b74591d5ab33 495
be_bryan 0:b74591d5ab33 496 #define __get_xPSR __get_PSR
be_bryan 0:b74591d5ab33 497
be_bryan 0:b74591d5ab33 498 #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0)
be_bryan 0:b74591d5ab33 499
be_bryan 0:b74591d5ab33 500 __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr) {
be_bryan 0:b74591d5ab33 501 return __LDREX((unsigned long *)ptr);
be_bryan 0:b74591d5ab33 502 }
be_bryan 0:b74591d5ab33 503
be_bryan 0:b74591d5ab33 504 __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr) {
be_bryan 0:b74591d5ab33 505 return __STREX(value, (unsigned long *)ptr);
be_bryan 0:b74591d5ab33 506 }
be_bryan 0:b74591d5ab33 507 #endif
be_bryan 0:b74591d5ab33 508
be_bryan 0:b74591d5ab33 509
be_bryan 0:b74591d5ab33 510 /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
be_bryan 0:b74591d5ab33 511 #if (__CORTEX_M >= 0x03)
be_bryan 0:b74591d5ab33 512
be_bryan 0:b74591d5ab33 513 __IAR_FT uint32_t __RRX(uint32_t value) {
be_bryan 0:b74591d5ab33 514 uint32_t result;
be_bryan 0:b74591d5ab33 515 __ASM("RRX %0, %1" : "=r"(result) : "r" (value) : "cc");
be_bryan 0:b74591d5ab33 516 return(result);
be_bryan 0:b74591d5ab33 517 }
be_bryan 0:b74591d5ab33 518
be_bryan 0:b74591d5ab33 519 __IAR_FT void __set_BASEPRI_MAX(uint32_t value) {
be_bryan 0:b74591d5ab33 520 __asm volatile("MSR BASEPRI_MAX,%0"::"r" (value));
be_bryan 0:b74591d5ab33 521 }
be_bryan 0:b74591d5ab33 522
be_bryan 0:b74591d5ab33 523
be_bryan 0:b74591d5ab33 524 #define __enable_fault_irq __enable_fiq
be_bryan 0:b74591d5ab33 525 #define __disable_fault_irq __disable_fiq
be_bryan 0:b74591d5ab33 526
be_bryan 0:b74591d5ab33 527
be_bryan 0:b74591d5ab33 528 #endif /* (__CORTEX_M >= 0x03) */
be_bryan 0:b74591d5ab33 529
be_bryan 0:b74591d5ab33 530 __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2) {
be_bryan 0:b74591d5ab33 531 return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
be_bryan 0:b74591d5ab33 532 }
be_bryan 0:b74591d5ab33 533
be_bryan 0:b74591d5ab33 534 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
be_bryan 0:b74591d5ab33 535 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
be_bryan 0:b74591d5ab33 536
be_bryan 0:b74591d5ab33 537 __IAR_FT uint32_t __TZ_get_CONTROL_NS(void) {
be_bryan 0:b74591d5ab33 538 uint32_t res;
be_bryan 0:b74591d5ab33 539 __asm volatile("MRS %0,CONTROL_NS" : "=r" (res));
be_bryan 0:b74591d5ab33 540 return res;
be_bryan 0:b74591d5ab33 541 }
be_bryan 0:b74591d5ab33 542
be_bryan 0:b74591d5ab33 543 __IAR_FT void __TZ_set_CONTROL_NS(uint32_t value) {
be_bryan 0:b74591d5ab33 544 __asm volatile("MSR CONTROL_NS,%0" :: "r" (value));
be_bryan 0:b74591d5ab33 545 }
be_bryan 0:b74591d5ab33 546
be_bryan 0:b74591d5ab33 547 __IAR_FT uint32_t __TZ_get_PSP_NS(void) {
be_bryan 0:b74591d5ab33 548 uint32_t res;
be_bryan 0:b74591d5ab33 549 __asm volatile("MRS %0,PSP_NS" : "=r" (res));
be_bryan 0:b74591d5ab33 550 return res;
be_bryan 0:b74591d5ab33 551 }
be_bryan 0:b74591d5ab33 552
be_bryan 0:b74591d5ab33 553 __IAR_FT void __TZ_set_PSP_NS(uint32_t value) {
be_bryan 0:b74591d5ab33 554 __asm volatile("MSR PSP_NS,%0" :: "r" (value));
be_bryan 0:b74591d5ab33 555 }
be_bryan 0:b74591d5ab33 556
be_bryan 0:b74591d5ab33 557 __IAR_FT uint32_t __TZ_get_MSP_NS(void) {
be_bryan 0:b74591d5ab33 558 uint32_t res;
be_bryan 0:b74591d5ab33 559 __asm volatile("MRS %0,MSP_NS" : "=r" (res));
be_bryan 0:b74591d5ab33 560 return res;
be_bryan 0:b74591d5ab33 561 }
be_bryan 0:b74591d5ab33 562
be_bryan 0:b74591d5ab33 563 __IAR_FT void __TZ_set_MSP_NS(uint32_t value) {
be_bryan 0:b74591d5ab33 564 __asm volatile("MSR MSP_NS,%0" :: "r" (value));
be_bryan 0:b74591d5ab33 565 }
be_bryan 0:b74591d5ab33 566
be_bryan 0:b74591d5ab33 567 __IAR_FT uint32_t __TZ_get_SP_NS(void) {
be_bryan 0:b74591d5ab33 568 uint32_t res;
be_bryan 0:b74591d5ab33 569 __asm volatile("MRS %0,SP_NS" : "=r" (res));
be_bryan 0:b74591d5ab33 570 return res;
be_bryan 0:b74591d5ab33 571 }
be_bryan 0:b74591d5ab33 572 __IAR_FT void __TZ_set_SP_NS(uint32_t value) {
be_bryan 0:b74591d5ab33 573 __asm volatile("MSR SP_NS,%0" :: "r" (value));
be_bryan 0:b74591d5ab33 574 }
be_bryan 0:b74591d5ab33 575
be_bryan 0:b74591d5ab33 576 __IAR_FT uint32_t __TZ_get_PRIMASK_NS(void) {
be_bryan 0:b74591d5ab33 577 uint32_t res;
be_bryan 0:b74591d5ab33 578 __asm volatile("MRS %0,PRIMASK_NS" : "=r" (res));
be_bryan 0:b74591d5ab33 579 return res;
be_bryan 0:b74591d5ab33 580 }
be_bryan 0:b74591d5ab33 581
be_bryan 0:b74591d5ab33 582 __IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value) {
be_bryan 0:b74591d5ab33 583 __asm volatile("MSR PRIMASK_NS,%0" :: "r" (value));
be_bryan 0:b74591d5ab33 584 }
be_bryan 0:b74591d5ab33 585
be_bryan 0:b74591d5ab33 586 __IAR_FT uint32_t __TZ_get_BASEPRI_NS(void) {
be_bryan 0:b74591d5ab33 587 uint32_t res;
be_bryan 0:b74591d5ab33 588 __asm volatile("MRS %0,BASEPRI_NS" : "=r" (res));
be_bryan 0:b74591d5ab33 589 return res;
be_bryan 0:b74591d5ab33 590 }
be_bryan 0:b74591d5ab33 591
be_bryan 0:b74591d5ab33 592 __IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value) {
be_bryan 0:b74591d5ab33 593 __asm volatile("MSR BASEPRI_NS,%0" :: "r" (value));
be_bryan 0:b74591d5ab33 594 }
be_bryan 0:b74591d5ab33 595
be_bryan 0:b74591d5ab33 596 __IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void) {
be_bryan 0:b74591d5ab33 597 uint32_t res;
be_bryan 0:b74591d5ab33 598 __asm volatile("MRS %0,FAULTMASK_NS" : "=r" (res));
be_bryan 0:b74591d5ab33 599 return res;
be_bryan 0:b74591d5ab33 600 }
be_bryan 0:b74591d5ab33 601
be_bryan 0:b74591d5ab33 602 __IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value) {
be_bryan 0:b74591d5ab33 603 __asm volatile("MSR FAULTMASK_NS,%0" :: "r" (value));
be_bryan 0:b74591d5ab33 604 }
be_bryan 0:b74591d5ab33 605
be_bryan 0:b74591d5ab33 606 __IAR_FT uint32_t __TZ_get_PSPLIM_NS(void) {
be_bryan 0:b74591d5ab33 607 uint32_t res;
be_bryan 0:b74591d5ab33 608 __asm volatile("MRS %0,PSPLIM_NS" : "=r" (res));
be_bryan 0:b74591d5ab33 609 return res;
be_bryan 0:b74591d5ab33 610 }
be_bryan 0:b74591d5ab33 611 __IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value) {
be_bryan 0:b74591d5ab33 612 __asm volatile("MSR PSPLIM_NS,%0" :: "r" (value));
be_bryan 0:b74591d5ab33 613 }
be_bryan 0:b74591d5ab33 614
be_bryan 0:b74591d5ab33 615 __IAR_FT uint32_t __TZ_get_MSPLIM_NS(void) {
be_bryan 0:b74591d5ab33 616 uint32_t res;
be_bryan 0:b74591d5ab33 617 __asm volatile("MRS %0,MSPLIM_NS" : "=r" (res));
be_bryan 0:b74591d5ab33 618 return res;
be_bryan 0:b74591d5ab33 619 }
be_bryan 0:b74591d5ab33 620
be_bryan 0:b74591d5ab33 621 __IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value) {
be_bryan 0:b74591d5ab33 622 __asm volatile("MSR MSPLIM_NS,%0" :: "r" (value));
be_bryan 0:b74591d5ab33 623 }
be_bryan 0:b74591d5ab33 624
be_bryan 0:b74591d5ab33 625 #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
be_bryan 0:b74591d5ab33 626
be_bryan 0:b74591d5ab33 627 #endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */
be_bryan 0:b74591d5ab33 628
be_bryan 0:b74591d5ab33 629 #define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value))
be_bryan 0:b74591d5ab33 630
be_bryan 0:b74591d5ab33 631 #if __IAR_M0_FAMILY
be_bryan 0:b74591d5ab33 632 __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat) {
be_bryan 0:b74591d5ab33 633 if ((sat >= 1U) && (sat <= 32U)) {
be_bryan 0:b74591d5ab33 634 const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
be_bryan 0:b74591d5ab33 635 const int32_t min = -1 - max ;
be_bryan 0:b74591d5ab33 636 if (val > max) {
be_bryan 0:b74591d5ab33 637 return max;
be_bryan 0:b74591d5ab33 638 } else if (val < min) {
be_bryan 0:b74591d5ab33 639 return min;
be_bryan 0:b74591d5ab33 640 }
be_bryan 0:b74591d5ab33 641 }
be_bryan 0:b74591d5ab33 642 return val;
be_bryan 0:b74591d5ab33 643 }
be_bryan 0:b74591d5ab33 644
be_bryan 0:b74591d5ab33 645 __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat) {
be_bryan 0:b74591d5ab33 646 if (sat <= 31U) {
be_bryan 0:b74591d5ab33 647 const uint32_t max = ((1U << sat) - 1U);
be_bryan 0:b74591d5ab33 648 if (val > (int32_t)max) {
be_bryan 0:b74591d5ab33 649 return max;
be_bryan 0:b74591d5ab33 650 } else if (val < 0) {
be_bryan 0:b74591d5ab33 651 return 0U;
be_bryan 0:b74591d5ab33 652 }
be_bryan 0:b74591d5ab33 653 }
be_bryan 0:b74591d5ab33 654 return (uint32_t)val;
be_bryan 0:b74591d5ab33 655 }
be_bryan 0:b74591d5ab33 656 #endif
be_bryan 0:b74591d5ab33 657
be_bryan 0:b74591d5ab33 658 #if (__CORTEX_M >= 0x03) /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
be_bryan 0:b74591d5ab33 659
be_bryan 0:b74591d5ab33 660 __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr) {
be_bryan 0:b74591d5ab33 661 uint32_t res;
be_bryan 0:b74591d5ab33 662 __ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
be_bryan 0:b74591d5ab33 663 return ((uint8_t)res);
be_bryan 0:b74591d5ab33 664 }
be_bryan 0:b74591d5ab33 665
be_bryan 0:b74591d5ab33 666 __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr) {
be_bryan 0:b74591d5ab33 667 uint32_t res;
be_bryan 0:b74591d5ab33 668 __ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
be_bryan 0:b74591d5ab33 669 return ((uint16_t)res);
be_bryan 0:b74591d5ab33 670 }
be_bryan 0:b74591d5ab33 671
be_bryan 0:b74591d5ab33 672 __IAR_FT uint32_t __LDRT(volatile uint32_t *addr) {
be_bryan 0:b74591d5ab33 673 uint32_t res;
be_bryan 0:b74591d5ab33 674 __ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
be_bryan 0:b74591d5ab33 675 return res;
be_bryan 0:b74591d5ab33 676 }
be_bryan 0:b74591d5ab33 677
be_bryan 0:b74591d5ab33 678 __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr) {
be_bryan 0:b74591d5ab33 679 __ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
be_bryan 0:b74591d5ab33 680 }
be_bryan 0:b74591d5ab33 681
be_bryan 0:b74591d5ab33 682 __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr) {
be_bryan 0:b74591d5ab33 683 __ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
be_bryan 0:b74591d5ab33 684 }
be_bryan 0:b74591d5ab33 685
be_bryan 0:b74591d5ab33 686 __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr) {
be_bryan 0:b74591d5ab33 687 __ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory");
be_bryan 0:b74591d5ab33 688 }
be_bryan 0:b74591d5ab33 689
be_bryan 0:b74591d5ab33 690 #endif /* (__CORTEX_M >= 0x03) */
be_bryan 0:b74591d5ab33 691
be_bryan 0:b74591d5ab33 692 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
be_bryan 0:b74591d5ab33 693 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
be_bryan 0:b74591d5ab33 694
be_bryan 0:b74591d5ab33 695
be_bryan 0:b74591d5ab33 696 __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr) {
be_bryan 0:b74591d5ab33 697 uint32_t res;
be_bryan 0:b74591d5ab33 698 __ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
be_bryan 0:b74591d5ab33 699 return ((uint8_t)res);
be_bryan 0:b74591d5ab33 700 }
be_bryan 0:b74591d5ab33 701
be_bryan 0:b74591d5ab33 702 __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr) {
be_bryan 0:b74591d5ab33 703 uint32_t res;
be_bryan 0:b74591d5ab33 704 __ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
be_bryan 0:b74591d5ab33 705 return ((uint16_t)res);
be_bryan 0:b74591d5ab33 706 }
be_bryan 0:b74591d5ab33 707
be_bryan 0:b74591d5ab33 708 __IAR_FT uint32_t __LDA(volatile uint32_t *ptr) {
be_bryan 0:b74591d5ab33 709 uint32_t res;
be_bryan 0:b74591d5ab33 710 __ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
be_bryan 0:b74591d5ab33 711 return res;
be_bryan 0:b74591d5ab33 712 }
be_bryan 0:b74591d5ab33 713
be_bryan 0:b74591d5ab33 714 __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr) {
be_bryan 0:b74591d5ab33 715 __ASM volatile ("STLB %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
be_bryan 0:b74591d5ab33 716 }
be_bryan 0:b74591d5ab33 717
be_bryan 0:b74591d5ab33 718 __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr) {
be_bryan 0:b74591d5ab33 719 __ASM volatile ("STLH %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
be_bryan 0:b74591d5ab33 720 }
be_bryan 0:b74591d5ab33 721
be_bryan 0:b74591d5ab33 722 __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr) {
be_bryan 0:b74591d5ab33 723 __ASM volatile ("STL %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
be_bryan 0:b74591d5ab33 724 }
be_bryan 0:b74591d5ab33 725
be_bryan 0:b74591d5ab33 726 __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr) {
be_bryan 0:b74591d5ab33 727 uint32_t res;
be_bryan 0:b74591d5ab33 728 __ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
be_bryan 0:b74591d5ab33 729 return ((uint8_t)res);
be_bryan 0:b74591d5ab33 730 }
be_bryan 0:b74591d5ab33 731
be_bryan 0:b74591d5ab33 732 __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr) {
be_bryan 0:b74591d5ab33 733 uint32_t res;
be_bryan 0:b74591d5ab33 734 __ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
be_bryan 0:b74591d5ab33 735 return ((uint16_t)res);
be_bryan 0:b74591d5ab33 736 }
be_bryan 0:b74591d5ab33 737
be_bryan 0:b74591d5ab33 738 __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr) {
be_bryan 0:b74591d5ab33 739 uint32_t res;
be_bryan 0:b74591d5ab33 740 __ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
be_bryan 0:b74591d5ab33 741 return res;
be_bryan 0:b74591d5ab33 742 }
be_bryan 0:b74591d5ab33 743
be_bryan 0:b74591d5ab33 744 __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr) {
be_bryan 0:b74591d5ab33 745 uint32_t res;
be_bryan 0:b74591d5ab33 746 __ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
be_bryan 0:b74591d5ab33 747 return res;
be_bryan 0:b74591d5ab33 748 }
be_bryan 0:b74591d5ab33 749
be_bryan 0:b74591d5ab33 750 __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr) {
be_bryan 0:b74591d5ab33 751 uint32_t res;
be_bryan 0:b74591d5ab33 752 __ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
be_bryan 0:b74591d5ab33 753 return res;
be_bryan 0:b74591d5ab33 754 }
be_bryan 0:b74591d5ab33 755
be_bryan 0:b74591d5ab33 756 __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr) {
be_bryan 0:b74591d5ab33 757 uint32_t res;
be_bryan 0:b74591d5ab33 758 __ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
be_bryan 0:b74591d5ab33 759 return res;
be_bryan 0:b74591d5ab33 760 }
be_bryan 0:b74591d5ab33 761
be_bryan 0:b74591d5ab33 762 #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
be_bryan 0:b74591d5ab33 763
be_bryan 0:b74591d5ab33 764 #undef __IAR_FT
be_bryan 0:b74591d5ab33 765 #undef __IAR_M0_FAMILY
be_bryan 0:b74591d5ab33 766 #undef __ICCARM_V8
be_bryan 0:b74591d5ab33 767
be_bryan 0:b74591d5ab33 768 #pragma diag_default=Pe940
be_bryan 0:b74591d5ab33 769 #pragma diag_default=Pe177
be_bryan 0:b74591d5ab33 770
be_bryan 0:b74591d5ab33 771 #endif /* __CMSIS_ICCARM_H__ */