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Fork of L3GD20_SPI by
L3GD20.h@0:175bf093daa8, 2014-05-12 (annotated)
- Committer:
- lelect
- Date:
- Mon May 12 05:59:12 2014 +0000
- Revision:
- 0:175bf093daa8
- Child:
- 1:2ebc045424af
test commit
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| lelect | 0:175bf093daa8 | 1 | #ifndef MBED_SPI |
| lelect | 0:175bf093daa8 | 2 | #define MBED_SPI |
| lelect | 0:175bf093daa8 | 3 | #include "mbed.h" |
| lelect | 0:175bf093daa8 | 4 | #include "L3GD20_Resister.h" |
| lelect | 0:175bf093daa8 | 5 | /** @file |
| lelect | 0:175bf093daa8 | 6 | * |
| lelect | 0:175bf093daa8 | 7 | * This is test program. |
| lelect | 0:175bf093daa8 | 8 | */ |
| lelect | 0:175bf093daa8 | 9 | class L3GD20 |
| lelect | 0:175bf093daa8 | 10 | { |
| lelect | 0:175bf093daa8 | 11 | public: |
| lelect | 0:175bf093daa8 | 12 | L3GD20(PinName miso, PinName mosi, PinName scl, PinName cs,PinName interrupt2=NC); |
| lelect | 0:175bf093daa8 | 13 | typedef enum { |
| lelect | 0:175bf093daa8 | 14 | null=0x00,WhoAmI=0x0F,CtrlReg1=0x20,CtrlReg2=0x21,CtrlReg3=0x22,CtrlReg4=0x23,CtrlReg5=0x24,Reference=0x25,OutTemp=0x26,StatusReg=0x27,OutXL=0x28,OutXH=0x29,OutYL=0x2A,OutYH=0x2B,OutZL=0x2C,OutZH=0x2D,FIFOCtrlReg=0x2E,FIFOSrcReg=0x2F,INT1Cfg=0x30,INT1Src=0x31,INT1ThsXH=0x32,INT1ThsXL=0x33,INT1ThsYH=0x34,INT1ThsYL=0x35,INT1ThsZH=0x36,INT1ThsZL=0x37,INT1Duration=0x38,READ=0x80 |
| lelect | 0:175bf093daa8 | 15 | } RESISTER; |
| lelect | 0:175bf093daa8 | 16 | typedef enum { |
| lelect | 0:175bf093daa8 | 17 | Y=0x1,X=0x1<<1,Z=0x1<<2,XY=X|Y,XZ=X|Z,YZ=Y|Z,XYZ=X|Y|Z |
| lelect | 0:175bf093daa8 | 18 | } DIRECTION; |
| lelect | 0:175bf093daa8 | 19 | typedef enum { |
| lelect | 0:175bf093daa8 | 20 | BYPASSmode=0x0,FIFOmode,STREAMmode,STREAMtoFIFOmode,BYPASStoSTREAMmode |
| lelect | 0:175bf093daa8 | 21 | } FIFO_mode; |
| lelect | 0:175bf093daa8 | 22 | typedef enum { |
| lelect | 0:175bf093daa8 | 23 | none=0,empty,watermark,overrun |
| lelect | 0:175bf093daa8 | 24 | } FIFOstatus; |
| lelect | 0:175bf093daa8 | 25 | struct tagFIFO { |
| lelect | 0:175bf093daa8 | 26 | FIFOstatus status; |
| lelect | 0:175bf093daa8 | 27 | int level; |
| lelect | 0:175bf093daa8 | 28 | } FIFO; |
| lelect | 0:175bf093daa8 | 29 | struct config { |
| lelect | 0:175bf093daa8 | 30 | //read and write resister |
| lelect | 0:175bf093daa8 | 31 | union CTRL_REG1 CTRL_REG1; |
| lelect | 0:175bf093daa8 | 32 | union CTRL_REG2 CTRL_REG2; |
| lelect | 0:175bf093daa8 | 33 | union CTRL_REG3 CTRL_REG3; |
| lelect | 0:175bf093daa8 | 34 | union CTRL_REG4 CTRL_REG4; |
| lelect | 0:175bf093daa8 | 35 | union CTRL_REG5 CTRL_REG5; |
| lelect | 0:175bf093daa8 | 36 | union REF_DATACAP REF_DATACAP; |
| lelect | 0:175bf093daa8 | 37 | union OUT_TEMP OUT_TEMP; |
| lelect | 0:175bf093daa8 | 38 | union STATUS_REG STATUS_REG; |
| lelect | 0:175bf093daa8 | 39 | union FIFO_CTRL_REG FIFO_CTRL_REG; |
| lelect | 0:175bf093daa8 | 40 | union INT1_CFG INT1_CFG; |
| lelect | 0:175bf093daa8 | 41 | union INT1_TSH_XH INT1_TSH_XH; |
| lelect | 0:175bf093daa8 | 42 | union INT1_TSH_XL INT1_TSH_XL; |
| lelect | 0:175bf093daa8 | 43 | union INT1_TSH_YH INT1_TSH_YH; |
| lelect | 0:175bf093daa8 | 44 | union INT1_TSH_YL INT1_TSH_YL; |
| lelect | 0:175bf093daa8 | 45 | union INT1_TSH_ZH INT1_TSH_ZH; |
| lelect | 0:175bf093daa8 | 46 | union INT1_TSH_ZL INT1_TSH_ZL; |
| lelect | 0:175bf093daa8 | 47 | union INT1_DURATION INT1_DURATION; |
| lelect | 0:175bf093daa8 | 48 | } _config; |
| lelect | 0:175bf093daa8 | 49 | struct status { |
| lelect | 0:175bf093daa8 | 50 | //read only resister |
| lelect | 0:175bf093daa8 | 51 | int OUT_TEMP; |
| lelect | 0:175bf093daa8 | 52 | int STATUS_REG; |
| lelect | 0:175bf093daa8 | 53 | union FIFO_SRC_REG FIFO_SRC_REG; |
| lelect | 0:175bf093daa8 | 54 | int INT1_SRC; |
| lelect | 0:175bf093daa8 | 55 | } _status; |
| lelect | 0:175bf093daa8 | 56 | //Class method |
| lelect | 0:175bf093daa8 | 57 | /** Power_OnOff |
| lelect | 0:175bf093daa8 | 58 | * |
| lelect | 0:175bf093daa8 | 59 | * @param enable L3GD20 channel |
| lelect | 0:175bf093daa8 | 60 | */ |
| lelect | 0:175bf093daa8 | 61 | void start(DIRECTION enable); |
| lelect | 0:175bf093daa8 | 62 | void start(DIRECTION enable,void (*func)(anglerrates*)); |
| lelect | 0:175bf093daa8 | 63 | /** stop sampling |
| lelect | 0:175bf093daa8 | 64 | */ |
| lelect | 0:175bf093daa8 | 65 | void stop(); |
| lelect | 0:175bf093daa8 | 66 | void sleep(); |
| lelect | 0:175bf093daa8 | 67 | //only read data and calcurate dps |
| lelect | 0:175bf093daa8 | 68 | void read(anglerrates* val,DIRECTION direction); |
| lelect | 0:175bf093daa8 | 69 | //only read temperature (I don't know meanig of this data) |
| lelect | 0:175bf093daa8 | 70 | int readTemperature(); |
| lelect | 0:175bf093daa8 | 71 | //L3GD20mode change need reset(bypass) when filled FIFObuffor |
| lelect | 0:175bf093daa8 | 72 | void enableFIFO(FIFO_mode mode,FIFOstatus interrupt,const int threshold); |
| lelect | 0:175bf093daa8 | 73 | //status Update |
| lelect | 0:175bf093daa8 | 74 | int updateFIFO(void); |
| lelect | 0:175bf093daa8 | 75 | anglerrates _value; |
| lelect | 0:175bf093daa8 | 76 | protected: |
| lelect | 0:175bf093daa8 | 77 | //write command to resister |
| lelect | 0:175bf093daa8 | 78 | void write(RESISTER reg,int val); |
| lelect | 0:175bf093daa8 | 79 | //read resister for resister |
| lelect | 0:175bf093daa8 | 80 | void read(RESISTER reg,int* val); |
| lelect | 0:175bf093daa8 | 81 | //just send reboot command |
| lelect | 0:175bf093daa8 | 82 | void reboot(); |
| lelect | 0:175bf093daa8 | 83 | //read all configration rester |
| lelect | 0:175bf093daa8 | 84 | void configReadOut(void); |
| lelect | 0:175bf093daa8 | 85 | //read all status rester |
| lelect | 0:175bf093daa8 | 86 | void statusReadOut(void); |
| lelect | 0:175bf093daa8 | 87 | //for InterruptIn function ,call userFunction in this methed |
| lelect | 0:175bf093daa8 | 88 | void interrupt(void); |
| lelect | 0:175bf093daa8 | 89 | /* |
| lelect | 0:175bf093daa8 | 90 | void datarate(uint8_t rate,uint8_t bandwidth); |
| lelect | 0:175bf093daa8 | 91 | void setDataFormat(); |
| lelect | 0:175bf093daa8 | 92 | void filter(uint8_t mode,uint8_t frequency); |
| lelect | 0:175bf093daa8 | 93 | void channelSource(uint8_t channnel,uint8_t dataSelection,uint8_t interruptSelection); |
| lelect | 0:175bf093daa8 | 94 | void FIFO(uint8_t mode,uint8_t watermark); |
| lelect | 0:175bf093daa8 | 95 | void interrupt(uint8_t source,uint8_t threthold,uint8_t duration,uint8_t Wait); |
| lelect | 0:175bf093daa8 | 96 | */ |
| lelect | 0:175bf093daa8 | 97 | void (*userFunction)(anglerrates*); |
| lelect | 0:175bf093daa8 | 98 | SPI _spi; |
| lelect | 0:175bf093daa8 | 99 | DigitalOut _cs; |
| lelect | 0:175bf093daa8 | 100 | InterruptIn _int2; |
| lelect | 0:175bf093daa8 | 101 | }; |
| lelect | 0:175bf093daa8 | 102 | |
| lelect | 0:175bf093daa8 | 103 | #endif |

