ECE 4180 Labs / Mbed 2 deprecated 4180_Lab2_USB

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Dependencies:   FatFileSystem mbed

Fork of 4180_Lab2_USB by Jeremy Cai

USBHostLite/usbhost_lpc17xx.c@1:fca955be2a5b, 2016-09-25 (annotated)

Committer:
jeremycai3721
Date:
Sun Sep 25 19:04:39 2016 +0000
Revision:
1:fca955be2a5b
Parent:
0:4e756c4c88a7 
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UserRevisionLine numberNew contents of line
chris 0:4e756c4c88a7 1 /*
chris 0:4e756c4c88a7 2 **************************************************************************************************************
chris 0:4e756c4c88a7 3 * NXP USB Host Stack
chris 0:4e756c4c88a7 4 *
chris 0:4e756c4c88a7 5 * (c) Copyright 2008, NXP SemiConductors
chris 0:4e756c4c88a7 6 * (c) Copyright 2008, OnChip Technologies LLC
chris 0:4e756c4c88a7 7 * All Rights Reserved
chris 0:4e756c4c88a7 8 *
chris 0:4e756c4c88a7 9 * www.nxp.com
chris 0:4e756c4c88a7 10 * www.onchiptech.com
chris 0:4e756c4c88a7 11 *
chris 0:4e756c4c88a7 12 * File : usbhost_lpc17xx.c
chris 0:4e756c4c88a7 13 * Programmer(s) : Ravikanth.P
chris 0:4e756c4c88a7 14 * Version :
chris 0:4e756c4c88a7 15 *
chris 0:4e756c4c88a7 16 **************************************************************************************************************
chris 0:4e756c4c88a7 17 */
chris 0:4e756c4c88a7 18
chris 0:4e756c4c88a7 19 /*
chris 0:4e756c4c88a7 20 **************************************************************************************************************
chris 0:4e756c4c88a7 21 * INCLUDE HEADER FILES
chris 0:4e756c4c88a7 22 **************************************************************************************************************
chris 0:4e756c4c88a7 23 */
chris 0:4e756c4c88a7 24
chris 0:4e756c4c88a7 25 #include "usbhost_lpc17xx.h"
chris 0:4e756c4c88a7 26
chris 0:4e756c4c88a7 27 /*
chris 0:4e756c4c88a7 28 **************************************************************************************************************
chris 0:4e756c4c88a7 29 * GLOBAL VARIABLES
chris 0:4e756c4c88a7 30 **************************************************************************************************************
chris 0:4e756c4c88a7 31 */
chris 0:4e756c4c88a7 32 int gUSBConnected;
chris 0:4e756c4c88a7 33
chris 0:4e756c4c88a7 34 volatile USB_INT32U HOST_RhscIntr = 0; /* Root Hub Status Change interrupt */
chris 0:4e756c4c88a7 35 volatile USB_INT32U HOST_WdhIntr = 0; /* Semaphore to wait until the TD is submitted */
chris 0:4e756c4c88a7 36 volatile USB_INT08U HOST_TDControlStatus = 0;
chris 0:4e756c4c88a7 37 volatile HCED *EDCtrl; /* Control endpoint descriptor structure */
chris 0:4e756c4c88a7 38 volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */
chris 0:4e756c4c88a7 39 volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */
chris 0:4e756c4c88a7 40 volatile HCTD *TDHead; /* Head transfer descriptor structure */
chris 0:4e756c4c88a7 41 volatile HCTD *TDTail; /* Tail transfer descriptor structure */
chris 0:4e756c4c88a7 42 volatile HCCA *Hcca; /* Host Controller Communications Area structure */
chris 0:4e756c4c88a7 43 USB_INT16U *TDBufNonVol; /* Identical to TDBuffer just to reduce compiler warnings */
chris 0:4e756c4c88a7 44 volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */
chris 0:4e756c4c88a7 45
chris 0:4e756c4c88a7 46 // USB host structures
chris 0:4e756c4c88a7 47 // AHB SRAM block 1
chris 0:4e756c4c88a7 48 #define HOSTBASEADDR 0x2007C000
chris 0:4e756c4c88a7 49 // reserve memory for the linker
chris 0:4e756c4c88a7 50 static USB_INT08U HostBuf[0x200] __attribute__((at(HOSTBASEADDR)));
chris 0:4e756c4c88a7 51 /*
chris 0:4e756c4c88a7 52 **************************************************************************************************************
chris 0:4e756c4c88a7 53 * DELAY IN MILLI SECONDS
chris 0:4e756c4c88a7 54 *
chris 0:4e756c4c88a7 55 * Description: This function provides a delay in milli seconds
chris 0:4e756c4c88a7 56 *
chris 0:4e756c4c88a7 57 * Arguments : delay The delay required
chris 0:4e756c4c88a7 58 *
chris 0:4e756c4c88a7 59 * Returns : None
chris 0:4e756c4c88a7 60 *
chris 0:4e756c4c88a7 61 **************************************************************************************************************
chris 0:4e756c4c88a7 62 */
chris 0:4e756c4c88a7 63
chris 0:4e756c4c88a7 64 void Host_DelayMS (USB_INT32U delay)
chris 0:4e756c4c88a7 65 {
chris 0:4e756c4c88a7 66 volatile USB_INT32U i;
chris 0:4e756c4c88a7 67
chris 0:4e756c4c88a7 68
chris 0:4e756c4c88a7 69 for (i = 0; i < delay; i++) {
chris 0:4e756c4c88a7 70 Host_DelayUS(1000);
chris 0:4e756c4c88a7 71 }
chris 0:4e756c4c88a7 72 }
chris 0:4e756c4c88a7 73
chris 0:4e756c4c88a7 74 /*
chris 0:4e756c4c88a7 75 **************************************************************************************************************
chris 0:4e756c4c88a7 76 * DELAY IN MICRO SECONDS
chris 0:4e756c4c88a7 77 *
chris 0:4e756c4c88a7 78 * Description: This function provides a delay in micro seconds
chris 0:4e756c4c88a7 79 *
chris 0:4e756c4c88a7 80 * Arguments : delay The delay required
chris 0:4e756c4c88a7 81 *
chris 0:4e756c4c88a7 82 * Returns : None
chris 0:4e756c4c88a7 83 *
chris 0:4e756c4c88a7 84 **************************************************************************************************************
chris 0:4e756c4c88a7 85 */
chris 0:4e756c4c88a7 86
chris 0:4e756c4c88a7 87 void Host_DelayUS (USB_INT32U delay)
chris 0:4e756c4c88a7 88 {
chris 0:4e756c4c88a7 89 volatile USB_INT32U i;
chris 0:4e756c4c88a7 90
chris 0:4e756c4c88a7 91
chris 0:4e756c4c88a7 92 for (i = 0; i < (4 * delay); i++) { /* This logic was tested. It gives app. 1 micro sec delay */
chris 0:4e756c4c88a7 93 ;
chris 0:4e756c4c88a7 94 }
chris 0:4e756c4c88a7 95 }
chris 0:4e756c4c88a7 96
chris 0:4e756c4c88a7 97 // bits of the USB/OTG clock control register
chris 0:4e756c4c88a7 98 #define HOST_CLK_EN (1<<0)
chris 0:4e756c4c88a7 99 #define DEV_CLK_EN (1<<1)
chris 0:4e756c4c88a7 100 #define PORTSEL_CLK_EN (1<<3)
chris 0:4e756c4c88a7 101 #define AHB_CLK_EN (1<<4)
chris 0:4e756c4c88a7 102
chris 0:4e756c4c88a7 103 // bits of the USB/OTG clock status register
chris 0:4e756c4c88a7 104 #define HOST_CLK_ON (1<<0)
chris 0:4e756c4c88a7 105 #define DEV_CLK_ON (1<<1)
chris 0:4e756c4c88a7 106 #define PORTSEL_CLK_ON (1<<3)
chris 0:4e756c4c88a7 107 #define AHB_CLK_ON (1<<4)
chris 0:4e756c4c88a7 108
chris 0:4e756c4c88a7 109 // we need host clock, OTG/portsel clock and AHB clock
chris 0:4e756c4c88a7 110 #define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN)
chris 0:4e756c4c88a7 111
chris 0:4e756c4c88a7 112 /*
chris 0:4e756c4c88a7 113 **************************************************************************************************************
chris 0:4e756c4c88a7 114 * INITIALIZE THE HOST CONTROLLER
chris 0:4e756c4c88a7 115 *
chris 0:4e756c4c88a7 116 * Description: This function initializes lpc17xx host controller
chris 0:4e756c4c88a7 117 *
chris 0:4e756c4c88a7 118 * Arguments : None
chris 0:4e756c4c88a7 119 *
chris 0:4e756c4c88a7 120 * Returns :
chris 0:4e756c4c88a7 121 *
chris 0:4e756c4c88a7 122 **************************************************************************************************************
chris 0:4e756c4c88a7 123 */
chris 0:4e756c4c88a7 124 void Host_Init (void)
chris 0:4e756c4c88a7 125 {
chris 0:4e756c4c88a7 126 PRINT_Log("In Host_Init\n");
chris 0:4e756c4c88a7 127 NVIC_DisableIRQ(USB_IRQn); /* Disable the USB interrupt source */
chris 0:4e756c4c88a7 128
chris 0:4e756c4c88a7 129 // turn on power for USB
chris 0:4e756c4c88a7 130 LPC_SC->PCONP |= (1UL<<31);
chris 0:4e756c4c88a7 131 // Enable USB host clock, port selection and AHB clock
chris 0:4e756c4c88a7 132 LPC_USB->USBClkCtrl |= CLOCK_MASK;
chris 0:4e756c4c88a7 133 // Wait for clocks to become available
chris 0:4e756c4c88a7 134 while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK)
chris 0:4e756c4c88a7 135 ;
chris 0:4e756c4c88a7 136
chris 0:4e756c4c88a7 137 // it seems the bits[0:1] mean the following
chris 0:4e756c4c88a7 138 // 0: U1=device, U2=host
chris 0:4e756c4c88a7 139 // 1: U1=host, U2=host
chris 0:4e756c4c88a7 140 // 2: reserved
chris 0:4e756c4c88a7 141 // 3: U1=host, U2=device
chris 0:4e756c4c88a7 142 // NB: this register is only available if OTG clock (aka "port select") is enabled!!
chris 0:4e756c4c88a7 143 // since we don't care about port 2, set just bit 0 to 1 (U1=host)
chris 0:4e756c4c88a7 144 LPC_USB->OTGStCtrl |= 1;
chris 0:4e756c4c88a7 145
chris 0:4e756c4c88a7 146 // now that we've configured the ports, we can turn off the portsel clock
chris 0:4e756c4c88a7 147 LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN;
chris 0:4e756c4c88a7 148
chris 0:4e756c4c88a7 149 // power pins are not connected on mbed, so we can skip them
chris 0:4e756c4c88a7 150 /* P1[18] = USB_UP_LED, 01 */
chris 0:4e756c4c88a7 151 /* P1[19] = /USB_PPWR, 10 */
chris 0:4e756c4c88a7 152 /* P1[22] = USB_PWRD, 10 */
chris 0:4e756c4c88a7 153 /* P1[27] = /USB_OVRCR, 10 */
chris 0:4e756c4c88a7 154 /*LPC_PINCON->PINSEL3 &= ~((3<<4) | (3<<6) | (3<<12) | (3<<22));
chris 0:4e756c4c88a7 155 LPC_PINCON->PINSEL3 |= ((1<<4)|(2<<6) | (2<<12) | (2<<22)); // 0x00802080
chris 0:4e756c4c88a7 156 */
chris 0:4e756c4c88a7 157
chris 0:4e756c4c88a7 158 // configure USB D+/D- pins
chris 0:4e756c4c88a7 159 /* P0[29] = USB_D+, 01 */
chris 0:4e756c4c88a7 160 /* P0[30] = USB_D-, 01 */
chris 0:4e756c4c88a7 161 LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28));
chris 0:4e756c4c88a7 162 LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); // 0x14000000
chris 0:4e756c4c88a7 163
chris 0:4e756c4c88a7 164 PRINT_Log("Initializing Host Stack\n");
chris 0:4e756c4c88a7 165
chris 0:4e756c4c88a7 166 Hcca = (volatile HCCA *)(HostBuf+0x000);
chris 0:4e756c4c88a7 167 TDHead = (volatile HCTD *)(HostBuf+0x100);
chris 0:4e756c4c88a7 168 TDTail = (volatile HCTD *)(HostBuf+0x110);
chris 0:4e756c4c88a7 169 EDCtrl = (volatile HCED *)(HostBuf+0x120);
chris 0:4e756c4c88a7 170 EDBulkIn = (volatile HCED *)(HostBuf+0x130);
chris 0:4e756c4c88a7 171 EDBulkOut = (volatile HCED *)(HostBuf+0x140);
chris 0:4e756c4c88a7 172 TDBuffer = (volatile USB_INT08U *)(HostBuf+0x150);
chris 0:4e756c4c88a7 173
chris 0:4e756c4c88a7 174 /* Initialize all the TDs, EDs and HCCA to 0 */
chris 0:4e756c4c88a7 175 Host_EDInit(EDCtrl);
chris 0:4e756c4c88a7 176 Host_EDInit(EDBulkIn);
chris 0:4e756c4c88a7 177 Host_EDInit(EDBulkOut);
chris 0:4e756c4c88a7 178 Host_TDInit(TDHead);
chris 0:4e756c4c88a7 179 Host_TDInit(TDTail);
chris 0:4e756c4c88a7 180 Host_HCCAInit(Hcca);
chris 0:4e756c4c88a7 181
chris 0:4e756c4c88a7 182 Host_DelayMS(50); /* Wait 50 ms before apply reset */
chris 0:4e756c4c88a7 183 LPC_USB->HcControl = 0; /* HARDWARE RESET */
chris 0:4e756c4c88a7 184 LPC_USB->HcControlHeadED = 0; /* Initialize Control list head to Zero */
chris 0:4e756c4c88a7 185 LPC_USB->HcBulkHeadED = 0; /* Initialize Bulk list head to Zero */
chris 0:4e756c4c88a7 186
chris 0:4e756c4c88a7 187 /* SOFTWARE RESET */
chris 0:4e756c4c88a7 188 LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
chris 0:4e756c4c88a7 189 LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL; /* Write Fm Interval and Largest Data Packet Counter */
chris 0:4e756c4c88a7 190
chris 0:4e756c4c88a7 191 /* Put HC in operational state */
chris 0:4e756c4c88a7 192 LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
chris 0:4e756c4c88a7 193 LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC; /* Set Global Power */
chris 0:4e756c4c88a7 194
chris 0:4e756c4c88a7 195 LPC_USB->HcHCCA = (USB_INT32U)Hcca;
chris 0:4e756c4c88a7 196 LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus; /* Clear Interrrupt Status */
chris 0:4e756c4c88a7 197
chris 0:4e756c4c88a7 198
chris 0:4e756c4c88a7 199 LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE |
chris 0:4e756c4c88a7 200 OR_INTR_ENABLE_WDH |
chris 0:4e756c4c88a7 201 OR_INTR_ENABLE_RHSC;
chris 0:4e756c4c88a7 202
chris 0:4e756c4c88a7 203 NVIC_SetPriority(USB_IRQn, 0); /* highest priority */
chris 0:4e756c4c88a7 204 /* Enable the USB Interrupt */
chris 0:4e756c4c88a7 205 NVIC_EnableIRQ(USB_IRQn);
chris 0:4e756c4c88a7 206 PRINT_Log("Host Initialized\n");
chris 0:4e756c4c88a7 207 }
chris 0:4e756c4c88a7 208
chris 0:4e756c4c88a7 209 /*
chris 0:4e756c4c88a7 210 **************************************************************************************************************
chris 0:4e756c4c88a7 211 * INTERRUPT SERVICE ROUTINE
chris 0:4e756c4c88a7 212 *
chris 0:4e756c4c88a7 213 * Description: This function services the interrupt caused by host controller
chris 0:4e756c4c88a7 214 *
chris 0:4e756c4c88a7 215 * Arguments : None
chris 0:4e756c4c88a7 216 *
chris 0:4e756c4c88a7 217 * Returns : None
chris 0:4e756c4c88a7 218 *
chris 0:4e756c4c88a7 219 **************************************************************************************************************
chris 0:4e756c4c88a7 220 */
chris 0:4e756c4c88a7 221
chris 0:4e756c4c88a7 222 void USB_IRQHandler (void) __irq
chris 0:4e756c4c88a7 223 {
chris 0:4e756c4c88a7 224 USB_INT32U int_status;
chris 0:4e756c4c88a7 225 USB_INT32U ie_status;
chris 0:4e756c4c88a7 226
chris 0:4e756c4c88a7 227 int_status = LPC_USB->HcInterruptStatus; /* Read Interrupt Status */
chris 0:4e756c4c88a7 228 ie_status = LPC_USB->HcInterruptEnable; /* Read Interrupt enable status */
chris 0:4e756c4c88a7 229
chris 0:4e756c4c88a7 230 if (!(int_status & ie_status)) {
chris 0:4e756c4c88a7 231 return;
chris 0:4e756c4c88a7 232 } else {
chris 0:4e756c4c88a7 233
chris 0:4e756c4c88a7 234 int_status = int_status & ie_status;
chris 0:4e756c4c88a7 235 if (int_status & OR_INTR_STATUS_RHSC) { /* Root hub status change interrupt */
chris 0:4e756c4c88a7 236 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) {
chris 0:4e756c4c88a7 237 if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) {
chris 0:4e756c4c88a7 238 /*
chris 0:4e756c4c88a7 239 * When DRWE is on, Connect Status Change
chris 0:4e756c4c88a7 240 * means a remote wakeup event.
chris 0:4e756c4c88a7 241 */
chris 0:4e756c4c88a7 242 HOST_RhscIntr = 1;// JUST SOMETHING FOR A BREAKPOINT
chris 0:4e756c4c88a7 243 }
chris 0:4e756c4c88a7 244 else {
chris 0:4e756c4c88a7 245 /*
chris 0:4e756c4c88a7 246 * When DRWE is off, Connect Status Change
chris 0:4e756c4c88a7 247 * is NOT a remote wakeup event
chris 0:4e756c4c88a7 248 */
chris 0:4e756c4c88a7 249 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
chris 0:4e756c4c88a7 250 if (!gUSBConnected) {
chris 0:4e756c4c88a7 251 HOST_TDControlStatus = 0;
chris 0:4e756c4c88a7 252 HOST_WdhIntr = 0;
chris 0:4e756c4c88a7 253 HOST_RhscIntr = 1;
chris 0:4e756c4c88a7 254 gUSBConnected = 1;
chris 0:4e756c4c88a7 255 }
chris 0:4e756c4c88a7 256 else
chris 0:4e756c4c88a7 257 PRINT_Log("Spurious status change (connected)?\n");
chris 0:4e756c4c88a7 258 } else {
chris 0:4e756c4c88a7 259 if (gUSBConnected) {
chris 0:4e756c4c88a7 260 LPC_USB->HcInterruptEnable = 0; // why do we get multiple disc. rupts???
chris 0:4e756c4c88a7 261 HOST_RhscIntr = 0;
chris 0:4e756c4c88a7 262 gUSBConnected = 0;
chris 0:4e756c4c88a7 263 }
chris 0:4e756c4c88a7 264 else
chris 0:4e756c4c88a7 265 PRINT_Log("Spurious status change (disconnected)?\n");
chris 0:4e756c4c88a7 266 }
chris 0:4e756c4c88a7 267 }
chris 0:4e756c4c88a7 268 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
chris 0:4e756c4c88a7 269 }
chris 0:4e756c4c88a7 270 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) {
chris 0:4e756c4c88a7 271 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
chris 0:4e756c4c88a7 272 }
chris 0:4e756c4c88a7 273 }
chris 0:4e756c4c88a7 274 if (int_status & OR_INTR_STATUS_WDH) { /* Writeback Done Head interrupt */
chris 0:4e756c4c88a7 275 HOST_WdhIntr = 1;
chris 0:4e756c4c88a7 276 HOST_TDControlStatus = (TDHead->Control >> 28) & 0xf;
chris 0:4e756c4c88a7 277 }
chris 0:4e756c4c88a7 278 LPC_USB->HcInterruptStatus = int_status; /* Clear interrupt status register */
chris 0:4e756c4c88a7 279 }
chris 0:4e756c4c88a7 280 return;
chris 0:4e756c4c88a7 281 }
chris 0:4e756c4c88a7 282
chris 0:4e756c4c88a7 283 /*
chris 0:4e756c4c88a7 284 **************************************************************************************************************
chris 0:4e756c4c88a7 285 * PROCESS TRANSFER DESCRIPTOR
chris 0:4e756c4c88a7 286 *
chris 0:4e756c4c88a7 287 * Description: This function processes the transfer descriptor
chris 0:4e756c4c88a7 288 *
chris 0:4e756c4c88a7 289 * Arguments : ed Endpoint descriptor that contains this transfer descriptor
chris 0:4e756c4c88a7 290 * token SETUP, IN, OUT
chris 0:4e756c4c88a7 291 * buffer Current Buffer Pointer of the transfer descriptor
chris 0:4e756c4c88a7 292 * buffer_len Length of the buffer
chris 0:4e756c4c88a7 293 *
chris 0:4e756c4c88a7 294 * Returns : OK if TD submission is successful
chris 0:4e756c4c88a7 295 * ERROR if TD submission fails
chris 0:4e756c4c88a7 296 *
chris 0:4e756c4c88a7 297 **************************************************************************************************************
chris 0:4e756c4c88a7 298 */
chris 0:4e756c4c88a7 299
chris 0:4e756c4c88a7 300 USB_INT32S Host_ProcessTD (volatile HCED *ed,
chris 0:4e756c4c88a7 301 volatile USB_INT32U token,
chris 0:4e756c4c88a7 302 volatile USB_INT08U *buffer,
chris 0:4e756c4c88a7 303 USB_INT32U buffer_len)
chris 0:4e756c4c88a7 304 {
chris 0:4e756c4c88a7 305 volatile USB_INT32U td_toggle;
chris 0:4e756c4c88a7 306
chris 0:4e756c4c88a7 307
chris 0:4e756c4c88a7 308 if (ed == EDCtrl) {
chris 0:4e756c4c88a7 309 if (token == TD_SETUP) {
chris 0:4e756c4c88a7 310 td_toggle = TD_TOGGLE_0;
chris 0:4e756c4c88a7 311 } else {
chris 0:4e756c4c88a7 312 td_toggle = TD_TOGGLE_1;
chris 0:4e756c4c88a7 313 }
chris 0:4e756c4c88a7 314 } else {
chris 0:4e756c4c88a7 315 td_toggle = 0;
chris 0:4e756c4c88a7 316 }
chris 0:4e756c4c88a7 317 TDHead->Control = (TD_ROUNDING |
chris 0:4e756c4c88a7 318 token |
chris 0:4e756c4c88a7 319 TD_DELAY_INT(0) |
chris 0:4e756c4c88a7 320 td_toggle |
chris 0:4e756c4c88a7 321 TD_CC);
chris 0:4e756c4c88a7 322 TDTail->Control = 0;
chris 0:4e756c4c88a7 323 TDHead->CurrBufPtr = (USB_INT32U) buffer;
chris 0:4e756c4c88a7 324 TDTail->CurrBufPtr = 0;
chris 0:4e756c4c88a7 325 TDHead->Next = (USB_INT32U) TDTail;
chris 0:4e756c4c88a7 326 TDTail->Next = 0;
chris 0:4e756c4c88a7 327 TDHead->BufEnd = (USB_INT32U)(buffer + (buffer_len - 1));
chris 0:4e756c4c88a7 328 TDTail->BufEnd = 0;
chris 0:4e756c4c88a7 329
chris 0:4e756c4c88a7 330 ed->HeadTd = (USB_INT32U)TDHead | ((ed->HeadTd) & 0x00000002);
chris 0:4e756c4c88a7 331 ed->TailTd = (USB_INT32U)TDTail;
chris 0:4e756c4c88a7 332 ed->Next = 0;
chris 0:4e756c4c88a7 333
chris 0:4e756c4c88a7 334 if (ed == EDCtrl) {
chris 0:4e756c4c88a7 335 LPC_USB->HcControlHeadED = (USB_INT32U)ed;
chris 0:4e756c4c88a7 336 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_CLF;
chris 0:4e756c4c88a7 337 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_CLE;
chris 0:4e756c4c88a7 338 } else {
chris 0:4e756c4c88a7 339 LPC_USB->HcBulkHeadED = (USB_INT32U)ed;
chris 0:4e756c4c88a7 340 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_BLF;
chris 0:4e756c4c88a7 341 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_BLE;
chris 0:4e756c4c88a7 342 }
chris 0:4e756c4c88a7 343
chris 0:4e756c4c88a7 344 Host_WDHWait();
chris 0:4e756c4c88a7 345
chris 0:4e756c4c88a7 346 // if (!(TDHead->Control & 0xF0000000)) {
chris 0:4e756c4c88a7 347 if (!HOST_TDControlStatus) {
chris 0:4e756c4c88a7 348 return (OK);
chris 0:4e756c4c88a7 349 } else {
chris 0:4e756c4c88a7 350 return (ERR_TD_FAIL);
chris 0:4e756c4c88a7 351 }
chris 0:4e756c4c88a7 352 }
chris 0:4e756c4c88a7 353
chris 0:4e756c4c88a7 354 /*
chris 0:4e756c4c88a7 355 **************************************************************************************************************
chris 0:4e756c4c88a7 356 * ENUMERATE THE DEVICE
chris 0:4e756c4c88a7 357 *
chris 0:4e756c4c88a7 358 * Description: This function is used to enumerate the device connected
chris 0:4e756c4c88a7 359 *
chris 0:4e756c4c88a7 360 * Arguments : None
chris 0:4e756c4c88a7 361 *
chris 0:4e756c4c88a7 362 * Returns : None
chris 0:4e756c4c88a7 363 *
chris 0:4e756c4c88a7 364 **************************************************************************************************************
chris 0:4e756c4c88a7 365 */
chris 0:4e756c4c88a7 366
chris 0:4e756c4c88a7 367 USB_INT32S Host_EnumDev (void)
chris 0:4e756c4c88a7 368 {
chris 0:4e756c4c88a7 369 USB_INT32S rc;
chris 0:4e756c4c88a7 370
chris 0:4e756c4c88a7 371 PRINT_Log("Connect a Mass Storage device\n");
chris 0:4e756c4c88a7 372 while (!HOST_RhscIntr)
chris 0:4e756c4c88a7 373 __WFI();
chris 0:4e756c4c88a7 374 Host_DelayMS(100); /* USB 2.0 spec says atleast 50ms delay beore port reset */
chris 0:4e756c4c88a7 375 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS; // Initiate port reset
chris 0:4e756c4c88a7 376 while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS)
chris 0:4e756c4c88a7 377 __WFI(); // Wait for port reset to complete...
chris 0:4e756c4c88a7 378 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; // ...and clear port reset signal
chris 0:4e756c4c88a7 379 Host_DelayMS(200); /* Wait for 100 MS after port reset */
chris 0:4e756c4c88a7 380
chris 0:4e756c4c88a7 381 EDCtrl->Control = 8 << 16; /* Put max pkt size = 8 */
chris 0:4e756c4c88a7 382 /* Read first 8 bytes of device desc */
chris 0:4e756c4c88a7 383 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_DEVICE, 0, TDBuffer, 8);
chris 0:4e756c4c88a7 384 if (rc != OK) {
chris 0:4e756c4c88a7 385 PRINT_Err(rc);
chris 0:4e756c4c88a7 386 return (rc);
chris 0:4e756c4c88a7 387 }
chris 0:4e756c4c88a7 388 EDCtrl->Control = TDBuffer[7] << 16; /* Get max pkt size of endpoint 0 */
chris 0:4e756c4c88a7 389 rc = HOST_SET_ADDRESS(1); /* Set the device address to 1 */
chris 0:4e756c4c88a7 390 if (rc != OK) {
chris 0:4e756c4c88a7 391 PRINT_Err(rc);
chris 0:4e756c4c88a7 392 return (rc);
chris 0:4e756c4c88a7 393 }
chris 0:4e756c4c88a7 394 Host_DelayMS(2);
chris 0:4e756c4c88a7 395 EDCtrl->Control = (EDCtrl->Control) | 1; /* Modify control pipe with address 1 */
chris 0:4e756c4c88a7 396 /* Get the configuration descriptor */
chris 0:4e756c4c88a7 397 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, 9);
chris 0:4e756c4c88a7 398 if (rc != OK) {
chris 0:4e756c4c88a7 399 PRINT_Err(rc);
chris 0:4e756c4c88a7 400 return (rc);
chris 0:4e756c4c88a7 401 }
chris 0:4e756c4c88a7 402 /* Get the first configuration data */
chris 0:4e756c4c88a7 403 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, ReadLE16U(&TDBuffer[2]));
chris 0:4e756c4c88a7 404 if (rc != OK) {
chris 0:4e756c4c88a7 405 PRINT_Err(rc);
chris 0:4e756c4c88a7 406 return (rc);
chris 0:4e756c4c88a7 407 }
chris 0:4e756c4c88a7 408 rc = MS_ParseConfiguration(); /* Parse the configuration */
chris 0:4e756c4c88a7 409 if (rc != OK) {
chris 0:4e756c4c88a7 410 PRINT_Err(rc);
chris 0:4e756c4c88a7 411 return (rc);
chris 0:4e756c4c88a7 412 }
chris 0:4e756c4c88a7 413 rc = USBH_SET_CONFIGURATION(1); /* Select device configuration 1 */
chris 0:4e756c4c88a7 414 if (rc != OK) {
chris 0:4e756c4c88a7 415 PRINT_Err(rc);
chris 0:4e756c4c88a7 416 }
chris 0:4e756c4c88a7 417 Host_DelayMS(100); /* Some devices may require this delay */
chris 0:4e756c4c88a7 418 return (rc);
chris 0:4e756c4c88a7 419 }
chris 0:4e756c4c88a7 420
chris 0:4e756c4c88a7 421 /*
chris 0:4e756c4c88a7 422 **************************************************************************************************************
chris 0:4e756c4c88a7 423 * RECEIVE THE CONTROL INFORMATION
chris 0:4e756c4c88a7 424 *
chris 0:4e756c4c88a7 425 * Description: This function is used to receive the control information
chris 0:4e756c4c88a7 426 *
chris 0:4e756c4c88a7 427 * Arguments : bm_request_type
chris 0:4e756c4c88a7 428 * b_request
chris 0:4e756c4c88a7 429 * w_value
chris 0:4e756c4c88a7 430 * w_index
chris 0:4e756c4c88a7 431 * w_length
chris 0:4e756c4c88a7 432 * buffer
chris 0:4e756c4c88a7 433 *
chris 0:4e756c4c88a7 434 * Returns : OK if Success
chris 0:4e756c4c88a7 435 * ERROR if Failed
chris 0:4e756c4c88a7 436 *
chris 0:4e756c4c88a7 437 **************************************************************************************************************
chris 0:4e756c4c88a7 438 */
chris 0:4e756c4c88a7 439
chris 0:4e756c4c88a7 440 USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type,
chris 0:4e756c4c88a7 441 USB_INT08U b_request,
chris 0:4e756c4c88a7 442 USB_INT16U w_value,
chris 0:4e756c4c88a7 443 USB_INT16U w_index,
chris 0:4e756c4c88a7 444 USB_INT16U w_length,
chris 0:4e756c4c88a7 445 volatile USB_INT08U *buffer)
chris 0:4e756c4c88a7 446 {
chris 0:4e756c4c88a7 447 USB_INT32S rc;
chris 0:4e756c4c88a7 448
chris 0:4e756c4c88a7 449
chris 0:4e756c4c88a7 450 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
chris 0:4e756c4c88a7 451 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
chris 0:4e756c4c88a7 452 if (rc == OK) {
chris 0:4e756c4c88a7 453 if (w_length) {
chris 0:4e756c4c88a7 454 rc = Host_ProcessTD(EDCtrl, TD_IN, TDBuffer, w_length);
chris 0:4e756c4c88a7 455 }
chris 0:4e756c4c88a7 456 if (rc == OK) {
chris 0:4e756c4c88a7 457 rc = Host_ProcessTD(EDCtrl, TD_OUT, NULL, 0);
chris 0:4e756c4c88a7 458 }
chris 0:4e756c4c88a7 459 }
chris 0:4e756c4c88a7 460 return (rc);
chris 0:4e756c4c88a7 461 }
chris 0:4e756c4c88a7 462
chris 0:4e756c4c88a7 463 /*
chris 0:4e756c4c88a7 464 **************************************************************************************************************
chris 0:4e756c4c88a7 465 * SEND THE CONTROL INFORMATION
chris 0:4e756c4c88a7 466 *
chris 0:4e756c4c88a7 467 * Description: This function is used to send the control information
chris 0:4e756c4c88a7 468 *
chris 0:4e756c4c88a7 469 * Arguments : None
chris 0:4e756c4c88a7 470 *
chris 0:4e756c4c88a7 471 * Returns : OK if Success
chris 0:4e756c4c88a7 472 * ERR_INVALID_BOOTSIG if Failed
chris 0:4e756c4c88a7 473 *
chris 0:4e756c4c88a7 474 **************************************************************************************************************
chris 0:4e756c4c88a7 475 */
chris 0:4e756c4c88a7 476
chris 0:4e756c4c88a7 477 USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type,
chris 0:4e756c4c88a7 478 USB_INT08U b_request,
chris 0:4e756c4c88a7 479 USB_INT16U w_value,
chris 0:4e756c4c88a7 480 USB_INT16U w_index,
chris 0:4e756c4c88a7 481 USB_INT16U w_length,
chris 0:4e756c4c88a7 482 volatile USB_INT08U *buffer)
chris 0:4e756c4c88a7 483 {
chris 0:4e756c4c88a7 484 USB_INT32S rc;
chris 0:4e756c4c88a7 485
chris 0:4e756c4c88a7 486
chris 0:4e756c4c88a7 487 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
chris 0:4e756c4c88a7 488
chris 0:4e756c4c88a7 489 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
chris 0:4e756c4c88a7 490 if (rc == OK) {
chris 0:4e756c4c88a7 491 if (w_length) {
chris 0:4e756c4c88a7 492 rc = Host_ProcessTD(EDCtrl, TD_OUT, TDBuffer, w_length);
chris 0:4e756c4c88a7 493 }
chris 0:4e756c4c88a7 494 if (rc == OK) {
chris 0:4e756c4c88a7 495 rc = Host_ProcessTD(EDCtrl, TD_IN, NULL, 0);
chris 0:4e756c4c88a7 496 }
chris 0:4e756c4c88a7 497 }
chris 0:4e756c4c88a7 498 return (rc);
chris 0:4e756c4c88a7 499 }
chris 0:4e756c4c88a7 500
chris 0:4e756c4c88a7 501 /*
chris 0:4e756c4c88a7 502 **************************************************************************************************************
chris 0:4e756c4c88a7 503 * FILL SETUP PACKET
chris 0:4e756c4c88a7 504 *
chris 0:4e756c4c88a7 505 * Description: This function is used to fill the setup packet
chris 0:4e756c4c88a7 506 *
chris 0:4e756c4c88a7 507 * Arguments : None
chris 0:4e756c4c88a7 508 *
chris 0:4e756c4c88a7 509 * Returns : OK if Success
chris 0:4e756c4c88a7 510 * ERR_INVALID_BOOTSIG if Failed
chris 0:4e756c4c88a7 511 *
chris 0:4e756c4c88a7 512 **************************************************************************************************************
chris 0:4e756c4c88a7 513 */
chris 0:4e756c4c88a7 514
chris 0:4e756c4c88a7 515 void Host_FillSetup (USB_INT08U bm_request_type,
chris 0:4e756c4c88a7 516 USB_INT08U b_request,
chris 0:4e756c4c88a7 517 USB_INT16U w_value,
chris 0:4e756c4c88a7 518 USB_INT16U w_index,
chris 0:4e756c4c88a7 519 USB_INT16U w_length)
chris 0:4e756c4c88a7 520 {
chris 0:4e756c4c88a7 521 int i;
chris 0:4e756c4c88a7 522 for (i=0;i<w_length;i++)
chris 0:4e756c4c88a7 523 TDBuffer[i] = 0;
chris 0:4e756c4c88a7 524
chris 0:4e756c4c88a7 525 TDBuffer[0] = bm_request_type;
chris 0:4e756c4c88a7 526 TDBuffer[1] = b_request;
chris 0:4e756c4c88a7 527 WriteLE16U(&TDBuffer[2], w_value);
chris 0:4e756c4c88a7 528 WriteLE16U(&TDBuffer[4], w_index);
chris 0:4e756c4c88a7 529 WriteLE16U(&TDBuffer[6], w_length);
chris 0:4e756c4c88a7 530 }
chris 0:4e756c4c88a7 531
chris 0:4e756c4c88a7 532
chris 0:4e756c4c88a7 533
chris 0:4e756c4c88a7 534 /*
chris 0:4e756c4c88a7 535 **************************************************************************************************************
chris 0:4e756c4c88a7 536 * INITIALIZE THE TRANSFER DESCRIPTOR
chris 0:4e756c4c88a7 537 *
chris 0:4e756c4c88a7 538 * Description: This function initializes transfer descriptor
chris 0:4e756c4c88a7 539 *
chris 0:4e756c4c88a7 540 * Arguments : Pointer to TD structure
chris 0:4e756c4c88a7 541 *
chris 0:4e756c4c88a7 542 * Returns : None
chris 0:4e756c4c88a7 543 *
chris 0:4e756c4c88a7 544 **************************************************************************************************************
chris 0:4e756c4c88a7 545 */
chris 0:4e756c4c88a7 546
chris 0:4e756c4c88a7 547 void Host_TDInit (volatile HCTD *td)
chris 0:4e756c4c88a7 548 {
chris 0:4e756c4c88a7 549
chris 0:4e756c4c88a7 550 td->Control = 0;
chris 0:4e756c4c88a7 551 td->CurrBufPtr = 0;
chris 0:4e756c4c88a7 552 td->Next = 0;
chris 0:4e756c4c88a7 553 td->BufEnd = 0;
chris 0:4e756c4c88a7 554 }
chris 0:4e756c4c88a7 555
chris 0:4e756c4c88a7 556 /*
chris 0:4e756c4c88a7 557 **************************************************************************************************************
chris 0:4e756c4c88a7 558 * INITIALIZE THE ENDPOINT DESCRIPTOR
chris 0:4e756c4c88a7 559 *
chris 0:4e756c4c88a7 560 * Description: This function initializes endpoint descriptor
chris 0:4e756c4c88a7 561 *
chris 0:4e756c4c88a7 562 * Arguments : Pointer to ED strcuture
chris 0:4e756c4c88a7 563 *
chris 0:4e756c4c88a7 564 * Returns : None
chris 0:4e756c4c88a7 565 *
chris 0:4e756c4c88a7 566 **************************************************************************************************************
chris 0:4e756c4c88a7 567 */
chris 0:4e756c4c88a7 568
chris 0:4e756c4c88a7 569 void Host_EDInit (volatile HCED *ed)
chris 0:4e756c4c88a7 570 {
chris 0:4e756c4c88a7 571
chris 0:4e756c4c88a7 572 ed->Control = 0;
chris 0:4e756c4c88a7 573 ed->TailTd = 0;
chris 0:4e756c4c88a7 574 ed->HeadTd = 0;
chris 0:4e756c4c88a7 575 ed->Next = 0;
chris 0:4e756c4c88a7 576 }
chris 0:4e756c4c88a7 577
chris 0:4e756c4c88a7 578 /*
chris 0:4e756c4c88a7 579 **************************************************************************************************************
chris 0:4e756c4c88a7 580 * INITIALIZE HOST CONTROLLER COMMUNICATIONS AREA
chris 0:4e756c4c88a7 581 *
chris 0:4e756c4c88a7 582 * Description: This function initializes host controller communications area
chris 0:4e756c4c88a7 583 *
chris 0:4e756c4c88a7 584 * Arguments : Pointer to HCCA
chris 0:4e756c4c88a7 585 *
chris 0:4e756c4c88a7 586 * Returns :
chris 0:4e756c4c88a7 587 *
chris 0:4e756c4c88a7 588 **************************************************************************************************************
chris 0:4e756c4c88a7 589 */
chris 0:4e756c4c88a7 590
chris 0:4e756c4c88a7 591 void Host_HCCAInit (volatile HCCA *hcca)
chris 0:4e756c4c88a7 592 {
chris 0:4e756c4c88a7 593 USB_INT32U i;
chris 0:4e756c4c88a7 594
chris 0:4e756c4c88a7 595
chris 0:4e756c4c88a7 596 for (i = 0; i < 32; i++) {
chris 0:4e756c4c88a7 597
chris 0:4e756c4c88a7 598 hcca->IntTable[i] = 0;
chris 0:4e756c4c88a7 599 hcca->FrameNumber = 0;
chris 0:4e756c4c88a7 600 hcca->DoneHead = 0;
chris 0:4e756c4c88a7 601 }
chris 0:4e756c4c88a7 602
chris 0:4e756c4c88a7 603 }
chris 0:4e756c4c88a7 604
chris 0:4e756c4c88a7 605 /*
chris 0:4e756c4c88a7 606 **************************************************************************************************************
chris 0:4e756c4c88a7 607 * WAIT FOR WDH INTERRUPT
chris 0:4e756c4c88a7 608 *
chris 0:4e756c4c88a7 609 * Description: This function is infinite loop which breaks when ever a WDH interrupt rises
chris 0:4e756c4c88a7 610 *
chris 0:4e756c4c88a7 611 * Arguments : None
chris 0:4e756c4c88a7 612 *
chris 0:4e756c4c88a7 613 * Returns : None
chris 0:4e756c4c88a7 614 *
chris 0:4e756c4c88a7 615 **************************************************************************************************************
chris 0:4e756c4c88a7 616 */
chris 0:4e756c4c88a7 617
chris 0:4e756c4c88a7 618 void Host_WDHWait (void)
chris 0:4e756c4c88a7 619 {
chris 0:4e756c4c88a7 620 while (!HOST_WdhIntr)
chris 0:4e756c4c88a7 621 __WFI();
chris 0:4e756c4c88a7 622
chris 0:4e756c4c88a7 623 HOST_WdhIntr = 0;
chris 0:4e756c4c88a7 624 }
chris 0:4e756c4c88a7 625
chris 0:4e756c4c88a7 626 /*
chris 0:4e756c4c88a7 627 **************************************************************************************************************
chris 0:4e756c4c88a7 628 * READ LE 32U
chris 0:4e756c4c88a7 629 *
chris 0:4e756c4c88a7 630 * Description: This function is used to read an unsigned integer from a character buffer in the platform
chris 0:4e756c4c88a7 631 * containing little endian processor
chris 0:4e756c4c88a7 632 *
chris 0:4e756c4c88a7 633 * Arguments : pmem Pointer to the character buffer
chris 0:4e756c4c88a7 634 *
chris 0:4e756c4c88a7 635 * Returns : val Unsigned integer
chris 0:4e756c4c88a7 636 *
chris 0:4e756c4c88a7 637 **************************************************************************************************************
chris 0:4e756c4c88a7 638 */
chris 0:4e756c4c88a7 639
chris 0:4e756c4c88a7 640 USB_INT32U ReadLE32U (volatile USB_INT08U *pmem)
chris 0:4e756c4c88a7 641 {
chris 0:4e756c4c88a7 642 USB_INT32U val = *(USB_INT32U*)pmem;
chris 0:4e756c4c88a7 643 #ifdef __BIG_ENDIAN
chris 0:4e756c4c88a7 644 return __REV(val);
chris 0:4e756c4c88a7 645 #else
chris 0:4e756c4c88a7 646 return val;
chris 0:4e756c4c88a7 647 #endif
chris 0:4e756c4c88a7 648 }
chris 0:4e756c4c88a7 649
chris 0:4e756c4c88a7 650 /*
chris 0:4e756c4c88a7 651 **************************************************************************************************************
chris 0:4e756c4c88a7 652 * WRITE LE 32U
chris 0:4e756c4c88a7 653 *
chris 0:4e756c4c88a7 654 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
chris 0:4e756c4c88a7 655 * containing little endian processor.
chris 0:4e756c4c88a7 656 *
chris 0:4e756c4c88a7 657 * Arguments : pmem Pointer to the charecter buffer
chris 0:4e756c4c88a7 658 * val Integer value to be placed in the charecter buffer
chris 0:4e756c4c88a7 659 *
chris 0:4e756c4c88a7 660 * Returns : None
chris 0:4e756c4c88a7 661 *
chris 0:4e756c4c88a7 662 **************************************************************************************************************
chris 0:4e756c4c88a7 663 */
chris 0:4e756c4c88a7 664
chris 0:4e756c4c88a7 665 void WriteLE32U (volatile USB_INT08U *pmem,
chris 0:4e756c4c88a7 666 USB_INT32U val)
chris 0:4e756c4c88a7 667 {
chris 0:4e756c4c88a7 668 #ifdef __BIG_ENDIAN
chris 0:4e756c4c88a7 669 *(USB_INT32U*)pmem = __REV(val);
chris 0:4e756c4c88a7 670 #else
chris 0:4e756c4c88a7 671 *(USB_INT32U*)pmem = val;
chris 0:4e756c4c88a7 672 #endif
chris 0:4e756c4c88a7 673 }
chris 0:4e756c4c88a7 674
chris 0:4e756c4c88a7 675 /*
chris 0:4e756c4c88a7 676 **************************************************************************************************************
chris 0:4e756c4c88a7 677 * READ LE 16U
chris 0:4e756c4c88a7 678 *
chris 0:4e756c4c88a7 679 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
chris 0:4e756c4c88a7 680 * containing little endian processor
chris 0:4e756c4c88a7 681 *
chris 0:4e756c4c88a7 682 * Arguments : pmem Pointer to the charecter buffer
chris 0:4e756c4c88a7 683 *
chris 0:4e756c4c88a7 684 * Returns : val Unsigned short integer
chris 0:4e756c4c88a7 685 *
chris 0:4e756c4c88a7 686 **************************************************************************************************************
chris 0:4e756c4c88a7 687 */
chris 0:4e756c4c88a7 688
chris 0:4e756c4c88a7 689 USB_INT16U ReadLE16U (volatile USB_INT08U *pmem)
chris 0:4e756c4c88a7 690 {
chris 0:4e756c4c88a7 691 USB_INT16U val = *(USB_INT16U*)pmem;
chris 0:4e756c4c88a7 692 #ifdef __BIG_ENDIAN
chris 0:4e756c4c88a7 693 return __REV16(val);
chris 0:4e756c4c88a7 694 #else
chris 0:4e756c4c88a7 695 return val;
chris 0:4e756c4c88a7 696 #endif
chris 0:4e756c4c88a7 697 }
chris 0:4e756c4c88a7 698
chris 0:4e756c4c88a7 699 /*
chris 0:4e756c4c88a7 700 **************************************************************************************************************
chris 0:4e756c4c88a7 701 * WRITE LE 16U
chris 0:4e756c4c88a7 702 *
chris 0:4e756c4c88a7 703 * Description: This function is used to write an unsigned short integer into a charecter buffer in the
chris 0:4e756c4c88a7 704 * platform containing little endian processor
chris 0:4e756c4c88a7 705 *
chris 0:4e756c4c88a7 706 * Arguments : pmem Pointer to the charecter buffer
chris 0:4e756c4c88a7 707 * val Value to be placed in the charecter buffer
chris 0:4e756c4c88a7 708 *
chris 0:4e756c4c88a7 709 * Returns : None
chris 0:4e756c4c88a7 710 *
chris 0:4e756c4c88a7 711 **************************************************************************************************************
chris 0:4e756c4c88a7 712 */
chris 0:4e756c4c88a7 713
chris 0:4e756c4c88a7 714 void WriteLE16U (volatile USB_INT08U *pmem,
chris 0:4e756c4c88a7 715 USB_INT16U val)
chris 0:4e756c4c88a7 716 {
chris 0:4e756c4c88a7 717 #ifdef __BIG_ENDIAN
chris 0:4e756c4c88a7 718 *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
chris 0:4e756c4c88a7 719 #else
chris 0:4e756c4c88a7 720 *(USB_INT16U*)pmem = val;
chris 0:4e756c4c88a7 721 #endif
chris 0:4e756c4c88a7 722 }
chris 0:4e756c4c88a7 723
chris 0:4e756c4c88a7 724 /*
chris 0:4e756c4c88a7 725 **************************************************************************************************************
chris 0:4e756c4c88a7 726 * READ BE 32U
chris 0:4e756c4c88a7 727 *
chris 0:4e756c4c88a7 728 * Description: This function is used to read an unsigned integer from a charecter buffer in the platform
chris 0:4e756c4c88a7 729 * containing big endian processor
chris 0:4e756c4c88a7 730 *
chris 0:4e756c4c88a7 731 * Arguments : pmem Pointer to the charecter buffer
chris 0:4e756c4c88a7 732 *
chris 0:4e756c4c88a7 733 * Returns : val Unsigned integer
chris 0:4e756c4c88a7 734 *
chris 0:4e756c4c88a7 735 **************************************************************************************************************
chris 0:4e756c4c88a7 736 */
chris 0:4e756c4c88a7 737
chris 0:4e756c4c88a7 738 USB_INT32U ReadBE32U (volatile USB_INT08U *pmem)
chris 0:4e756c4c88a7 739 {
chris 0:4e756c4c88a7 740 USB_INT32U val = *(USB_INT32U*)pmem;
chris 0:4e756c4c88a7 741 #ifdef __BIG_ENDIAN
chris 0:4e756c4c88a7 742 return val;
chris 0:4e756c4c88a7 743 #else
chris 0:4e756c4c88a7 744 return __REV(val);
chris 0:4e756c4c88a7 745 #endif
chris 0:4e756c4c88a7 746 }
chris 0:4e756c4c88a7 747
chris 0:4e756c4c88a7 748 /*
chris 0:4e756c4c88a7 749 **************************************************************************************************************
chris 0:4e756c4c88a7 750 * WRITE BE 32U
chris 0:4e756c4c88a7 751 *
chris 0:4e756c4c88a7 752 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
chris 0:4e756c4c88a7 753 * containing big endian processor
chris 0:4e756c4c88a7 754 *
chris 0:4e756c4c88a7 755 * Arguments : pmem Pointer to the charecter buffer
chris 0:4e756c4c88a7 756 * val Value to be placed in the charecter buffer
chris 0:4e756c4c88a7 757 *
chris 0:4e756c4c88a7 758 * Returns : None
chris 0:4e756c4c88a7 759 *
chris 0:4e756c4c88a7 760 **************************************************************************************************************
chris 0:4e756c4c88a7 761 */
chris 0:4e756c4c88a7 762
chris 0:4e756c4c88a7 763 void WriteBE32U (volatile USB_INT08U *pmem,
chris 0:4e756c4c88a7 764 USB_INT32U val)
chris 0:4e756c4c88a7 765 {
chris 0:4e756c4c88a7 766 #ifdef __BIG_ENDIAN
chris 0:4e756c4c88a7 767 *(USB_INT32U*)pmem = val;
chris 0:4e756c4c88a7 768 #else
chris 0:4e756c4c88a7 769 *(USB_INT32U*)pmem = __REV(val);
chris 0:4e756c4c88a7 770 #endif
chris 0:4e756c4c88a7 771 }
chris 0:4e756c4c88a7 772
chris 0:4e756c4c88a7 773 /*
chris 0:4e756c4c88a7 774 **************************************************************************************************************
chris 0:4e756c4c88a7 775 * READ BE 16U
chris 0:4e756c4c88a7 776 *
chris 0:4e756c4c88a7 777 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
chris 0:4e756c4c88a7 778 * containing big endian processor
chris 0:4e756c4c88a7 779 *
chris 0:4e756c4c88a7 780 * Arguments : pmem Pointer to the charecter buffer
chris 0:4e756c4c88a7 781 *
chris 0:4e756c4c88a7 782 * Returns : val Unsigned short integer
chris 0:4e756c4c88a7 783 *
chris 0:4e756c4c88a7 784 **************************************************************************************************************
chris 0:4e756c4c88a7 785 */
chris 0:4e756c4c88a7 786
chris 0:4e756c4c88a7 787 USB_INT16U ReadBE16U (volatile USB_INT08U *pmem)
chris 0:4e756c4c88a7 788 {
chris 0:4e756c4c88a7 789 USB_INT16U val = *(USB_INT16U*)pmem;
chris 0:4e756c4c88a7 790 #ifdef __BIG_ENDIAN
chris 0:4e756c4c88a7 791 return val;
chris 0:4e756c4c88a7 792 #else
chris 0:4e756c4c88a7 793 return __REV16(val);
chris 0:4e756c4c88a7 794 #endif
chris 0:4e756c4c88a7 795 }
chris 0:4e756c4c88a7 796
chris 0:4e756c4c88a7 797 /*
chris 0:4e756c4c88a7 798 **************************************************************************************************************
chris 0:4e756c4c88a7 799 * WRITE BE 16U
chris 0:4e756c4c88a7 800 *
chris 0:4e756c4c88a7 801 * Description: This function is used to write an unsigned short integer into the charecter buffer in the
chris 0:4e756c4c88a7 802 * platform containing big endian processor
chris 0:4e756c4c88a7 803 *
chris 0:4e756c4c88a7 804 * Arguments : pmem Pointer to the charecter buffer
chris 0:4e756c4c88a7 805 * val Value to be placed in the charecter buffer
chris 0:4e756c4c88a7 806 *
chris 0:4e756c4c88a7 807 * Returns : None
chris 0:4e756c4c88a7 808 *
chris 0:4e756c4c88a7 809 **************************************************************************************************************
chris 0:4e756c4c88a7 810 */
chris 0:4e756c4c88a7 811
chris 0:4e756c4c88a7 812 void WriteBE16U (volatile USB_INT08U *pmem,
chris 0:4e756c4c88a7 813 USB_INT16U val)
chris 0:4e756c4c88a7 814 {
chris 0:4e756c4c88a7 815 #ifdef __BIG_ENDIAN
chris 0:4e756c4c88a7 816 *(USB_INT16U*)pmem = val;
chris 0:4e756c4c88a7 817 #else
chris 0:4e756c4c88a7 818 *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
chris 0:4e756c4c88a7 819 #endif
chris 0:4e756c4c88a7 820 }