ECE 111 At Oregon State University / Mbed 2 deprecated Lab5_Basic

Simply creates a servo object from a motor object, to allow the control of the angle.

Dependencies:   mbed

Fork of Lab5_Basic by ziad eldebri

LCDconfig.h@10:cc4d4eddc121, 2017-11-03 (annotated)

Committer:
dogcatfee
Date:
Fri Nov 03 15:06:38 2017 -0700
Revision:
10:cc4d4eddc121
Fix

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dogcatfee 10:cc4d4eddc121 1 #include "FRDM-s401.h" // 4x7 segdisplay
dogcatfee 10:cc4d4eddc121 2
dogcatfee 10:cc4d4eddc121 3
dogcatfee 10:cc4d4eddc121 4 #if 1 // VREF to VLL1
dogcatfee 10:cc4d4eddc121 5 /* Following configuration is used for LCD default initialization */
dogcatfee 10:cc4d4eddc121 6 #define _LCDRVEN (1) //
dogcatfee 10:cc4d4eddc121 7 #define _LCDRVTRIM (8) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
dogcatfee 10:cc4d4eddc121 8 #define _LCDCPSEL (1) // charge pump select 0 or 1
dogcatfee 10:cc4d4eddc121 9 #define _LCDLOADADJUST (3) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
dogcatfee 10:cc4d4eddc121 10 #define _LCDALTDIV (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
dogcatfee 10:cc4d4eddc121 11 #define _LCDALRCLKSOURCE (0) // 0 -- External clock 1 -- Alternate clock
dogcatfee 10:cc4d4eddc121 12
dogcatfee 10:cc4d4eddc121 13 #define _LCDCLKPSL (0) // Clock divider to generate the LCD Waveforms
dogcatfee 10:cc4d4eddc121 14 #define _LCDSUPPLY (1)
dogcatfee 10:cc4d4eddc121 15 #define _LCDHREF (0) // 0 or 1
dogcatfee 10:cc4d4eddc121 16 #define _LCDCLKSOURCE (1) // 0 -- External clock 1 -- Alternate clock
dogcatfee 10:cc4d4eddc121 17 #define _LCDLCK (1) //Any number between 0 and 7
dogcatfee 10:cc4d4eddc121 18 #define _LCDBLINKRATE (3) //Any number between 0 and 7
dogcatfee 10:cc4d4eddc121 19
dogcatfee 10:cc4d4eddc121 20
dogcatfee 10:cc4d4eddc121 21 #else //VLL3 to VDD internally
dogcatfee 10:cc4d4eddc121 22 /* Following configuration is used for LCD default initialization */
dogcatfee 10:cc4d4eddc121 23 #define _LCDCLKSOURCE (1) // 0 -- External clock 1 -- Alternate clock
dogcatfee 10:cc4d4eddc121 24 #define _LCDALRCLKSOURCE (0) // 0 -- External clock 1 -- Alternate clock
dogcatfee 10:cc4d4eddc121 25 #define _LCDCLKPSL (0) // Clock divider to generate the LCD Waveforms
dogcatfee 10:cc4d4eddc121 26 #define _LCDSUPPLY (0)
dogcatfee 10:cc4d4eddc121 27 #define _LCDLOADADJUST (3) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
dogcatfee 10:cc4d4eddc121 28 #define _LCDALTDIV (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
dogcatfee 10:cc4d4eddc121 29 #define _LCDRVTRIM (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
dogcatfee 10:cc4d4eddc121 30 #define _LCDHREF (0) // 0 or 1
dogcatfee 10:cc4d4eddc121 31 #define _LCDCPSEL (1) // 0 or 1
dogcatfee 10:cc4d4eddc121 32 #define _LCDRVEN (0) //
dogcatfee 10:cc4d4eddc121 33 #define _LCDBLINKRATE (3) // Any number between 0 and 7
dogcatfee 10:cc4d4eddc121 34 #define _LCDLCK (0) // Any number between 0 and 7
dogcatfee 10:cc4d4eddc121 35
dogcatfee 10:cc4d4eddc121 36 #endif
dogcatfee 10:cc4d4eddc121 37
dogcatfee 10:cc4d4eddc121 38
dogcatfee 10:cc4d4eddc121 39
dogcatfee 10:cc4d4eddc121 40
dogcatfee 10:cc4d4eddc121 41 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Control Register 0 ~|~|~|~|~|~|~|~|~|~|~|~|~*/
dogcatfee 10:cc4d4eddc121 42 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
dogcatfee 10:cc4d4eddc121 43 #define _LCDINTENABLE (1)
dogcatfee 10:cc4d4eddc121 44
dogcatfee 10:cc4d4eddc121 45 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Control Register 1 ~|~|~|~|~|~|~|~|~|~|~|~|~|*/
dogcatfee 10:cc4d4eddc121 46 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
dogcatfee 10:cc4d4eddc121 47 #define _LCDFRAMEINTERRUPT (0) //0 Disable Frame Frequency Interrupt
dogcatfee 10:cc4d4eddc121 48 //1 Enable an LCD interrupt that coincides with the LCD frame frequency
dogcatfee 10:cc4d4eddc121 49 #define _LCDFULLCPLDIRIVE (0) // 0 GPIO shared with the LCD. Inputs levels and internal pullup reference to VDD
dogcatfee 10:cc4d4eddc121 50 // 1 If VSUPPLY=11and RVEN=0. Inputs levels and internal pullup reference to VLL3
dogcatfee 10:cc4d4eddc121 51 #define _LCDWAITMODE (0) // 0 Allows the LCD driver and charge pump to continue running during wait mode
dogcatfee 10:cc4d4eddc121 52 // 1 Disable the LCD when the MCU goes into wait mode
dogcatfee 10:cc4d4eddc121 53 #define _LCDSTOPMODE (0) // 0 Allows the LCD driver and charge pump to continue running during stop2 or stop3
dogcatfee 10:cc4d4eddc121 54 // 1 Disable the LCD when and charge pump when the MCU goes into stop2 or stop3
dogcatfee 10:cc4d4eddc121 55
dogcatfee 10:cc4d4eddc121 56 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Voltage Supply Register ~|~|~|~|~|~|~|~|~|~|~|~*/
dogcatfee 10:cc4d4eddc121 57 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
dogcatfee 10:cc4d4eddc121 58 #define _LCDHIGHREF (0) //0 Divide input VIREG=1.0v
dogcatfee 10:cc4d4eddc121 59 //1 Do not divide the input VIREG=1.67v
dogcatfee 10:cc4d4eddc121 60 #define _LCDBBYPASS (0) //Determines whether the internal LCD op amp buffer is bypassed
dogcatfee 10:cc4d4eddc121 61 //0 Buffered mode
dogcatfee 10:cc4d4eddc121 62 //1 Unbuffered mode
dogcatfee 10:cc4d4eddc121 63
dogcatfee 10:cc4d4eddc121 64 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Regulated Voltage Control |~|~|~|~|~|~|~|~|~|~*/
dogcatfee 10:cc4d4eddc121 65 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
dogcatfee 10:cc4d4eddc121 66 #define _LCDCONTRAST (1) //Contrast by software 0 -- Disable 1-- Enable
dogcatfee 10:cc4d4eddc121 67 #define _LVLCONTRAST (0) //Any number between 0 and 15, if the number is bigger the glass gets darker
dogcatfee 10:cc4d4eddc121 68
dogcatfee 10:cc4d4eddc121 69 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Blink Control Register ~|~|~|~|~|~|~|~|~|~|~|~*/
dogcatfee 10:cc4d4eddc121 70 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
dogcatfee 10:cc4d4eddc121 71 #define _LCDBLINKCONTROL (1) //0 Disable blink mode
dogcatfee 10:cc4d4eddc121 72 //1 Enable blink mode
dogcatfee 10:cc4d4eddc121 73 #define _LCDALTMODE (0) //0 Normal display
dogcatfee 10:cc4d4eddc121 74 //1 Alternate display for 4 backplanes or less the LCD backplane sequencer changes to otuput an alternate display
dogcatfee 10:cc4d4eddc121 75 #define _LCDBLANKDISP (0) //0 Do not blank display
dogcatfee 10:cc4d4eddc121 76 //1 Blank display if you put it in 0 the text before blank is manteined
dogcatfee 10:cc4d4eddc121 77 #define _LCDBLINKMODE (0) //0 Display blank during the blink period
dogcatfee 10:cc4d4eddc121 78 //1 Display alternate displat during blink period (Ignored if duty is 5 or greater)
dogcatfee 10:cc4d4eddc121 79
dogcatfee 10:cc4d4eddc121 80
dogcatfee 10:cc4d4eddc121 81 //Calculated values
dogcatfee 10:cc4d4eddc121 82 #define _LCDUSEDPINS (_LCDFRONTPLANES + _LCDBACKPLANES)
dogcatfee 10:cc4d4eddc121 83 #define _LCDDUTY (_LCDBACKPLANES-1) //Any number between 0 and 7
dogcatfee 10:cc4d4eddc121 84 #define LCD_WF_BASE LCD->WF8B[0]
dogcatfee 10:cc4d4eddc121 85
dogcatfee 10:cc4d4eddc121 86 // General definitions used by the LCD library
dogcatfee 10:cc4d4eddc121 87 //#define LCD_WF(x) *((uint8 *)&LCD_WF_BASE + x)
dogcatfee 10:cc4d4eddc121 88
dogcatfee 10:cc4d4eddc121 89 /*LCD Fault Detections Consts*/
dogcatfee 10:cc4d4eddc121 90 #define FP_TYPE 0x00 // pin is a Front Plane
dogcatfee 10:cc4d4eddc121 91 #define BP_TYPE 0x80 // pin is Back Plane
dogcatfee 10:cc4d4eddc121 92
dogcatfee 10:cc4d4eddc121 93 // Fault Detect Preescaler Options
dogcatfee 10:cc4d4eddc121 94 #define FDPRS_1 0
dogcatfee 10:cc4d4eddc121 95 #define FDPRS_2 1
dogcatfee 10:cc4d4eddc121 96 #define FDPRS_4 2
dogcatfee 10:cc4d4eddc121 97 #define FDPRS_8 3
dogcatfee 10:cc4d4eddc121 98 #define FDPRS_16 4
dogcatfee 10:cc4d4eddc121 99 #define FDPRS_32 5
dogcatfee 10:cc4d4eddc121 100 #define FDPRS_64 6
dogcatfee 10:cc4d4eddc121 101 #define FDPRS_128 7
dogcatfee 10:cc4d4eddc121 102
dogcatfee 10:cc4d4eddc121 103 // Fault Detect Sample Window Width Values
dogcatfee 10:cc4d4eddc121 104 #define FDSWW_4 0
dogcatfee 10:cc4d4eddc121 105 #define FDSWW_8 1
dogcatfee 10:cc4d4eddc121 106 #define FDSWW_16 2
dogcatfee 10:cc4d4eddc121 107 #define FDSWW_32 3
dogcatfee 10:cc4d4eddc121 108 #define FDSWW_64 4
dogcatfee 10:cc4d4eddc121 109 #define FDSWW_128 5
dogcatfee 10:cc4d4eddc121 110 #define FDSWW_256 6
dogcatfee 10:cc4d4eddc121 111 #define FDSWW_512 7
dogcatfee 10:cc4d4eddc121 112
dogcatfee 10:cc4d4eddc121 113 /*
dogcatfee 10:cc4d4eddc121 114 Mask Bit definitions used f
dogcatfee 10:cc4d4eddc121 115 */
dogcatfee 10:cc4d4eddc121 116 #define mBIT0 1
dogcatfee 10:cc4d4eddc121 117 #define mBIT1 2
dogcatfee 10:cc4d4eddc121 118 #define mBIT2 4
dogcatfee 10:cc4d4eddc121 119 #define mBIT3 8
dogcatfee 10:cc4d4eddc121 120 #define mBIT4 16
dogcatfee 10:cc4d4eddc121 121 #define mBIT5 32
dogcatfee 10:cc4d4eddc121 122 #define mBIT6 64
dogcatfee 10:cc4d4eddc121 123 #define mBIT7 128
dogcatfee 10:cc4d4eddc121 124 #define mBIT8 256
dogcatfee 10:cc4d4eddc121 125 #define mBIT9 512
dogcatfee 10:cc4d4eddc121 126 #define mBIT10 1024
dogcatfee 10:cc4d4eddc121 127 #define mBIT11 2048
dogcatfee 10:cc4d4eddc121 128 #define mBIT12 4096
dogcatfee 10:cc4d4eddc121 129 #define mBIT13 8192
dogcatfee 10:cc4d4eddc121 130 #define mBIT14 16384
dogcatfee 10:cc4d4eddc121 131 #define mBIT15 32768
dogcatfee 10:cc4d4eddc121 132 #define mBIT16 65536
dogcatfee 10:cc4d4eddc121 133 #define mBIT17 131072
dogcatfee 10:cc4d4eddc121 134 #define mBIT18 262144
dogcatfee 10:cc4d4eddc121 135 #define mBIT19 524288
dogcatfee 10:cc4d4eddc121 136 #define mBIT20 1048576
dogcatfee 10:cc4d4eddc121 137 #define mBIT21 2097152
dogcatfee 10:cc4d4eddc121 138 #define mBIT22 4194304
dogcatfee 10:cc4d4eddc121 139 #define mBIT23 8388608
dogcatfee 10:cc4d4eddc121 140 #define mBIT24 16777216
dogcatfee 10:cc4d4eddc121 141 #define mBIT25 33554432
dogcatfee 10:cc4d4eddc121 142 #define mBIT26 67108864
dogcatfee 10:cc4d4eddc121 143 #define mBIT27 134217728
dogcatfee 10:cc4d4eddc121 144 #define mBIT28 268435456
dogcatfee 10:cc4d4eddc121 145 #define mBIT29 536870912
dogcatfee 10:cc4d4eddc121 146 #define mBIT30 1073741824
dogcatfee 10:cc4d4eddc121 147 #define mBIT31 2147483648
dogcatfee 10:cc4d4eddc121 148
dogcatfee 10:cc4d4eddc121 149 #define mBIT32 1
dogcatfee 10:cc4d4eddc121 150 #define mBIT33 2
dogcatfee 10:cc4d4eddc121 151 #define mBIT34 4
dogcatfee 10:cc4d4eddc121 152 #define mBIT35 8
dogcatfee 10:cc4d4eddc121 153 #define mBIT36 16
dogcatfee 10:cc4d4eddc121 154 #define mBIT37 32
dogcatfee 10:cc4d4eddc121 155 #define mBIT38 64
dogcatfee 10:cc4d4eddc121 156 #define mBIT39 128
dogcatfee 10:cc4d4eddc121 157 #define mBIT40 256
dogcatfee 10:cc4d4eddc121 158 #define mBIT41 512
dogcatfee 10:cc4d4eddc121 159 #define mBIT42 1024
dogcatfee 10:cc4d4eddc121 160 #define mBIT43 2048
dogcatfee 10:cc4d4eddc121 161 #define mBIT44 4096
dogcatfee 10:cc4d4eddc121 162 #define mBIT45 8192
dogcatfee 10:cc4d4eddc121 163 #define mBIT46 16384
dogcatfee 10:cc4d4eddc121 164 #define mBIT47 32768
dogcatfee 10:cc4d4eddc121 165 #define mBIT48 65536
dogcatfee 10:cc4d4eddc121 166 #define mBIT49 131072
dogcatfee 10:cc4d4eddc121 167 #define mBIT50 262144
dogcatfee 10:cc4d4eddc121 168 #define mBIT51 524288
dogcatfee 10:cc4d4eddc121 169 #define mBIT52 1048576
dogcatfee 10:cc4d4eddc121 170 #define mBIT53 2097152
dogcatfee 10:cc4d4eddc121 171 #define mBIT54 4194304
dogcatfee 10:cc4d4eddc121 172 #define mBIT55 8388608
dogcatfee 10:cc4d4eddc121 173 #define mBIT56 16777216
dogcatfee 10:cc4d4eddc121 174 #define mBIT57 33554432
dogcatfee 10:cc4d4eddc121 175 #define mBIT58 67108864
dogcatfee 10:cc4d4eddc121 176 #define mBIT59 134217728
dogcatfee 10:cc4d4eddc121 177 #define mBIT60 268435456
dogcatfee 10:cc4d4eddc121 178 #define mBIT61 536870912
dogcatfee 10:cc4d4eddc121 179 #define mBIT62 1073741824
dogcatfee 10:cc4d4eddc121 180 #define mBIT63 2147483648
dogcatfee 10:cc4d4eddc121 181
dogcatfee 10:cc4d4eddc121 182
dogcatfee 10:cc4d4eddc121 183