Release 1.01
SPI_MX25R.cpp@2:1d5204d29bc5, 2019-09-17 (annotated)
- Committer:
- foxbrianr
- Date:
- Tue Sep 17 13:48:28 2019 +0000
- Revision:
- 2:1d5204d29bc5
- Parent:
- 1:86f6ebbe4fd1
Beta 2
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
foxbrianr | 2:1d5204d29bc5 | 1 | /**************************************************************************//** |
foxbrianr | 2:1d5204d29bc5 | 2 | * @file SPI_MX25R.cpp |
foxbrianr | 2:1d5204d29bc5 | 3 | * @brief Base class for wrapping the interface with the SPI NOR Flash. |
foxbrianr | 2:1d5204d29bc5 | 4 | * @version: V1.0 |
foxbrianr | 2:1d5204d29bc5 | 5 | * @date: 9/17/2019 |
foxbrianr | 2:1d5204d29bc5 | 6 | * |
foxbrianr | 2:1d5204d29bc5 | 7 | * @note |
foxbrianr | 1:86f6ebbe4fd1 | 8 | * SPI_MX25R Series SPI-Flash Memory |
foxbrianr | 1:86f6ebbe4fd1 | 9 | * Macronix Low Power Serial NOR Flash |
foxbrianr | 1:86f6ebbe4fd1 | 10 | * (x2, and x4 I/O modes not implemented) |
foxbrianr | 2:1d5204d29bc5 | 11 | * |
foxbrianr | 2:1d5204d29bc5 | 12 | * |
foxbrianr | 2:1d5204d29bc5 | 13 | * @note |
foxbrianr | 2:1d5204d29bc5 | 14 | * Copyright (C) 2019 E3 Design. All rights reserved. |
foxbrianr | 2:1d5204d29bc5 | 15 | * |
foxbrianr | 2:1d5204d29bc5 | 16 | * @par |
foxbrianr | 2:1d5204d29bc5 | 17 | * E3 Designers LLC is supplying this software for use with Cortex-M3 LPC1768 |
foxbrianr | 2:1d5204d29bc5 | 18 | * processor based microcontroller for the ESCM 2000 Monitor and Display. |
foxbrianr | 2:1d5204d29bc5 | 19 | * * |
foxbrianr | 2:1d5204d29bc5 | 20 | * @par |
foxbrianr | 2:1d5204d29bc5 | 21 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
foxbrianr | 2:1d5204d29bc5 | 22 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
foxbrianr | 2:1d5204d29bc5 | 23 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
foxbrianr | 2:1d5204d29bc5 | 24 | * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR |
foxbrianr | 2:1d5204d29bc5 | 25 | * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
foxbrianr | 2:1d5204d29bc5 | 26 | * |
foxbrianr | 2:1d5204d29bc5 | 27 | ******************************************************************************/ |
foxbrianr | 2:1d5204d29bc5 | 28 | |
foxbrianr | 1:86f6ebbe4fd1 | 29 | |
foxbrianr | 1:86f6ebbe4fd1 | 30 | #include "SPI_MX25R.h" |
foxbrianr | 1:86f6ebbe4fd1 | 31 | |
foxbrianr | 1:86f6ebbe4fd1 | 32 | |
foxbrianr | 1:86f6ebbe4fd1 | 33 | SPI_MX25R::SPI_MX25R(PinName mosi, PinName miso, PinName sclk, PinName cs) : |
foxbrianr | 1:86f6ebbe4fd1 | 34 | m_spi(mosi, miso, sclk), m_cs(cs) { } |
foxbrianr | 1:86f6ebbe4fd1 | 35 | |
foxbrianr | 1:86f6ebbe4fd1 | 36 | SPI_MX25R::~SPI_MX25R() { } |
foxbrianr | 1:86f6ebbe4fd1 | 37 | |
foxbrianr | 1:86f6ebbe4fd1 | 38 | void SPI_MX25R::writeEnable(void) |
foxbrianr | 1:86f6ebbe4fd1 | 39 | { |
foxbrianr | 1:86f6ebbe4fd1 | 40 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 41 | m_spi.write(CMD_WREN) ; |
foxbrianr | 1:86f6ebbe4fd1 | 42 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 43 | } |
foxbrianr | 1:86f6ebbe4fd1 | 44 | |
foxbrianr | 1:86f6ebbe4fd1 | 45 | void SPI_MX25R::writeDisable(void) |
foxbrianr | 1:86f6ebbe4fd1 | 46 | { |
foxbrianr | 1:86f6ebbe4fd1 | 47 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 48 | m_spi.write(CMD_WRDI) ; |
foxbrianr | 1:86f6ebbe4fd1 | 49 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 50 | } |
foxbrianr | 1:86f6ebbe4fd1 | 51 | |
foxbrianr | 1:86f6ebbe4fd1 | 52 | void SPI_MX25R::resetEnable(void) |
foxbrianr | 1:86f6ebbe4fd1 | 53 | { |
foxbrianr | 1:86f6ebbe4fd1 | 54 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 55 | m_spi.write(CMD_RSTEN) ; |
foxbrianr | 1:86f6ebbe4fd1 | 56 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 57 | } |
foxbrianr | 1:86f6ebbe4fd1 | 58 | |
foxbrianr | 1:86f6ebbe4fd1 | 59 | void SPI_MX25R::reset(void) |
foxbrianr | 1:86f6ebbe4fd1 | 60 | { |
foxbrianr | 1:86f6ebbe4fd1 | 61 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 62 | m_spi.write(CMD_RST) ; |
foxbrianr | 1:86f6ebbe4fd1 | 63 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 64 | } |
foxbrianr | 1:86f6ebbe4fd1 | 65 | |
foxbrianr | 1:86f6ebbe4fd1 | 66 | void SPI_MX25R::pgmersSuspend(void) |
foxbrianr | 1:86f6ebbe4fd1 | 67 | { |
foxbrianr | 1:86f6ebbe4fd1 | 68 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 69 | m_spi.write(CMD_PESUS) ; |
foxbrianr | 1:86f6ebbe4fd1 | 70 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 71 | } |
foxbrianr | 1:86f6ebbe4fd1 | 72 | |
foxbrianr | 1:86f6ebbe4fd1 | 73 | void SPI_MX25R::pgmersResume(void) |
foxbrianr | 1:86f6ebbe4fd1 | 74 | { |
foxbrianr | 1:86f6ebbe4fd1 | 75 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 76 | m_spi.write(CMD_PERES) ; |
foxbrianr | 1:86f6ebbe4fd1 | 77 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 78 | } |
foxbrianr | 1:86f6ebbe4fd1 | 79 | |
foxbrianr | 1:86f6ebbe4fd1 | 80 | void SPI_MX25R::deepPowerdown(void) |
foxbrianr | 1:86f6ebbe4fd1 | 81 | { |
foxbrianr | 1:86f6ebbe4fd1 | 82 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 83 | m_spi.write(CMD_DP) ; |
foxbrianr | 1:86f6ebbe4fd1 | 84 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 85 | } |
foxbrianr | 1:86f6ebbe4fd1 | 86 | |
foxbrianr | 1:86f6ebbe4fd1 | 87 | void SPI_MX25R::setBurstlength(void) |
foxbrianr | 1:86f6ebbe4fd1 | 88 | { |
foxbrianr | 1:86f6ebbe4fd1 | 89 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 90 | m_spi.write(CMD_SBL) ; |
foxbrianr | 1:86f6ebbe4fd1 | 91 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 92 | } |
foxbrianr | 1:86f6ebbe4fd1 | 93 | |
foxbrianr | 1:86f6ebbe4fd1 | 94 | void SPI_MX25R::releaseReadenhaced(void) |
foxbrianr | 1:86f6ebbe4fd1 | 95 | { |
foxbrianr | 1:86f6ebbe4fd1 | 96 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 97 | m_spi.write(CMD_RRE) ; |
foxbrianr | 1:86f6ebbe4fd1 | 98 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 99 | } |
foxbrianr | 1:86f6ebbe4fd1 | 100 | |
foxbrianr | 1:86f6ebbe4fd1 | 101 | void SPI_MX25R::noOperation(void) |
foxbrianr | 1:86f6ebbe4fd1 | 102 | { |
foxbrianr | 1:86f6ebbe4fd1 | 103 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 104 | m_spi.write(CMD_NOP) ; |
foxbrianr | 1:86f6ebbe4fd1 | 105 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 106 | } |
foxbrianr | 1:86f6ebbe4fd1 | 107 | |
foxbrianr | 1:86f6ebbe4fd1 | 108 | void SPI_MX25R::enterSecureOTP(void) |
foxbrianr | 1:86f6ebbe4fd1 | 109 | { |
foxbrianr | 1:86f6ebbe4fd1 | 110 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 111 | m_spi.write(CMD_ENSO) ; |
foxbrianr | 1:86f6ebbe4fd1 | 112 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 113 | } |
foxbrianr | 1:86f6ebbe4fd1 | 114 | |
foxbrianr | 1:86f6ebbe4fd1 | 115 | void SPI_MX25R::exitSecureOTP(void) |
foxbrianr | 1:86f6ebbe4fd1 | 116 | { |
foxbrianr | 1:86f6ebbe4fd1 | 117 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 118 | m_spi.write(CMD_EXSO) ; |
foxbrianr | 1:86f6ebbe4fd1 | 119 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 120 | } |
foxbrianr | 1:86f6ebbe4fd1 | 121 | |
foxbrianr | 1:86f6ebbe4fd1 | 122 | uint8_t SPI_MX25R::readStatus(void) |
foxbrianr | 1:86f6ebbe4fd1 | 123 | { |
foxbrianr | 1:86f6ebbe4fd1 | 124 | uint8_t data ; |
foxbrianr | 1:86f6ebbe4fd1 | 125 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 126 | m_spi.write(CMD_RDSR) ; |
foxbrianr | 1:86f6ebbe4fd1 | 127 | data = m_spi.write(DUMMY) ; // dummy |
foxbrianr | 1:86f6ebbe4fd1 | 128 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 129 | return( data ) ; |
foxbrianr | 1:86f6ebbe4fd1 | 130 | } |
foxbrianr | 1:86f6ebbe4fd1 | 131 | |
foxbrianr | 1:86f6ebbe4fd1 | 132 | uint32_t SPI_MX25R::readConfig(void) |
foxbrianr | 1:86f6ebbe4fd1 | 133 | { |
foxbrianr | 1:86f6ebbe4fd1 | 134 | uint8_t data; |
foxbrianr | 1:86f6ebbe4fd1 | 135 | uint32_t config32 = 0 ; |
foxbrianr | 1:86f6ebbe4fd1 | 136 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 137 | m_spi.write(CMD_RDCR) ; // send 15h |
foxbrianr | 1:86f6ebbe4fd1 | 138 | data= m_spi.write(DUMMY) ; // dumy to get 1st Byte out |
foxbrianr | 1:86f6ebbe4fd1 | 139 | config32 = config32 | data ; // put in 32b reg |
foxbrianr | 1:86f6ebbe4fd1 | 140 | data= m_spi.write(DUMMY) ; // dummy to get 2nd Byte out |
foxbrianr | 1:86f6ebbe4fd1 | 141 | config32 = (config32 << 8) | data ; // shift and put in reg |
foxbrianr | 1:86f6ebbe4fd1 | 142 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 143 | return( config32 ) ; |
foxbrianr | 1:86f6ebbe4fd1 | 144 | } |
foxbrianr | 1:86f6ebbe4fd1 | 145 | |
foxbrianr | 1:86f6ebbe4fd1 | 146 | uint8_t SPI_MX25R::readSecurity(void) |
foxbrianr | 1:86f6ebbe4fd1 | 147 | { |
foxbrianr | 1:86f6ebbe4fd1 | 148 | uint8_t data ; |
foxbrianr | 1:86f6ebbe4fd1 | 149 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 150 | m_spi.write(CMD_RDSCUR) ; // send 2Bh |
foxbrianr | 1:86f6ebbe4fd1 | 151 | data = m_spi.write(DUMMY) ; // dummy |
foxbrianr | 1:86f6ebbe4fd1 | 152 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 153 | return( data ) ; |
foxbrianr | 1:86f6ebbe4fd1 | 154 | } |
foxbrianr | 1:86f6ebbe4fd1 | 155 | |
foxbrianr | 1:86f6ebbe4fd1 | 156 | uint32_t SPI_MX25R::readID(void) |
foxbrianr | 1:86f6ebbe4fd1 | 157 | { |
foxbrianr | 1:86f6ebbe4fd1 | 158 | uint8_t data; |
foxbrianr | 1:86f6ebbe4fd1 | 159 | uint32_t data32 = 0 ; |
foxbrianr | 1:86f6ebbe4fd1 | 160 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 161 | m_spi.write(CMD_RDID) ; // send 9Fh |
foxbrianr | 1:86f6ebbe4fd1 | 162 | data= m_spi.write(DUMMY) ; // dumy to get 1st Byte out |
foxbrianr | 1:86f6ebbe4fd1 | 163 | data32 = data32 | data ; // put in 32b reg |
foxbrianr | 1:86f6ebbe4fd1 | 164 | data= m_spi.write(DUMMY) ; // dummy to get 2nd Byte out |
foxbrianr | 1:86f6ebbe4fd1 | 165 | data32 = (data32 << 8) | data ; // shift and put in reg |
foxbrianr | 1:86f6ebbe4fd1 | 166 | data= m_spi.write(DUMMY) ; // dummy to get 3rd Byte out |
foxbrianr | 1:86f6ebbe4fd1 | 167 | data32 = (data32 << 8) | data ; // shift again and put in reg |
foxbrianr | 1:86f6ebbe4fd1 | 168 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 169 | return( data32 ) ; |
foxbrianr | 1:86f6ebbe4fd1 | 170 | } |
foxbrianr | 1:86f6ebbe4fd1 | 171 | |
foxbrianr | 1:86f6ebbe4fd1 | 172 | uint32_t SPI_MX25R::readREMS(void) |
foxbrianr | 1:86f6ebbe4fd1 | 173 | { |
foxbrianr | 1:86f6ebbe4fd1 | 174 | uint8_t data; |
foxbrianr | 1:86f6ebbe4fd1 | 175 | uint32_t data32 = 0 ; |
foxbrianr | 1:86f6ebbe4fd1 | 176 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 177 | m_spi.write(CMD_REMS) ; // send 90h |
foxbrianr | 1:86f6ebbe4fd1 | 178 | m_spi.write(DUMMY) ; // send DUMMY1 |
foxbrianr | 1:86f6ebbe4fd1 | 179 | m_spi.write(DUMMY) ; // send DUMMY2 |
foxbrianr | 1:86f6ebbe4fd1 | 180 | m_spi.write(0) ; // send address=0x00 to get Manu ID 1st. |
foxbrianr | 1:86f6ebbe4fd1 | 181 | data= m_spi.write(DUMMY) ; // dumy to get Manufacturer ID= C2h out |
foxbrianr | 1:86f6ebbe4fd1 | 182 | data32 = data32 | data ; // put in 32b reg |
foxbrianr | 1:86f6ebbe4fd1 | 183 | data= m_spi.write(DUMMY) ; // dummy to get 2nd Byte = Device ID out |
foxbrianr | 1:86f6ebbe4fd1 | 184 | data32 = (data32 << 8) | data ; // shift and put in reg |
foxbrianr | 1:86f6ebbe4fd1 | 185 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 186 | return( data32 ) ; |
foxbrianr | 1:86f6ebbe4fd1 | 187 | } |
foxbrianr | 1:86f6ebbe4fd1 | 188 | |
foxbrianr | 1:86f6ebbe4fd1 | 189 | uint8_t SPI_MX25R::readRES(void) |
foxbrianr | 1:86f6ebbe4fd1 | 190 | { |
foxbrianr | 1:86f6ebbe4fd1 | 191 | uint8_t data; |
foxbrianr | 1:86f6ebbe4fd1 | 192 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 193 | m_spi.write(CMD_RES) ; // send ABh |
foxbrianr | 1:86f6ebbe4fd1 | 194 | m_spi.write(DUMMY) ; // send DUMMY1 |
foxbrianr | 1:86f6ebbe4fd1 | 195 | m_spi.write(DUMMY) ; // send DUMMY2 |
foxbrianr | 1:86f6ebbe4fd1 | 196 | m_spi.write(DUMMY) ; // send DUMMY3 |
foxbrianr | 1:86f6ebbe4fd1 | 197 | data= m_spi.write(DUMMY) ; // dumy to get Electronic Sig. out |
foxbrianr | 1:86f6ebbe4fd1 | 198 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 199 | return( data ) ; |
foxbrianr | 1:86f6ebbe4fd1 | 200 | } |
foxbrianr | 1:86f6ebbe4fd1 | 201 | |
foxbrianr | 1:86f6ebbe4fd1 | 202 | void SPI_MX25R::programPage(int addr, uint8_t *data, int numData) |
foxbrianr | 1:86f6ebbe4fd1 | 203 | { |
foxbrianr | 1:86f6ebbe4fd1 | 204 | int i ; |
foxbrianr | 1:86f6ebbe4fd1 | 205 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 206 | m_spi.write(CMD_PP) ; // Program Page 02h |
foxbrianr | 1:86f6ebbe4fd1 | 207 | m_spi.write((addr >> 16)&0xFF) ; // adr 23:16 |
foxbrianr | 1:86f6ebbe4fd1 | 208 | m_spi.write((addr >> 8)&0xFF) ; // adr 15:8 |
foxbrianr | 1:86f6ebbe4fd1 | 209 | m_spi.write(addr & 0xFF) ; // adr 7:0 |
foxbrianr | 1:86f6ebbe4fd1 | 210 | for (i = 0 ; i < numData ; i++ ) { // data = 00, 01, 02, .. to FEh, FFh = all 256 Bytes in 1 page. |
foxbrianr | 1:86f6ebbe4fd1 | 211 | m_spi.write(data[i]) ; |
foxbrianr | 1:86f6ebbe4fd1 | 212 | } |
foxbrianr | 1:86f6ebbe4fd1 | 213 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 214 | // poll in main |
foxbrianr | 1:86f6ebbe4fd1 | 215 | } |
foxbrianr | 1:86f6ebbe4fd1 | 216 | |
foxbrianr | 1:86f6ebbe4fd1 | 217 | void SPI_MX25R::writeStatusreg(int addr) // Write SR cmd 01h + 3B data |
foxbrianr | 1:86f6ebbe4fd1 | 218 | { |
foxbrianr | 1:86f6ebbe4fd1 | 219 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 220 | m_spi.write(CMD_WRSR) ; // Write SR cmd 01h |
foxbrianr | 1:86f6ebbe4fd1 | 221 | m_spi.write((addr >> 16)&0xFF) ; // address |
foxbrianr | 1:86f6ebbe4fd1 | 222 | m_spi.write((addr >> 8)&0xFF) ; |
foxbrianr | 1:86f6ebbe4fd1 | 223 | m_spi.write(addr & 0xFF) ; |
foxbrianr | 1:86f6ebbe4fd1 | 224 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 225 | } |
foxbrianr | 1:86f6ebbe4fd1 | 226 | |
foxbrianr | 1:86f6ebbe4fd1 | 227 | void SPI_MX25R::writeSecurityreg(int addr) // WRSCUR cmd 2Fh + 1B data |
foxbrianr | 1:86f6ebbe4fd1 | 228 | { |
foxbrianr | 1:86f6ebbe4fd1 | 229 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 230 | m_spi.write(CMD_WRSCUR) ; // Write SR cmd 01h |
foxbrianr | 1:86f6ebbe4fd1 | 231 | m_spi.write(addr & 0xFF) ; |
foxbrianr | 1:86f6ebbe4fd1 | 232 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 233 | } |
foxbrianr | 1:86f6ebbe4fd1 | 234 | |
foxbrianr | 1:86f6ebbe4fd1 | 235 | void SPI_MX25R::blockErase(int addr) // 64KB Block Erase |
foxbrianr | 1:86f6ebbe4fd1 | 236 | { |
foxbrianr | 1:86f6ebbe4fd1 | 237 | uint8_t data[3] ; |
foxbrianr | 1:86f6ebbe4fd1 | 238 | data[0] = (addr >> 16) & 0xFF ; |
foxbrianr | 1:86f6ebbe4fd1 | 239 | data[1] = (addr >> 8) & 0xFF ; |
foxbrianr | 1:86f6ebbe4fd1 | 240 | data[2] = (addr & 0xFF) ; |
foxbrianr | 1:86f6ebbe4fd1 | 241 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 242 | m_spi.write(CMD_BE) ; |
foxbrianr | 1:86f6ebbe4fd1 | 243 | for (int i = 0 ; i < 3 ; i++ ) { // Address setting |
foxbrianr | 1:86f6ebbe4fd1 | 244 | m_spi.write(data[i]) ; |
foxbrianr | 1:86f6ebbe4fd1 | 245 | } |
foxbrianr | 1:86f6ebbe4fd1 | 246 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 247 | // poll in main |
foxbrianr | 1:86f6ebbe4fd1 | 248 | } |
foxbrianr | 1:86f6ebbe4fd1 | 249 | |
foxbrianr | 1:86f6ebbe4fd1 | 250 | void SPI_MX25R::blockErase32KB(int addr) // 32KB Block Erase |
foxbrianr | 1:86f6ebbe4fd1 | 251 | { |
foxbrianr | 1:86f6ebbe4fd1 | 252 | uint8_t data[3] ; |
foxbrianr | 1:86f6ebbe4fd1 | 253 | data[0] = (addr >> 16) & 0xFF ; |
foxbrianr | 1:86f6ebbe4fd1 | 254 | data[1] = (addr >> 8) & 0xFF ; |
foxbrianr | 1:86f6ebbe4fd1 | 255 | data[2] = (addr & 0xFF) ; |
foxbrianr | 1:86f6ebbe4fd1 | 256 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 257 | m_spi.write(CMD_32KBE) ; |
foxbrianr | 1:86f6ebbe4fd1 | 258 | for (int i = 0 ; i < 3 ; i++ ) { // Address Setting |
foxbrianr | 1:86f6ebbe4fd1 | 259 | m_spi.write(data[i]) ; |
foxbrianr | 1:86f6ebbe4fd1 | 260 | } |
foxbrianr | 1:86f6ebbe4fd1 | 261 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 262 | // poll in main |
foxbrianr | 1:86f6ebbe4fd1 | 263 | } |
foxbrianr | 1:86f6ebbe4fd1 | 264 | |
foxbrianr | 1:86f6ebbe4fd1 | 265 | void SPI_MX25R::sectorErase(int addr) // 4KB Sector Erase |
foxbrianr | 1:86f6ebbe4fd1 | 266 | { |
foxbrianr | 1:86f6ebbe4fd1 | 267 | uint8_t data[3] ; |
foxbrianr | 1:86f6ebbe4fd1 | 268 | data[0] = (addr >> 16) & 0xFF ; |
foxbrianr | 1:86f6ebbe4fd1 | 269 | data[1] = (addr >> 8) & 0xFF ; |
foxbrianr | 1:86f6ebbe4fd1 | 270 | data[2] = (addr & 0xFF) ; |
foxbrianr | 1:86f6ebbe4fd1 | 271 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 272 | m_spi.write(CMD_SE) ; |
foxbrianr | 1:86f6ebbe4fd1 | 273 | for (int i = 0 ; i < 3 ; i++ ) { // Address Setting |
foxbrianr | 1:86f6ebbe4fd1 | 274 | m_spi.write(data[i]) ; |
foxbrianr | 1:86f6ebbe4fd1 | 275 | } |
foxbrianr | 1:86f6ebbe4fd1 | 276 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 277 | // poll in main |
foxbrianr | 1:86f6ebbe4fd1 | 278 | } |
foxbrianr | 1:86f6ebbe4fd1 | 279 | |
foxbrianr | 1:86f6ebbe4fd1 | 280 | void SPI_MX25R::chipErase(void) // Chip Erase |
foxbrianr | 1:86f6ebbe4fd1 | 281 | { |
foxbrianr | 1:86f6ebbe4fd1 | 282 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 283 | m_spi.write(CMD_CE) ; |
foxbrianr | 1:86f6ebbe4fd1 | 284 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 285 | // poll in main |
foxbrianr | 1:86f6ebbe4fd1 | 286 | } |
foxbrianr | 1:86f6ebbe4fd1 | 287 | |
foxbrianr | 1:86f6ebbe4fd1 | 288 | uint8_t SPI_MX25R::read8(int addr) // Single Byte Read |
foxbrianr | 1:86f6ebbe4fd1 | 289 | { |
foxbrianr | 1:86f6ebbe4fd1 | 290 | uint8_t data ; |
foxbrianr | 1:86f6ebbe4fd1 | 291 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 292 | m_spi.write(CMD_READ) ; // send 03h |
foxbrianr | 1:86f6ebbe4fd1 | 293 | m_spi.write((addr >> 16)&0xFF) ; |
foxbrianr | 1:86f6ebbe4fd1 | 294 | m_spi.write((addr >> 8)&0xFF) ; |
foxbrianr | 1:86f6ebbe4fd1 | 295 | m_spi.write(addr & 0xFF) ; |
foxbrianr | 1:86f6ebbe4fd1 | 296 | data = m_spi.write(DUMMY) ; // write data is dummy |
foxbrianr | 1:86f6ebbe4fd1 | 297 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 298 | return( data ) ; // return 1 byte |
foxbrianr | 1:86f6ebbe4fd1 | 299 | } |
foxbrianr | 1:86f6ebbe4fd1 | 300 | |
foxbrianr | 1:86f6ebbe4fd1 | 301 | uint8_t SPI_MX25R::readSFDP(int addr) // Read SFDP |
foxbrianr | 1:86f6ebbe4fd1 | 302 | { |
foxbrianr | 1:86f6ebbe4fd1 | 303 | uint8_t data ; |
foxbrianr | 1:86f6ebbe4fd1 | 304 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 305 | m_spi.write(CMD_RDSFDP) ; // send cmd 5Ah |
foxbrianr | 1:86f6ebbe4fd1 | 306 | m_spi.write((addr >> 16)&0xFF) ; // address[23:16] |
foxbrianr | 1:86f6ebbe4fd1 | 307 | m_spi.write((addr >> 8)&0xFF) ; // address[15:8] |
foxbrianr | 1:86f6ebbe4fd1 | 308 | m_spi.write(addr & 0xFF) ; // address[7:0] |
foxbrianr | 1:86f6ebbe4fd1 | 309 | m_spi.write(DUMMY) ; // dummy cycle |
foxbrianr | 1:86f6ebbe4fd1 | 310 | data = m_spi.write(DUMMY) ; // return 1 byte |
foxbrianr | 1:86f6ebbe4fd1 | 311 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 312 | return( data ) ; |
foxbrianr | 1:86f6ebbe4fd1 | 313 | } |
foxbrianr | 1:86f6ebbe4fd1 | 314 | |
foxbrianr | 1:86f6ebbe4fd1 | 315 | uint8_t SPI_MX25R::readFREAD(int addr) // x1 Fast Read Data Byte |
foxbrianr | 1:86f6ebbe4fd1 | 316 | { |
foxbrianr | 1:86f6ebbe4fd1 | 317 | uint8_t data ; |
foxbrianr | 1:86f6ebbe4fd1 | 318 | m_cs = CS_LOW ; |
foxbrianr | 1:86f6ebbe4fd1 | 319 | m_spi.write(CMD_FREAD) ; // send cmd 0BH |
foxbrianr | 1:86f6ebbe4fd1 | 320 | m_spi.write((addr >> 16)&0xFF) ; // address[23:16] |
foxbrianr | 1:86f6ebbe4fd1 | 321 | m_spi.write((addr >> 8)&0xFF) ; // address[15:8] |
foxbrianr | 1:86f6ebbe4fd1 | 322 | m_spi.write(addr & 0xFF) ; // address[7:0] |
foxbrianr | 1:86f6ebbe4fd1 | 323 | m_spi.write(DUMMY) ; // dummy cycle |
foxbrianr | 1:86f6ebbe4fd1 | 324 | data = m_spi.write(DUMMY) ; // return 1 byte |
foxbrianr | 1:86f6ebbe4fd1 | 325 | m_cs = CS_HIGH ; |
foxbrianr | 1:86f6ebbe4fd1 | 326 | return( data ) ; |
foxbrianr | 1:86f6ebbe4fd1 | 327 | } |
foxbrianr | 1:86f6ebbe4fd1 | 328 |