nmbus.c

00001 /**
00002  *
00003  * \file
00004  *
00005  * \brief This module contains NMC1000 bus APIs implementation.
00006  *
00007  * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
00008  *
00009  * \asf_license_start
00010  *
00011  * \page License
00012  *
00013  * Redistribution and use in source and binary forms, with or without
00014  * modification, are permitted provided that the following conditions are met:
00015  *
00016  * 1. Redistributions of source code must retain the above copyright notice,
00017  *    this list of conditions and the following disclaimer.
00018  *
00019  * 2. Redistributions in binary form must reproduce the above copyright notice,
00020  *    this list of conditions and the following disclaimer in the documentation
00021  *    and/or other materials provided with the distribution.
00022  *
00023  * 3. The name of Atmel may not be used to endorse or promote products derived
00024  *    from this software without specific prior written permission.
00025  *
00026  * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
00027  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
00028  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
00029  * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
00030  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00031  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00032  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00033  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
00034  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00035  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00036  * POSSIBILITY OF SUCH DAMAGE.
00037  *
00038  * \asf_license_stop
00039  *
00040  */
00041 #ifndef CORTUS_APP
00042 
00043 #include "nmbus.h"
00044 #include "nmi2c.h"
00045 #include "nmspi.h"
00046 #include "nmuart.h"
00047 
00048 #define MAX_TRX_CFG_SZ      8
00049 
00050 /**
00051 *   @fn     nm_bus_iface_init
00052 *   @brief  Initialize bus interface
00053 *   @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
00054 *   @author M. Abdelmawla
00055 *   @date   11 July 2012
00056 *   @version    1.0
00057 */
00058 sint8 nm_bus_iface_init(void *pvInitVal)
00059 {
00060     sint8 ret = M2M_SUCCESS;
00061     ret = nm_bus_init(pvInitVal);
00062     return ret;
00063 }
00064 
00065 /**
00066 *   @fn     nm_bus_iface_deinit
00067 *   @brief  Deinitialize bus interface
00068 *   @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
00069 *   @author Samer Sarhan
00070 *   @date   07 April 2014
00071 *   @version    1.0
00072 */
00073 sint8 nm_bus_iface_deinit(void)
00074 {
00075     sint8 ret = M2M_SUCCESS;
00076     ret = nm_bus_deinit();
00077 
00078     return ret;
00079 }
00080 
00081 /**
00082 *   @fn     nm_bus_reset
00083 *   @brief  reset bus interface
00084 *   @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
00085 *   @version    1.0
00086 */
00087 sint8 nm_bus_reset(void)
00088 {
00089     sint8 ret = M2M_SUCCESS;
00090 #ifdef CONF_WINC_USE_UART
00091 #elif defined (CONF_WINC_USE_SPI)
00092     return nm_spi_reset();
00093 #elif defined (CONF_WINC_USE_I2C)
00094 #else
00095 #error "Plesae define bus usage"
00096 #endif
00097 
00098     return ret;
00099 }
00100 
00101 /**
00102 *   @fn     nm_bus_iface_reconfigure
00103 *   @brief  reconfigure bus interface
00104 *   @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
00105 *   @author Viswanathan Murugesan
00106 *   @date   22 Oct 2014
00107 *   @version    1.0
00108 */
00109 sint8 nm_bus_iface_reconfigure(void *ptr)
00110 {
00111     sint8 ret = M2M_SUCCESS;
00112 #ifdef CONF_WINC_USE_UART
00113     ret = nm_uart_reconfigure(ptr);
00114 #endif
00115     return ret;
00116 }
00117 /*
00118 *   @fn     nm_read_reg
00119 *   @brief  Read register
00120 *   @param [in] u32Addr
00121 *               Register address
00122 *   @return Register value
00123 *   @author M. Abdelmawla
00124 *   @date   11 July 2012
00125 *   @version    1.0
00126 */
00127 uint32 nm_read_reg(uint32 u32Addr)
00128 {
00129 #ifdef CONF_WINC_USE_UART
00130     return nm_uart_read_reg(u32Addr);
00131 #elif defined (CONF_WINC_USE_SPI)
00132     return nm_spi_read_reg(u32Addr);
00133 #elif defined (CONF_WINC_USE_I2C)
00134     return nm_i2c_read_reg(u32Addr);
00135 #else
00136 #error "Plesae define bus usage"
00137 #endif
00138 
00139 }
00140 
00141 /*
00142 *   @fn     nm_read_reg_with_ret
00143 *   @brief  Read register with error code return
00144 *   @param [in] u32Addr
00145 *               Register address
00146 *   @param [out]    pu32RetVal
00147 *               Pointer to u32 variable used to return the read value
00148 *   @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
00149 *   @author M. Abdelmawla
00150 *   @date   11 July 2012
00151 *   @version    1.0
00152 */
00153 sint8 nm_read_reg_with_ret(uint32 u32Addr, uint32* pu32RetVal)
00154 {
00155 #ifdef CONF_WINC_USE_UART
00156     return nm_uart_read_reg_with_ret (u32Addr,pu32RetVal);
00157 #elif defined (CONF_WINC_USE_SPI)
00158     return nm_spi_read_reg_with_ret(u32Addr,pu32RetVal);
00159 #elif defined (CONF_WINC_USE_I2C)
00160     return nm_i2c_read_reg_with_ret(u32Addr,pu32RetVal);
00161 #else
00162 #error "Plesae define bus usage"
00163 #endif
00164 }
00165 
00166 /*
00167 *   @fn     nm_write_reg
00168 *   @brief  write register
00169 *   @param [in] u32Addr
00170 *               Register address
00171 *   @param [in] u32Val
00172 *               Value to be written to the register
00173 *   @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
00174 *   @author M. Abdelmawla
00175 *   @date   11 July 2012
00176 *   @version    1.0
00177 */
00178 sint8 nm_write_reg(uint32 u32Addr, uint32 u32Val)
00179 {
00180 #ifdef CONF_WINC_USE_UART
00181     return nm_uart_write_reg(u32Addr,u32Val);
00182 #elif defined (CONF_WINC_USE_SPI)
00183     return nm_spi_write_reg(u32Addr,u32Val);
00184 #elif defined (CONF_WINC_USE_I2C)
00185     return nm_i2c_write_reg(u32Addr,u32Val);
00186 #else
00187 #error "Plesae define bus usage"
00188 #endif
00189 }
00190 
00191 static sint8 p_nm_read_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz)
00192 {
00193 #ifdef CONF_WINC_USE_UART
00194     return nm_uart_read_block(u32Addr,puBuf,u16Sz);
00195 #elif defined (CONF_WINC_USE_SPI)
00196     return nm_spi_read_block(u32Addr,puBuf,u16Sz);
00197 #elif defined (CONF_WINC_USE_I2C)
00198     return nm_i2c_read_block(u32Addr,puBuf,u16Sz);
00199 #else
00200 #error "Plesae define bus usage"
00201 #endif
00202 
00203 }
00204 /*
00205 *   @fn     nm_read_block
00206 *   @brief  Read block of data
00207 *   @param [in] u32Addr
00208 *               Start address
00209 *   @param [out]    puBuf
00210 *               Pointer to a buffer used to return the read data
00211 *   @param [in] u32Sz
00212 *               Number of bytes to read. The buffer size must be >= u32Sz
00213 *   @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
00214 *   @author M. Abdelmawla
00215 *   @date   11 July 2012
00216 *   @version    1.0
00217 */ 
00218 sint8 nm_read_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz)
00219 {
00220     uint16 u16MaxTrxSz = egstrNmBusCapabilities.u16MaxTrxSz  - MAX_TRX_CFG_SZ;
00221     uint32 off = 0;
00222     sint8 s8Ret = M2M_SUCCESS;
00223 
00224     for(;;)
00225     {
00226         if(u32Sz <= u16MaxTrxSz)
00227         {
00228             s8Ret += p_nm_read_block(u32Addr, &puBuf[off], (uint16)u32Sz);  
00229             break;
00230         }
00231         else
00232         {
00233             s8Ret += p_nm_read_block(u32Addr, &puBuf[off], u16MaxTrxSz);
00234             if(M2M_SUCCESS != s8Ret) break;
00235             u32Sz -= u16MaxTrxSz;
00236             off += u16MaxTrxSz;
00237             u32Addr += u16MaxTrxSz;
00238         }
00239     }
00240 
00241     return s8Ret;
00242 }
00243 
00244 static sint8 p_nm_write_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz)
00245 {
00246 #ifdef CONF_WINC_USE_UART
00247     return nm_uart_write_block(u32Addr,puBuf,u16Sz);
00248 #elif defined (CONF_WINC_USE_SPI)
00249     return nm_spi_write_block(u32Addr,puBuf,u16Sz);
00250 #elif defined (CONF_WINC_USE_I2C)
00251     return nm_i2c_write_block(u32Addr,puBuf,u16Sz);
00252 #else
00253 #error "Plesae define bus usage"
00254 #endif
00255 
00256 }
00257 /**
00258 *   @fn     nm_write_block
00259 *   @brief  Write block of data
00260 *   @param [in] u32Addr
00261 *               Start address
00262 *   @param [in] puBuf
00263 *               Pointer to the buffer holding the data to be written
00264 *   @param [in] u32Sz
00265 *               Number of bytes to write. The buffer size must be >= u32Sz
00266 *   @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
00267 *   @author M. Abdelmawla
00268 *   @date   11 July 2012
00269 *   @version    1.0
00270 */ 
00271 sint8 nm_write_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz)
00272 {
00273     uint16 u16MaxTrxSz = egstrNmBusCapabilities.u16MaxTrxSz  - MAX_TRX_CFG_SZ;
00274     uint32 off = 0;
00275     sint8 s8Ret = M2M_SUCCESS;
00276 
00277     for(;;)
00278     {
00279         if(u32Sz <= u16MaxTrxSz)
00280         {
00281             s8Ret += p_nm_write_block(u32Addr, &puBuf[off], (uint16)u32Sz); 
00282             break;
00283         }
00284         else
00285         {
00286             s8Ret += p_nm_write_block(u32Addr, &puBuf[off], u16MaxTrxSz);
00287             if(M2M_SUCCESS != s8Ret) break;
00288             u32Sz -= u16MaxTrxSz;
00289             off += u16MaxTrxSz;
00290             u32Addr += u16MaxTrxSz;
00291         }
00292     }
00293 
00294     return s8Ret;
00295 }
00296 
00297 #endif
00298 
00299