nmasic.h

00001 /**
00002  *
00003  * \file
00004  *
00005  * \brief This module contains NMC1500 ASIC specific internal APIs.
00006  *
00007  * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
00008  *
00009  * \asf_license_start
00010  *
00011  * \page License
00012  *
00013  * Redistribution and use in source and binary forms, with or without
00014  * modification, are permitted provided that the following conditions are met:
00015  *
00016  * 1. Redistributions of source code must retain the above copyright notice,
00017  *    this list of conditions and the following disclaimer.
00018  *
00019  * 2. Redistributions in binary form must reproduce the above copyright notice,
00020  *    this list of conditions and the following disclaimer in the documentation
00021  *    and/or other materials provided with the distribution.
00022  *
00023  * 3. The name of Atmel may not be used to endorse or promote products derived
00024  *    from this software without specific prior written permission.
00025  *
00026  * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
00027  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
00028  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
00029  * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
00030  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00031  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00032  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00033  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
00034  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00035  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00036  * POSSIBILITY OF SUCH DAMAGE.
00037  *
00038  * \asf_license_stop
00039  *
00040  */
00041 #ifndef _NMASIC_H_
00042 #define _NMASIC_H_
00043 
00044 #include "common/include/nm_common.h"
00045 
00046 #define NMI_PERIPH_REG_BASE     0x1000
00047 #define NMI_CHIPID              (NMI_PERIPH_REG_BASE)
00048 #define rNMI_GP_REG_0           (0x149c)
00049 #define rNMI_GP_REG_1           (0x14A0)
00050 #define rNMI_GP_REG_2           (0xc0008)
00051 #define rNMI_GLB_RESET          (0x1400)
00052 #define rNMI_BOOT_RESET_MUX     (0x1118)
00053 #define NMI_STATE_REG           (0x108c)
00054 #define BOOTROM_REG             (0xc000c)
00055 #define NMI_REV_REG             (0x207ac)   /*Also, Used to load ATE firmware from SPI Flash and to ensure that it is running too*/
00056 #define NMI_REV_REG_ATE         (0x1048)    /*Revision info register in case of ATE FW*/
00057 #define M2M_WAIT_FOR_HOST_REG   (0x207bc)
00058 #define M2M_FINISH_INIT_STATE   0x02532636UL
00059 #define M2M_FINISH_BOOT_ROM      0x10add09eUL
00060 #define M2M_START_FIRMWARE       0xef522f61UL
00061 #define M2M_START_PS_FIRMWARE    0x94992610UL
00062 
00063 #define M2M_ATE_FW_START_VALUE  (0x3C1CD57D)    /*Also, Change this value in boot_firmware if it will be changed here*/
00064 #define M2M_ATE_FW_IS_UP_VALUE  (0xD75DC1C3)    /*Also, Change this value in ATE (Burst) firmware if it will be changed here*/
00065 
00066 #define REV_2B0        (0x2B0)
00067 #define REV_B0         (0x2B0)
00068 #define REV_3A0        (0x3A0)
00069 #define GET_CHIPID()    nmi_get_chipid()
00070 #define ISNMC1000(id)   ((((id) & 0xfffff000) == 0x100000) ? 1 : 0)
00071 #define ISNMC1500(id)   ((((id) & 0xfffff000) == 0x150000) ? 1 : 0)
00072 #define ISNMC3000(id)   ((((id) & 0xfff00000) == 0x300000) ? 1 : 0)
00073 #define REV(id)         (((id) & 0x00000fff ))
00074 #define EFUSED_MAC(value) (value & 0xffff0000)
00075 
00076 #define rHAVE_SDIO_IRQ_GPIO_BIT     (NBIT0)
00077 #define rHAVE_USE_PMU_BIT           (NBIT1)
00078 #define rHAVE_SLEEP_CLK_SRC_RTC_BIT (NBIT2)
00079 #define rHAVE_SLEEP_CLK_SRC_XO_BIT  (NBIT3)
00080 #define rHAVE_EXT_PA_INV_TX_RX      (NBIT4)
00081 #define rHAVE_LEGACY_RF_SETTINGS    (NBIT5)
00082 #define rHAVE_LOGS_DISABLED_BIT     (NBIT6)
00083 #define rHAVE_ETHERNET_MODE_BIT     (NBIT7)
00084 #define rHAVE_RESERVED1_BIT         (NBIT8)
00085 
00086 typedef struct{
00087     uint32 u32Mac_efuse_mib;
00088     uint32 u32Firmware_Ota_rev;
00089 }tstrGpRegs;
00090 
00091 #ifdef __cplusplus
00092      extern "C" {
00093 #endif
00094 
00095 /*
00096 *   @fn     cpu_halt
00097 *   @brief  
00098 */
00099 sint8 cpu_halt(void);
00100 /*
00101 *   @fn     chip_sleep
00102 *   @brief  
00103 */
00104 sint8 chip_sleep(void);
00105 /*
00106 *   @fn     chip_wake
00107 *   @brief  
00108 */
00109 sint8 chip_wake(void);
00110 /*
00111 *   @fn     chip_idle
00112 *   @brief  
00113 */
00114 void chip_idle(void);
00115 /*
00116 *   @fn     enable_interrupts
00117 *   @brief  
00118 */
00119 sint8 enable_interrupts (void);
00120 /*
00121 *   @fn     cpu_start   
00122 *   @brief  
00123 */
00124 sint8 cpu_start (void);
00125 /*
00126 *   @fn     nmi_get_chipid
00127 *   @brief  
00128 */
00129 uint32 nmi_get_chipid(void);
00130 /*
00131 *   @fn     nmi_get_rfrevid
00132 *   @brief  
00133 */
00134 uint32 nmi_get_rfrevid(void);
00135 /*
00136 *   @fn     restore_pmu_settings_after_global_reset
00137 *   @brief  
00138 */
00139 void restore_pmu_settings_after_global_reset(void);
00140 /*
00141 *   @fn     nmi_update_pll
00142 *   @brief  
00143 */
00144 void nmi_update_pll(void);
00145 /*
00146 *   @fn     nmi_set_sys_clk_src_to_xo
00147 *   @brief  
00148 */
00149 void nmi_set_sys_clk_src_to_xo(void);
00150 /*
00151 *   @fn     chip_reset
00152 *   @brief  
00153 */
00154 sint8 chip_reset(void);
00155 /*
00156 *   @fn     wait_for_bootrom
00157 *   @brief  
00158 */
00159 sint8 wait_for_bootrom(uint8);
00160 /*
00161 *   @fn     wait_for_firmware_start
00162 *   @brief  
00163 */
00164 sint8 wait_for_firmware_start(uint8);
00165 /*
00166 *   @fn     chip_deinit
00167 *   @brief  
00168 */
00169 sint8 chip_deinit (void);
00170 /*
00171 *   @fn     chip_reset_and_cpu_halt
00172 *   @brief  
00173 */
00174 sint8 chip_reset_and_cpu_halt(void);
00175 /*
00176 *   @fn     set_gpio_dir
00177 *   @brief  
00178 */
00179 sint8 set_gpio_dir(uint8 gpio, uint8 dir);
00180 /*
00181 *   @fn     set_gpio_val
00182 *   @brief  
00183 */
00184 sint8 set_gpio_val(uint8 gpio, uint8 val);
00185 /*
00186 *   @fn     get_gpio_val
00187 *   @brief  
00188 */
00189 sint8 get_gpio_val(uint8 gpio, uint8* val);
00190 /*
00191 *   @fn     pullup_ctrl
00192 *   @brief  
00193 */
00194 sint8 pullup_ctrl(uint32 pinmask, uint8 enable);
00195 /*
00196 *   @fn     nmi_get_otp_mac_address
00197 *   @brief  
00198 */
00199 sint8 nmi_get_otp_mac_address(uint8 *pu8MacAddr, uint8 * pu8IsValid);
00200 /*
00201 *   @fn     nmi_get_mac_address
00202 *   @brief  
00203 */
00204 sint8 nmi_get_mac_address(uint8 *pu8MacAddr);
00205 /*
00206 *   @fn     chip_apply_conf
00207 *   @brief  
00208 */
00209 sint8 chip_apply_conf(uint32 u32conf);
00210 
00211 #ifdef __cplusplus
00212      }
00213 #endif
00214 
00215 #endif  /*_NMASIC_H_*/
00216