Delta / NNN50_WIFI_API

NNN50 WIFI_API library

Dependents:   NNN50_CE_Test_UDP NNN50_linux_firmware NNN50_SoftAP_HelloWorld NNN50_BLEWIFISensor ... more

This is mbed compatible EthernetInterface lib exclude for Delta DFCM-NNN50 platform.

Additional information and examples can be found in mbed Handbook

wifi_host_driver/driver/source/nmasic.h@32:8298a2fb074f, 2017-09-04 (annotated)

Committer:
tsungta
Date:
Mon Sep 04 05:40:11 2017 +0000
Revision:
32:8298a2fb074f
Parent:
28:2abbf8463fa8 
56:f4cc53f; Add getRSSI() to readout RSSI while connected with AP router; Add SSL support refer to TCPSocketConnection.connect()

Who changed what in which revision?

UserRevisionLine numberNew contents of line
tsungta 28:2abbf8463fa8 1 /**
tsungta 28:2abbf8463fa8 2 *
tsungta 28:2abbf8463fa8 3 * \file
tsungta 28:2abbf8463fa8 4 *
tsungta 28:2abbf8463fa8 5 * \brief This module contains NMC1500 ASIC specific internal APIs.
tsungta 28:2abbf8463fa8 6 *
tsungta 28:2abbf8463fa8 7 * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
tsungta 28:2abbf8463fa8 8 *
tsungta 28:2abbf8463fa8 9 * \asf_license_start
tsungta 28:2abbf8463fa8 10 *
tsungta 28:2abbf8463fa8 11 * \page License
tsungta 28:2abbf8463fa8 12 *
tsungta 28:2abbf8463fa8 13 * Redistribution and use in source and binary forms, with or without
tsungta 28:2abbf8463fa8 14 * modification, are permitted provided that the following conditions are met:
tsungta 28:2abbf8463fa8 15 *
tsungta 28:2abbf8463fa8 16 * 1. Redistributions of source code must retain the above copyright notice,
tsungta 28:2abbf8463fa8 17 * this list of conditions and the following disclaimer.
tsungta 28:2abbf8463fa8 18 *
tsungta 28:2abbf8463fa8 19 * 2. Redistributions in binary form must reproduce the above copyright notice,
tsungta 28:2abbf8463fa8 20 * this list of conditions and the following disclaimer in the documentation
tsungta 28:2abbf8463fa8 21 * and/or other materials provided with the distribution.
tsungta 28:2abbf8463fa8 22 *
tsungta 28:2abbf8463fa8 23 * 3. The name of Atmel may not be used to endorse or promote products derived
tsungta 28:2abbf8463fa8 24 * from this software without specific prior written permission.
tsungta 28:2abbf8463fa8 25 *
tsungta 28:2abbf8463fa8 26 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
tsungta 28:2abbf8463fa8 27 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
tsungta 28:2abbf8463fa8 28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
tsungta 28:2abbf8463fa8 29 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
tsungta 28:2abbf8463fa8 30 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
tsungta 28:2abbf8463fa8 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
tsungta 28:2abbf8463fa8 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
tsungta 28:2abbf8463fa8 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
tsungta 28:2abbf8463fa8 34 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
tsungta 28:2abbf8463fa8 35 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
tsungta 28:2abbf8463fa8 36 * POSSIBILITY OF SUCH DAMAGE.
tsungta 28:2abbf8463fa8 37 *
tsungta 28:2abbf8463fa8 38 * \asf_license_stop
tsungta 28:2abbf8463fa8 39 *
tsungta 28:2abbf8463fa8 40 */
tsungta 28:2abbf8463fa8 41 #ifndef _NMASIC_H_
tsungta 28:2abbf8463fa8 42 #define _NMASIC_H_
tsungta 28:2abbf8463fa8 43
tsungta 28:2abbf8463fa8 44 #include "common/include/nm_common.h"
tsungta 28:2abbf8463fa8 45
tsungta 28:2abbf8463fa8 46 #define NMI_PERIPH_REG_BASE 0x1000
tsungta 28:2abbf8463fa8 47 #define NMI_CHIPID (NMI_PERIPH_REG_BASE)
tsungta 28:2abbf8463fa8 48 #define rNMI_GP_REG_0 (0x149c)
tsungta 28:2abbf8463fa8 49 #define rNMI_GP_REG_1 (0x14A0)
tsungta 28:2abbf8463fa8 50 #define rNMI_GP_REG_2 (0xc0008)
tsungta 28:2abbf8463fa8 51 #define rNMI_GLB_RESET (0x1400)
tsungta 28:2abbf8463fa8 52 #define rNMI_BOOT_RESET_MUX (0x1118)
tsungta 28:2abbf8463fa8 53 #define NMI_STATE_REG (0x108c)
tsungta 28:2abbf8463fa8 54 #define BOOTROM_REG (0xc000c)
tsungta 28:2abbf8463fa8 55 #define NMI_REV_REG (0x207ac) /*Also, Used to load ATE firmware from SPI Flash and to ensure that it is running too*/
tsungta 28:2abbf8463fa8 56 #define NMI_REV_REG_ATE (0x1048) /*Revision info register in case of ATE FW*/
tsungta 28:2abbf8463fa8 57 #define M2M_WAIT_FOR_HOST_REG (0x207bc)
tsungta 28:2abbf8463fa8 58 #define M2M_FINISH_INIT_STATE 0x02532636UL
tsungta 28:2abbf8463fa8 59 #define M2M_FINISH_BOOT_ROM 0x10add09eUL
tsungta 28:2abbf8463fa8 60 #define M2M_START_FIRMWARE 0xef522f61UL
tsungta 28:2abbf8463fa8 61 #define M2M_START_PS_FIRMWARE 0x94992610UL
tsungta 28:2abbf8463fa8 62
tsungta 28:2abbf8463fa8 63 #define M2M_ATE_FW_START_VALUE (0x3C1CD57D) /*Also, Change this value in boot_firmware if it will be changed here*/
tsungta 28:2abbf8463fa8 64 #define M2M_ATE_FW_IS_UP_VALUE (0xD75DC1C3) /*Also, Change this value in ATE (Burst) firmware if it will be changed here*/
tsungta 28:2abbf8463fa8 65
tsungta 28:2abbf8463fa8 66 #define REV_2B0 (0x2B0)
tsungta 28:2abbf8463fa8 67 #define REV_B0 (0x2B0)
tsungta 28:2abbf8463fa8 68 #define REV_3A0 (0x3A0)
tsungta 28:2abbf8463fa8 69 #define GET_CHIPID() nmi_get_chipid()
tsungta 28:2abbf8463fa8 70 #define ISNMC1000(id) ((((id) & 0xfffff000) == 0x100000) ? 1 : 0)
tsungta 28:2abbf8463fa8 71 #define ISNMC1500(id) ((((id) & 0xfffff000) == 0x150000) ? 1 : 0)
tsungta 28:2abbf8463fa8 72 #define ISNMC3000(id) ((((id) & 0xfff00000) == 0x300000) ? 1 : 0)
tsungta 28:2abbf8463fa8 73 #define REV(id) (((id) & 0x00000fff ))
tsungta 28:2abbf8463fa8 74 #define EFUSED_MAC(value) (value & 0xffff0000)
tsungta 28:2abbf8463fa8 75
tsungta 28:2abbf8463fa8 76 #define rHAVE_SDIO_IRQ_GPIO_BIT (NBIT0)
tsungta 28:2abbf8463fa8 77 #define rHAVE_USE_PMU_BIT (NBIT1)
tsungta 28:2abbf8463fa8 78 #define rHAVE_SLEEP_CLK_SRC_RTC_BIT (NBIT2)
tsungta 28:2abbf8463fa8 79 #define rHAVE_SLEEP_CLK_SRC_XO_BIT (NBIT3)
tsungta 28:2abbf8463fa8 80 #define rHAVE_EXT_PA_INV_TX_RX (NBIT4)
tsungta 28:2abbf8463fa8 81 #define rHAVE_LEGACY_RF_SETTINGS (NBIT5)
tsungta 28:2abbf8463fa8 82 #define rHAVE_LOGS_DISABLED_BIT (NBIT6)
tsungta 28:2abbf8463fa8 83 #define rHAVE_ETHERNET_MODE_BIT (NBIT7)
tsungta 28:2abbf8463fa8 84 #define rHAVE_RESERVED1_BIT (NBIT8)
tsungta 28:2abbf8463fa8 85
tsungta 28:2abbf8463fa8 86 typedef struct{
tsungta 28:2abbf8463fa8 87 uint32 u32Mac_efuse_mib;
tsungta 28:2abbf8463fa8 88 uint32 u32Firmware_Ota_rev;
tsungta 28:2abbf8463fa8 89 }tstrGpRegs;
tsungta 28:2abbf8463fa8 90
tsungta 28:2abbf8463fa8 91 #ifdef __cplusplus
tsungta 28:2abbf8463fa8 92 extern "C" {
tsungta 28:2abbf8463fa8 93 #endif
tsungta 28:2abbf8463fa8 94
tsungta 28:2abbf8463fa8 95 /*
tsungta 28:2abbf8463fa8 96 * @fn cpu_halt
tsungta 28:2abbf8463fa8 97 * @brief
tsungta 28:2abbf8463fa8 98 */
tsungta 28:2abbf8463fa8 99 sint8 cpu_halt(void);
tsungta 28:2abbf8463fa8 100 /*
tsungta 28:2abbf8463fa8 101 * @fn chip_sleep
tsungta 28:2abbf8463fa8 102 * @brief
tsungta 28:2abbf8463fa8 103 */
tsungta 28:2abbf8463fa8 104 sint8 chip_sleep(void);
tsungta 28:2abbf8463fa8 105 /*
tsungta 28:2abbf8463fa8 106 * @fn chip_wake
tsungta 28:2abbf8463fa8 107 * @brief
tsungta 28:2abbf8463fa8 108 */
tsungta 28:2abbf8463fa8 109 sint8 chip_wake(void);
tsungta 28:2abbf8463fa8 110 /*
tsungta 28:2abbf8463fa8 111 * @fn chip_idle
tsungta 28:2abbf8463fa8 112 * @brief
tsungta 28:2abbf8463fa8 113 */
tsungta 28:2abbf8463fa8 114 void chip_idle(void);
tsungta 28:2abbf8463fa8 115 /*
tsungta 28:2abbf8463fa8 116 * @fn enable_interrupts
tsungta 28:2abbf8463fa8 117 * @brief
tsungta 28:2abbf8463fa8 118 */
tsungta 28:2abbf8463fa8 119 sint8 enable_interrupts(void);
tsungta 28:2abbf8463fa8 120 /*
tsungta 28:2abbf8463fa8 121 * @fn cpu_start
tsungta 28:2abbf8463fa8 122 * @brief
tsungta 28:2abbf8463fa8 123 */
tsungta 28:2abbf8463fa8 124 sint8 cpu_start(void);
tsungta 28:2abbf8463fa8 125 /*
tsungta 28:2abbf8463fa8 126 * @fn nmi_get_chipid
tsungta 28:2abbf8463fa8 127 * @brief
tsungta 28:2abbf8463fa8 128 */
tsungta 28:2abbf8463fa8 129 uint32 nmi_get_chipid(void);
tsungta 28:2abbf8463fa8 130 /*
tsungta 28:2abbf8463fa8 131 * @fn nmi_get_rfrevid
tsungta 28:2abbf8463fa8 132 * @brief
tsungta 28:2abbf8463fa8 133 */
tsungta 28:2abbf8463fa8 134 uint32 nmi_get_rfrevid(void);
tsungta 28:2abbf8463fa8 135 /*
tsungta 28:2abbf8463fa8 136 * @fn restore_pmu_settings_after_global_reset
tsungta 28:2abbf8463fa8 137 * @brief
tsungta 28:2abbf8463fa8 138 */
tsungta 28:2abbf8463fa8 139 void restore_pmu_settings_after_global_reset(void);
tsungta 28:2abbf8463fa8 140 /*
tsungta 28:2abbf8463fa8 141 * @fn nmi_update_pll
tsungta 28:2abbf8463fa8 142 * @brief
tsungta 28:2abbf8463fa8 143 */
tsungta 28:2abbf8463fa8 144 void nmi_update_pll(void);
tsungta 28:2abbf8463fa8 145 /*
tsungta 28:2abbf8463fa8 146 * @fn nmi_set_sys_clk_src_to_xo
tsungta 28:2abbf8463fa8 147 * @brief
tsungta 28:2abbf8463fa8 148 */
tsungta 28:2abbf8463fa8 149 void nmi_set_sys_clk_src_to_xo(void);
tsungta 28:2abbf8463fa8 150 /*
tsungta 28:2abbf8463fa8 151 * @fn chip_reset
tsungta 28:2abbf8463fa8 152 * @brief
tsungta 28:2abbf8463fa8 153 */
tsungta 28:2abbf8463fa8 154 sint8 chip_reset(void);
tsungta 28:2abbf8463fa8 155 /*
tsungta 28:2abbf8463fa8 156 * @fn wait_for_bootrom
tsungta 28:2abbf8463fa8 157 * @brief
tsungta 28:2abbf8463fa8 158 */
tsungta 28:2abbf8463fa8 159 sint8 wait_for_bootrom(uint8);
tsungta 28:2abbf8463fa8 160 /*
tsungta 28:2abbf8463fa8 161 * @fn wait_for_firmware_start
tsungta 28:2abbf8463fa8 162 * @brief
tsungta 28:2abbf8463fa8 163 */
tsungta 28:2abbf8463fa8 164 sint8 wait_for_firmware_start(uint8);
tsungta 28:2abbf8463fa8 165 /*
tsungta 28:2abbf8463fa8 166 * @fn chip_deinit
tsungta 28:2abbf8463fa8 167 * @brief
tsungta 28:2abbf8463fa8 168 */
tsungta 28:2abbf8463fa8 169 sint8 chip_deinit(void);
tsungta 28:2abbf8463fa8 170 /*
tsungta 28:2abbf8463fa8 171 * @fn chip_reset_and_cpu_halt
tsungta 28:2abbf8463fa8 172 * @brief
tsungta 28:2abbf8463fa8 173 */
tsungta 28:2abbf8463fa8 174 sint8 chip_reset_and_cpu_halt(void);
tsungta 28:2abbf8463fa8 175 /*
tsungta 28:2abbf8463fa8 176 * @fn set_gpio_dir
tsungta 28:2abbf8463fa8 177 * @brief
tsungta 28:2abbf8463fa8 178 */
tsungta 28:2abbf8463fa8 179 sint8 set_gpio_dir(uint8 gpio, uint8 dir);
tsungta 28:2abbf8463fa8 180 /*
tsungta 28:2abbf8463fa8 181 * @fn set_gpio_val
tsungta 28:2abbf8463fa8 182 * @brief
tsungta 28:2abbf8463fa8 183 */
tsungta 28:2abbf8463fa8 184 sint8 set_gpio_val(uint8 gpio, uint8 val);
tsungta 28:2abbf8463fa8 185 /*
tsungta 28:2abbf8463fa8 186 * @fn get_gpio_val
tsungta 28:2abbf8463fa8 187 * @brief
tsungta 28:2abbf8463fa8 188 */
tsungta 28:2abbf8463fa8 189 sint8 get_gpio_val(uint8 gpio, uint8* val);
tsungta 28:2abbf8463fa8 190 /*
tsungta 28:2abbf8463fa8 191 * @fn pullup_ctrl
tsungta 28:2abbf8463fa8 192 * @brief
tsungta 28:2abbf8463fa8 193 */
tsungta 28:2abbf8463fa8 194 sint8 pullup_ctrl(uint32 pinmask, uint8 enable);
tsungta 28:2abbf8463fa8 195 /*
tsungta 28:2abbf8463fa8 196 * @fn nmi_get_otp_mac_address
tsungta 28:2abbf8463fa8 197 * @brief
tsungta 28:2abbf8463fa8 198 */
tsungta 28:2abbf8463fa8 199 sint8 nmi_get_otp_mac_address(uint8 *pu8MacAddr, uint8 * pu8IsValid);
tsungta 28:2abbf8463fa8 200 /*
tsungta 28:2abbf8463fa8 201 * @fn nmi_get_mac_address
tsungta 28:2abbf8463fa8 202 * @brief
tsungta 28:2abbf8463fa8 203 */
tsungta 28:2abbf8463fa8 204 sint8 nmi_get_mac_address(uint8 *pu8MacAddr);
tsungta 28:2abbf8463fa8 205 /*
tsungta 28:2abbf8463fa8 206 * @fn chip_apply_conf
tsungta 28:2abbf8463fa8 207 * @brief
tsungta 28:2abbf8463fa8 208 */
tsungta 28:2abbf8463fa8 209 sint8 chip_apply_conf(uint32 u32conf);
tsungta 28:2abbf8463fa8 210
tsungta 28:2abbf8463fa8 211 #ifdef __cplusplus
tsungta 28:2abbf8463fa8 212 }
tsungta 28:2abbf8463fa8 213 #endif
tsungta 28:2abbf8463fa8 214
tsungta 28:2abbf8463fa8 215 #endif /*_NMASIC_H_*/
tsungta 28:2abbf8463fa8 216