Delta / NNN50_WIFI_API

NNN50 WIFI_API library

Dependents:   NNN50_CE_Test_UDP NNN50_linux_firmware NNN50_SoftAP_HelloWorld NNN50_BLEWIFISensor ... more

This is mbed compatible EthernetInterface lib exclude for Delta DFCM-NNN50 platform.

Additional information and examples can be found in mbed Handbook

wifi_host_driver/driver/source/m2m_hif.c@32:8298a2fb074f, 2017-09-04 (annotated)

Committer:
tsungta
Date:
Mon Sep 04 05:40:11 2017 +0000
Revision:
32:8298a2fb074f
Parent:
28:2abbf8463fa8 
56:f4cc53f; Add getRSSI() to readout RSSI while connected with AP router; Add SSL support refer to TCPSocketConnection.connect()

Who changed what in which revision?

UserRevisionLine numberNew contents of line
tsungta 28:2abbf8463fa8 1 /**
tsungta 28:2abbf8463fa8 2 *
tsungta 28:2abbf8463fa8 3 * \file
tsungta 28:2abbf8463fa8 4 *
tsungta 28:2abbf8463fa8 5 * \brief This module contains M2M host interface APIs implementation.
tsungta 28:2abbf8463fa8 6 *
tsungta 28:2abbf8463fa8 7 * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
tsungta 28:2abbf8463fa8 8 *
tsungta 28:2abbf8463fa8 9 * \asf_license_start
tsungta 28:2abbf8463fa8 10 *
tsungta 28:2abbf8463fa8 11 * \page License
tsungta 28:2abbf8463fa8 12 *
tsungta 28:2abbf8463fa8 13 * Redistribution and use in source and binary forms, with or without
tsungta 28:2abbf8463fa8 14 * modification, are permitted provided that the following conditions are met:
tsungta 28:2abbf8463fa8 15 *
tsungta 28:2abbf8463fa8 16 * 1. Redistributions of source code must retain the above copyright notice,
tsungta 28:2abbf8463fa8 17 * this list of conditions and the following disclaimer.
tsungta 28:2abbf8463fa8 18 *
tsungta 28:2abbf8463fa8 19 * 2. Redistributions in binary form must reproduce the above copyright notice,
tsungta 28:2abbf8463fa8 20 * this list of conditions and the following disclaimer in the documentation
tsungta 28:2abbf8463fa8 21 * and/or other materials provided with the distribution.
tsungta 28:2abbf8463fa8 22 *
tsungta 28:2abbf8463fa8 23 * 3. The name of Atmel may not be used to endorse or promote products derived
tsungta 28:2abbf8463fa8 24 * from this software without specific prior written permission.
tsungta 28:2abbf8463fa8 25 *
tsungta 28:2abbf8463fa8 26 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
tsungta 28:2abbf8463fa8 27 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
tsungta 28:2abbf8463fa8 28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
tsungta 28:2abbf8463fa8 29 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
tsungta 28:2abbf8463fa8 30 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
tsungta 28:2abbf8463fa8 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
tsungta 28:2abbf8463fa8 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
tsungta 28:2abbf8463fa8 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
tsungta 28:2abbf8463fa8 34 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
tsungta 28:2abbf8463fa8 35 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
tsungta 28:2abbf8463fa8 36 * POSSIBILITY OF SUCH DAMAGE.
tsungta 28:2abbf8463fa8 37 *
tsungta 28:2abbf8463fa8 38 * \asf_license_stop
tsungta 28:2abbf8463fa8 39 *
tsungta 28:2abbf8463fa8 40 */
tsungta 28:2abbf8463fa8 41
tsungta 28:2abbf8463fa8 42 #include "common/include/nm_common.h"
tsungta 28:2abbf8463fa8 43 #include "driver/source/nmbus.h"
tsungta 28:2abbf8463fa8 44 #include "bsp/include/nm_bsp.h"
tsungta 28:2abbf8463fa8 45 #include "m2m_hif.h"
tsungta 28:2abbf8463fa8 46 #include "driver/include/m2m_types.h"
tsungta 28:2abbf8463fa8 47 #include "driver/source/nmasic.h"
tsungta 28:2abbf8463fa8 48 #include "driver/include/m2m_periph.h"
tsungta 28:2abbf8463fa8 49
tsungta 28:2abbf8463fa8 50 #if (defined NM_EDGE_INTERRUPT)&&(defined NM_LEVEL_INTERRUPT)
tsungta 28:2abbf8463fa8 51 #error "only one type of interrupt NM_EDGE_INTERRUPT,NM_LEVEL_INTERRUPT"
tsungta 28:2abbf8463fa8 52 #endif
tsungta 28:2abbf8463fa8 53
tsungta 28:2abbf8463fa8 54 #if !((defined NM_EDGE_INTERRUPT)||(defined NM_LEVEL_INTERRUPT))
tsungta 28:2abbf8463fa8 55 #error "define interrupt type NM_EDGE_INTERRUPT,NM_LEVEL_INTERRUPT"
tsungta 28:2abbf8463fa8 56 #endif
tsungta 28:2abbf8463fa8 57
tsungta 28:2abbf8463fa8 58 #ifndef CORTUS_APP
tsungta 28:2abbf8463fa8 59 #define NMI_AHB_DATA_MEM_BASE 0x30000
tsungta 28:2abbf8463fa8 60 #define NMI_AHB_SHARE_MEM_BASE 0xd0000
tsungta 28:2abbf8463fa8 61
tsungta 28:2abbf8463fa8 62 #define WIFI_HOST_RCV_CTRL_0 (0x1070)
tsungta 28:2abbf8463fa8 63 #define WIFI_HOST_RCV_CTRL_1 (0x1084)
tsungta 28:2abbf8463fa8 64 #define WIFI_HOST_RCV_CTRL_2 (0x1078)
tsungta 28:2abbf8463fa8 65 #define WIFI_HOST_RCV_CTRL_3 (0x106c)
tsungta 28:2abbf8463fa8 66 #define WIFI_HOST_RCV_CTRL_4 (0x150400)
tsungta 28:2abbf8463fa8 67 #define WIFI_HOST_RCV_CTRL_5 (0x1088)
tsungta 28:2abbf8463fa8 68
tsungta 28:2abbf8463fa8 69 typedef struct {
tsungta 28:2abbf8463fa8 70 uint8 u8ChipMode;
tsungta 28:2abbf8463fa8 71 uint8 u8ChipSleep;
tsungta 28:2abbf8463fa8 72 uint8 u8HifRXDone;
tsungta 28:2abbf8463fa8 73 uint8 u8Interrupt;
tsungta 28:2abbf8463fa8 74 uint32 u32RxAddr;
tsungta 28:2abbf8463fa8 75 uint32 u32RxSize;
tsungta 28:2abbf8463fa8 76 tpfHifCallBack pfWifiCb;
tsungta 28:2abbf8463fa8 77 tpfHifCallBack pfIpCb;
tsungta 28:2abbf8463fa8 78 tpfHifCallBack pfOtaCb;
tsungta 28:2abbf8463fa8 79 tpfHifCallBack pfSigmaCb;
tsungta 28:2abbf8463fa8 80 tpfHifCallBack pfHifCb;
tsungta 28:2abbf8463fa8 81 tpfHifCallBack pfCryptoCb;
tsungta 28:2abbf8463fa8 82 tpfHifCallBack pfSslCb;
tsungta 28:2abbf8463fa8 83 }tstrHifContext;
tsungta 28:2abbf8463fa8 84
tsungta 28:2abbf8463fa8 85 volatile tstrHifContext gstrHifCxt;
tsungta 28:2abbf8463fa8 86
tsungta 28:2abbf8463fa8 87 static void isr(void)
tsungta 28:2abbf8463fa8 88 {
tsungta 28:2abbf8463fa8 89 gstrHifCxt.u8Interrupt++;
tsungta 28:2abbf8463fa8 90 #ifdef NM_LEVEL_INTERRUPT
tsungta 28:2abbf8463fa8 91 nm_bsp_interrupt_ctrl(0);
tsungta 28:2abbf8463fa8 92 #endif
tsungta 28:2abbf8463fa8 93 }
tsungta 28:2abbf8463fa8 94 static sint8 hif_set_rx_done(void)
tsungta 28:2abbf8463fa8 95 {
tsungta 28:2abbf8463fa8 96 uint32 reg;
tsungta 28:2abbf8463fa8 97 sint8 ret = M2M_SUCCESS;
tsungta 28:2abbf8463fa8 98
tsungta 28:2abbf8463fa8 99 gstrHifCxt.u8HifRXDone = 0;
tsungta 28:2abbf8463fa8 100 #ifdef NM_EDGE_INTERRUPT
tsungta 28:2abbf8463fa8 101 nm_bsp_interrupt_ctrl(1);
tsungta 28:2abbf8463fa8 102 #endif
tsungta 28:2abbf8463fa8 103 ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_0,&reg);
tsungta 28:2abbf8463fa8 104 if(ret != M2M_SUCCESS)goto ERR1;
tsungta 28:2abbf8463fa8 105 /* Set RX Done */
tsungta 28:2abbf8463fa8 106 reg |= NBIT1;
tsungta 28:2abbf8463fa8 107 ret = nm_write_reg(WIFI_HOST_RCV_CTRL_0,reg);
tsungta 28:2abbf8463fa8 108 if(ret != M2M_SUCCESS)goto ERR1;
tsungta 28:2abbf8463fa8 109 #ifdef NM_LEVEL_INTERRUPT
tsungta 28:2abbf8463fa8 110 nm_bsp_interrupt_ctrl(1);
tsungta 28:2abbf8463fa8 111 #endif
tsungta 28:2abbf8463fa8 112 ERR1:
tsungta 28:2abbf8463fa8 113 return ret;
tsungta 28:2abbf8463fa8 114
tsungta 28:2abbf8463fa8 115 }
tsungta 28:2abbf8463fa8 116 /**
tsungta 28:2abbf8463fa8 117 * @fn static void m2m_hif_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr)
tsungta 28:2abbf8463fa8 118 * @brief WiFi call back function
tsungta 28:2abbf8463fa8 119 * @param [in] u8OpCode
tsungta 28:2abbf8463fa8 120 * HIF Opcode type.
tsungta 28:2abbf8463fa8 121 * @param [in] u16DataSize
tsungta 28:2abbf8463fa8 122 * HIF data length.
tsungta 28:2abbf8463fa8 123 * @param [in] u32Addr
tsungta 28:2abbf8463fa8 124 * HIF address.
tsungta 28:2abbf8463fa8 125 * @param [in] grp
tsungta 28:2abbf8463fa8 126 * HIF group type.
tsungta 28:2abbf8463fa8 127 * @author
tsungta 28:2abbf8463fa8 128 * @date
tsungta 28:2abbf8463fa8 129 * @version 1.0
tsungta 28:2abbf8463fa8 130 */
tsungta 28:2abbf8463fa8 131 static void m2m_hif_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr)
tsungta 28:2abbf8463fa8 132 {
tsungta 28:2abbf8463fa8 133
tsungta 28:2abbf8463fa8 134
tsungta 28:2abbf8463fa8 135 }
tsungta 28:2abbf8463fa8 136 /**
tsungta 28:2abbf8463fa8 137 * @fn NMI_API sint8 hif_chip_wake(void);
tsungta 28:2abbf8463fa8 138 * @brief To Wakeup the chip.
tsungta 28:2abbf8463fa8 139 * @return The function shall return ZERO for successful operation and a negative value otherwise.
tsungta 28:2abbf8463fa8 140 */
tsungta 28:2abbf8463fa8 141
tsungta 28:2abbf8463fa8 142 sint8 hif_chip_wake(void)
tsungta 28:2abbf8463fa8 143 {
tsungta 28:2abbf8463fa8 144 sint8 ret = M2M_SUCCESS;
tsungta 28:2abbf8463fa8 145 if(gstrHifCxt.u8HifRXDone)
tsungta 28:2abbf8463fa8 146 {
tsungta 28:2abbf8463fa8 147 /*chip already wake for the rx not done no need to send wake request*/
tsungta 28:2abbf8463fa8 148 return ret;
tsungta 28:2abbf8463fa8 149 }
tsungta 28:2abbf8463fa8 150 if(gstrHifCxt.u8ChipSleep == 0)
tsungta 28:2abbf8463fa8 151 {
tsungta 28:2abbf8463fa8 152 if(gstrHifCxt.u8ChipMode != M2M_NO_PS)
tsungta 28:2abbf8463fa8 153 {
tsungta 28:2abbf8463fa8 154 ret = chip_wake();
tsungta 28:2abbf8463fa8 155 if(ret != M2M_SUCCESS)goto ERR1;
tsungta 28:2abbf8463fa8 156 }
tsungta 28:2abbf8463fa8 157 else
tsungta 28:2abbf8463fa8 158 {
tsungta 28:2abbf8463fa8 159 }
tsungta 28:2abbf8463fa8 160 }
tsungta 28:2abbf8463fa8 161 gstrHifCxt.u8ChipSleep++;
tsungta 28:2abbf8463fa8 162 ERR1:
tsungta 28:2abbf8463fa8 163 return ret;
tsungta 28:2abbf8463fa8 164 }
tsungta 28:2abbf8463fa8 165 /*!
tsungta 28:2abbf8463fa8 166 @fn \
tsungta 28:2abbf8463fa8 167 NMI_API void hif_set_sleep_mode(uint8 u8Pstype);
tsungta 28:2abbf8463fa8 168
tsungta 28:2abbf8463fa8 169 @brief
tsungta 28:2abbf8463fa8 170 Set the sleep mode of the HIF layer.
tsungta 28:2abbf8463fa8 171
tsungta 28:2abbf8463fa8 172 @param [in] u8Pstype
tsungta 28:2abbf8463fa8 173 Sleep mode.
tsungta 28:2abbf8463fa8 174
tsungta 28:2abbf8463fa8 175 @return
tsungta 28:2abbf8463fa8 176 The function SHALL return 0 for success and a negative value otherwise.
tsungta 28:2abbf8463fa8 177 */
tsungta 28:2abbf8463fa8 178
tsungta 28:2abbf8463fa8 179 void hif_set_sleep_mode(uint8 u8Pstype)
tsungta 28:2abbf8463fa8 180 {
tsungta 28:2abbf8463fa8 181 gstrHifCxt.u8ChipMode = u8Pstype;
tsungta 28:2abbf8463fa8 182 }
tsungta 28:2abbf8463fa8 183 /*!
tsungta 28:2abbf8463fa8 184 @fn \
tsungta 28:2abbf8463fa8 185 NMI_API uint8 hif_get_sleep_mode(void);
tsungta 28:2abbf8463fa8 186
tsungta 28:2abbf8463fa8 187 @brief
tsungta 28:2abbf8463fa8 188 Get the sleep mode of the HIF layer.
tsungta 28:2abbf8463fa8 189
tsungta 28:2abbf8463fa8 190 @return
tsungta 28:2abbf8463fa8 191 The function SHALL return the sleep mode of the HIF layer.
tsungta 28:2abbf8463fa8 192 */
tsungta 28:2abbf8463fa8 193
tsungta 28:2abbf8463fa8 194 uint8 hif_get_sleep_mode(void)
tsungta 28:2abbf8463fa8 195 {
tsungta 28:2abbf8463fa8 196 return gstrHifCxt.u8ChipMode;
tsungta 28:2abbf8463fa8 197 }
tsungta 28:2abbf8463fa8 198
tsungta 28:2abbf8463fa8 199 /**
tsungta 28:2abbf8463fa8 200 * @fn NMI_API sint8 hif_chip_sleep_sc(void);
tsungta 28:2abbf8463fa8 201 * @brief To clear the chip sleep but keep the chip sleep
tsungta 28:2abbf8463fa8 202 * @return The function shall return ZERO for successful operation and a negative value otherwise.
tsungta 28:2abbf8463fa8 203 */
tsungta 28:2abbf8463fa8 204
tsungta 28:2abbf8463fa8 205 sint8 hif_chip_sleep_sc(void)
tsungta 28:2abbf8463fa8 206 {
tsungta 28:2abbf8463fa8 207 if(gstrHifCxt.u8ChipSleep >= 1)
tsungta 28:2abbf8463fa8 208 {
tsungta 28:2abbf8463fa8 209 gstrHifCxt.u8ChipSleep--;
tsungta 28:2abbf8463fa8 210 }
tsungta 28:2abbf8463fa8 211 return M2M_SUCCESS;
tsungta 28:2abbf8463fa8 212 }
tsungta 28:2abbf8463fa8 213 /**
tsungta 28:2abbf8463fa8 214 * @fn NMI_API sint8 hif_chip_sleep(void);
tsungta 28:2abbf8463fa8 215 * @brief To make the chip sleep.
tsungta 28:2abbf8463fa8 216 * @return The function shall return ZERO for successful operation and a negative value otherwise.
tsungta 28:2abbf8463fa8 217 */
tsungta 28:2abbf8463fa8 218
tsungta 28:2abbf8463fa8 219 sint8 hif_chip_sleep(void)
tsungta 28:2abbf8463fa8 220 {
tsungta 28:2abbf8463fa8 221 sint8 ret = M2M_SUCCESS;
tsungta 28:2abbf8463fa8 222
tsungta 28:2abbf8463fa8 223 if(gstrHifCxt.u8ChipSleep >= 1)
tsungta 28:2abbf8463fa8 224 {
tsungta 28:2abbf8463fa8 225 gstrHifCxt.u8ChipSleep--;
tsungta 28:2abbf8463fa8 226 }
tsungta 28:2abbf8463fa8 227
tsungta 28:2abbf8463fa8 228 if(gstrHifCxt.u8ChipSleep == 0)
tsungta 28:2abbf8463fa8 229 {
tsungta 28:2abbf8463fa8 230 if(gstrHifCxt.u8ChipMode != M2M_NO_PS)
tsungta 28:2abbf8463fa8 231 {
tsungta 28:2abbf8463fa8 232 ret = chip_sleep();
tsungta 28:2abbf8463fa8 233 if(ret != M2M_SUCCESS)goto ERR1;
tsungta 28:2abbf8463fa8 234
tsungta 28:2abbf8463fa8 235 }
tsungta 28:2abbf8463fa8 236 else
tsungta 28:2abbf8463fa8 237 {
tsungta 28:2abbf8463fa8 238 }
tsungta 28:2abbf8463fa8 239 }
tsungta 28:2abbf8463fa8 240 ERR1:
tsungta 28:2abbf8463fa8 241 return ret;
tsungta 28:2abbf8463fa8 242 }
tsungta 28:2abbf8463fa8 243 /**
tsungta 28:2abbf8463fa8 244 * @fn NMI_API sint8 hif_init(void * arg);
tsungta 28:2abbf8463fa8 245 * @brief To initialize HIF layer.
tsungta 28:2abbf8463fa8 246 * @param [in] arg
tsungta 28:2abbf8463fa8 247 * Pointer to the arguments.
tsungta 28:2abbf8463fa8 248 * @return The function shall return ZERO for successful operation and a negative value otherwise.
tsungta 28:2abbf8463fa8 249 */
tsungta 28:2abbf8463fa8 250
tsungta 28:2abbf8463fa8 251 sint8 hif_init(void * arg)
tsungta 28:2abbf8463fa8 252 {
tsungta 28:2abbf8463fa8 253 m2m_memset((uint8*)&gstrHifCxt,0,sizeof(tstrHifContext));
tsungta 28:2abbf8463fa8 254 nm_bsp_register_isr(isr);
tsungta 28:2abbf8463fa8 255 hif_register_cb(M2M_REQ_GROUP_HIF,m2m_hif_cb);
tsungta 28:2abbf8463fa8 256 return M2M_SUCCESS;
tsungta 28:2abbf8463fa8 257 }
tsungta 28:2abbf8463fa8 258 /**
tsungta 28:2abbf8463fa8 259 * @fn NMI_API sint8 hif_deinit(void * arg);
tsungta 28:2abbf8463fa8 260 * @brief To De-initialize HIF layer.
tsungta 28:2abbf8463fa8 261 * @param [in] arg
tsungta 28:2abbf8463fa8 262 * Pointer to the arguments.
tsungta 28:2abbf8463fa8 263 * @return The function shall return ZERO for successful operation and a negative value otherwise.
tsungta 28:2abbf8463fa8 264 */
tsungta 28:2abbf8463fa8 265 sint8 hif_deinit(void * arg)
tsungta 28:2abbf8463fa8 266 {
tsungta 28:2abbf8463fa8 267 sint8 ret = M2M_SUCCESS;
tsungta 28:2abbf8463fa8 268 ret = hif_chip_wake();
tsungta 28:2abbf8463fa8 269 m2m_memset((uint8*)&gstrHifCxt,0,sizeof(tstrHifContext));
tsungta 28:2abbf8463fa8 270 return ret;
tsungta 28:2abbf8463fa8 271 }
tsungta 28:2abbf8463fa8 272 /**
tsungta 28:2abbf8463fa8 273 * @fn NMI_API sint8 hif_send(uint8 u8Gid,uint8 u8Opcode,uint8 *pu8CtrlBuf,uint16 u16CtrlBufSize,
tsungta 28:2abbf8463fa8 274 uint8 *pu8DataBuf,uint16 u16DataSize, uint16 u16DataOffset)
tsungta 28:2abbf8463fa8 275 * @brief Send packet using host interface.
tsungta 28:2abbf8463fa8 276
tsungta 28:2abbf8463fa8 277 * @param [in] u8Gid
tsungta 28:2abbf8463fa8 278 * Group ID.
tsungta 28:2abbf8463fa8 279 * @param [in] u8Opcode
tsungta 28:2abbf8463fa8 280 * Operation ID.
tsungta 28:2abbf8463fa8 281 * @param [in] pu8CtrlBuf
tsungta 28:2abbf8463fa8 282 * Pointer to the Control buffer.
tsungta 28:2abbf8463fa8 283 * @param [in] u16CtrlBufSize
tsungta 28:2abbf8463fa8 284 Control buffer size.
tsungta 28:2abbf8463fa8 285 * @param [in] u16DataOffset
tsungta 28:2abbf8463fa8 286 Packet Data offset.
tsungta 28:2abbf8463fa8 287 * @param [in] pu8DataBuf
tsungta 28:2abbf8463fa8 288 * Packet buffer Allocated by the caller.
tsungta 28:2abbf8463fa8 289 * @param [in] u16DataSize
tsungta 28:2abbf8463fa8 290 Packet buffer size (including the HIF header).
tsungta 28:2abbf8463fa8 291 * @return The function shall return ZERO for successful operation and a negative value otherwise.
tsungta 28:2abbf8463fa8 292 */
tsungta 28:2abbf8463fa8 293
tsungta 28:2abbf8463fa8 294 sint8 hif_send(uint8 u8Gid,uint8 u8Opcode,uint8 *pu8CtrlBuf,uint16 u16CtrlBufSize,
tsungta 28:2abbf8463fa8 295 uint8 *pu8DataBuf,uint16 u16DataSize, uint16 u16DataOffset)
tsungta 28:2abbf8463fa8 296 {
tsungta 28:2abbf8463fa8 297 sint8 ret = M2M_ERR_SEND;
tsungta 28:2abbf8463fa8 298 volatile tstrHifHdr strHif;
tsungta 28:2abbf8463fa8 299
tsungta 28:2abbf8463fa8 300 strHif.u8Opcode = u8Opcode&(~NBIT7);
tsungta 28:2abbf8463fa8 301 strHif.u8Gid = u8Gid;
tsungta 28:2abbf8463fa8 302 strHif.u16Length = M2M_HIF_HDR_OFFSET;
tsungta 28:2abbf8463fa8 303 if(pu8DataBuf != NULL)
tsungta 28:2abbf8463fa8 304 {
tsungta 28:2abbf8463fa8 305 strHif.u16Length += u16DataOffset + u16DataSize;
tsungta 28:2abbf8463fa8 306 }
tsungta 28:2abbf8463fa8 307 else
tsungta 28:2abbf8463fa8 308 {
tsungta 28:2abbf8463fa8 309 strHif.u16Length += u16CtrlBufSize;
tsungta 28:2abbf8463fa8 310 }
tsungta 28:2abbf8463fa8 311 ret = hif_chip_wake();
tsungta 28:2abbf8463fa8 312 if(ret == M2M_SUCCESS)
tsungta 28:2abbf8463fa8 313 {
tsungta 28:2abbf8463fa8 314 volatile uint32 reg, dma_addr = 0;
tsungta 28:2abbf8463fa8 315 volatile uint16 cnt = 0;
tsungta 28:2abbf8463fa8 316 //#define OPTIMIZE_BUS
tsungta 28:2abbf8463fa8 317 /*please define in firmware also*/
tsungta 28:2abbf8463fa8 318 #ifndef OPTIMIZE_BUS
tsungta 28:2abbf8463fa8 319 reg = 0UL;
tsungta 28:2abbf8463fa8 320 reg |= (uint32)u8Gid;
tsungta 28:2abbf8463fa8 321 reg |= ((uint32)u8Opcode<<8);
tsungta 28:2abbf8463fa8 322 reg |= ((uint32)strHif.u16Length<<16);
tsungta 28:2abbf8463fa8 323 ret = nm_write_reg(NMI_STATE_REG,reg);
tsungta 28:2abbf8463fa8 324 if(M2M_SUCCESS != ret) goto ERR1;
tsungta 28:2abbf8463fa8 325
tsungta 28:2abbf8463fa8 326 reg = 0UL;
tsungta 28:2abbf8463fa8 327 reg |= NBIT1;
tsungta 28:2abbf8463fa8 328 ret = nm_write_reg(WIFI_HOST_RCV_CTRL_2, reg);
tsungta 28:2abbf8463fa8 329 if(M2M_SUCCESS != ret) goto ERR1;
tsungta 28:2abbf8463fa8 330 #else
tsungta 28:2abbf8463fa8 331 reg = 0UL;
tsungta 28:2abbf8463fa8 332 reg |= NBIT1;
tsungta 28:2abbf8463fa8 333 reg |= ((u8Opcode & NBIT7) ? (NBIT2):(0)); /*Data = 1 or config*/
tsungta 28:2abbf8463fa8 334 reg |= (u8Gid == M2M_REQ_GROUP_IP) ? (NBIT3):(0); /*IP = 1 or non IP*/
tsungta 28:2abbf8463fa8 335 reg |= ((uint32)strHif.u16Length << 4); /*length of pkt max = 4096*/
tsungta 28:2abbf8463fa8 336 ret = nm_write_reg(WIFI_HOST_RCV_CTRL_2, reg);
tsungta 28:2abbf8463fa8 337 if(M2M_SUCCESS != ret) goto ERR1;
tsungta 28:2abbf8463fa8 338 #endif
tsungta 28:2abbf8463fa8 339 dma_addr = 0;
tsungta 28:2abbf8463fa8 340
tsungta 28:2abbf8463fa8 341 for(cnt = 0; cnt < 1000; cnt ++)
tsungta 28:2abbf8463fa8 342 {
tsungta 28:2abbf8463fa8 343 ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_2,(uint32 *)&reg);
tsungta 28:2abbf8463fa8 344 if(ret != M2M_SUCCESS) break;
tsungta 28:2abbf8463fa8 345 /*
tsungta 28:2abbf8463fa8 346 * If it takes too long to get a response, the slow down to
tsungta 28:2abbf8463fa8 347 * avoid back-to-back register read operations.
tsungta 28:2abbf8463fa8 348 */
tsungta 28:2abbf8463fa8 349 if(cnt >= 500) {
tsungta 28:2abbf8463fa8 350 if(cnt < 501) {
tsungta 28:2abbf8463fa8 351 M2M_INFO("Slowing down...\n");
tsungta 28:2abbf8463fa8 352 }
tsungta 28:2abbf8463fa8 353 nm_bsp_sleep(1);
tsungta 28:2abbf8463fa8 354 }
tsungta 28:2abbf8463fa8 355 if (!(reg & NBIT1))
tsungta 28:2abbf8463fa8 356 {
tsungta 28:2abbf8463fa8 357 ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_4,(uint32 *)&dma_addr);
tsungta 28:2abbf8463fa8 358 if(ret != M2M_SUCCESS) {
tsungta 28:2abbf8463fa8 359 /*in case of read error clear the DMA address and return error*/
tsungta 28:2abbf8463fa8 360 dma_addr = 0;
tsungta 28:2abbf8463fa8 361 goto ERR1;
tsungta 28:2abbf8463fa8 362 }
tsungta 28:2abbf8463fa8 363 /*in case of success break */
tsungta 28:2abbf8463fa8 364 break;
tsungta 28:2abbf8463fa8 365 }
tsungta 28:2abbf8463fa8 366 }
tsungta 28:2abbf8463fa8 367
tsungta 28:2abbf8463fa8 368 if (dma_addr != 0)
tsungta 28:2abbf8463fa8 369 {
tsungta 28:2abbf8463fa8 370 volatile uint32 u32CurrAddr;
tsungta 28:2abbf8463fa8 371 u32CurrAddr = dma_addr;
tsungta 28:2abbf8463fa8 372 strHif.u16Length=NM_BSP_B_L_16(strHif.u16Length);
tsungta 28:2abbf8463fa8 373 ret = nm_write_block(u32CurrAddr, (uint8*)&strHif, M2M_HIF_HDR_OFFSET);
tsungta 28:2abbf8463fa8 374 if(M2M_SUCCESS != ret) goto ERR1;
tsungta 28:2abbf8463fa8 375 u32CurrAddr += M2M_HIF_HDR_OFFSET;
tsungta 28:2abbf8463fa8 376 if(pu8CtrlBuf != NULL)
tsungta 28:2abbf8463fa8 377 {
tsungta 28:2abbf8463fa8 378 ret = nm_write_block(u32CurrAddr, pu8CtrlBuf, u16CtrlBufSize);
tsungta 28:2abbf8463fa8 379 if(M2M_SUCCESS != ret) goto ERR1;
tsungta 28:2abbf8463fa8 380 u32CurrAddr += u16CtrlBufSize;
tsungta 28:2abbf8463fa8 381 }
tsungta 28:2abbf8463fa8 382 if(pu8DataBuf != NULL)
tsungta 28:2abbf8463fa8 383 {
tsungta 28:2abbf8463fa8 384 u32CurrAddr += (u16DataOffset - u16CtrlBufSize);
tsungta 28:2abbf8463fa8 385 ret = nm_write_block(u32CurrAddr, pu8DataBuf, u16DataSize);
tsungta 28:2abbf8463fa8 386 if(M2M_SUCCESS != ret) goto ERR1;
tsungta 28:2abbf8463fa8 387 u32CurrAddr += u16DataSize;
tsungta 28:2abbf8463fa8 388 }
tsungta 28:2abbf8463fa8 389
tsungta 28:2abbf8463fa8 390 reg = dma_addr << 2;
tsungta 28:2abbf8463fa8 391 reg |= NBIT1;
tsungta 28:2abbf8463fa8 392 ret = nm_write_reg(WIFI_HOST_RCV_CTRL_3, reg);
tsungta 28:2abbf8463fa8 393 if(M2M_SUCCESS != ret) goto ERR1;
tsungta 28:2abbf8463fa8 394 }
tsungta 28:2abbf8463fa8 395 else
tsungta 28:2abbf8463fa8 396 {
tsungta 28:2abbf8463fa8 397 ret = hif_chip_sleep();
tsungta 28:2abbf8463fa8 398 M2M_DBG("Failed to alloc rx size %d\r",ret);
tsungta 28:2abbf8463fa8 399 ret = M2M_ERR_MEM_ALLOC;
tsungta 28:2abbf8463fa8 400 goto ERR2;
tsungta 28:2abbf8463fa8 401 }
tsungta 28:2abbf8463fa8 402
tsungta 28:2abbf8463fa8 403 }
tsungta 28:2abbf8463fa8 404 else
tsungta 28:2abbf8463fa8 405 {
tsungta 28:2abbf8463fa8 406 M2M_ERR("(HIF)Fail to wakup the chip\n");
tsungta 28:2abbf8463fa8 407 goto ERR2;
tsungta 28:2abbf8463fa8 408 }
tsungta 28:2abbf8463fa8 409 /*actual sleep ret = M2M_SUCCESS*/
tsungta 28:2abbf8463fa8 410 ret = hif_chip_sleep();
tsungta 28:2abbf8463fa8 411 return ret;
tsungta 28:2abbf8463fa8 412 ERR1:
tsungta 28:2abbf8463fa8 413 /*reset the count but no actual sleep as it already bus error*/
tsungta 28:2abbf8463fa8 414 hif_chip_sleep_sc();
tsungta 28:2abbf8463fa8 415 ERR2:
tsungta 28:2abbf8463fa8 416 /*logical error*/
tsungta 28:2abbf8463fa8 417 return ret;
tsungta 28:2abbf8463fa8 418 }
tsungta 28:2abbf8463fa8 419 /**
tsungta 28:2abbf8463fa8 420 * @fn hif_isr
tsungta 28:2abbf8463fa8 421 * @brief Host interface interrupt service routine
tsungta 28:2abbf8463fa8 422 * @author M. Abdelmawla
tsungta 28:2abbf8463fa8 423 * @date 15 July 2012
tsungta 28:2abbf8463fa8 424 * @return 1 in case of interrupt received else 0 will be returned
tsungta 28:2abbf8463fa8 425 * @version 1.0
tsungta 28:2abbf8463fa8 426 */
tsungta 28:2abbf8463fa8 427 static sint8 hif_isr(void)
tsungta 28:2abbf8463fa8 428 {
tsungta 28:2abbf8463fa8 429 sint8 ret = M2M_SUCCESS;
tsungta 28:2abbf8463fa8 430 uint32 reg;
tsungta 28:2abbf8463fa8 431 volatile tstrHifHdr strHif;
tsungta 28:2abbf8463fa8 432
tsungta 28:2abbf8463fa8 433 ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_0, &reg);
tsungta 28:2abbf8463fa8 434 if(M2M_SUCCESS == ret)
tsungta 28:2abbf8463fa8 435 {
tsungta 28:2abbf8463fa8 436 if(reg & 0x1) /* New interrupt has been received */
tsungta 28:2abbf8463fa8 437 {
tsungta 28:2abbf8463fa8 438 uint16 size;
tsungta 28:2abbf8463fa8 439
tsungta 28:2abbf8463fa8 440 nm_bsp_interrupt_ctrl(0);
tsungta 28:2abbf8463fa8 441 /*Clearing RX interrupt*/
tsungta 28:2abbf8463fa8 442 reg &= ~NBIT0;
tsungta 28:2abbf8463fa8 443 ret = nm_write_reg(WIFI_HOST_RCV_CTRL_0,reg);
tsungta 28:2abbf8463fa8 444 if(ret != M2M_SUCCESS)goto ERR1;
tsungta 28:2abbf8463fa8 445 gstrHifCxt.u8HifRXDone = 1;
tsungta 28:2abbf8463fa8 446 size = (uint16)((reg >> 2) & 0xfff);
tsungta 28:2abbf8463fa8 447 if (size > 0) {
tsungta 28:2abbf8463fa8 448 uint32 address = 0;
tsungta 28:2abbf8463fa8 449 /**
tsungta 28:2abbf8463fa8 450 start bus transfer
tsungta 28:2abbf8463fa8 451 **/
tsungta 28:2abbf8463fa8 452 ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_1, &address);
tsungta 28:2abbf8463fa8 453 if(M2M_SUCCESS != ret)
tsungta 28:2abbf8463fa8 454 {
tsungta 28:2abbf8463fa8 455 M2M_ERR("(hif) WIFI_HOST_RCV_CTRL_1 bus fail\n");
tsungta 28:2abbf8463fa8 456 nm_bsp_interrupt_ctrl(1);
tsungta 28:2abbf8463fa8 457 goto ERR1;
tsungta 28:2abbf8463fa8 458 }
tsungta 28:2abbf8463fa8 459 gstrHifCxt.u32RxAddr = address;
tsungta 28:2abbf8463fa8 460 gstrHifCxt.u32RxSize = size;
tsungta 28:2abbf8463fa8 461 ret = nm_read_block(address, (uint8*)&strHif, sizeof(tstrHifHdr));
tsungta 28:2abbf8463fa8 462 strHif.u16Length = NM_BSP_B_L_16(strHif.u16Length);
tsungta 28:2abbf8463fa8 463 if(M2M_SUCCESS != ret)
tsungta 28:2abbf8463fa8 464 {
tsungta 28:2abbf8463fa8 465 M2M_ERR("(hif) address bus fail\n");
tsungta 28:2abbf8463fa8 466 nm_bsp_interrupt_ctrl(1);
tsungta 28:2abbf8463fa8 467 goto ERR1;
tsungta 28:2abbf8463fa8 468 }
tsungta 28:2abbf8463fa8 469 if(strHif.u16Length != size)
tsungta 28:2abbf8463fa8 470 {
tsungta 28:2abbf8463fa8 471 if((size - strHif.u16Length) > 4)
tsungta 28:2abbf8463fa8 472 {
tsungta 28:2abbf8463fa8 473 M2M_ERR("(hif) Corrupted packet Size = %u <L = %u, G = %u, OP = %02X>\n",
tsungta 28:2abbf8463fa8 474 size, strHif.u16Length, strHif.u8Gid, strHif.u8Opcode);
tsungta 28:2abbf8463fa8 475 nm_bsp_interrupt_ctrl(1);
tsungta 28:2abbf8463fa8 476 ret = M2M_ERR_BUS_FAIL;
tsungta 28:2abbf8463fa8 477 goto ERR1;
tsungta 28:2abbf8463fa8 478 }
tsungta 28:2abbf8463fa8 479 }
tsungta 28:2abbf8463fa8 480
tsungta 28:2abbf8463fa8 481 if(M2M_REQ_GROUP_WIFI == strHif.u8Gid)
tsungta 28:2abbf8463fa8 482 {
tsungta 28:2abbf8463fa8 483 if(gstrHifCxt.pfWifiCb)
tsungta 28:2abbf8463fa8 484 gstrHifCxt.pfWifiCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
tsungta 28:2abbf8463fa8 485 else
tsungta 28:2abbf8463fa8 486 M2M_ERR("WIFI callback is not registered\n");
tsungta 28:2abbf8463fa8 487
tsungta 28:2abbf8463fa8 488 }
tsungta 28:2abbf8463fa8 489 else if(M2M_REQ_GROUP_IP == strHif.u8Gid)
tsungta 28:2abbf8463fa8 490 {
tsungta 28:2abbf8463fa8 491 if(gstrHifCxt.pfIpCb)
tsungta 28:2abbf8463fa8 492 gstrHifCxt.pfIpCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
tsungta 28:2abbf8463fa8 493 else
tsungta 28:2abbf8463fa8 494 M2M_ERR("Scoket callback is not registered\n");
tsungta 28:2abbf8463fa8 495
tsungta 28:2abbf8463fa8 496 }
tsungta 28:2abbf8463fa8 497 else if(M2M_REQ_GROUP_OTA == strHif.u8Gid)
tsungta 28:2abbf8463fa8 498 {
tsungta 28:2abbf8463fa8 499 if(gstrHifCxt.pfOtaCb)
tsungta 28:2abbf8463fa8 500 gstrHifCxt.pfOtaCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
tsungta 28:2abbf8463fa8 501 else
tsungta 28:2abbf8463fa8 502 M2M_ERR("Ota callback is not registered\n");
tsungta 28:2abbf8463fa8 503
tsungta 28:2abbf8463fa8 504 }
tsungta 28:2abbf8463fa8 505 else if(M2M_REQ_GROUP_CRYPTO == strHif.u8Gid)
tsungta 28:2abbf8463fa8 506 {
tsungta 28:2abbf8463fa8 507 if(gstrHifCxt.pfCryptoCb)
tsungta 28:2abbf8463fa8 508 gstrHifCxt.pfCryptoCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
tsungta 28:2abbf8463fa8 509
tsungta 28:2abbf8463fa8 510 else
tsungta 28:2abbf8463fa8 511 M2M_ERR("Crypto callback is not registered\n");
tsungta 28:2abbf8463fa8 512 }
tsungta 28:2abbf8463fa8 513 else if(M2M_REQ_GROUP_SIGMA == strHif.u8Gid)
tsungta 28:2abbf8463fa8 514 {
tsungta 28:2abbf8463fa8 515 if(gstrHifCxt.pfSigmaCb)
tsungta 28:2abbf8463fa8 516 gstrHifCxt.pfSigmaCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
tsungta 28:2abbf8463fa8 517 else
tsungta 28:2abbf8463fa8 518 M2M_ERR("Sigma callback is not registered\n");
tsungta 28:2abbf8463fa8 519 }
tsungta 28:2abbf8463fa8 520 else if(M2M_REQ_GROUP_SSL == strHif.u8Gid)
tsungta 28:2abbf8463fa8 521 {
tsungta 28:2abbf8463fa8 522 if(gstrHifCxt.pfSslCb)
tsungta 28:2abbf8463fa8 523 gstrHifCxt.pfSslCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
tsungta 28:2abbf8463fa8 524 }
tsungta 28:2abbf8463fa8 525 else
tsungta 28:2abbf8463fa8 526 {
tsungta 28:2abbf8463fa8 527 M2M_ERR("(hif) invalid group ID\n");
tsungta 28:2abbf8463fa8 528 ret = M2M_ERR_BUS_FAIL;
tsungta 28:2abbf8463fa8 529 goto ERR1;
tsungta 28:2abbf8463fa8 530 }
tsungta 28:2abbf8463fa8 531 if(gstrHifCxt.u8HifRXDone)
tsungta 28:2abbf8463fa8 532 {
tsungta 28:2abbf8463fa8 533 M2M_ERR("(hif) host app didn't set RX Done <%u><%X>\n", strHif.u8Gid, strHif.u8Opcode);
tsungta 28:2abbf8463fa8 534 ret = hif_set_rx_done();
tsungta 28:2abbf8463fa8 535 if(ret != M2M_SUCCESS) goto ERR1;
tsungta 28:2abbf8463fa8 536 }
tsungta 28:2abbf8463fa8 537 }
tsungta 28:2abbf8463fa8 538 else
tsungta 28:2abbf8463fa8 539 {
tsungta 28:2abbf8463fa8 540 M2M_ERR("(hif) Wrong Size\n");
tsungta 28:2abbf8463fa8 541 ret = M2M_ERR_RCV;
tsungta 28:2abbf8463fa8 542 goto ERR1;
tsungta 28:2abbf8463fa8 543 }
tsungta 28:2abbf8463fa8 544 }
tsungta 28:2abbf8463fa8 545 else
tsungta 28:2abbf8463fa8 546 {
tsungta 28:2abbf8463fa8 547 #ifndef WIN32
tsungta 28:2abbf8463fa8 548 M2M_ERR("(hif) False interrupt %lx",reg);
tsungta 28:2abbf8463fa8 549 ret = M2M_ERR_FAIL;
tsungta 28:2abbf8463fa8 550 goto ERR1;
tsungta 28:2abbf8463fa8 551 #else
tsungta 28:2abbf8463fa8 552 #endif
tsungta 28:2abbf8463fa8 553 }
tsungta 28:2abbf8463fa8 554 }
tsungta 28:2abbf8463fa8 555 else
tsungta 28:2abbf8463fa8 556 {
tsungta 28:2abbf8463fa8 557 M2M_ERR("(hif) Fail to Read interrupt reg\n");
tsungta 28:2abbf8463fa8 558 goto ERR1;
tsungta 28:2abbf8463fa8 559 }
tsungta 28:2abbf8463fa8 560
tsungta 28:2abbf8463fa8 561 ERR1:
tsungta 28:2abbf8463fa8 562 return ret;
tsungta 28:2abbf8463fa8 563 }
tsungta 28:2abbf8463fa8 564
tsungta 28:2abbf8463fa8 565 /**
tsungta 28:2abbf8463fa8 566 * @fn hif_handle_isr(void)
tsungta 28:2abbf8463fa8 567 * @brief Handle interrupt received from NMC1500 firmware.
tsungta 28:2abbf8463fa8 568 * @return The function SHALL return 0 for success and a negative value otherwise.
tsungta 28:2abbf8463fa8 569 */
tsungta 28:2abbf8463fa8 570
tsungta 28:2abbf8463fa8 571 sint8 hif_handle_isr(void)
tsungta 28:2abbf8463fa8 572 {
tsungta 28:2abbf8463fa8 573 sint8 ret = M2M_SUCCESS;
tsungta 28:2abbf8463fa8 574 while (gstrHifCxt.u8Interrupt) {
tsungta 28:2abbf8463fa8 575 /*must be at that place because of the race of interrupt increment and that decrement*/
tsungta 28:2abbf8463fa8 576 /*when the interrupt enabled*/
tsungta 28:2abbf8463fa8 577 gstrHifCxt.u8Interrupt--;
tsungta 28:2abbf8463fa8 578 while(1)
tsungta 28:2abbf8463fa8 579 {
tsungta 28:2abbf8463fa8 580 ret = hif_isr();
tsungta 28:2abbf8463fa8 581 if(ret == M2M_SUCCESS) {
tsungta 28:2abbf8463fa8 582 /*we will try forever untill we get that interrupt*/
tsungta 28:2abbf8463fa8 583 /*Fail return errors here due to bus errors (reading expected values)*/
tsungta 28:2abbf8463fa8 584 break;
tsungta 28:2abbf8463fa8 585 } else {
tsungta 28:2abbf8463fa8 586 M2M_ERR("(HIF) Fail to handle interrupt %d try Again..\n",ret);
tsungta 28:2abbf8463fa8 587 }
tsungta 28:2abbf8463fa8 588 }
tsungta 28:2abbf8463fa8 589 }
tsungta 28:2abbf8463fa8 590
tsungta 28:2abbf8463fa8 591 return ret;
tsungta 28:2abbf8463fa8 592 }
tsungta 28:2abbf8463fa8 593 /*
tsungta 28:2abbf8463fa8 594 * @fn hif_receive
tsungta 28:2abbf8463fa8 595 * @brief Host interface interrupt serviece routine
tsungta 28:2abbf8463fa8 596 * @param [in] u32Addr
tsungta 28:2abbf8463fa8 597 * Receive start address
tsungta 28:2abbf8463fa8 598 * @param [out] pu8Buf
tsungta 28:2abbf8463fa8 599 * Pointer to receive buffer. Allocated by the caller
tsungta 28:2abbf8463fa8 600 * @param [in] u16Sz
tsungta 28:2abbf8463fa8 601 * Receive buffer size
tsungta 28:2abbf8463fa8 602 * @param [in] isDone
tsungta 28:2abbf8463fa8 603 * If you don't need any more packets send True otherwise send false
tsungta 28:2abbf8463fa8 604 * @return The function shall return ZERO for successful operation and a negative value otherwise.
tsungta 28:2abbf8463fa8 605 */
tsungta 28:2abbf8463fa8 606 sint8 hif_receive(uint32 u32Addr, uint8 *pu8Buf, uint16 u16Sz, uint8 isDone)
tsungta 28:2abbf8463fa8 607 {
tsungta 28:2abbf8463fa8 608 sint8 ret = M2M_SUCCESS;
tsungta 28:2abbf8463fa8 609 if((u32Addr == 0)||(pu8Buf == NULL) || (u16Sz == 0))
tsungta 28:2abbf8463fa8 610 {
tsungta 28:2abbf8463fa8 611 if(isDone)
tsungta 28:2abbf8463fa8 612 {
tsungta 28:2abbf8463fa8 613 /* set RX done */
tsungta 28:2abbf8463fa8 614 ret = hif_set_rx_done();
tsungta 28:2abbf8463fa8 615 }
tsungta 28:2abbf8463fa8 616 else
tsungta 28:2abbf8463fa8 617 {
tsungta 28:2abbf8463fa8 618 ret = M2M_ERR_FAIL;
tsungta 28:2abbf8463fa8 619 M2M_ERR(" hif_receive: Invalid argument\n");
tsungta 28:2abbf8463fa8 620 }
tsungta 28:2abbf8463fa8 621 goto ERR1;
tsungta 28:2abbf8463fa8 622 }
tsungta 28:2abbf8463fa8 623
tsungta 28:2abbf8463fa8 624 if(u16Sz > gstrHifCxt.u32RxSize)
tsungta 28:2abbf8463fa8 625 {
tsungta 28:2abbf8463fa8 626 ret = M2M_ERR_FAIL;
tsungta 28:2abbf8463fa8 627 M2M_ERR("APP Requested Size is larger than the recived buffer size <%u><%lu>\n",u16Sz, gstrHifCxt.u32RxSize);
tsungta 28:2abbf8463fa8 628 goto ERR1;
tsungta 28:2abbf8463fa8 629 }
tsungta 28:2abbf8463fa8 630 if((u32Addr < gstrHifCxt.u32RxAddr)||((u32Addr + u16Sz)>(gstrHifCxt.u32RxAddr + gstrHifCxt.u32RxSize)))
tsungta 28:2abbf8463fa8 631 {
tsungta 28:2abbf8463fa8 632 ret = M2M_ERR_FAIL;
tsungta 28:2abbf8463fa8 633 M2M_ERR("APP Requested Address beyond the recived buffer address and length\n");
tsungta 28:2abbf8463fa8 634 goto ERR1;
tsungta 28:2abbf8463fa8 635 }
tsungta 28:2abbf8463fa8 636
tsungta 28:2abbf8463fa8 637 /* Receive the payload */
tsungta 28:2abbf8463fa8 638 ret = nm_read_block(u32Addr, pu8Buf, u16Sz);
tsungta 28:2abbf8463fa8 639 if(ret != M2M_SUCCESS)goto ERR1;
tsungta 28:2abbf8463fa8 640
tsungta 28:2abbf8463fa8 641 /* check if this is the last packet */
tsungta 28:2abbf8463fa8 642 if((((gstrHifCxt.u32RxAddr + gstrHifCxt.u32RxSize) - (u32Addr + u16Sz)) <= 0) || isDone)
tsungta 28:2abbf8463fa8 643 {
tsungta 28:2abbf8463fa8 644 /* set RX done */
tsungta 28:2abbf8463fa8 645 ret = hif_set_rx_done();
tsungta 28:2abbf8463fa8 646 }
tsungta 28:2abbf8463fa8 647
tsungta 28:2abbf8463fa8 648 ERR1:
tsungta 28:2abbf8463fa8 649 return ret;
tsungta 28:2abbf8463fa8 650 }
tsungta 28:2abbf8463fa8 651
tsungta 28:2abbf8463fa8 652 /**
tsungta 28:2abbf8463fa8 653 * @fn hif_register_cb
tsungta 28:2abbf8463fa8 654 * @brief To set Callback function for every compantent Component
tsungta 28:2abbf8463fa8 655 * @param [in] u8Grp
tsungta 28:2abbf8463fa8 656 * Group to which the Callback function should be set.
tsungta 28:2abbf8463fa8 657 * @param [in] fn
tsungta 28:2abbf8463fa8 658 * function to be set
tsungta 28:2abbf8463fa8 659 * @return The function shall return ZERO for successful operation and a negative value otherwise.
tsungta 28:2abbf8463fa8 660 */
tsungta 28:2abbf8463fa8 661
tsungta 28:2abbf8463fa8 662 sint8 hif_register_cb(uint8 u8Grp,tpfHifCallBack fn)
tsungta 28:2abbf8463fa8 663 {
tsungta 28:2abbf8463fa8 664 sint8 ret = M2M_SUCCESS;
tsungta 28:2abbf8463fa8 665 switch(u8Grp)
tsungta 28:2abbf8463fa8 666 {
tsungta 28:2abbf8463fa8 667 case M2M_REQ_GROUP_IP:
tsungta 28:2abbf8463fa8 668 gstrHifCxt.pfIpCb = fn;
tsungta 28:2abbf8463fa8 669 break;
tsungta 28:2abbf8463fa8 670 case M2M_REQ_GROUP_WIFI:
tsungta 28:2abbf8463fa8 671 gstrHifCxt.pfWifiCb = fn;
tsungta 28:2abbf8463fa8 672 break;
tsungta 28:2abbf8463fa8 673 case M2M_REQ_GROUP_OTA:
tsungta 28:2abbf8463fa8 674 gstrHifCxt.pfOtaCb = fn;
tsungta 28:2abbf8463fa8 675 break;
tsungta 28:2abbf8463fa8 676 case M2M_REQ_GROUP_HIF:
tsungta 28:2abbf8463fa8 677 gstrHifCxt.pfHifCb = fn;
tsungta 28:2abbf8463fa8 678 break;
tsungta 28:2abbf8463fa8 679 case M2M_REQ_GROUP_CRYPTO:
tsungta 28:2abbf8463fa8 680 gstrHifCxt.pfCryptoCb = fn;
tsungta 28:2abbf8463fa8 681 break;
tsungta 28:2abbf8463fa8 682 case M2M_REQ_GROUP_SIGMA:
tsungta 28:2abbf8463fa8 683 gstrHifCxt.pfSigmaCb = fn;
tsungta 28:2abbf8463fa8 684 break;
tsungta 28:2abbf8463fa8 685 case M2M_REQ_GROUP_SSL:
tsungta 28:2abbf8463fa8 686 gstrHifCxt.pfSslCb = fn;
tsungta 28:2abbf8463fa8 687 break;
tsungta 28:2abbf8463fa8 688 default:
tsungta 28:2abbf8463fa8 689 M2M_ERR("GRp ? %d\n",u8Grp);
tsungta 28:2abbf8463fa8 690 ret = M2M_ERR_FAIL;
tsungta 28:2abbf8463fa8 691 break;
tsungta 28:2abbf8463fa8 692 }
tsungta 28:2abbf8463fa8 693 return ret;
tsungta 28:2abbf8463fa8 694 }
tsungta 28:2abbf8463fa8 695
tsungta 28:2abbf8463fa8 696 #endif
tsungta 28:2abbf8463fa8 697