MacroRat / MouseCode

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Wed May 24 01:57:01 2017 +0000
Revision:
29:ec2c5a69acd6
Parent:
18:6a4db94011d3
Need to change ir2-ir3 to now be ir1 - ir4

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 * @file gpio.c
sahilmgandhi 18:6a4db94011d3 3 * @brief This file contains the function implementations for the
sahilmgandhi 18:6a4db94011d3 4 * General-Purpose Input/Output (GPIO) peripheral module.
sahilmgandhi 18:6a4db94011d3 5 */
sahilmgandhi 18:6a4db94011d3 6
sahilmgandhi 18:6a4db94011d3 7 /* ****************************************************************************
sahilmgandhi 18:6a4db94011d3 8 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Permission is hereby granted, free of charge, to any person obtaining a
sahilmgandhi 18:6a4db94011d3 11 * copy of this software and associated documentation files (the "Software"),
sahilmgandhi 18:6a4db94011d3 12 * to deal in the Software without restriction, including without limitation
sahilmgandhi 18:6a4db94011d3 13 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
sahilmgandhi 18:6a4db94011d3 14 * and/or sell copies of the Software, and to permit persons to whom the
sahilmgandhi 18:6a4db94011d3 15 * Software is furnished to do so, subject to the following conditions:
sahilmgandhi 18:6a4db94011d3 16 *
sahilmgandhi 18:6a4db94011d3 17 * The above copyright notice and this permission notice shall be included
sahilmgandhi 18:6a4db94011d3 18 * in all copies or substantial portions of the Software.
sahilmgandhi 18:6a4db94011d3 19 *
sahilmgandhi 18:6a4db94011d3 20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
sahilmgandhi 18:6a4db94011d3 21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
sahilmgandhi 18:6a4db94011d3 23 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
sahilmgandhi 18:6a4db94011d3 24 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
sahilmgandhi 18:6a4db94011d3 25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
sahilmgandhi 18:6a4db94011d3 26 * OTHER DEALINGS IN THE SOFTWARE.
sahilmgandhi 18:6a4db94011d3 27 *
sahilmgandhi 18:6a4db94011d3 28 * Except as contained in this notice, the name of Maxim Integrated
sahilmgandhi 18:6a4db94011d3 29 * Products, Inc. shall not be used except as stated in the Maxim Integrated
sahilmgandhi 18:6a4db94011d3 30 * Products, Inc. Branding Policy.
sahilmgandhi 18:6a4db94011d3 31 *
sahilmgandhi 18:6a4db94011d3 32 * The mere transfer of this software does not imply any licenses
sahilmgandhi 18:6a4db94011d3 33 * of trade secrets, proprietary technology, copyrights, patents,
sahilmgandhi 18:6a4db94011d3 34 * trademarks, maskwork rights, or any other form of intellectual
sahilmgandhi 18:6a4db94011d3 35 * property whatsoever. Maxim Integrated Products, Inc. retains all
sahilmgandhi 18:6a4db94011d3 36 * ownership rights.
sahilmgandhi 18:6a4db94011d3 37 *
sahilmgandhi 18:6a4db94011d3 38 * $Date: 2016-08-15 20:04:11 -0500 (Mon, 15 Aug 2016) $
sahilmgandhi 18:6a4db94011d3 39 * $Revision: 24085 $
sahilmgandhi 18:6a4db94011d3 40 *
sahilmgandhi 18:6a4db94011d3 41 *************************************************************************** */
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 /* **** Includes **** */
sahilmgandhi 18:6a4db94011d3 44 #include "mxc_config.h"
sahilmgandhi 18:6a4db94011d3 45 #include "mxc_assert.h"
sahilmgandhi 18:6a4db94011d3 46 #include "mxc_sys.h"
sahilmgandhi 18:6a4db94011d3 47 #include "gpio.h"
sahilmgandhi 18:6a4db94011d3 48 #include "clkman_regs.h"
sahilmgandhi 18:6a4db94011d3 49
sahilmgandhi 18:6a4db94011d3 50 /**
sahilmgandhi 18:6a4db94011d3 51 * @ingroup gpio
sahilmgandhi 18:6a4db94011d3 52 * @{
sahilmgandhi 18:6a4db94011d3 53 */
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 /* **** Definitions **** */
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /* **** Globals **** */
sahilmgandhi 18:6a4db94011d3 58
sahilmgandhi 18:6a4db94011d3 59 /* ************************************************************************* */
sahilmgandhi 18:6a4db94011d3 60 static void (*callbacks[MXC_GPIO_NUM_PORTS][MXC_GPIO_MAX_PINS_PER_PORT])(void *);
sahilmgandhi 18:6a4db94011d3 61 static void *cbparam[MXC_GPIO_NUM_PORTS][MXC_GPIO_MAX_PINS_PER_PORT];
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 /* **** Functions **** */
sahilmgandhi 18:6a4db94011d3 64
sahilmgandhi 18:6a4db94011d3 65 /* ************************************************************************* */
sahilmgandhi 18:6a4db94011d3 66 static int PinConfig(unsigned int port, unsigned int pin, gpio_func_t func, gpio_pad_t pad)
sahilmgandhi 18:6a4db94011d3 67 {
sahilmgandhi 18:6a4db94011d3 68 /* Check if available */
sahilmgandhi 18:6a4db94011d3 69 if (!(MXC_GPIO->free[port] & (1 << pin))) {
sahilmgandhi 18:6a4db94011d3 70 return E_BUSY;
sahilmgandhi 18:6a4db94011d3 71 }
sahilmgandhi 18:6a4db94011d3 72
sahilmgandhi 18:6a4db94011d3 73 /* Set function */
sahilmgandhi 18:6a4db94011d3 74 uint32_t func_sel = MXC_GPIO->func_sel[port];
sahilmgandhi 18:6a4db94011d3 75 func_sel &= ~(0xF << (4 * pin));
sahilmgandhi 18:6a4db94011d3 76 func_sel |= (func << (4 * pin));
sahilmgandhi 18:6a4db94011d3 77 MXC_GPIO->func_sel[port] = func_sel;
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 /* Normal input is always enabled */
sahilmgandhi 18:6a4db94011d3 80 MXC_GPIO->in_mode[port] &= ~(0xF << (4 * pin));
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 /* Set requested output mode */
sahilmgandhi 18:6a4db94011d3 83 uint32_t out_mode = MXC_GPIO->out_mode[port];
sahilmgandhi 18:6a4db94011d3 84 out_mode &= ~(0xF << (4 * pin));
sahilmgandhi 18:6a4db94011d3 85 out_mode |= (pad << (4 * pin));
sahilmgandhi 18:6a4db94011d3 86 MXC_GPIO->out_mode[port] = out_mode;
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88 /* Enable the pull up/down if necessary */
sahilmgandhi 18:6a4db94011d3 89 if (pad == MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP) {
sahilmgandhi 18:6a4db94011d3 90 MXC_GPIO->out_val[port] |= (1 << pin);
sahilmgandhi 18:6a4db94011d3 91 } else if (pad == MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLDOWN) {
sahilmgandhi 18:6a4db94011d3 92 MXC_GPIO->out_val[port] &= ~(1 << pin);
sahilmgandhi 18:6a4db94011d3 93 }
sahilmgandhi 18:6a4db94011d3 94
sahilmgandhi 18:6a4db94011d3 95 return E_NO_ERROR;
sahilmgandhi 18:6a4db94011d3 96 }
sahilmgandhi 18:6a4db94011d3 97
sahilmgandhi 18:6a4db94011d3 98 /* ************************************************************************* */
sahilmgandhi 18:6a4db94011d3 99 int GPIO_Config(const gpio_cfg_t *cfg)
sahilmgandhi 18:6a4db94011d3 100 {
sahilmgandhi 18:6a4db94011d3 101 unsigned int pin;
sahilmgandhi 18:6a4db94011d3 102 int err = E_NO_ERROR;
sahilmgandhi 18:6a4db94011d3 103
sahilmgandhi 18:6a4db94011d3 104 MXC_ASSERT(cfg);
sahilmgandhi 18:6a4db94011d3 105 MXC_ASSERT(cfg->port < MXC_GPIO_NUM_PORTS);
sahilmgandhi 18:6a4db94011d3 106
sahilmgandhi 18:6a4db94011d3 107 // Set system level configurations
sahilmgandhi 18:6a4db94011d3 108 if ((err = SYS_GPIO_Init()) != E_NO_ERROR) {
sahilmgandhi 18:6a4db94011d3 109 return err;
sahilmgandhi 18:6a4db94011d3 110 }
sahilmgandhi 18:6a4db94011d3 111
sahilmgandhi 18:6a4db94011d3 112 // Configure each pin in the mask
sahilmgandhi 18:6a4db94011d3 113 for (pin = 0; pin < MXC_GPIO_MAX_PINS_PER_PORT; pin++) {
sahilmgandhi 18:6a4db94011d3 114 if (cfg->mask & (1 << pin)) {
sahilmgandhi 18:6a4db94011d3 115 if (PinConfig(cfg->port, pin, cfg->func, cfg->pad) != E_NO_ERROR) {
sahilmgandhi 18:6a4db94011d3 116 err = E_BUSY;
sahilmgandhi 18:6a4db94011d3 117 }
sahilmgandhi 18:6a4db94011d3 118 }
sahilmgandhi 18:6a4db94011d3 119 }
sahilmgandhi 18:6a4db94011d3 120
sahilmgandhi 18:6a4db94011d3 121 return err;
sahilmgandhi 18:6a4db94011d3 122 }
sahilmgandhi 18:6a4db94011d3 123
sahilmgandhi 18:6a4db94011d3 124 /* ************************************************************************* */
sahilmgandhi 18:6a4db94011d3 125 static void IntConfig(unsigned int port, unsigned int pin, gpio_int_mode_t mode)
sahilmgandhi 18:6a4db94011d3 126 {
sahilmgandhi 18:6a4db94011d3 127 uint32_t int_mode = MXC_GPIO->int_mode[port];
sahilmgandhi 18:6a4db94011d3 128 int_mode &= ~(0xF << (pin*4));
sahilmgandhi 18:6a4db94011d3 129 int_mode |= (mode << (pin*4));
sahilmgandhi 18:6a4db94011d3 130 MXC_GPIO->int_mode[port] = int_mode;
sahilmgandhi 18:6a4db94011d3 131 }
sahilmgandhi 18:6a4db94011d3 132
sahilmgandhi 18:6a4db94011d3 133 /* ************************************************************************* */
sahilmgandhi 18:6a4db94011d3 134 void GPIO_IntConfig(const gpio_cfg_t *cfg, gpio_int_mode_t mode)
sahilmgandhi 18:6a4db94011d3 135 {
sahilmgandhi 18:6a4db94011d3 136 unsigned int pin;
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 MXC_ASSERT(cfg);
sahilmgandhi 18:6a4db94011d3 139 MXC_ASSERT(cfg->port < MXC_GPIO_NUM_PORTS);
sahilmgandhi 18:6a4db94011d3 140
sahilmgandhi 18:6a4db94011d3 141 // Configure each pin in the mask
sahilmgandhi 18:6a4db94011d3 142 for (pin = 0; pin < MXC_GPIO_MAX_PINS_PER_PORT; pin++) {
sahilmgandhi 18:6a4db94011d3 143 if (cfg->mask & (1 << pin)) {
sahilmgandhi 18:6a4db94011d3 144 IntConfig(cfg->port, pin, mode);
sahilmgandhi 18:6a4db94011d3 145 }
sahilmgandhi 18:6a4db94011d3 146 }
sahilmgandhi 18:6a4db94011d3 147 }
sahilmgandhi 18:6a4db94011d3 148
sahilmgandhi 18:6a4db94011d3 149 /* ************************************************************************* */
sahilmgandhi 18:6a4db94011d3 150 void GPIO_RegisterCallback(const gpio_cfg_t *cfg, gpio_callback_fn func, void *cbdata)
sahilmgandhi 18:6a4db94011d3 151 {
sahilmgandhi 18:6a4db94011d3 152 unsigned int pin;
sahilmgandhi 18:6a4db94011d3 153
sahilmgandhi 18:6a4db94011d3 154 MXC_ASSERT(cfg);
sahilmgandhi 18:6a4db94011d3 155 MXC_ASSERT(cfg->port < MXC_GPIO_NUM_PORTS);
sahilmgandhi 18:6a4db94011d3 156
sahilmgandhi 18:6a4db94011d3 157 for (pin = 0; pin < MXC_GPIO_MAX_PINS_PER_PORT; pin++) {
sahilmgandhi 18:6a4db94011d3 158 if (cfg->mask & (1 << pin)) {
sahilmgandhi 18:6a4db94011d3 159 callbacks[cfg->port][pin] = func;
sahilmgandhi 18:6a4db94011d3 160 cbparam[cfg->port][pin] = cbdata;
sahilmgandhi 18:6a4db94011d3 161 }
sahilmgandhi 18:6a4db94011d3 162 }
sahilmgandhi 18:6a4db94011d3 163 }
sahilmgandhi 18:6a4db94011d3 164
sahilmgandhi 18:6a4db94011d3 165 /* ************************************************************************* */
sahilmgandhi 18:6a4db94011d3 166 void GPIO_Handler(unsigned int port)
sahilmgandhi 18:6a4db94011d3 167 {
sahilmgandhi 18:6a4db94011d3 168 uint8_t intfl;
sahilmgandhi 18:6a4db94011d3 169 unsigned int pin;
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171 MXC_ASSERT(port < MXC_GPIO_NUM_PORTS);
sahilmgandhi 18:6a4db94011d3 172
sahilmgandhi 18:6a4db94011d3 173 // Read and clear enabled interrupts.
sahilmgandhi 18:6a4db94011d3 174 intfl = MXC_GPIO->intfl[port];
sahilmgandhi 18:6a4db94011d3 175 intfl &= MXC_GPIO->inten[port];
sahilmgandhi 18:6a4db94011d3 176 MXC_GPIO->intfl[port] = intfl;
sahilmgandhi 18:6a4db94011d3 177
sahilmgandhi 18:6a4db94011d3 178 // Process each pins' interrupt
sahilmgandhi 18:6a4db94011d3 179 for (pin = 0; pin < MXC_GPIO_MAX_PINS_PER_PORT; pin++) {
sahilmgandhi 18:6a4db94011d3 180 if ((intfl & (1 << pin)) && callbacks[port][pin]) {
sahilmgandhi 18:6a4db94011d3 181 callbacks[port][pin](cbparam[port][pin]);
sahilmgandhi 18:6a4db94011d3 182 }
sahilmgandhi 18:6a4db94011d3 183 }
sahilmgandhi 18:6a4db94011d3 184 }
sahilmgandhi 18:6a4db94011d3 185
sahilmgandhi 18:6a4db94011d3 186 /**@} end of group gpio */