MacroRat / MouseCode

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Wed May 24 01:57:01 2017 +0000
Revision:
29:ec2c5a69acd6
Parent:
18:6a4db94011d3
Need to change ir2-ir3 to now be ir1 - ir4

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f1xx_hal_adc_ex.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.0.5
sahilmgandhi 18:6a4db94011d3 6 * @date 06-December-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of ADC HAL extension module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F1xx_HAL_ADC_EX_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F1xx_HAL_ADC_EX_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 47 #include "stm32f1xx_hal_def.h"
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /** @addtogroup STM32F1xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 50 * @{
sahilmgandhi 18:6a4db94011d3 51 */
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 /** @addtogroup ADCEx
sahilmgandhi 18:6a4db94011d3 54 * @{
sahilmgandhi 18:6a4db94011d3 55 */
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 58 /** @defgroup ADCEx_Exported_Types ADCEx Exported Types
sahilmgandhi 18:6a4db94011d3 59 * @{
sahilmgandhi 18:6a4db94011d3 60 */
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 /**
sahilmgandhi 18:6a4db94011d3 63 * @brief ADC Configuration injected Channel structure definition
sahilmgandhi 18:6a4db94011d3 64 * @note Parameters of this structure are shared within 2 scopes:
sahilmgandhi 18:6a4db94011d3 65 * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset
sahilmgandhi 18:6a4db94011d3 66 * - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode,
sahilmgandhi 18:6a4db94011d3 67 * AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv.
sahilmgandhi 18:6a4db94011d3 68 * @note The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state.
sahilmgandhi 18:6a4db94011d3 69 * ADC state can be either:
sahilmgandhi 18:6a4db94011d3 70 * - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ExternalTrigInjecConv')
sahilmgandhi 18:6a4db94011d3 71 * - For all except parameters 'ExternalTrigInjecConv': ADC enabled without conversion on going on injected group.
sahilmgandhi 18:6a4db94011d3 72 */
sahilmgandhi 18:6a4db94011d3 73 typedef struct
sahilmgandhi 18:6a4db94011d3 74 {
sahilmgandhi 18:6a4db94011d3 75 uint32_t InjectedChannel; /*!< Selection of ADC channel to configure
sahilmgandhi 18:6a4db94011d3 76 This parameter can be a value of @ref ADC_channels
sahilmgandhi 18:6a4db94011d3 77 Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability.
sahilmgandhi 18:6a4db94011d3 78 Note: On STM32F1 devices with several ADC: Only ADC1 can access internal measurement channels (VrefInt/TempSensor)
sahilmgandhi 18:6a4db94011d3 79 Note: On STM32F10xx8 and STM32F10xxB devices: A low-amplitude voltage glitch may be generated (on ADC input 0) on the PA0 pin, when the ADC is converting with injection trigger.
sahilmgandhi 18:6a4db94011d3 80 It is advised to distribute the analog channels so that Channel 0 is configured as an injected channel.
sahilmgandhi 18:6a4db94011d3 81 Refer to errata sheet of these devices for more details. */
sahilmgandhi 18:6a4db94011d3 82 uint32_t InjectedRank; /*!< Rank in the injected group sequencer
sahilmgandhi 18:6a4db94011d3 83 This parameter must be a value of @ref ADCEx_injected_rank
sahilmgandhi 18:6a4db94011d3 84 Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
sahilmgandhi 18:6a4db94011d3 85 uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel.
sahilmgandhi 18:6a4db94011d3 86 Unit: ADC clock cycles
sahilmgandhi 18:6a4db94011d3 87 Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits).
sahilmgandhi 18:6a4db94011d3 88 This parameter can be a value of @ref ADC_sampling_times
sahilmgandhi 18:6a4db94011d3 89 Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
sahilmgandhi 18:6a4db94011d3 90 If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
sahilmgandhi 18:6a4db94011d3 91 Note: In case of usage of internal measurement channels (VrefInt/TempSensor),
sahilmgandhi 18:6a4db94011d3 92 sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
sahilmgandhi 18:6a4db94011d3 93 Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 5us to 17.1us min). */
sahilmgandhi 18:6a4db94011d3 94 uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only).
sahilmgandhi 18:6a4db94011d3 95 Offset value must be a positive number.
sahilmgandhi 18:6a4db94011d3 96 Depending of ADC resolution selected (12, 10, 8 or 6 bits),
sahilmgandhi 18:6a4db94011d3 97 this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
sahilmgandhi 18:6a4db94011d3 98 uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
sahilmgandhi 18:6a4db94011d3 99 To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
sahilmgandhi 18:6a4db94011d3 100 This parameter must be a number between Min_Data = 1 and Max_Data = 4.
sahilmgandhi 18:6a4db94011d3 101 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
sahilmgandhi 18:6a4db94011d3 102 configure a channel on injected group can impact the configuration of other channels previously set. */
sahilmgandhi 18:6a4db94011d3 103 uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
sahilmgandhi 18:6a4db94011d3 104 Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
sahilmgandhi 18:6a4db94011d3 105 Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
sahilmgandhi 18:6a4db94011d3 106 This parameter can be set to ENABLE or DISABLE.
sahilmgandhi 18:6a4db94011d3 107 Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
sahilmgandhi 18:6a4db94011d3 108 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
sahilmgandhi 18:6a4db94011d3 109 configure a channel on injected group can impact the configuration of other channels previously set. */
sahilmgandhi 18:6a4db94011d3 110 uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
sahilmgandhi 18:6a4db94011d3 111 This parameter can be set to ENABLE or DISABLE.
sahilmgandhi 18:6a4db94011d3 112 Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
sahilmgandhi 18:6a4db94011d3 113 Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
sahilmgandhi 18:6a4db94011d3 114 Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
sahilmgandhi 18:6a4db94011d3 115 To maintain JAUTO always enabled, DMA must be configured in circular mode.
sahilmgandhi 18:6a4db94011d3 116 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
sahilmgandhi 18:6a4db94011d3 117 configure a channel on injected group can impact the configuration of other channels previously set. */
sahilmgandhi 18:6a4db94011d3 118 uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group.
sahilmgandhi 18:6a4db94011d3 119 If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
sahilmgandhi 18:6a4db94011d3 120 If set to external trigger source, triggering is on event rising edge.
sahilmgandhi 18:6a4db94011d3 121 This parameter can be a value of @ref ADCEx_External_trigger_source_Injected
sahilmgandhi 18:6a4db94011d3 122 Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
sahilmgandhi 18:6a4db94011d3 123 If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly)
sahilmgandhi 18:6a4db94011d3 124 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
sahilmgandhi 18:6a4db94011d3 125 configure a channel on injected group can impact the configuration of other channels previously set. */
sahilmgandhi 18:6a4db94011d3 126 }ADC_InjectionConfTypeDef;
sahilmgandhi 18:6a4db94011d3 127
sahilmgandhi 18:6a4db94011d3 128 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 129 /**
sahilmgandhi 18:6a4db94011d3 130 * @brief Structure definition of ADC multimode
sahilmgandhi 18:6a4db94011d3 131 * @note The setting of these parameters with function HAL_ADCEx_MultiModeConfigChannel() is conditioned to ADCs state (both ADCs of the common group).
sahilmgandhi 18:6a4db94011d3 132 * State of ADCs of the common group must be: disabled.
sahilmgandhi 18:6a4db94011d3 133 */
sahilmgandhi 18:6a4db94011d3 134 typedef struct
sahilmgandhi 18:6a4db94011d3 135 {
sahilmgandhi 18:6a4db94011d3 136 uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode.
sahilmgandhi 18:6a4db94011d3 137 This parameter can be a value of @ref ADCEx_Common_mode
sahilmgandhi 18:6a4db94011d3 138 Note: In dual mode, a change of channel configuration generates a restart that can produce a loss of synchronization. It is recommended to disable dual mode before any configuration change.
sahilmgandhi 18:6a4db94011d3 139 Note: In case of simultaneous mode used: Exactly the same sampling time should be configured for the 2 channels that will be sampled simultaneously by ACD1 and ADC2.
sahilmgandhi 18:6a4db94011d3 140 Note: In case of interleaved mode used: To avoid overlap between conversions, maximum sampling time allowed is 7 ADC clock cycles for fast interleaved mode and 14 ADC clock cycles for slow interleaved mode.
sahilmgandhi 18:6a4db94011d3 141 Note: Some multimode parameters are fixed on STM32F1 and can be configured on other STM32 devices with several ADC (multimode configuration structure can have additional parameters).
sahilmgandhi 18:6a4db94011d3 142 The equivalences are:
sahilmgandhi 18:6a4db94011d3 143 - Parameter 'DMAAccessMode': On STM32F1, this parameter is fixed to 1 DMA channel (one DMA channel for both ADC, DMA of ADC master). On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_DMAACCESSMODE_12_10_BITS'.
sahilmgandhi 18:6a4db94011d3 144 - Parameter 'TwoSamplingDelay': On STM32F1, this parameter is fixed to 7 or 14 ADC clock cycles depending on fast or slow interleaved mode selected. On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_TWOSAMPLINGDELAY_7CYCLES' (for fast interleaved mode). */
sahilmgandhi 18:6a4db94011d3 145
sahilmgandhi 18:6a4db94011d3 146
sahilmgandhi 18:6a4db94011d3 147 }ADC_MultiModeTypeDef;
sahilmgandhi 18:6a4db94011d3 148 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
sahilmgandhi 18:6a4db94011d3 149
sahilmgandhi 18:6a4db94011d3 150 /**
sahilmgandhi 18:6a4db94011d3 151 * @}
sahilmgandhi 18:6a4db94011d3 152 */
sahilmgandhi 18:6a4db94011d3 153
sahilmgandhi 18:6a4db94011d3 154
sahilmgandhi 18:6a4db94011d3 155 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 156
sahilmgandhi 18:6a4db94011d3 157 /** @defgroup ADCEx_Exported_Constants ADCEx Exported Constants
sahilmgandhi 18:6a4db94011d3 158 * @{
sahilmgandhi 18:6a4db94011d3 159 */
sahilmgandhi 18:6a4db94011d3 160
sahilmgandhi 18:6a4db94011d3 161 /** @defgroup ADCEx_injected_rank ADCEx rank into injected group
sahilmgandhi 18:6a4db94011d3 162 * @{
sahilmgandhi 18:6a4db94011d3 163 */
sahilmgandhi 18:6a4db94011d3 164 #define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001)
sahilmgandhi 18:6a4db94011d3 165 #define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002)
sahilmgandhi 18:6a4db94011d3 166 #define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003)
sahilmgandhi 18:6a4db94011d3 167 #define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004)
sahilmgandhi 18:6a4db94011d3 168 /**
sahilmgandhi 18:6a4db94011d3 169 * @}
sahilmgandhi 18:6a4db94011d3 170 */
sahilmgandhi 18:6a4db94011d3 171
sahilmgandhi 18:6a4db94011d3 172 /** @defgroup ADCEx_External_trigger_edge_Injected ADCEx external trigger enable for injected group
sahilmgandhi 18:6a4db94011d3 173 * @{
sahilmgandhi 18:6a4db94011d3 174 */
sahilmgandhi 18:6a4db94011d3 175 #define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE ((uint32_t)0x00000000)
sahilmgandhi 18:6a4db94011d3 176 #define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING ((uint32_t)ADC_CR2_JEXTTRIG)
sahilmgandhi 18:6a4db94011d3 177 /**
sahilmgandhi 18:6a4db94011d3 178 * @}
sahilmgandhi 18:6a4db94011d3 179 */
sahilmgandhi 18:6a4db94011d3 180
sahilmgandhi 18:6a4db94011d3 181 /** @defgroup ADC_External_trigger_source_Regular ADC External trigger selection for regular group
sahilmgandhi 18:6a4db94011d3 182 * @{
sahilmgandhi 18:6a4db94011d3 183 */
sahilmgandhi 18:6a4db94011d3 184 /*!< List of external triggers with generic trigger name, independently of */
sahilmgandhi 18:6a4db94011d3 185 /* ADC target, sorted by trigger name: */
sahilmgandhi 18:6a4db94011d3 186
sahilmgandhi 18:6a4db94011d3 187 /*!< External triggers of regular group for ADC1&ADC2 only */
sahilmgandhi 18:6a4db94011d3 188 #define ADC_EXTERNALTRIGCONV_T1_CC1 ADC1_2_EXTERNALTRIG_T1_CC1
sahilmgandhi 18:6a4db94011d3 189 #define ADC_EXTERNALTRIGCONV_T1_CC2 ADC1_2_EXTERNALTRIG_T1_CC2
sahilmgandhi 18:6a4db94011d3 190 #define ADC_EXTERNALTRIGCONV_T2_CC2 ADC1_2_EXTERNALTRIG_T2_CC2
sahilmgandhi 18:6a4db94011d3 191 #define ADC_EXTERNALTRIGCONV_T3_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO
sahilmgandhi 18:6a4db94011d3 192 #define ADC_EXTERNALTRIGCONV_T4_CC4 ADC1_2_EXTERNALTRIG_T4_CC4
sahilmgandhi 18:6a4db94011d3 193 #define ADC_EXTERNALTRIGCONV_EXT_IT11 ADC1_2_EXTERNALTRIG_EXT_IT11
sahilmgandhi 18:6a4db94011d3 194
sahilmgandhi 18:6a4db94011d3 195 #if defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 196 /*!< External triggers of regular group for ADC3 only */
sahilmgandhi 18:6a4db94011d3 197 #define ADC_EXTERNALTRIGCONV_T2_CC3 ADC3_EXTERNALTRIG_T2_CC3
sahilmgandhi 18:6a4db94011d3 198 #define ADC_EXTERNALTRIGCONV_T3_CC1 ADC3_EXTERNALTRIG_T3_CC1
sahilmgandhi 18:6a4db94011d3 199 #define ADC_EXTERNALTRIGCONV_T5_CC1 ADC3_EXTERNALTRIG_T5_CC1
sahilmgandhi 18:6a4db94011d3 200 #define ADC_EXTERNALTRIGCONV_T5_CC3 ADC3_EXTERNALTRIG_T5_CC3
sahilmgandhi 18:6a4db94011d3 201 #define ADC_EXTERNALTRIGCONV_T8_CC1 ADC3_EXTERNALTRIG_T8_CC1
sahilmgandhi 18:6a4db94011d3 202 #endif /* STM32F103xE || defined STM32F103xG */
sahilmgandhi 18:6a4db94011d3 203
sahilmgandhi 18:6a4db94011d3 204 /*!< External triggers of regular group for all ADC instances */
sahilmgandhi 18:6a4db94011d3 205 #define ADC_EXTERNALTRIGCONV_T1_CC3 ADC1_2_3_EXTERNALTRIG_T1_CC3
sahilmgandhi 18:6a4db94011d3 206
sahilmgandhi 18:6a4db94011d3 207 #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
sahilmgandhi 18:6a4db94011d3 208 /*!< Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and */
sahilmgandhi 18:6a4db94011d3 209 /* XL-density devices. */
sahilmgandhi 18:6a4db94011d3 210 /* To use it on ADC or ADC2, a remap of trigger must be done from */
sahilmgandhi 18:6a4db94011d3 211 /* EXTI line 11 to TIM8_TRGO with macro: */
sahilmgandhi 18:6a4db94011d3 212 /* __HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE() */
sahilmgandhi 18:6a4db94011d3 213 /* __HAL_AFIO_REMAP_ADC2_ETRGREG_ENABLE() */
sahilmgandhi 18:6a4db94011d3 214
sahilmgandhi 18:6a4db94011d3 215 /* Note for internal constant value management: If TIM8_TRGO is available, */
sahilmgandhi 18:6a4db94011d3 216 /* its definition is set to value for ADC1&ADC2 by default and changed to */
sahilmgandhi 18:6a4db94011d3 217 /* value for ADC3 by HAL ADC driver if ADC3 is selected. */
sahilmgandhi 18:6a4db94011d3 218 #define ADC_EXTERNALTRIGCONV_T8_TRGO ADC1_2_EXTERNALTRIG_T8_TRGO
sahilmgandhi 18:6a4db94011d3 219 #endif /* STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
sahilmgandhi 18:6a4db94011d3 220
sahilmgandhi 18:6a4db94011d3 221 #define ADC_SOFTWARE_START ADC1_2_3_SWSTART
sahilmgandhi 18:6a4db94011d3 222 /**
sahilmgandhi 18:6a4db94011d3 223 * @}
sahilmgandhi 18:6a4db94011d3 224 */
sahilmgandhi 18:6a4db94011d3 225
sahilmgandhi 18:6a4db94011d3 226 /** @defgroup ADCEx_External_trigger_source_Injected ADCEx External trigger selection for injected group
sahilmgandhi 18:6a4db94011d3 227 * @{
sahilmgandhi 18:6a4db94011d3 228 */
sahilmgandhi 18:6a4db94011d3 229 /*!< List of external triggers with generic trigger name, independently of */
sahilmgandhi 18:6a4db94011d3 230 /* ADC target, sorted by trigger name: */
sahilmgandhi 18:6a4db94011d3 231
sahilmgandhi 18:6a4db94011d3 232 /*!< External triggers of injected group for ADC1&ADC2 only */
sahilmgandhi 18:6a4db94011d3 233 #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
sahilmgandhi 18:6a4db94011d3 234 #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ADC1_2_EXTERNALTRIGINJEC_T2_CC1
sahilmgandhi 18:6a4db94011d3 235 #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ADC1_2_EXTERNALTRIGINJEC_T3_CC4
sahilmgandhi 18:6a4db94011d3 236 #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ADC1_2_EXTERNALTRIGINJEC_T4_TRGO
sahilmgandhi 18:6a4db94011d3 237 #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
sahilmgandhi 18:6a4db94011d3 238
sahilmgandhi 18:6a4db94011d3 239 #if defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 240 /*!< External triggers of injected group for ADC3 only */
sahilmgandhi 18:6a4db94011d3 241 #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ADC3_EXTERNALTRIGINJEC_T4_CC3
sahilmgandhi 18:6a4db94011d3 242 #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ADC3_EXTERNALTRIGINJEC_T8_CC2
sahilmgandhi 18:6a4db94011d3 243 #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ADC3_EXTERNALTRIGINJEC_T5_TRGO
sahilmgandhi 18:6a4db94011d3 244 #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ADC3_EXTERNALTRIGINJEC_T5_CC4
sahilmgandhi 18:6a4db94011d3 245 #endif /* STM32F103xE || defined STM32F103xG */
sahilmgandhi 18:6a4db94011d3 246
sahilmgandhi 18:6a4db94011d3 247 /*!< External triggers of injected group for all ADC instances */
sahilmgandhi 18:6a4db94011d3 248 #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4
sahilmgandhi 18:6a4db94011d3 249 #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO
sahilmgandhi 18:6a4db94011d3 250
sahilmgandhi 18:6a4db94011d3 251 #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
sahilmgandhi 18:6a4db94011d3 252 /*!< Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and */
sahilmgandhi 18:6a4db94011d3 253 /* XL-density devices. */
sahilmgandhi 18:6a4db94011d3 254 /* To use it on ADC1 or ADC2, a remap of trigger must be done from */
sahilmgandhi 18:6a4db94011d3 255 /* EXTI line 11 to TIM8_CC4 with macro: */
sahilmgandhi 18:6a4db94011d3 256 /* __HAL_AFIO_REMAP_ADC1_ETRGINJ_ENABLE() */
sahilmgandhi 18:6a4db94011d3 257 /* __HAL_AFIO_REMAP_ADC2_ETRGINJ_ENABLE() */
sahilmgandhi 18:6a4db94011d3 258
sahilmgandhi 18:6a4db94011d3 259 /* Note for internal constant value management: If TIM8_CC4 is available, */
sahilmgandhi 18:6a4db94011d3 260 /* its definition is set to value for ADC1&ADC2 by default and changed to */
sahilmgandhi 18:6a4db94011d3 261 /* value for ADC3 by HAL ADC driver if ADC3 is selected. */
sahilmgandhi 18:6a4db94011d3 262 #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_T8_CC4
sahilmgandhi 18:6a4db94011d3 263 #endif /* STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
sahilmgandhi 18:6a4db94011d3 264
sahilmgandhi 18:6a4db94011d3 265 #define ADC_INJECTED_SOFTWARE_START ADC1_2_3_JSWSTART
sahilmgandhi 18:6a4db94011d3 266 /**
sahilmgandhi 18:6a4db94011d3 267 * @}
sahilmgandhi 18:6a4db94011d3 268 */
sahilmgandhi 18:6a4db94011d3 269
sahilmgandhi 18:6a4db94011d3 270 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 271 /** @defgroup ADCEx_Common_mode ADC Extended Dual ADC Mode
sahilmgandhi 18:6a4db94011d3 272 * @{
sahilmgandhi 18:6a4db94011d3 273 */
sahilmgandhi 18:6a4db94011d3 274 #define ADC_MODE_INDEPENDENT ((uint32_t)(0x00000000)) /*!< ADC dual mode disabled (ADC independent mode) */
sahilmgandhi 18:6a4db94011d3 275 #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)( ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined regular simultaneous + injected simultaneous mode, on groups regular and injected */
sahilmgandhi 18:6a4db94011d3 276 #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)( ADC_CR1_DUALMOD_1 )) /*!< ADC dual mode enabled: Combined regular simultaneous + alternate trigger mode, on groups regular and injected */
sahilmgandhi 18:6a4db94011d3 277 #define ADC_DUALMODE_INJECSIMULT_INTERLFAST ((uint32_t)( ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined injected simultaneous + fast interleaved mode, on groups regular and injected (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
sahilmgandhi 18:6a4db94011d3 278 #define ADC_DUALMODE_INJECSIMULT_INTERLSLOW ((uint32_t)( ADC_CR1_DUALMOD_2 )) /*!< ADC dual mode enabled: Combined injected simultaneous + slow Interleaved mode, on groups regular and injected (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
sahilmgandhi 18:6a4db94011d3 279 #define ADC_DUALMODE_INJECSIMULT ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Injected simultaneous mode, on group injected */
sahilmgandhi 18:6a4db94011d3 280 #define ADC_DUALMODE_REGSIMULT ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 )) /*!< ADC dual mode enabled: Regular simultaneous mode, on group regular */
sahilmgandhi 18:6a4db94011d3 281 #define ADC_DUALMODE_INTERLFAST ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Fast interleaved mode, on group regular (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
sahilmgandhi 18:6a4db94011d3 282 #define ADC_DUALMODE_INTERLSLOW ((uint32_t)(ADC_CR1_DUALMOD_3 )) /*!< ADC dual mode enabled: Slow interleaved mode, on group regular (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
sahilmgandhi 18:6a4db94011d3 283 #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CR1_DUALMOD_3 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Alternate trigger mode, on group injected */
sahilmgandhi 18:6a4db94011d3 284 /**
sahilmgandhi 18:6a4db94011d3 285 * @}
sahilmgandhi 18:6a4db94011d3 286 */
sahilmgandhi 18:6a4db94011d3 287 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
sahilmgandhi 18:6a4db94011d3 288
sahilmgandhi 18:6a4db94011d3 289 /**
sahilmgandhi 18:6a4db94011d3 290 * @}
sahilmgandhi 18:6a4db94011d3 291 */
sahilmgandhi 18:6a4db94011d3 292
sahilmgandhi 18:6a4db94011d3 293
sahilmgandhi 18:6a4db94011d3 294 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 295
sahilmgandhi 18:6a4db94011d3 296 /** @addtogroup ADCEx_Private_Constants ADCEx Private Constants
sahilmgandhi 18:6a4db94011d3 297 * @{
sahilmgandhi 18:6a4db94011d3 298 */
sahilmgandhi 18:6a4db94011d3 299
sahilmgandhi 18:6a4db94011d3 300 /** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Regular ADC Extended Internal HAL driver trigger selection for regular group
sahilmgandhi 18:6a4db94011d3 301 * @{
sahilmgandhi 18:6a4db94011d3 302 */
sahilmgandhi 18:6a4db94011d3 303 /* List of external triggers of regular group for ADC1, ADC2, ADC3 (if ADC */
sahilmgandhi 18:6a4db94011d3 304 /* instance is available on the selected device). */
sahilmgandhi 18:6a4db94011d3 305 /* (used internally by HAL driver. To not use into HAL structure parameters) */
sahilmgandhi 18:6a4db94011d3 306
sahilmgandhi 18:6a4db94011d3 307 /* External triggers of regular group for ADC1&ADC2 (if ADCx available) */
sahilmgandhi 18:6a4db94011d3 308 #define ADC1_2_EXTERNALTRIG_T1_CC1 ((uint32_t) 0x00000000)
sahilmgandhi 18:6a4db94011d3 309 #define ADC1_2_EXTERNALTRIG_T1_CC2 ((uint32_t)( ADC_CR2_EXTSEL_0))
sahilmgandhi 18:6a4db94011d3 310 #define ADC1_2_EXTERNALTRIG_T2_CC2 ((uint32_t)( ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
sahilmgandhi 18:6a4db94011d3 311 #define ADC1_2_EXTERNALTRIG_T3_TRGO ((uint32_t)(ADC_CR2_EXTSEL_2 ))
sahilmgandhi 18:6a4db94011d3 312 #define ADC1_2_EXTERNALTRIG_T4_CC4 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_0))
sahilmgandhi 18:6a4db94011d3 313 #define ADC1_2_EXTERNALTRIG_EXT_IT11 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 ))
sahilmgandhi 18:6a4db94011d3 314 #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 315 /* Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and */
sahilmgandhi 18:6a4db94011d3 316 /* XL-density devices. */
sahilmgandhi 18:6a4db94011d3 317 #define ADC1_2_EXTERNALTRIG_T8_TRGO ADC1_2_EXTERNALTRIG_EXT_IT11
sahilmgandhi 18:6a4db94011d3 318 #endif
sahilmgandhi 18:6a4db94011d3 319
sahilmgandhi 18:6a4db94011d3 320 #if defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 321 /* External triggers of regular group for ADC3 */
sahilmgandhi 18:6a4db94011d3 322 #define ADC3_EXTERNALTRIG_T3_CC1 ADC1_2_EXTERNALTRIG_T1_CC1
sahilmgandhi 18:6a4db94011d3 323 #define ADC3_EXTERNALTRIG_T2_CC3 ADC1_2_EXTERNALTRIG_T1_CC2
sahilmgandhi 18:6a4db94011d3 324 #define ADC3_EXTERNALTRIG_T8_CC1 ADC1_2_EXTERNALTRIG_T2_CC2
sahilmgandhi 18:6a4db94011d3 325 #define ADC3_EXTERNALTRIG_T8_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO
sahilmgandhi 18:6a4db94011d3 326 #define ADC3_EXTERNALTRIG_T5_CC1 ADC1_2_EXTERNALTRIG_T4_CC4
sahilmgandhi 18:6a4db94011d3 327 #define ADC3_EXTERNALTRIG_T5_CC3 ADC1_2_EXTERNALTRIG_EXT_IT11
sahilmgandhi 18:6a4db94011d3 328 #endif
sahilmgandhi 18:6a4db94011d3 329
sahilmgandhi 18:6a4db94011d3 330 /* External triggers of regular group for ADC1&ADC2&ADC3 (if ADCx available) */
sahilmgandhi 18:6a4db94011d3 331 #define ADC1_2_3_EXTERNALTRIG_T1_CC3 ((uint32_t)( ADC_CR2_EXTSEL_1 ))
sahilmgandhi 18:6a4db94011d3 332 #define ADC1_2_3_SWSTART ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
sahilmgandhi 18:6a4db94011d3 333 /**
sahilmgandhi 18:6a4db94011d3 334 * @}
sahilmgandhi 18:6a4db94011d3 335 */
sahilmgandhi 18:6a4db94011d3 336
sahilmgandhi 18:6a4db94011d3 337 /** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Injected ADC Extended Internal HAL driver trigger selection for injected group
sahilmgandhi 18:6a4db94011d3 338 * @{
sahilmgandhi 18:6a4db94011d3 339 */
sahilmgandhi 18:6a4db94011d3 340 /* List of external triggers of injected group for ADC1, ADC2, ADC3 (if ADC */
sahilmgandhi 18:6a4db94011d3 341 /* instance is available on the selected device). */
sahilmgandhi 18:6a4db94011d3 342 /* (used internally by HAL driver. To not use into HAL structure parameters) */
sahilmgandhi 18:6a4db94011d3 343
sahilmgandhi 18:6a4db94011d3 344 /* External triggers of injected group for ADC1&ADC2 (if ADCx available) */
sahilmgandhi 18:6a4db94011d3 345 #define ADC1_2_EXTERNALTRIGINJEC_T2_TRGO ((uint32_t)( ADC_CR2_JEXTSEL_1 ))
sahilmgandhi 18:6a4db94011d3 346 #define ADC1_2_EXTERNALTRIGINJEC_T2_CC1 ((uint32_t)( ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
sahilmgandhi 18:6a4db94011d3 347 #define ADC1_2_EXTERNALTRIGINJEC_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 ))
sahilmgandhi 18:6a4db94011d3 348 #define ADC1_2_EXTERNALTRIGINJEC_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
sahilmgandhi 18:6a4db94011d3 349 #define ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 ))
sahilmgandhi 18:6a4db94011d3 350 #if defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 351 /* Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and */
sahilmgandhi 18:6a4db94011d3 352 /* XL-density devices. */
sahilmgandhi 18:6a4db94011d3 353 #define ADC1_2_EXTERNALTRIGINJEC_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
sahilmgandhi 18:6a4db94011d3 354 #endif
sahilmgandhi 18:6a4db94011d3 355
sahilmgandhi 18:6a4db94011d3 356 #if defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 357 /* External triggers of injected group for ADC3 */
sahilmgandhi 18:6a4db94011d3 358 #define ADC3_EXTERNALTRIGINJEC_T4_CC3 ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
sahilmgandhi 18:6a4db94011d3 359 #define ADC3_EXTERNALTRIGINJEC_T8_CC2 ADC1_2_EXTERNALTRIGINJEC_T2_CC1
sahilmgandhi 18:6a4db94011d3 360 #define ADC3_EXTERNALTRIGINJEC_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_T3_CC4
sahilmgandhi 18:6a4db94011d3 361 #define ADC3_EXTERNALTRIGINJEC_T5_TRGO ADC1_2_EXTERNALTRIGINJEC_T4_TRGO
sahilmgandhi 18:6a4db94011d3 362 #define ADC3_EXTERNALTRIGINJEC_T5_CC4 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
sahilmgandhi 18:6a4db94011d3 363 #endif /* STM32F103xE || defined STM32F103xG */
sahilmgandhi 18:6a4db94011d3 364
sahilmgandhi 18:6a4db94011d3 365 /* External triggers of injected group for ADC1&ADC2&ADC3 (if ADCx available) */
sahilmgandhi 18:6a4db94011d3 366 #define ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO ((uint32_t) 0x00000000)
sahilmgandhi 18:6a4db94011d3 367 #define ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4 ((uint32_t)( ADC_CR2_JEXTSEL_0))
sahilmgandhi 18:6a4db94011d3 368 #define ADC1_2_3_JSWSTART ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
sahilmgandhi 18:6a4db94011d3 369 /**
sahilmgandhi 18:6a4db94011d3 370 * @}
sahilmgandhi 18:6a4db94011d3 371 */
sahilmgandhi 18:6a4db94011d3 372
sahilmgandhi 18:6a4db94011d3 373 /**
sahilmgandhi 18:6a4db94011d3 374 * @}
sahilmgandhi 18:6a4db94011d3 375 */
sahilmgandhi 18:6a4db94011d3 376
sahilmgandhi 18:6a4db94011d3 377
sahilmgandhi 18:6a4db94011d3 378 /* Exported macro ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 379
sahilmgandhi 18:6a4db94011d3 380 /* Private macro -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 381
sahilmgandhi 18:6a4db94011d3 382 /** @defgroup ADCEx_Private_Macro ADCEx Private Macro
sahilmgandhi 18:6a4db94011d3 383 * @{
sahilmgandhi 18:6a4db94011d3 384 */
sahilmgandhi 18:6a4db94011d3 385 /* Macro reserved for internal HAL driver usage, not intended to be used in */
sahilmgandhi 18:6a4db94011d3 386 /* code of final user. */
sahilmgandhi 18:6a4db94011d3 387
sahilmgandhi 18:6a4db94011d3 388
sahilmgandhi 18:6a4db94011d3 389 /**
sahilmgandhi 18:6a4db94011d3 390 * @brief For devices with 3 ADCs: Defines the external trigger source
sahilmgandhi 18:6a4db94011d3 391 * for regular group according to ADC into common group ADC1&ADC2 or
sahilmgandhi 18:6a4db94011d3 392 * ADC3 (some triggers with same source have different value to
sahilmgandhi 18:6a4db94011d3 393 * be programmed into ADC EXTSEL bits of CR2 register).
sahilmgandhi 18:6a4db94011d3 394 * For devices with 2 ADCs or less: this macro makes no change.
sahilmgandhi 18:6a4db94011d3 395 * @param __HANDLE__: ADC handle
sahilmgandhi 18:6a4db94011d3 396 * @param __EXT_TRIG_CONV__: External trigger selected for regular group.
sahilmgandhi 18:6a4db94011d3 397 * @retval External trigger to be programmed into EXTSEL bits of CR2 register
sahilmgandhi 18:6a4db94011d3 398 */
sahilmgandhi 18:6a4db94011d3 399 #if defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 400 #define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__) \
sahilmgandhi 18:6a4db94011d3 401 (( (((__HANDLE__)->Instance) == ADC3) \
sahilmgandhi 18:6a4db94011d3 402 )? \
sahilmgandhi 18:6a4db94011d3 403 ( ( (__EXT_TRIG_CONV__) == ADC_EXTERNALTRIGCONV_T8_TRGO \
sahilmgandhi 18:6a4db94011d3 404 )? \
sahilmgandhi 18:6a4db94011d3 405 (ADC3_EXTERNALTRIG_T8_TRGO) \
sahilmgandhi 18:6a4db94011d3 406 : \
sahilmgandhi 18:6a4db94011d3 407 (__EXT_TRIG_CONV__) \
sahilmgandhi 18:6a4db94011d3 408 ) \
sahilmgandhi 18:6a4db94011d3 409 : \
sahilmgandhi 18:6a4db94011d3 410 (__EXT_TRIG_CONV__) \
sahilmgandhi 18:6a4db94011d3 411 )
sahilmgandhi 18:6a4db94011d3 412 #else
sahilmgandhi 18:6a4db94011d3 413 #define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__) \
sahilmgandhi 18:6a4db94011d3 414 (__EXT_TRIG_CONV__)
sahilmgandhi 18:6a4db94011d3 415 #endif /* STM32F103xE || STM32F103xG */
sahilmgandhi 18:6a4db94011d3 416
sahilmgandhi 18:6a4db94011d3 417 /**
sahilmgandhi 18:6a4db94011d3 418 * @brief For devices with 3 ADCs: Defines the external trigger source
sahilmgandhi 18:6a4db94011d3 419 * for injected group according to ADC into common group ADC1&ADC2 or
sahilmgandhi 18:6a4db94011d3 420 * ADC3 (some triggers with same source have different value to
sahilmgandhi 18:6a4db94011d3 421 * be programmed into ADC JEXTSEL bits of CR2 register).
sahilmgandhi 18:6a4db94011d3 422 * For devices with 2 ADCs or less: this macro makes no change.
sahilmgandhi 18:6a4db94011d3 423 * @param __HANDLE__: ADC handle
sahilmgandhi 18:6a4db94011d3 424 * @param __EXT_TRIG_INJECTCONV__: External trigger selected for injected group.
sahilmgandhi 18:6a4db94011d3 425 * @retval External trigger to be programmed into JEXTSEL bits of CR2 register
sahilmgandhi 18:6a4db94011d3 426 */
sahilmgandhi 18:6a4db94011d3 427 #if defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 428 #define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__) \
sahilmgandhi 18:6a4db94011d3 429 (( (((__HANDLE__)->Instance) == ADC3) \
sahilmgandhi 18:6a4db94011d3 430 )? \
sahilmgandhi 18:6a4db94011d3 431 ( ( (__EXT_TRIG_INJECTCONV__) == ADC_EXTERNALTRIGINJECCONV_T8_CC4 \
sahilmgandhi 18:6a4db94011d3 432 )? \
sahilmgandhi 18:6a4db94011d3 433 (ADC3_EXTERNALTRIGINJEC_T8_CC4) \
sahilmgandhi 18:6a4db94011d3 434 : \
sahilmgandhi 18:6a4db94011d3 435 (__EXT_TRIG_INJECTCONV__) \
sahilmgandhi 18:6a4db94011d3 436 ) \
sahilmgandhi 18:6a4db94011d3 437 : \
sahilmgandhi 18:6a4db94011d3 438 (__EXT_TRIG_INJECTCONV__) \
sahilmgandhi 18:6a4db94011d3 439 )
sahilmgandhi 18:6a4db94011d3 440 #else
sahilmgandhi 18:6a4db94011d3 441 #define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__) \
sahilmgandhi 18:6a4db94011d3 442 (__EXT_TRIG_INJECTCONV__)
sahilmgandhi 18:6a4db94011d3 443 #endif /* STM32F103xE || STM32F103xG */
sahilmgandhi 18:6a4db94011d3 444
sahilmgandhi 18:6a4db94011d3 445
sahilmgandhi 18:6a4db94011d3 446 /**
sahilmgandhi 18:6a4db94011d3 447 * @brief Verification if multimode is enabled for the selected ADC (multimode ADC master or ADC slave) (applicable for devices with several ADCs)
sahilmgandhi 18:6a4db94011d3 448 * @param __HANDLE__: ADC handle
sahilmgandhi 18:6a4db94011d3 449 * @retval Multimode state: RESET if multimode is disabled, other value if multimode is enabled
sahilmgandhi 18:6a4db94011d3 450 */
sahilmgandhi 18:6a4db94011d3 451 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 452 #define ADC_MULTIMODE_IS_ENABLE(__HANDLE__) \
sahilmgandhi 18:6a4db94011d3 453 (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2) \
sahilmgandhi 18:6a4db94011d3 454 )? \
sahilmgandhi 18:6a4db94011d3 455 (ADC1->CR1 & ADC_CR1_DUALMOD) \
sahilmgandhi 18:6a4db94011d3 456 : \
sahilmgandhi 18:6a4db94011d3 457 (RESET) \
sahilmgandhi 18:6a4db94011d3 458 )
sahilmgandhi 18:6a4db94011d3 459 #else
sahilmgandhi 18:6a4db94011d3 460 #define ADC_MULTIMODE_IS_ENABLE(__HANDLE__) \
sahilmgandhi 18:6a4db94011d3 461 (RESET)
sahilmgandhi 18:6a4db94011d3 462 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
sahilmgandhi 18:6a4db94011d3 463
sahilmgandhi 18:6a4db94011d3 464 /**
sahilmgandhi 18:6a4db94011d3 465 * @brief Verification of condition for ADC start conversion: ADC must be in non-multimode, or multimode with handle of ADC master (applicable for devices with several ADCs)
sahilmgandhi 18:6a4db94011d3 466 * @param __HANDLE__: ADC handle
sahilmgandhi 18:6a4db94011d3 467 * @retval None
sahilmgandhi 18:6a4db94011d3 468 */
sahilmgandhi 18:6a4db94011d3 469 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 470 #define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \
sahilmgandhi 18:6a4db94011d3 471 (( (((__HANDLE__)->Instance) == ADC2) \
sahilmgandhi 18:6a4db94011d3 472 )? \
sahilmgandhi 18:6a4db94011d3 473 ((ADC1->CR1 & ADC_CR1_DUALMOD) == RESET) \
sahilmgandhi 18:6a4db94011d3 474 : \
sahilmgandhi 18:6a4db94011d3 475 (!RESET) \
sahilmgandhi 18:6a4db94011d3 476 )
sahilmgandhi 18:6a4db94011d3 477 #else
sahilmgandhi 18:6a4db94011d3 478 #define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \
sahilmgandhi 18:6a4db94011d3 479 (!RESET)
sahilmgandhi 18:6a4db94011d3 480 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
sahilmgandhi 18:6a4db94011d3 481
sahilmgandhi 18:6a4db94011d3 482 /**
sahilmgandhi 18:6a4db94011d3 483 * @brief Check ADC multimode setting: In case of multimode, check whether ADC master of the selected ADC has feature auto-injection enabled (applicable for devices with several ADCs)
sahilmgandhi 18:6a4db94011d3 484 * @param __HANDLE__: ADC handle
sahilmgandhi 18:6a4db94011d3 485 * @retval None
sahilmgandhi 18:6a4db94011d3 486 */
sahilmgandhi 18:6a4db94011d3 487 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 488 #define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__) \
sahilmgandhi 18:6a4db94011d3 489 (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2) \
sahilmgandhi 18:6a4db94011d3 490 )? \
sahilmgandhi 18:6a4db94011d3 491 (ADC1->CR1 & ADC_CR1_JAUTO) \
sahilmgandhi 18:6a4db94011d3 492 : \
sahilmgandhi 18:6a4db94011d3 493 (RESET) \
sahilmgandhi 18:6a4db94011d3 494 )
sahilmgandhi 18:6a4db94011d3 495 #else
sahilmgandhi 18:6a4db94011d3 496 #define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__) \
sahilmgandhi 18:6a4db94011d3 497 (RESET)
sahilmgandhi 18:6a4db94011d3 498 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
sahilmgandhi 18:6a4db94011d3 499
sahilmgandhi 18:6a4db94011d3 500 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 501 /**
sahilmgandhi 18:6a4db94011d3 502 * @brief Set handle of the other ADC sharing the common multimode settings
sahilmgandhi 18:6a4db94011d3 503 * @param __HANDLE__: ADC handle
sahilmgandhi 18:6a4db94011d3 504 * @param __HANDLE_OTHER_ADC__: other ADC handle
sahilmgandhi 18:6a4db94011d3 505 * @retval None
sahilmgandhi 18:6a4db94011d3 506 */
sahilmgandhi 18:6a4db94011d3 507 #define ADC_COMMON_ADC_OTHER(__HANDLE__, __HANDLE_OTHER_ADC__) \
sahilmgandhi 18:6a4db94011d3 508 ((__HANDLE_OTHER_ADC__)->Instance = ADC2)
sahilmgandhi 18:6a4db94011d3 509
sahilmgandhi 18:6a4db94011d3 510 /**
sahilmgandhi 18:6a4db94011d3 511 * @brief Set handle of the ADC slave associated to the ADC master
sahilmgandhi 18:6a4db94011d3 512 * On STM32F1 devices, ADC slave is always ADC2 (this can be different
sahilmgandhi 18:6a4db94011d3 513 * on other STM32 devices)
sahilmgandhi 18:6a4db94011d3 514 * @param __HANDLE_MASTER__: ADC master handle
sahilmgandhi 18:6a4db94011d3 515 * @param __HANDLE_SLAVE__: ADC slave handle
sahilmgandhi 18:6a4db94011d3 516 * @retval None
sahilmgandhi 18:6a4db94011d3 517 */
sahilmgandhi 18:6a4db94011d3 518 #define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__) \
sahilmgandhi 18:6a4db94011d3 519 ((__HANDLE_SLAVE__)->Instance = ADC2)
sahilmgandhi 18:6a4db94011d3 520
sahilmgandhi 18:6a4db94011d3 521 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
sahilmgandhi 18:6a4db94011d3 522
sahilmgandhi 18:6a4db94011d3 523 #define IS_ADC_INJECTED_RANK(CHANNEL) (((CHANNEL) == ADC_INJECTED_RANK_1) || \
sahilmgandhi 18:6a4db94011d3 524 ((CHANNEL) == ADC_INJECTED_RANK_2) || \
sahilmgandhi 18:6a4db94011d3 525 ((CHANNEL) == ADC_INJECTED_RANK_3) || \
sahilmgandhi 18:6a4db94011d3 526 ((CHANNEL) == ADC_INJECTED_RANK_4) )
sahilmgandhi 18:6a4db94011d3 527
sahilmgandhi 18:6a4db94011d3 528 #define IS_ADC_EXTTRIGINJEC_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE) || \
sahilmgandhi 18:6a4db94011d3 529 ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING) )
sahilmgandhi 18:6a4db94011d3 530
sahilmgandhi 18:6a4db94011d3 531 /** @defgroup ADCEx_injected_nb_conv_verification ADCEx injected nb conv verification
sahilmgandhi 18:6a4db94011d3 532 * @{
sahilmgandhi 18:6a4db94011d3 533 */
sahilmgandhi 18:6a4db94011d3 534 #define IS_ADC_INJECTED_NB_CONV(LENGTH) \
sahilmgandhi 18:6a4db94011d3 535 (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)4)))
sahilmgandhi 18:6a4db94011d3 536 /**
sahilmgandhi 18:6a4db94011d3 537 * @}
sahilmgandhi 18:6a4db94011d3 538 */
sahilmgandhi 18:6a4db94011d3 539
sahilmgandhi 18:6a4db94011d3 540 #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
sahilmgandhi 18:6a4db94011d3 541 #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \
sahilmgandhi 18:6a4db94011d3 542 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \
sahilmgandhi 18:6a4db94011d3 543 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \
sahilmgandhi 18:6a4db94011d3 544 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
sahilmgandhi 18:6a4db94011d3 545 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \
sahilmgandhi 18:6a4db94011d3 546 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \
sahilmgandhi 18:6a4db94011d3 547 \
sahilmgandhi 18:6a4db94011d3 548 ((REGTRIG) == ADC_SOFTWARE_START) )
sahilmgandhi 18:6a4db94011d3 549 #endif
sahilmgandhi 18:6a4db94011d3 550 #if defined (STM32F101xE) || defined (STM32F101xG)
sahilmgandhi 18:6a4db94011d3 551 #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \
sahilmgandhi 18:6a4db94011d3 552 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \
sahilmgandhi 18:6a4db94011d3 553 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \
sahilmgandhi 18:6a4db94011d3 554 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
sahilmgandhi 18:6a4db94011d3 555 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \
sahilmgandhi 18:6a4db94011d3 556 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \
sahilmgandhi 18:6a4db94011d3 557 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \
sahilmgandhi 18:6a4db94011d3 558 \
sahilmgandhi 18:6a4db94011d3 559 ((REGTRIG) == ADC_SOFTWARE_START) )
sahilmgandhi 18:6a4db94011d3 560 #endif
sahilmgandhi 18:6a4db94011d3 561 #if defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 562 #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \
sahilmgandhi 18:6a4db94011d3 563 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \
sahilmgandhi 18:6a4db94011d3 564 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \
sahilmgandhi 18:6a4db94011d3 565 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \
sahilmgandhi 18:6a4db94011d3 566 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \
sahilmgandhi 18:6a4db94011d3 567 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \
sahilmgandhi 18:6a4db94011d3 568 \
sahilmgandhi 18:6a4db94011d3 569 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1) || \
sahilmgandhi 18:6a4db94011d3 570 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3) || \
sahilmgandhi 18:6a4db94011d3 571 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1) || \
sahilmgandhi 18:6a4db94011d3 572 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1) || \
sahilmgandhi 18:6a4db94011d3 573 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3) || \
sahilmgandhi 18:6a4db94011d3 574 \
sahilmgandhi 18:6a4db94011d3 575 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3) || \
sahilmgandhi 18:6a4db94011d3 576 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \
sahilmgandhi 18:6a4db94011d3 577 ((REGTRIG) == ADC_SOFTWARE_START) )
sahilmgandhi 18:6a4db94011d3 578 #endif
sahilmgandhi 18:6a4db94011d3 579
sahilmgandhi 18:6a4db94011d3 580 #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
sahilmgandhi 18:6a4db94011d3 581 #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
sahilmgandhi 18:6a4db94011d3 582 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
sahilmgandhi 18:6a4db94011d3 583 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
sahilmgandhi 18:6a4db94011d3 584 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
sahilmgandhi 18:6a4db94011d3 585 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
sahilmgandhi 18:6a4db94011d3 586 \
sahilmgandhi 18:6a4db94011d3 587 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
sahilmgandhi 18:6a4db94011d3 588 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
sahilmgandhi 18:6a4db94011d3 589 \
sahilmgandhi 18:6a4db94011d3 590 ((REGTRIG) == ADC_INJECTED_SOFTWARE_START) )
sahilmgandhi 18:6a4db94011d3 591 #endif
sahilmgandhi 18:6a4db94011d3 592 #if defined (STM32F101xE) || defined (STM32F101xG)
sahilmgandhi 18:6a4db94011d3 593 #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
sahilmgandhi 18:6a4db94011d3 594 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
sahilmgandhi 18:6a4db94011d3 595 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
sahilmgandhi 18:6a4db94011d3 596 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
sahilmgandhi 18:6a4db94011d3 597 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
sahilmgandhi 18:6a4db94011d3 598 \
sahilmgandhi 18:6a4db94011d3 599 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
sahilmgandhi 18:6a4db94011d3 600 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
sahilmgandhi 18:6a4db94011d3 601 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
sahilmgandhi 18:6a4db94011d3 602 \
sahilmgandhi 18:6a4db94011d3 603 ((REGTRIG) == ADC_INJECTED_SOFTWARE_START) )
sahilmgandhi 18:6a4db94011d3 604 #endif
sahilmgandhi 18:6a4db94011d3 605 #if defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 606 #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
sahilmgandhi 18:6a4db94011d3 607 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
sahilmgandhi 18:6a4db94011d3 608 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
sahilmgandhi 18:6a4db94011d3 609 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
sahilmgandhi 18:6a4db94011d3 610 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
sahilmgandhi 18:6a4db94011d3 611 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
sahilmgandhi 18:6a4db94011d3 612 \
sahilmgandhi 18:6a4db94011d3 613 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \
sahilmgandhi 18:6a4db94011d3 614 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \
sahilmgandhi 18:6a4db94011d3 615 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
sahilmgandhi 18:6a4db94011d3 616 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
sahilmgandhi 18:6a4db94011d3 617 \
sahilmgandhi 18:6a4db94011d3 618 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
sahilmgandhi 18:6a4db94011d3 619 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
sahilmgandhi 18:6a4db94011d3 620 ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
sahilmgandhi 18:6a4db94011d3 621 \
sahilmgandhi 18:6a4db94011d3 622 ((REGTRIG) == ADC_INJECTED_SOFTWARE_START) )
sahilmgandhi 18:6a4db94011d3 623 #endif
sahilmgandhi 18:6a4db94011d3 624
sahilmgandhi 18:6a4db94011d3 625 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 626 #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \
sahilmgandhi 18:6a4db94011d3 627 ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
sahilmgandhi 18:6a4db94011d3 628 ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
sahilmgandhi 18:6a4db94011d3 629 ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLFAST) || \
sahilmgandhi 18:6a4db94011d3 630 ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLSLOW) || \
sahilmgandhi 18:6a4db94011d3 631 ((MODE) == ADC_DUALMODE_INJECSIMULT) || \
sahilmgandhi 18:6a4db94011d3 632 ((MODE) == ADC_DUALMODE_REGSIMULT) || \
sahilmgandhi 18:6a4db94011d3 633 ((MODE) == ADC_DUALMODE_INTERLFAST) || \
sahilmgandhi 18:6a4db94011d3 634 ((MODE) == ADC_DUALMODE_INTERLSLOW) || \
sahilmgandhi 18:6a4db94011d3 635 ((MODE) == ADC_DUALMODE_ALTERTRIG) )
sahilmgandhi 18:6a4db94011d3 636 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
sahilmgandhi 18:6a4db94011d3 637
sahilmgandhi 18:6a4db94011d3 638 /**
sahilmgandhi 18:6a4db94011d3 639 * @}
sahilmgandhi 18:6a4db94011d3 640 */
sahilmgandhi 18:6a4db94011d3 641
sahilmgandhi 18:6a4db94011d3 642
sahilmgandhi 18:6a4db94011d3 643
sahilmgandhi 18:6a4db94011d3 644
sahilmgandhi 18:6a4db94011d3 645
sahilmgandhi 18:6a4db94011d3 646
sahilmgandhi 18:6a4db94011d3 647 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 648 /** @addtogroup ADCEx_Exported_Functions
sahilmgandhi 18:6a4db94011d3 649 * @{
sahilmgandhi 18:6a4db94011d3 650 */
sahilmgandhi 18:6a4db94011d3 651
sahilmgandhi 18:6a4db94011d3 652 /* IO operation functions *****************************************************/
sahilmgandhi 18:6a4db94011d3 653 /** @addtogroup ADCEx_Exported_Functions_Group1
sahilmgandhi 18:6a4db94011d3 654 * @{
sahilmgandhi 18:6a4db94011d3 655 */
sahilmgandhi 18:6a4db94011d3 656
sahilmgandhi 18:6a4db94011d3 657 /* ADC calibration */
sahilmgandhi 18:6a4db94011d3 658 HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc);
sahilmgandhi 18:6a4db94011d3 659
sahilmgandhi 18:6a4db94011d3 660 /* Blocking mode: Polling */
sahilmgandhi 18:6a4db94011d3 661 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
sahilmgandhi 18:6a4db94011d3 662 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
sahilmgandhi 18:6a4db94011d3 663 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 664
sahilmgandhi 18:6a4db94011d3 665 /* Non-blocking mode: Interruption */
sahilmgandhi 18:6a4db94011d3 666 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
sahilmgandhi 18:6a4db94011d3 667 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
sahilmgandhi 18:6a4db94011d3 668
sahilmgandhi 18:6a4db94011d3 669 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 670 /* ADC multimode */
sahilmgandhi 18:6a4db94011d3 671 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length);
sahilmgandhi 18:6a4db94011d3 672 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc);
sahilmgandhi 18:6a4db94011d3 673 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
sahilmgandhi 18:6a4db94011d3 674
sahilmgandhi 18:6a4db94011d3 675 /* ADC retrieve conversion value intended to be used with polling or interruption */
sahilmgandhi 18:6a4db94011d3 676 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
sahilmgandhi 18:6a4db94011d3 677 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 678 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc);
sahilmgandhi 18:6a4db94011d3 679 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
sahilmgandhi 18:6a4db94011d3 680
sahilmgandhi 18:6a4db94011d3 681 /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */
sahilmgandhi 18:6a4db94011d3 682 void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
sahilmgandhi 18:6a4db94011d3 683 /**
sahilmgandhi 18:6a4db94011d3 684 * @}
sahilmgandhi 18:6a4db94011d3 685 */
sahilmgandhi 18:6a4db94011d3 686
sahilmgandhi 18:6a4db94011d3 687
sahilmgandhi 18:6a4db94011d3 688 /* Peripheral Control functions ***********************************************/
sahilmgandhi 18:6a4db94011d3 689 /** @addtogroup ADCEx_Exported_Functions_Group2
sahilmgandhi 18:6a4db94011d3 690 * @{
sahilmgandhi 18:6a4db94011d3 691 */
sahilmgandhi 18:6a4db94011d3 692 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
sahilmgandhi 18:6a4db94011d3 693 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
sahilmgandhi 18:6a4db94011d3 694 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode);
sahilmgandhi 18:6a4db94011d3 695 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
sahilmgandhi 18:6a4db94011d3 696 /**
sahilmgandhi 18:6a4db94011d3 697 * @}
sahilmgandhi 18:6a4db94011d3 698 */
sahilmgandhi 18:6a4db94011d3 699
sahilmgandhi 18:6a4db94011d3 700
sahilmgandhi 18:6a4db94011d3 701 /**
sahilmgandhi 18:6a4db94011d3 702 * @}
sahilmgandhi 18:6a4db94011d3 703 */
sahilmgandhi 18:6a4db94011d3 704
sahilmgandhi 18:6a4db94011d3 705
sahilmgandhi 18:6a4db94011d3 706 /**
sahilmgandhi 18:6a4db94011d3 707 * @}
sahilmgandhi 18:6a4db94011d3 708 */
sahilmgandhi 18:6a4db94011d3 709
sahilmgandhi 18:6a4db94011d3 710 /**
sahilmgandhi 18:6a4db94011d3 711 * @}
sahilmgandhi 18:6a4db94011d3 712 */
sahilmgandhi 18:6a4db94011d3 713
sahilmgandhi 18:6a4db94011d3 714 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 715 }
sahilmgandhi 18:6a4db94011d3 716 #endif
sahilmgandhi 18:6a4db94011d3 717
sahilmgandhi 18:6a4db94011d3 718 #endif /* __STM32F1xx_HAL_ADC_EX_H */
sahilmgandhi 18:6a4db94011d3 719
sahilmgandhi 18:6a4db94011d3 720
sahilmgandhi 18:6a4db94011d3 721 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/