MacroRat / MouseCode

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_Maxim/TARGET_MAX32625/mxc/spix.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /*******************************************************************************
sahilmgandhi 18:6a4db94011d3 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Permission is hereby granted, free of charge, to any person obtaining a
sahilmgandhi 18:6a4db94011d3 5 * copy of this software and associated documentation files (the "Software"),
sahilmgandhi 18:6a4db94011d3 6 * to deal in the Software without restriction, including without limitation
sahilmgandhi 18:6a4db94011d3 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
sahilmgandhi 18:6a4db94011d3 8 * and/or sell copies of the Software, and to permit persons to whom the
sahilmgandhi 18:6a4db94011d3 9 * Software is furnished to do so, subject to the following conditions:
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * The above copyright notice and this permission notice shall be included
sahilmgandhi 18:6a4db94011d3 12 * in all copies or substantial portions of the Software.
sahilmgandhi 18:6a4db94011d3 13 *
sahilmgandhi 18:6a4db94011d3 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
sahilmgandhi 18:6a4db94011d3 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
sahilmgandhi 18:6a4db94011d3 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
sahilmgandhi 18:6a4db94011d3 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
sahilmgandhi 18:6a4db94011d3 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
sahilmgandhi 18:6a4db94011d3 20 * OTHER DEALINGS IN THE SOFTWARE.
sahilmgandhi 18:6a4db94011d3 21 *
sahilmgandhi 18:6a4db94011d3 22 * Except as contained in this notice, the name of Maxim Integrated
sahilmgandhi 18:6a4db94011d3 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
sahilmgandhi 18:6a4db94011d3 24 * Products, Inc. Branding Policy.
sahilmgandhi 18:6a4db94011d3 25 *
sahilmgandhi 18:6a4db94011d3 26 * The mere transfer of this software does not imply any licenses
sahilmgandhi 18:6a4db94011d3 27 * of trade secrets, proprietary technology, copyrights, patents,
sahilmgandhi 18:6a4db94011d3 28 * trademarks, maskwork rights, or any other form of intellectual
sahilmgandhi 18:6a4db94011d3 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
sahilmgandhi 18:6a4db94011d3 30 * ownership rights.
sahilmgandhi 18:6a4db94011d3 31 *
sahilmgandhi 18:6a4db94011d3 32 * $Date: 2016-05-31 17:30:09 -0500 (Tue, 31 May 2016) $
sahilmgandhi 18:6a4db94011d3 33 * $Revision: 23119 $
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 36 /**
sahilmgandhi 18:6a4db94011d3 37 * @file spix.c
sahilmgandhi 18:6a4db94011d3 38 * @brief SPI execute in place driver.
sahilmgandhi 18:6a4db94011d3 39 */
sahilmgandhi 18:6a4db94011d3 40
sahilmgandhi 18:6a4db94011d3 41 /***** Includes *****/
sahilmgandhi 18:6a4db94011d3 42 #include <stddef.h>
sahilmgandhi 18:6a4db94011d3 43 #include "mxc_config.h"
sahilmgandhi 18:6a4db94011d3 44 #include "mxc_assert.h"
sahilmgandhi 18:6a4db94011d3 45 #include "spix.h"
sahilmgandhi 18:6a4db94011d3 46 #include "spix_regs.h"
sahilmgandhi 18:6a4db94011d3 47
sahilmgandhi 18:6a4db94011d3 48 /***** Definitions *****/
sahilmgandhi 18:6a4db94011d3 49 #define CMD_CLOCKS 8
sahilmgandhi 18:6a4db94011d3 50 #define ADDR_3BYTE_CLOCKS 24
sahilmgandhi 18:6a4db94011d3 51 #define ADDR_4BYTE_CLOCKS 32
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 /***** Globals *****/
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 /***** Functions *****/
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /******************************************************************************/
sahilmgandhi 18:6a4db94011d3 58 #if defined ( __GNUC__)
sahilmgandhi 18:6a4db94011d3 59 #undef IAR_SPIX_PRAGMA //Make sure this is not defined for GCC
sahilmgandhi 18:6a4db94011d3 60 #endif
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 #if IAR_SPIX_PRAGMA
sahilmgandhi 18:6a4db94011d3 63 // IAR memory section declaration for the SPIX functions to be loaded in RAM.
sahilmgandhi 18:6a4db94011d3 64 #pragma section=".spix_config"
sahilmgandhi 18:6a4db94011d3 65 #endif
sahilmgandhi 18:6a4db94011d3 66
sahilmgandhi 18:6a4db94011d3 67 #if(MXC_SPIX_REV == 0)
sahilmgandhi 18:6a4db94011d3 68
sahilmgandhi 18:6a4db94011d3 69 #if defined ( __GNUC__ )
sahilmgandhi 18:6a4db94011d3 70 __attribute__ ((section(".spix_config"), noinline))
sahilmgandhi 18:6a4db94011d3 71 #endif /* __GNUC */
sahilmgandhi 18:6a4db94011d3 72
sahilmgandhi 18:6a4db94011d3 73 #if IAR_SPIX_PRAGMA
sahilmgandhi 18:6a4db94011d3 74 #pragma location=".spix_config" // IAR locate function in RAM section .spix_config
sahilmgandhi 18:6a4db94011d3 75 #pragma optimize=no_inline // IAR no inline optimization on this function
sahilmgandhi 18:6a4db94011d3 76 #endif /* IAR_PRAGMA */
sahilmgandhi 18:6a4db94011d3 77
sahilmgandhi 18:6a4db94011d3 78 static void SPIX_UpdateFBIgnore()
sahilmgandhi 18:6a4db94011d3 79 {
sahilmgandhi 18:6a4db94011d3 80 // Update the feedback ignore clocks
sahilmgandhi 18:6a4db94011d3 81 uint8_t clocks = 0;
sahilmgandhi 18:6a4db94011d3 82 uint8_t no_cmd_clocks = 0;
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84 // Adjust the clocks for the command
sahilmgandhi 18:6a4db94011d3 85 if((MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_CMD_WIDTH) ==
sahilmgandhi 18:6a4db94011d3 86 MXC_S_SPIX_FETCH_CTRL_CMD_WIDTH_QUAD_IO) {
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88 clocks += CMD_CLOCKS/4;
sahilmgandhi 18:6a4db94011d3 89 } else if((MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_CMD_WIDTH) ==
sahilmgandhi 18:6a4db94011d3 90 MXC_S_SPIX_FETCH_CTRL_CMD_WIDTH_DUAL_IO) {
sahilmgandhi 18:6a4db94011d3 91
sahilmgandhi 18:6a4db94011d3 92 clocks += CMD_CLOCKS/2;
sahilmgandhi 18:6a4db94011d3 93 } else {
sahilmgandhi 18:6a4db94011d3 94
sahilmgandhi 18:6a4db94011d3 95 clocks += CMD_CLOCKS;
sahilmgandhi 18:6a4db94011d3 96 }
sahilmgandhi 18:6a4db94011d3 97
sahilmgandhi 18:6a4db94011d3 98 // Adjust the clocks for the address
sahilmgandhi 18:6a4db94011d3 99 if((MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_ADDR_WIDTH) ==
sahilmgandhi 18:6a4db94011d3 100 MXC_S_SPIX_FETCH_CTRL_ADDR_WIDTH_QUAD_IO) {
sahilmgandhi 18:6a4db94011d3 101
sahilmgandhi 18:6a4db94011d3 102 if(MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR) {
sahilmgandhi 18:6a4db94011d3 103 clocks += ADDR_4BYTE_CLOCKS/4;
sahilmgandhi 18:6a4db94011d3 104 no_cmd_clocks += ADDR_4BYTE_CLOCKS/4;
sahilmgandhi 18:6a4db94011d3 105 } else {
sahilmgandhi 18:6a4db94011d3 106 clocks += ADDR_3BYTE_CLOCKS/4;
sahilmgandhi 18:6a4db94011d3 107 no_cmd_clocks += ADDR_3BYTE_CLOCKS/4;
sahilmgandhi 18:6a4db94011d3 108 }
sahilmgandhi 18:6a4db94011d3 109
sahilmgandhi 18:6a4db94011d3 110 } else if((MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_ADDR_WIDTH) ==
sahilmgandhi 18:6a4db94011d3 111 MXC_S_SPIX_FETCH_CTRL_ADDR_WIDTH_DUAL_IO) {
sahilmgandhi 18:6a4db94011d3 112
sahilmgandhi 18:6a4db94011d3 113 if(MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR) {
sahilmgandhi 18:6a4db94011d3 114 clocks += ADDR_4BYTE_CLOCKS/2;
sahilmgandhi 18:6a4db94011d3 115 no_cmd_clocks += ADDR_4BYTE_CLOCKS/2;
sahilmgandhi 18:6a4db94011d3 116 } else {
sahilmgandhi 18:6a4db94011d3 117 clocks += ADDR_3BYTE_CLOCKS/2;
sahilmgandhi 18:6a4db94011d3 118 no_cmd_clocks += ADDR_3BYTE_CLOCKS/2;
sahilmgandhi 18:6a4db94011d3 119 }
sahilmgandhi 18:6a4db94011d3 120 } else {
sahilmgandhi 18:6a4db94011d3 121
sahilmgandhi 18:6a4db94011d3 122 if(MXC_SPIX->fetch_ctrl & MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR) {
sahilmgandhi 18:6a4db94011d3 123 clocks += ADDR_4BYTE_CLOCKS;
sahilmgandhi 18:6a4db94011d3 124 no_cmd_clocks += ADDR_4BYTE_CLOCKS;
sahilmgandhi 18:6a4db94011d3 125 } else {
sahilmgandhi 18:6a4db94011d3 126 clocks += ADDR_3BYTE_CLOCKS;
sahilmgandhi 18:6a4db94011d3 127 no_cmd_clocks += ADDR_3BYTE_CLOCKS;
sahilmgandhi 18:6a4db94011d3 128 }
sahilmgandhi 18:6a4db94011d3 129 }
sahilmgandhi 18:6a4db94011d3 130
sahilmgandhi 18:6a4db94011d3 131 // Adjust for the mode clocks
sahilmgandhi 18:6a4db94011d3 132 clocks += ((MXC_SPIX->mode_ctrl & MXC_F_SPIX_MODE_CTRL_MODE_CLOCKS) >>
sahilmgandhi 18:6a4db94011d3 133 MXC_F_SPIX_MODE_CTRL_MODE_CLOCKS_POS);
sahilmgandhi 18:6a4db94011d3 134
sahilmgandhi 18:6a4db94011d3 135 // Set the FB Ignore clocks
sahilmgandhi 18:6a4db94011d3 136 MXC_SPIX->sck_fb_ctrl = ((MXC_SPIX->sck_fb_ctrl & ~MXC_F_SPIX_SCK_FB_CTRL_IGNORE_CLKS) |
sahilmgandhi 18:6a4db94011d3 137 (clocks << MXC_F_SPIX_SCK_FB_CTRL_IGNORE_CLKS_POS));
sahilmgandhi 18:6a4db94011d3 138
sahilmgandhi 18:6a4db94011d3 139 MXC_SPIX->sck_fb_ctrl = ((MXC_SPIX->sck_fb_ctrl & ~MXC_F_SPIX_SCK_FB_CTRL_IGNORE_CLKS_NO_CMD) |
sahilmgandhi 18:6a4db94011d3 140 (no_cmd_clocks << MXC_F_SPIX_SCK_FB_CTRL_IGNORE_CLKS_NO_CMD_POS));
sahilmgandhi 18:6a4db94011d3 141 }
sahilmgandhi 18:6a4db94011d3 142 #endif /* MXC_SPIX_REV==0 */
sahilmgandhi 18:6a4db94011d3 143
sahilmgandhi 18:6a4db94011d3 144 /******************************************************************************/
sahilmgandhi 18:6a4db94011d3 145 #if defined ( __GNUC__ )
sahilmgandhi 18:6a4db94011d3 146 __attribute__ ((section(".spix_config"), noinline))
sahilmgandhi 18:6a4db94011d3 147 #endif /* __GNUC */
sahilmgandhi 18:6a4db94011d3 148
sahilmgandhi 18:6a4db94011d3 149 #if IAR_SPIX_PRAGMA
sahilmgandhi 18:6a4db94011d3 150 #pragma location=".spix_config" // IAR locate function in RAM section .spix_config
sahilmgandhi 18:6a4db94011d3 151 #pragma optimize=no_inline // IAR no inline optimization on this function
sahilmgandhi 18:6a4db94011d3 152 #endif /* IAR_SPIX_PRAGMA */
sahilmgandhi 18:6a4db94011d3 153 int SPIX_ConfigClock(const sys_cfg_spix_t *sys_cfg, uint32_t baud, uint8_t sample)
sahilmgandhi 18:6a4db94011d3 154 {
sahilmgandhi 18:6a4db94011d3 155 int err;
sahilmgandhi 18:6a4db94011d3 156 uint32_t spix_clk, clocks;
sahilmgandhi 18:6a4db94011d3 157
sahilmgandhi 18:6a4db94011d3 158 // Check the input parameters
sahilmgandhi 18:6a4db94011d3 159 if(sys_cfg == NULL) {
sahilmgandhi 18:6a4db94011d3 160 return E_NULL_PTR;
sahilmgandhi 18:6a4db94011d3 161 }
sahilmgandhi 18:6a4db94011d3 162
sahilmgandhi 18:6a4db94011d3 163 // Set system level configurations
sahilmgandhi 18:6a4db94011d3 164 if ((err = SYS_SPIX_Init(sys_cfg, baud)) != E_NO_ERROR) {
sahilmgandhi 18:6a4db94011d3 165 return err;
sahilmgandhi 18:6a4db94011d3 166 }
sahilmgandhi 18:6a4db94011d3 167
sahilmgandhi 18:6a4db94011d3 168 // Configure the mode and baud
sahilmgandhi 18:6a4db94011d3 169 spix_clk = SYS_SPIX_GetFreq();
sahilmgandhi 18:6a4db94011d3 170 if(spix_clk <= 0) {
sahilmgandhi 18:6a4db94011d3 171 return E_UNINITIALIZED;
sahilmgandhi 18:6a4db94011d3 172 }
sahilmgandhi 18:6a4db94011d3 173
sahilmgandhi 18:6a4db94011d3 174 // Make sure that we can generate this frequency
sahilmgandhi 18:6a4db94011d3 175 clocks = (spix_clk / (2*baud));
sahilmgandhi 18:6a4db94011d3 176 if((clocks <= 0) || (clocks >= 0x10)) {
sahilmgandhi 18:6a4db94011d3 177 return E_BAD_PARAM;
sahilmgandhi 18:6a4db94011d3 178 }
sahilmgandhi 18:6a4db94011d3 179
sahilmgandhi 18:6a4db94011d3 180 // Set the baud
sahilmgandhi 18:6a4db94011d3 181 MXC_SPIX->master_cfg = ((MXC_SPIX->master_cfg &
sahilmgandhi 18:6a4db94011d3 182 ~(MXC_F_SPIX_MASTER_CFG_SCK_HI_CLK | MXC_F_SPIX_MASTER_CFG_SCK_LO_CLK)) |
sahilmgandhi 18:6a4db94011d3 183 (clocks << MXC_F_SPIX_MASTER_CFG_SCK_HI_CLK_POS) |
sahilmgandhi 18:6a4db94011d3 184 (clocks << MXC_F_SPIX_MASTER_CFG_SCK_LO_CLK_POS));
sahilmgandhi 18:6a4db94011d3 185
sahilmgandhi 18:6a4db94011d3 186 if(sample != 0) {
sahilmgandhi 18:6a4db94011d3 187 // Use sample mode
sahilmgandhi 18:6a4db94011d3 188 MXC_SPIX->master_cfg = ((MXC_SPIX->master_cfg & ~MXC_F_SPIX_MASTER_CFG_SDIO_SAMPLE_POINT) |
sahilmgandhi 18:6a4db94011d3 189 (sample << MXC_F_SPIX_MASTER_CFG_SDIO_SAMPLE_POINT_POS));
sahilmgandhi 18:6a4db94011d3 190
sahilmgandhi 18:6a4db94011d3 191 MXC_SPIX->sck_fb_ctrl &= ~(MXC_F_SPIX_SCK_FB_CTRL_ENABLE_SCK_FB_MODE |
sahilmgandhi 18:6a4db94011d3 192 MXC_F_SPIX_SCK_FB_CTRL_INVERT_SCK_FB_CLK);
sahilmgandhi 18:6a4db94011d3 193 } else {
sahilmgandhi 18:6a4db94011d3 194 // Use Feedback mode
sahilmgandhi 18:6a4db94011d3 195 MXC_SPIX->master_cfg &= ~(MXC_F_SPIX_MASTER_CFG_SDIO_SAMPLE_POINT);
sahilmgandhi 18:6a4db94011d3 196
sahilmgandhi 18:6a4db94011d3 197 MXC_SPIX->sck_fb_ctrl |= (MXC_F_SPIX_SCK_FB_CTRL_ENABLE_SCK_FB_MODE |
sahilmgandhi 18:6a4db94011d3 198 MXC_F_SPIX_SCK_FB_CTRL_INVERT_SCK_FB_CLK);
sahilmgandhi 18:6a4db94011d3 199
sahilmgandhi 18:6a4db94011d3 200
sahilmgandhi 18:6a4db94011d3 201 #if(MXC_SPIX_REV == 0)
sahilmgandhi 18:6a4db94011d3 202 SPIX_UpdateFBIgnore();
sahilmgandhi 18:6a4db94011d3 203 #endif
sahilmgandhi 18:6a4db94011d3 204 }
sahilmgandhi 18:6a4db94011d3 205
sahilmgandhi 18:6a4db94011d3 206 return E_NO_ERROR;
sahilmgandhi 18:6a4db94011d3 207 }
sahilmgandhi 18:6a4db94011d3 208
sahilmgandhi 18:6a4db94011d3 209 /******************************************************************************/
sahilmgandhi 18:6a4db94011d3 210 #if defined ( __GNUC__ )
sahilmgandhi 18:6a4db94011d3 211 __attribute__ ((section(".spix_config"), noinline))
sahilmgandhi 18:6a4db94011d3 212 #endif /* __GNUC */
sahilmgandhi 18:6a4db94011d3 213
sahilmgandhi 18:6a4db94011d3 214 #if IAR_SPIX_PRAGMA
sahilmgandhi 18:6a4db94011d3 215 #pragma location=".spix_config" // IAR locate function in RAM section .spix_config
sahilmgandhi 18:6a4db94011d3 216 #pragma optimize=no_inline // IAR no inline optimization on this function
sahilmgandhi 18:6a4db94011d3 217 #endif /* IAR_SPIX_PRAGMA */
sahilmgandhi 18:6a4db94011d3 218
sahilmgandhi 18:6a4db94011d3 219 void SPIX_ConfigSlave(uint8_t ssel, uint8_t pol, uint8_t act_delay, uint8_t inact_delay)
sahilmgandhi 18:6a4db94011d3 220 {
sahilmgandhi 18:6a4db94011d3 221
sahilmgandhi 18:6a4db94011d3 222 // Set the slave select
sahilmgandhi 18:6a4db94011d3 223 MXC_SPIX->master_cfg = ((MXC_SPIX->master_cfg & ~MXC_F_SPIX_MASTER_CFG_SLAVE_SEL) |
sahilmgandhi 18:6a4db94011d3 224 (ssel << MXC_F_SPIX_MASTER_CFG_SLAVE_SEL_POS));
sahilmgandhi 18:6a4db94011d3 225
sahilmgandhi 18:6a4db94011d3 226 if(pol != 0) {
sahilmgandhi 18:6a4db94011d3 227 // Active high
sahilmgandhi 18:6a4db94011d3 228 MXC_SPIX->master_cfg &= ~(MXC_F_SPIX_MASTER_CFG_SS_ACT_LO);
sahilmgandhi 18:6a4db94011d3 229 } else {
sahilmgandhi 18:6a4db94011d3 230 // Active low
sahilmgandhi 18:6a4db94011d3 231 MXC_SPIX->master_cfg |= MXC_F_SPIX_MASTER_CFG_SS_ACT_LO;
sahilmgandhi 18:6a4db94011d3 232 }
sahilmgandhi 18:6a4db94011d3 233
sahilmgandhi 18:6a4db94011d3 234 // Set the delays
sahilmgandhi 18:6a4db94011d3 235 MXC_SPIX->master_cfg = ((MXC_SPIX->master_cfg & ~(MXC_F_SPIX_MASTER_CFG_ACT_DELAY |
sahilmgandhi 18:6a4db94011d3 236 MXC_F_SPIX_MASTER_CFG_INACT_DELAY)) |
sahilmgandhi 18:6a4db94011d3 237 (act_delay << MXC_F_SPIX_MASTER_CFG_ACT_DELAY_POS) |
sahilmgandhi 18:6a4db94011d3 238 (inact_delay << MXC_F_SPIX_MASTER_CFG_INACT_DELAY_POS));
sahilmgandhi 18:6a4db94011d3 239 }
sahilmgandhi 18:6a4db94011d3 240
sahilmgandhi 18:6a4db94011d3 241 /******************************************************************************/
sahilmgandhi 18:6a4db94011d3 242 #if defined ( __GNUC__ )
sahilmgandhi 18:6a4db94011d3 243 __attribute__ ((section(".spix_config"), noinline))
sahilmgandhi 18:6a4db94011d3 244 #endif /* __GNUC */
sahilmgandhi 18:6a4db94011d3 245
sahilmgandhi 18:6a4db94011d3 246 #if IAR_SPIX_PRAGMA
sahilmgandhi 18:6a4db94011d3 247 #pragma location=".spix_config" // IAR locate function in RAM section .spix_config
sahilmgandhi 18:6a4db94011d3 248 #pragma optimize=no_inline // IAR no inline optimization on this function
sahilmgandhi 18:6a4db94011d3 249 #endif /* IAR_SPIX_PRAGMA */
sahilmgandhi 18:6a4db94011d3 250
sahilmgandhi 18:6a4db94011d3 251 void SPIX_ConfigFetch(const spix_fetch_t *fetch)
sahilmgandhi 18:6a4db94011d3 252 {
sahilmgandhi 18:6a4db94011d3 253 // Configure how the SPIX fetches data
sahilmgandhi 18:6a4db94011d3 254 MXC_SPIX->fetch_ctrl = (((fetch->cmd << MXC_F_SPIX_FETCH_CTRL_CMD_VALUE_POS) & MXC_F_SPIX_FETCH_CTRL_CMD_VALUE) |
sahilmgandhi 18:6a4db94011d3 255 ((fetch->cmd_width << MXC_F_SPIX_FETCH_CTRL_CMD_WIDTH_POS) & MXC_F_SPIX_FETCH_CTRL_CMD_WIDTH) |
sahilmgandhi 18:6a4db94011d3 256 ((fetch->addr_width << MXC_F_SPIX_FETCH_CTRL_ADDR_WIDTH_POS) & MXC_F_SPIX_FETCH_CTRL_ADDR_WIDTH) |
sahilmgandhi 18:6a4db94011d3 257 ((fetch->data_width << MXC_F_SPIX_FETCH_CTRL_DATA_WIDTH_POS) & MXC_F_SPIX_FETCH_CTRL_DATA_WIDTH) |
sahilmgandhi 18:6a4db94011d3 258 ((fetch->addr_size << MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR_POS) & MXC_F_SPIX_FETCH_CTRL_FOUR_BYTE_ADDR));
sahilmgandhi 18:6a4db94011d3 259
sahilmgandhi 18:6a4db94011d3 260 // Set the command mode and clocks
sahilmgandhi 18:6a4db94011d3 261 MXC_SPIX->mode_ctrl = (((fetch->mode_clocks << MXC_F_SPIX_MODE_CTRL_MODE_CLOCKS_POS) & MXC_F_SPIX_MODE_CTRL_MODE_CLOCKS) |
sahilmgandhi 18:6a4db94011d3 262 (!!fetch->no_cmd_mode << MXC_F_SPIX_MODE_CTRL_NO_CMD_MODE_POS));
sahilmgandhi 18:6a4db94011d3 263
sahilmgandhi 18:6a4db94011d3 264 MXC_SPIX->mode_data = (((fetch->mode_data << MXC_F_SPIX_MODE_DATA_MODE_DATA_BITS_POS) & MXC_F_SPIX_MODE_DATA_MODE_DATA_BITS) |
sahilmgandhi 18:6a4db94011d3 265 MXC_F_SPIX_MODE_DATA_MODE_DATA_OE);
sahilmgandhi 18:6a4db94011d3 266
sahilmgandhi 18:6a4db94011d3 267 #if(MXC_SPIX_REV == 0)
sahilmgandhi 18:6a4db94011d3 268 SPIX_UpdateFBIgnore();
sahilmgandhi 18:6a4db94011d3 269 #endif
sahilmgandhi 18:6a4db94011d3 270 }
sahilmgandhi 18:6a4db94011d3 271
sahilmgandhi 18:6a4db94011d3 272 /******************************************************************************/
sahilmgandhi 18:6a4db94011d3 273 #if defined ( __GNUC__ )
sahilmgandhi 18:6a4db94011d3 274 __attribute__ ((section(".spix_config"), noinline))
sahilmgandhi 18:6a4db94011d3 275 #endif /* __GNUC */
sahilmgandhi 18:6a4db94011d3 276
sahilmgandhi 18:6a4db94011d3 277 #if IAR_SPIX_PRAGMA
sahilmgandhi 18:6a4db94011d3 278 #pragma location=".spix_config" // IAR locate function in RAM section .spix_config
sahilmgandhi 18:6a4db94011d3 279 #pragma optimize=no_inline // IAR no inline optimization on this function
sahilmgandhi 18:6a4db94011d3 280 #endif /* IAR_SPIX_PRAGMA */
sahilmgandhi 18:6a4db94011d3 281
sahilmgandhi 18:6a4db94011d3 282 int SPIX_Shutdown(mxc_spix_regs_t *spix)
sahilmgandhi 18:6a4db94011d3 283 {
sahilmgandhi 18:6a4db94011d3 284 int err;
sahilmgandhi 18:6a4db94011d3 285
sahilmgandhi 18:6a4db94011d3 286 // Clear system level configurations
sahilmgandhi 18:6a4db94011d3 287 if ((err = SYS_SPIX_Shutdown()) != E_NO_ERROR) {
sahilmgandhi 18:6a4db94011d3 288 return err;
sahilmgandhi 18:6a4db94011d3 289 }
sahilmgandhi 18:6a4db94011d3 290
sahilmgandhi 18:6a4db94011d3 291 return E_NO_ERROR;
sahilmgandhi 18:6a4db94011d3 292 }