MacroRat / MouseCode

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Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_Maxim/TARGET_MAX32625/mxc/adc.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 * @file adc.c
sahilmgandhi 18:6a4db94011d3 3 * @brief This file contains the function implementations for the Analog to
sahilmgandhi 18:6a4db94011d3 4 * Digital Converter (ADC) peripheral module.
sahilmgandhi 18:6a4db94011d3 5 */
sahilmgandhi 18:6a4db94011d3 6
sahilmgandhi 18:6a4db94011d3 7 /* ****************************************************************************
sahilmgandhi 18:6a4db94011d3 8 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Permission is hereby granted, free of charge, to any person obtaining a
sahilmgandhi 18:6a4db94011d3 11 * copy of this software and associated documentation files (the "Software"),
sahilmgandhi 18:6a4db94011d3 12 * to deal in the Software without restriction, including without limitation
sahilmgandhi 18:6a4db94011d3 13 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
sahilmgandhi 18:6a4db94011d3 14 * and/or sell copies of the Software, and to permit persons to whom the
sahilmgandhi 18:6a4db94011d3 15 * Software is furnished to do so, subject to the following conditions:
sahilmgandhi 18:6a4db94011d3 16 *
sahilmgandhi 18:6a4db94011d3 17 * The above copyright notice and this permission notice shall be included
sahilmgandhi 18:6a4db94011d3 18 * in all copies or substantial portions of the Software.
sahilmgandhi 18:6a4db94011d3 19 *
sahilmgandhi 18:6a4db94011d3 20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
sahilmgandhi 18:6a4db94011d3 21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
sahilmgandhi 18:6a4db94011d3 23 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
sahilmgandhi 18:6a4db94011d3 24 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
sahilmgandhi 18:6a4db94011d3 25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
sahilmgandhi 18:6a4db94011d3 26 * OTHER DEALINGS IN THE SOFTWARE.
sahilmgandhi 18:6a4db94011d3 27 *
sahilmgandhi 18:6a4db94011d3 28 * Except as contained in this notice, the name of Maxim Integrated
sahilmgandhi 18:6a4db94011d3 29 * Products, Inc. shall not be used except as stated in the Maxim Integrated
sahilmgandhi 18:6a4db94011d3 30 * Products, Inc. Branding Policy.
sahilmgandhi 18:6a4db94011d3 31 *
sahilmgandhi 18:6a4db94011d3 32 * The mere transfer of this software does not imply any licenses
sahilmgandhi 18:6a4db94011d3 33 * of trade secrets, proprietary technology, copyrights, patents,
sahilmgandhi 18:6a4db94011d3 34 * trademarks, maskwork rights, or any other form of intellectual
sahilmgandhi 18:6a4db94011d3 35 * property whatsoever. Maxim Integrated Products, Inc. retains all
sahilmgandhi 18:6a4db94011d3 36 * ownership rights.
sahilmgandhi 18:6a4db94011d3 37 *
sahilmgandhi 18:6a4db94011d3 38 * $Date: 2016-08-02 13:32:46 -0500 (Tue, 02 Aug 2016) $
sahilmgandhi 18:6a4db94011d3 39 * $Revision: 23893 $
sahilmgandhi 18:6a4db94011d3 40 *
sahilmgandhi 18:6a4db94011d3 41 *************************************************************************** */
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 /**
sahilmgandhi 18:6a4db94011d3 44 * @ingroup adc
sahilmgandhi 18:6a4db94011d3 45 * @{
sahilmgandhi 18:6a4db94011d3 46 */
sahilmgandhi 18:6a4db94011d3 47
sahilmgandhi 18:6a4db94011d3 48 /* **** Includes **** */
sahilmgandhi 18:6a4db94011d3 49 #include "mxc_config.h"
sahilmgandhi 18:6a4db94011d3 50 #include "mxc_assert.h"
sahilmgandhi 18:6a4db94011d3 51 #include "mxc_sys.h"
sahilmgandhi 18:6a4db94011d3 52 #include "adc.h"
sahilmgandhi 18:6a4db94011d3 53
sahilmgandhi 18:6a4db94011d3 54 /* **** Definitions **** */
sahilmgandhi 18:6a4db94011d3 55
sahilmgandhi 18:6a4db94011d3 56 /* **** Globals **** */
sahilmgandhi 18:6a4db94011d3 57
sahilmgandhi 18:6a4db94011d3 58 /* **** Functions **** */
sahilmgandhi 18:6a4db94011d3 59
sahilmgandhi 18:6a4db94011d3 60 /* ************************************************************************* */
sahilmgandhi 18:6a4db94011d3 61 int ADC_Init(void)
sahilmgandhi 18:6a4db94011d3 62 {
sahilmgandhi 18:6a4db94011d3 63 int err;
sahilmgandhi 18:6a4db94011d3 64
sahilmgandhi 18:6a4db94011d3 65 if ((err = SYS_ADC_Init()) != E_NO_ERROR) {
sahilmgandhi 18:6a4db94011d3 66 return err;
sahilmgandhi 18:6a4db94011d3 67 }
sahilmgandhi 18:6a4db94011d3 68
sahilmgandhi 18:6a4db94011d3 69 /* Wipe previous configuration */
sahilmgandhi 18:6a4db94011d3 70 MXC_ADC->intr = 0;
sahilmgandhi 18:6a4db94011d3 71
sahilmgandhi 18:6a4db94011d3 72 /* Clear all ADC interrupt flags (W1C) */
sahilmgandhi 18:6a4db94011d3 73 MXC_ADC->intr = MXC_ADC->intr;
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 /* Enable done interrupt */
sahilmgandhi 18:6a4db94011d3 76 MXC_ADC->intr = MXC_F_ADC_INTR_ADC_DONE_IE;
sahilmgandhi 18:6a4db94011d3 77
sahilmgandhi 18:6a4db94011d3 78 /* Power up the ADC */
sahilmgandhi 18:6a4db94011d3 79 MXC_ADC->ctrl = (MXC_F_ADC_CTRL_ADC_PU |
sahilmgandhi 18:6a4db94011d3 80 MXC_F_ADC_CTRL_ADC_CLK_EN |
sahilmgandhi 18:6a4db94011d3 81 MXC_F_ADC_CTRL_BUF_PU |
sahilmgandhi 18:6a4db94011d3 82 MXC_F_ADC_CTRL_ADC_REFBUF_PU |
sahilmgandhi 18:6a4db94011d3 83 MXC_F_ADC_CTRL_ADC_CHGPUMP_PU);
sahilmgandhi 18:6a4db94011d3 84
sahilmgandhi 18:6a4db94011d3 85 return E_NO_ERROR;
sahilmgandhi 18:6a4db94011d3 86 }
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88 /* ************************************************************************* */
sahilmgandhi 18:6a4db94011d3 89 void ADC_StartConvert(mxc_adc_chsel_t channel, unsigned int adc_scale, unsigned int bypass)
sahilmgandhi 18:6a4db94011d3 90 {
sahilmgandhi 18:6a4db94011d3 91 uint32_t ctrl_tmp;
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 /* Clear the ADC done flag */
sahilmgandhi 18:6a4db94011d3 94 ADC_ClearFlags(MXC_F_ADC_INTR_ADC_DONE_IF);
sahilmgandhi 18:6a4db94011d3 95
sahilmgandhi 18:6a4db94011d3 96 /* Insert channel selection */
sahilmgandhi 18:6a4db94011d3 97 ctrl_tmp = MXC_ADC->ctrl;
sahilmgandhi 18:6a4db94011d3 98 ctrl_tmp &= ~(MXC_F_ADC_CTRL_ADC_CHSEL);
sahilmgandhi 18:6a4db94011d3 99 ctrl_tmp |= ((channel << MXC_F_ADC_CTRL_ADC_CHSEL_POS) & MXC_F_ADC_CTRL_ADC_CHSEL);
sahilmgandhi 18:6a4db94011d3 100
sahilmgandhi 18:6a4db94011d3 101 /* Clear channel configuration */
sahilmgandhi 18:6a4db94011d3 102 ctrl_tmp &= ~(MXC_F_ADC_CTRL_ADC_REFSCL | MXC_F_ADC_CTRL_ADC_SCALE | MXC_F_ADC_CTRL_BUF_BYPASS);
sahilmgandhi 18:6a4db94011d3 103
sahilmgandhi 18:6a4db94011d3 104 /* ADC reference scaling must be set for all channels but two*/
sahilmgandhi 18:6a4db94011d3 105 if ((channel != ADC_CH_VDD18) && (channel != ADC_CH_VDD12)) {
sahilmgandhi 18:6a4db94011d3 106 ctrl_tmp |= MXC_F_ADC_CTRL_ADC_REFSCL;
sahilmgandhi 18:6a4db94011d3 107 }
sahilmgandhi 18:6a4db94011d3 108
sahilmgandhi 18:6a4db94011d3 109 /* Finalize user-requested channel configuration */
sahilmgandhi 18:6a4db94011d3 110 if (adc_scale || channel > ADC_CH_3) {
sahilmgandhi 18:6a4db94011d3 111 ctrl_tmp |= MXC_F_ADC_CTRL_ADC_SCALE;
sahilmgandhi 18:6a4db94011d3 112 }
sahilmgandhi 18:6a4db94011d3 113 if (bypass) {
sahilmgandhi 18:6a4db94011d3 114 ctrl_tmp |= MXC_F_ADC_CTRL_BUF_BYPASS;
sahilmgandhi 18:6a4db94011d3 115 }
sahilmgandhi 18:6a4db94011d3 116
sahilmgandhi 18:6a4db94011d3 117 /* Write this configuration */
sahilmgandhi 18:6a4db94011d3 118 MXC_ADC->ctrl = ctrl_tmp;
sahilmgandhi 18:6a4db94011d3 119
sahilmgandhi 18:6a4db94011d3 120 /* Start conversion */
sahilmgandhi 18:6a4db94011d3 121 MXC_ADC->ctrl |= MXC_F_ADC_CTRL_CPU_ADC_START;
sahilmgandhi 18:6a4db94011d3 122
sahilmgandhi 18:6a4db94011d3 123 }
sahilmgandhi 18:6a4db94011d3 124
sahilmgandhi 18:6a4db94011d3 125 /* ************************************************************************* */
sahilmgandhi 18:6a4db94011d3 126 int ADC_GetData(uint16_t *outdata)
sahilmgandhi 18:6a4db94011d3 127 {
sahilmgandhi 18:6a4db94011d3 128 /* See if a conversion is in process */
sahilmgandhi 18:6a4db94011d3 129 if (MXC_ADC->status & MXC_F_ADC_STATUS_ADC_ACTIVE) {
sahilmgandhi 18:6a4db94011d3 130 /* Wait for conversion to complete */
sahilmgandhi 18:6a4db94011d3 131 while ((MXC_ADC->intr & MXC_F_ADC_INTR_ADC_DONE_IF) == 0);
sahilmgandhi 18:6a4db94011d3 132 }
sahilmgandhi 18:6a4db94011d3 133
sahilmgandhi 18:6a4db94011d3 134 /* Read 32-bit value and truncate to 16-bit for output depending on data align bit*/
sahilmgandhi 18:6a4db94011d3 135 if((MXC_ADC->ctrl & MXC_F_ADC_CTRL_ADC_DATAALIGN) == 0)
sahilmgandhi 18:6a4db94011d3 136 *outdata = (uint16_t)(MXC_ADC->data); /* LSB justified */
sahilmgandhi 18:6a4db94011d3 137 else
sahilmgandhi 18:6a4db94011d3 138 *outdata = (uint16_t)(MXC_ADC->data >> 6); /* MSB justified */
sahilmgandhi 18:6a4db94011d3 139
sahilmgandhi 18:6a4db94011d3 140 /* Check for overflow */
sahilmgandhi 18:6a4db94011d3 141 if (MXC_ADC->status & MXC_F_ADC_STATUS_ADC_OVERFLOW) {
sahilmgandhi 18:6a4db94011d3 142 return E_OVERFLOW;
sahilmgandhi 18:6a4db94011d3 143 }
sahilmgandhi 18:6a4db94011d3 144
sahilmgandhi 18:6a4db94011d3 145 return E_NO_ERROR;
sahilmgandhi 18:6a4db94011d3 146 }
sahilmgandhi 18:6a4db94011d3 147
sahilmgandhi 18:6a4db94011d3 148 /* ************************************************************************* */
sahilmgandhi 18:6a4db94011d3 149 int ADC_SetLimit(mxc_adc_limitsel_t unit, mxc_adc_chsel_t channel,
sahilmgandhi 18:6a4db94011d3 150 unsigned int low_enable, unsigned int low_limit,
sahilmgandhi 18:6a4db94011d3 151 unsigned int high_enable, unsigned int high_limit)
sahilmgandhi 18:6a4db94011d3 152 {
sahilmgandhi 18:6a4db94011d3 153 /* Check args */
sahilmgandhi 18:6a4db94011d3 154 if ((unit >= ADC_LIMIT_MAX) || (channel >= ADC_CH_MAX))
sahilmgandhi 18:6a4db94011d3 155 return E_BAD_PARAM;
sahilmgandhi 18:6a4db94011d3 156
sahilmgandhi 18:6a4db94011d3 157 /* set channel using the limit */
sahilmgandhi 18:6a4db94011d3 158 MXC_ADC->limit[unit] = ((channel << MXC_F_ADC_LIMIT0_CH_SEL_POS) & MXC_F_ADC_LIMIT0_CH_SEL);
sahilmgandhi 18:6a4db94011d3 159
sahilmgandhi 18:6a4db94011d3 160 /* enable/disable the limit*/
sahilmgandhi 18:6a4db94011d3 161 if (low_enable) {
sahilmgandhi 18:6a4db94011d3 162 MXC_ADC->limit[unit] |= MXC_F_ADC_LIMIT0_CH_LO_LIMIT_EN |
sahilmgandhi 18:6a4db94011d3 163 ((low_limit << MXC_F_ADC_LIMIT0_CH_LO_LIMIT_POS) & MXC_F_ADC_LIMIT0_CH_LO_LIMIT);
sahilmgandhi 18:6a4db94011d3 164 } else {
sahilmgandhi 18:6a4db94011d3 165 MXC_ADC->limit[unit] &= ~MXC_F_ADC_LIMIT0_CH_LO_LIMIT_EN;
sahilmgandhi 18:6a4db94011d3 166 }
sahilmgandhi 18:6a4db94011d3 167
sahilmgandhi 18:6a4db94011d3 168 if (high_enable) {
sahilmgandhi 18:6a4db94011d3 169 MXC_ADC->limit[unit] |= MXC_F_ADC_LIMIT0_CH_HI_LIMIT_EN |
sahilmgandhi 18:6a4db94011d3 170 ((high_limit << MXC_F_ADC_LIMIT0_CH_HI_LIMIT_POS) & MXC_F_ADC_LIMIT0_CH_HI_LIMIT);
sahilmgandhi 18:6a4db94011d3 171 } else {
sahilmgandhi 18:6a4db94011d3 172 MXC_ADC->limit[unit] &= ~MXC_F_ADC_LIMIT0_CH_HI_LIMIT_EN;
sahilmgandhi 18:6a4db94011d3 173 }
sahilmgandhi 18:6a4db94011d3 174
sahilmgandhi 18:6a4db94011d3 175 return E_NO_ERROR;
sahilmgandhi 18:6a4db94011d3 176 }
sahilmgandhi 18:6a4db94011d3 177
sahilmgandhi 18:6a4db94011d3 178 /**@} end of group adc */