MacroRat / MouseCode

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Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_Maxim/TARGET_MAX32610/device/wdt_regs.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /*******************************************************************************
sahilmgandhi 18:6a4db94011d3 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Permission is hereby granted, free of charge, to any person obtaining a
sahilmgandhi 18:6a4db94011d3 5 * copy of this software and associated documentation files (the "Software"),
sahilmgandhi 18:6a4db94011d3 6 * to deal in the Software without restriction, including without limitation
sahilmgandhi 18:6a4db94011d3 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
sahilmgandhi 18:6a4db94011d3 8 * and/or sell copies of the Software, and to permit persons to whom the
sahilmgandhi 18:6a4db94011d3 9 * Software is furnished to do so, subject to the following conditions:
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * The above copyright notice and this permission notice shall be included
sahilmgandhi 18:6a4db94011d3 12 * in all copies or substantial portions of the Software.
sahilmgandhi 18:6a4db94011d3 13 *
sahilmgandhi 18:6a4db94011d3 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
sahilmgandhi 18:6a4db94011d3 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
sahilmgandhi 18:6a4db94011d3 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
sahilmgandhi 18:6a4db94011d3 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
sahilmgandhi 18:6a4db94011d3 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
sahilmgandhi 18:6a4db94011d3 20 * OTHER DEALINGS IN THE SOFTWARE.
sahilmgandhi 18:6a4db94011d3 21 *
sahilmgandhi 18:6a4db94011d3 22 * Except as contained in this notice, the name of Maxim Integrated
sahilmgandhi 18:6a4db94011d3 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
sahilmgandhi 18:6a4db94011d3 24 * Products, Inc. Branding Policy.
sahilmgandhi 18:6a4db94011d3 25 *
sahilmgandhi 18:6a4db94011d3 26 * The mere transfer of this software does not imply any licenses
sahilmgandhi 18:6a4db94011d3 27 * of trade secrets, proprietary technology, copyrights, patents,
sahilmgandhi 18:6a4db94011d3 28 * trademarks, maskwork rights, or any other form of intellectual
sahilmgandhi 18:6a4db94011d3 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
sahilmgandhi 18:6a4db94011d3 30 * ownership rights.
sahilmgandhi 18:6a4db94011d3 31 *******************************************************************************
sahilmgandhi 18:6a4db94011d3 32 */
sahilmgandhi 18:6a4db94011d3 33
sahilmgandhi 18:6a4db94011d3 34 #ifndef _MXC_WDT_REGS_H_
sahilmgandhi 18:6a4db94011d3 35 #define _MXC_WDT_REGS_H_
sahilmgandhi 18:6a4db94011d3 36
sahilmgandhi 18:6a4db94011d3 37 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 38 extern "C" {
sahilmgandhi 18:6a4db94011d3 39 #endif
sahilmgandhi 18:6a4db94011d3 40
sahilmgandhi 18:6a4db94011d3 41 #include <stdint.h>
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 /**
sahilmgandhi 18:6a4db94011d3 44 * @file wdt_regs.h
sahilmgandhi 18:6a4db94011d3 45 * @addtogroup wdt WDT
sahilmgandhi 18:6a4db94011d3 46 * @{
sahilmgandhi 18:6a4db94011d3 47 */
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /**
sahilmgandhi 18:6a4db94011d3 50 * @brief Defines watchdog timer periods
sahilmgandhi 18:6a4db94011d3 51 */
sahilmgandhi 18:6a4db94011d3 52 typedef enum {
sahilmgandhi 18:6a4db94011d3 53 /** 2^31 cycle period */
sahilmgandhi 18:6a4db94011d3 54 MXC_E_WDT_PERIOD_2_31_CLKS = 0,
sahilmgandhi 18:6a4db94011d3 55 /** 2^30 cycle period */
sahilmgandhi 18:6a4db94011d3 56 MXC_E_WDT_PERIOD_2_30_CLKS,
sahilmgandhi 18:6a4db94011d3 57 /** 2^29 cycle period */
sahilmgandhi 18:6a4db94011d3 58 MXC_E_WDT_PERIOD_2_29_CLKS,
sahilmgandhi 18:6a4db94011d3 59 /** 2^28 cycle period */
sahilmgandhi 18:6a4db94011d3 60 MXC_E_WDT_PERIOD_2_28_CLKS,
sahilmgandhi 18:6a4db94011d3 61 /** 2^27 cycle period */
sahilmgandhi 18:6a4db94011d3 62 MXC_E_WDT_PERIOD_2_27_CLKS,
sahilmgandhi 18:6a4db94011d3 63 /** 2^26 cycle period */
sahilmgandhi 18:6a4db94011d3 64 MXC_E_WDT_PERIOD_2_26_CLKS,
sahilmgandhi 18:6a4db94011d3 65 /** 2^25 cycle period */
sahilmgandhi 18:6a4db94011d3 66 MXC_E_WDT_PERIOD_2_25_CLKS,
sahilmgandhi 18:6a4db94011d3 67 /** 2^24 cycle period */
sahilmgandhi 18:6a4db94011d3 68 MXC_E_WDT_PERIOD_2_24_CLKS,
sahilmgandhi 18:6a4db94011d3 69 /** 2^23 cycle period */
sahilmgandhi 18:6a4db94011d3 70 MXC_E_WDT_PERIOD_2_23_CLKS,
sahilmgandhi 18:6a4db94011d3 71 /** 2^22 cycle period */
sahilmgandhi 18:6a4db94011d3 72 MXC_E_WDT_PERIOD_2_22_CLKS,
sahilmgandhi 18:6a4db94011d3 73 /** 2^21 cycle period */
sahilmgandhi 18:6a4db94011d3 74 MXC_E_WDT_PERIOD_2_21_CLKS,
sahilmgandhi 18:6a4db94011d3 75 /** 2^20 cycle period */
sahilmgandhi 18:6a4db94011d3 76 MXC_E_WDT_PERIOD_2_20_CLKS,
sahilmgandhi 18:6a4db94011d3 77 /** 2^19 cycle period */
sahilmgandhi 18:6a4db94011d3 78 MXC_E_WDT_PERIOD_2_19_CLKS,
sahilmgandhi 18:6a4db94011d3 79 /** 2^18 cycle period */
sahilmgandhi 18:6a4db94011d3 80 MXC_E_WDT_PERIOD_2_18_CLKS,
sahilmgandhi 18:6a4db94011d3 81 /** 2^17 cycle period */
sahilmgandhi 18:6a4db94011d3 82 MXC_E_WDT_PERIOD_2_17_CLKS,
sahilmgandhi 18:6a4db94011d3 83 /** 2^16 cycle period */
sahilmgandhi 18:6a4db94011d3 84 MXC_E_WDT_PERIOD_2_16_CLKS,
sahilmgandhi 18:6a4db94011d3 85 } mxc_wdt_period_t;
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 /* Offset Register Description
sahilmgandhi 18:6a4db94011d3 88 ====== ================================================ */
sahilmgandhi 18:6a4db94011d3 89 typedef struct {
sahilmgandhi 18:6a4db94011d3 90 __IO uint32_t ctrl; /* 0x0000 Watchdog Timer Control Register */
sahilmgandhi 18:6a4db94011d3 91 __IO uint32_t clear; /* 0x0004 Watchdog Clear Register (Feed Dog) */
sahilmgandhi 18:6a4db94011d3 92 __IO uint32_t int_rst_fl; /* 0x0008 Watchdog Interrupt/Reset Flags */
sahilmgandhi 18:6a4db94011d3 93 __IO uint32_t int_rst_en; /* 0x000C Interrupt/Reset Enable/Disable Controls */
sahilmgandhi 18:6a4db94011d3 94 __I uint32_t rsv0010; /* 0x0010 */
sahilmgandhi 18:6a4db94011d3 95 __IO uint32_t lock_ctrl; /* 0x0014 Lock Register Setting for WDT CTRL */
sahilmgandhi 18:6a4db94011d3 96 } mxc_wdt_regs_t;
sahilmgandhi 18:6a4db94011d3 97
sahilmgandhi 18:6a4db94011d3 98 /*
sahilmgandhi 18:6a4db94011d3 99 Register offsets for module WDT.
sahilmgandhi 18:6a4db94011d3 100 */
sahilmgandhi 18:6a4db94011d3 101 #define MXC_R_WDT_OFFS_CTRL ((uint32_t)0x00000000UL)
sahilmgandhi 18:6a4db94011d3 102 #define MXC_R_WDT_OFFS_CLEAR ((uint32_t)0x00000004UL)
sahilmgandhi 18:6a4db94011d3 103 #define MXC_R_WDT_OFFS_INT_RST_FL ((uint32_t)0x00000008UL)
sahilmgandhi 18:6a4db94011d3 104 #define MXC_R_WDT_OFFS_INT_RST_EN ((uint32_t)0x0000000CUL)
sahilmgandhi 18:6a4db94011d3 105 #define MXC_R_WDT_OFFS_LOCK_CTRL ((uint32_t)0x00000014UL)
sahilmgandhi 18:6a4db94011d3 106
sahilmgandhi 18:6a4db94011d3 107 #define MXC_V_WDT_WDLOCK_LOCK_KEY ((uint8_t)0x24)
sahilmgandhi 18:6a4db94011d3 108 #define MXC_V_WDT_WDLOCK_UNLOCK_KEY ((uint8_t)0x42)
sahilmgandhi 18:6a4db94011d3 109
sahilmgandhi 18:6a4db94011d3 110
sahilmgandhi 18:6a4db94011d3 111 /*
sahilmgandhi 18:6a4db94011d3 112 Field positions and masks for module WDT.
sahilmgandhi 18:6a4db94011d3 113 */
sahilmgandhi 18:6a4db94011d3 114 #define MXC_F_WDT_CTRL_INT_PERIOD_POS 0
sahilmgandhi 18:6a4db94011d3 115 #define MXC_F_WDT_CTRL_INT_PERIOD ((uint32_t)(0x0000000FUL << MXC_F_WDT_CTRL_INT_PERIOD_POS))
sahilmgandhi 18:6a4db94011d3 116 #define MXC_F_WDT_CTRL_RST_PERIOD_POS 4
sahilmgandhi 18:6a4db94011d3 117 #define MXC_F_WDT_CTRL_RST_PERIOD ((uint32_t)(0x0000000FUL << MXC_F_WDT_CTRL_RST_PERIOD_POS))
sahilmgandhi 18:6a4db94011d3 118 #define MXC_F_WDT_CTRL_EN_TIMER_POS 8
sahilmgandhi 18:6a4db94011d3 119 #define MXC_F_WDT_CTRL_EN_TIMER ((uint32_t)(0x00000001UL << MXC_F_WDT_CTRL_EN_TIMER_POS))
sahilmgandhi 18:6a4db94011d3 120 #define MXC_F_WDT_CTRL_EN_CLOCK_POS 9
sahilmgandhi 18:6a4db94011d3 121 #define MXC_F_WDT_CTRL_EN_CLOCK ((uint32_t)(0x00000001UL << MXC_F_WDT_CTRL_EN_CLOCK_POS))
sahilmgandhi 18:6a4db94011d3 122 #define MXC_F_WDT_CTRL_WAIT_PERIOD_POS 12
sahilmgandhi 18:6a4db94011d3 123 #define MXC_F_WDT_CTRL_WAIT_PERIOD ((uint32_t)(0x0000000FUL << MXC_F_WDT_CTRL_WAIT_PERIOD_POS))
sahilmgandhi 18:6a4db94011d3 124
sahilmgandhi 18:6a4db94011d3 125 #define MXC_F_WDT_FLAGS_TIMEOUT_POS 0
sahilmgandhi 18:6a4db94011d3 126 #define MXC_F_WDT_FLAGS_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_WDT_FLAGS_TIMEOUT_POS))
sahilmgandhi 18:6a4db94011d3 127 #define MXC_F_WDT_FLAGS_PRE_WIN_POS 1
sahilmgandhi 18:6a4db94011d3 128 #define MXC_F_WDT_FLAGS_PRE_WIN ((uint32_t)(0x00000001UL << MXC_F_WDT_FLAGS_PRE_WIN_POS))
sahilmgandhi 18:6a4db94011d3 129 #define MXC_F_WDT_FLAGS_RESET_OUT_POS 2
sahilmgandhi 18:6a4db94011d3 130 #define MXC_F_WDT_FLAGS_RESET_OUT ((uint32_t)(0x00000001UL << MXC_F_WDT_FLAGS_RESET_OUT_POS))
sahilmgandhi 18:6a4db94011d3 131
sahilmgandhi 18:6a4db94011d3 132 #define MXC_F_WDT_ENABLE_TIMEOUT_POS 0
sahilmgandhi 18:6a4db94011d3 133 #define MXC_F_WDT_ENABLE_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_WDT_ENABLE_TIMEOUT_POS))
sahilmgandhi 18:6a4db94011d3 134 #define MXC_F_WDT_ENABLE_PRE_WIN_POS 1
sahilmgandhi 18:6a4db94011d3 135 #define MXC_F_WDT_ENABLE_PRE_WIN ((uint32_t)(0x00000001UL << MXC_F_WDT_ENABLE_PRE_WIN_POS))
sahilmgandhi 18:6a4db94011d3 136 #define MXC_F_WDT_ENABLE_RESET_OUT_POS 2
sahilmgandhi 18:6a4db94011d3 137 #define MXC_F_WDT_ENABLE_RESET_OUT ((uint32_t)(0x00000001UL << MXC_F_WDT_ENABLE_RESET_OUT_POS))
sahilmgandhi 18:6a4db94011d3 138
sahilmgandhi 18:6a4db94011d3 139 #define MXC_F_WDT_LOCK_CTRL_WDLOCK_POS 0
sahilmgandhi 18:6a4db94011d3 140 #define MXC_F_WDT_LOCK_CTRL_WDLOCK ((uint32_t)(0x000000FFUL << MXC_F_WDT_LOCK_CTRL_WDLOCK_POS))
sahilmgandhi 18:6a4db94011d3 141
sahilmgandhi 18:6a4db94011d3 142 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 143 }
sahilmgandhi 18:6a4db94011d3 144 #endif
sahilmgandhi 18:6a4db94011d3 145
sahilmgandhi 18:6a4db94011d3 146 /**
sahilmgandhi 18:6a4db94011d3 147 * @}
sahilmgandhi 18:6a4db94011d3 148 */
sahilmgandhi 18:6a4db94011d3 149
sahilmgandhi 18:6a4db94011d3 150 #endif /* _MXC_WDT_REGS_H_ */