MacroRat / MouseCode

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Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/eflash_api.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2015 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16
sahilmgandhi 18:6a4db94011d3 17 #include "eflash_api.h"
sahilmgandhi 18:6a4db94011d3 18
sahilmgandhi 18:6a4db94011d3 19 /* EFlash Private Data */
sahilmgandhi 18:6a4db94011d3 20 typedef struct {
sahilmgandhi 18:6a4db94011d3 21 /* basebank0 start address */
sahilmgandhi 18:6a4db94011d3 22 unsigned int basebank0;
sahilmgandhi 18:6a4db94011d3 23 /* basebank0 mass erase + info pages address */
sahilmgandhi 18:6a4db94011d3 24 unsigned int basebank0_me;
sahilmgandhi 18:6a4db94011d3 25 /* basebank1 start address */
sahilmgandhi 18:6a4db94011d3 26 unsigned int basebank1;
sahilmgandhi 18:6a4db94011d3 27 /* basebank1 mass erase + info pages address */
sahilmgandhi 18:6a4db94011d3 28 unsigned int basebank1_me;
sahilmgandhi 18:6a4db94011d3 29 } eflash_t;
sahilmgandhi 18:6a4db94011d3 30
sahilmgandhi 18:6a4db94011d3 31 static eflash_t eflash;
sahilmgandhi 18:6a4db94011d3 32
sahilmgandhi 18:6a4db94011d3 33 /* EFlash_IdCheck: Detect the part number to see if device is present */
sahilmgandhi 18:6a4db94011d3 34 int EFlash_IdCheck()
sahilmgandhi 18:6a4db94011d3 35 {
sahilmgandhi 18:6a4db94011d3 36 unsigned int eflash_id;
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 eflash_id = EFlash_Readl(SYS_EFLASH_PIDR2) & (EFLASH_DES_1 | EFLASH_JEDEC);
sahilmgandhi 18:6a4db94011d3 39
sahilmgandhi 18:6a4db94011d3 40 if (EFlash_Readl(SYS_EFLASH_PIDR0) != FLS_PID0
sahilmgandhi 18:6a4db94011d3 41 || EFlash_Readl(SYS_EFLASH_PIDR1) != FLS_PID1
sahilmgandhi 18:6a4db94011d3 42 || eflash_id != FLS_PID2)
sahilmgandhi 18:6a4db94011d3 43 /* port ID and ARM ID does not match */
sahilmgandhi 18:6a4db94011d3 44 return 1;
sahilmgandhi 18:6a4db94011d3 45 else
sahilmgandhi 18:6a4db94011d3 46 return 0;
sahilmgandhi 18:6a4db94011d3 47 }
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /* EFlash_ReturnBank1BaseAddress: Returns start address of bank 1 */
sahilmgandhi 18:6a4db94011d3 50 int EFlash_ReturnBank1BaseAddress()
sahilmgandhi 18:6a4db94011d3 51 {
sahilmgandhi 18:6a4db94011d3 52 unsigned int hwparams0;
sahilmgandhi 18:6a4db94011d3 53 int baseaddr;
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 hwparams0 = EFlash_Readl(SYS_EFLASH_HWPARAMS0) & EFLASH_FLASHSIZE;
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 switch(hwparams0)
sahilmgandhi 18:6a4db94011d3 58 {
sahilmgandhi 18:6a4db94011d3 59 case 0x11:
sahilmgandhi 18:6a4db94011d3 60 /* 128kb flash size - first page of bank 1 is 0x20000 */
sahilmgandhi 18:6a4db94011d3 61 baseaddr = 0x20000;
sahilmgandhi 18:6a4db94011d3 62 break;
sahilmgandhi 18:6a4db94011d3 63 case 0x12:
sahilmgandhi 18:6a4db94011d3 64 /* 256kb flash size - first page of bank 1 is 0x40000 */
sahilmgandhi 18:6a4db94011d3 65 baseaddr = 0x40000;
sahilmgandhi 18:6a4db94011d3 66 break;
sahilmgandhi 18:6a4db94011d3 67 default:
sahilmgandhi 18:6a4db94011d3 68 /* unsupported flash size */
sahilmgandhi 18:6a4db94011d3 69 baseaddr = -1;
sahilmgandhi 18:6a4db94011d3 70 break;
sahilmgandhi 18:6a4db94011d3 71 }
sahilmgandhi 18:6a4db94011d3 72
sahilmgandhi 18:6a4db94011d3 73 return baseaddr;
sahilmgandhi 18:6a4db94011d3 74 }
sahilmgandhi 18:6a4db94011d3 75
sahilmgandhi 18:6a4db94011d3 76 /* EFlash_DriverInitialize: eFlash Driver Initialize function */
sahilmgandhi 18:6a4db94011d3 77 void EFlash_DriverInitialize()
sahilmgandhi 18:6a4db94011d3 78 {
sahilmgandhi 18:6a4db94011d3 79 /* Find the start address of banks */
sahilmgandhi 18:6a4db94011d3 80 eflash.basebank0 = 0x0;
sahilmgandhi 18:6a4db94011d3 81 eflash.basebank0_me = 0x40000000;
sahilmgandhi 18:6a4db94011d3 82 eflash.basebank1 = EFlash_ReturnBank1BaseAddress();
sahilmgandhi 18:6a4db94011d3 83 eflash.basebank1_me = 0x80000000;
sahilmgandhi 18:6a4db94011d3 84 }
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 /* EFlash_ClockConfig: eFlash Clock Configuration */
sahilmgandhi 18:6a4db94011d3 87 void EFlash_ClockConfig()
sahilmgandhi 18:6a4db94011d3 88 {
sahilmgandhi 18:6a4db94011d3 89 /* Wait until eFlash controller gets unlocked */
sahilmgandhi 18:6a4db94011d3 90 while ((EFlash_Readl(SYS_EFLASH_STATUS) & EFLASH_LOCK_MASK) == EFLASH_LOCK);
sahilmgandhi 18:6a4db94011d3 91
sahilmgandhi 18:6a4db94011d3 92 /*
sahilmgandhi 18:6a4db94011d3 93 * Configure to use external clock
sahilmgandhi 18:6a4db94011d3 94 * EXTCL = 31250 ns ->
sahilmgandhi 18:6a4db94011d3 95 * 1 ms = 32 clock count 32khz ext_clk -> ER_CLK_COUNT = 32
sahilmgandhi 18:6a4db94011d3 96 * 1 us = 84 clock count system_clk -> WR_CLK_COUNT = 84
sahilmgandhi 18:6a4db94011d3 97 * EXT_CLK_CONF = 0x1 [Erase] External clock used for erase counters (>1ms)
sahilmgandhi 18:6a4db94011d3 98 * HCLK used for write counters
sahilmgandhi 18:6a4db94011d3 99 * RD_CLK_COUNT = 0x3
sahilmgandhi 18:6a4db94011d3 100 */
sahilmgandhi 18:6a4db94011d3 101 EFlash_Writel(SYS_EFLASH_CONFIG0, 0x00200B43);
sahilmgandhi 18:6a4db94011d3 102
sahilmgandhi 18:6a4db94011d3 103 /* Wait until eFlash controller gets unlocked */
sahilmgandhi 18:6a4db94011d3 104 while ((EFlash_Readl(SYS_EFLASH_STATUS) & EFLASH_BUSY_MASK) == EFLASH_BUSY);
sahilmgandhi 18:6a4db94011d3 105 }
sahilmgandhi 18:6a4db94011d3 106
sahilmgandhi 18:6a4db94011d3 107 /*
sahilmgandhi 18:6a4db94011d3 108 * EFlash_Erase: Erases flash banks
sahilmgandhi 18:6a4db94011d3 109 * Mode:
sahilmgandhi 18:6a4db94011d3 110 * 0 - erases bank 0
sahilmgandhi 18:6a4db94011d3 111 * 1 - erases bank 1
sahilmgandhi 18:6a4db94011d3 112 * 2 - erases bank 0 + info pages
sahilmgandhi 18:6a4db94011d3 113 * 3 - erases bank 1 + info pages
sahilmgandhi 18:6a4db94011d3 114 * 4 - erases bank 0 + 1
sahilmgandhi 18:6a4db94011d3 115 * 5 - erases bank 0 + 1 with info pages
sahilmgandhi 18:6a4db94011d3 116 */
sahilmgandhi 18:6a4db94011d3 117 void EFlash_Erase(int mode)
sahilmgandhi 18:6a4db94011d3 118 {
sahilmgandhi 18:6a4db94011d3 119 switch (mode)
sahilmgandhi 18:6a4db94011d3 120 {
sahilmgandhi 18:6a4db94011d3 121 case 0:
sahilmgandhi 18:6a4db94011d3 122 /* Wait until eFlash controller gets unlocked */
sahilmgandhi 18:6a4db94011d3 123 while ((EFlash_Readl(SYS_EFLASH_STATUS)
sahilmgandhi 18:6a4db94011d3 124 & EFLASH_LOCK_MASK) == EFLASH_LOCK);
sahilmgandhi 18:6a4db94011d3 125 /* Erase Block #0 */
sahilmgandhi 18:6a4db94011d3 126 EFlash_Writel(SYS_EFLASH_WADDR, eflash.basebank0);
sahilmgandhi 18:6a4db94011d3 127 EFlash_Writel(SYS_EFLASH_CTRL, EFLASH_MASS_ERASE);
sahilmgandhi 18:6a4db94011d3 128 /* Wait until eFlash controller is not busy */
sahilmgandhi 18:6a4db94011d3 129 while ((EFlash_Readl(SYS_EFLASH_STATUS)
sahilmgandhi 18:6a4db94011d3 130 & EFLASH_BUSY_MASK) == EFLASH_BUSY);
sahilmgandhi 18:6a4db94011d3 131 break;
sahilmgandhi 18:6a4db94011d3 132 case 1:
sahilmgandhi 18:6a4db94011d3 133 /* Wait until eFlash controller gets unlocked */
sahilmgandhi 18:6a4db94011d3 134 while ((EFlash_Readl(SYS_EFLASH_STATUS)
sahilmgandhi 18:6a4db94011d3 135 & EFLASH_LOCK_MASK) == EFLASH_LOCK);
sahilmgandhi 18:6a4db94011d3 136 /* Erase Block #1 */
sahilmgandhi 18:6a4db94011d3 137 EFlash_Writel(SYS_EFLASH_WADDR, eflash.basebank1);
sahilmgandhi 18:6a4db94011d3 138 EFlash_Writel(SYS_EFLASH_CTRL, EFLASH_MASS_ERASE);
sahilmgandhi 18:6a4db94011d3 139 /* Wait until eFlash controller is not busy */
sahilmgandhi 18:6a4db94011d3 140 while ((EFlash_Readl(SYS_EFLASH_STATUS)
sahilmgandhi 18:6a4db94011d3 141 & EFLASH_BUSY_MASK) == EFLASH_BUSY);
sahilmgandhi 18:6a4db94011d3 142 break;
sahilmgandhi 18:6a4db94011d3 143 case 2:
sahilmgandhi 18:6a4db94011d3 144 /* Wait until eFlash controller gets unlocked */
sahilmgandhi 18:6a4db94011d3 145 while ((EFlash_Readl(SYS_EFLASH_STATUS)
sahilmgandhi 18:6a4db94011d3 146 & EFLASH_LOCK_MASK) == EFLASH_LOCK);
sahilmgandhi 18:6a4db94011d3 147 /* Erase Block #0 + info pages */
sahilmgandhi 18:6a4db94011d3 148 EFlash_Writel(SYS_EFLASH_WADDR, eflash.basebank0_me);
sahilmgandhi 18:6a4db94011d3 149 EFlash_Writel(SYS_EFLASH_CTRL, EFLASH_MASS_ERASE);
sahilmgandhi 18:6a4db94011d3 150 /* Wait until eFlash controller is not busy */
sahilmgandhi 18:6a4db94011d3 151 while ((EFlash_Readl(SYS_EFLASH_STATUS)
sahilmgandhi 18:6a4db94011d3 152 & EFLASH_BUSY_MASK) == EFLASH_BUSY);
sahilmgandhi 18:6a4db94011d3 153 break;
sahilmgandhi 18:6a4db94011d3 154 case 3:
sahilmgandhi 18:6a4db94011d3 155 /* Wait until eFlash controller gets unlocked */
sahilmgandhi 18:6a4db94011d3 156 while ((EFlash_Readl(SYS_EFLASH_STATUS)
sahilmgandhi 18:6a4db94011d3 157 & EFLASH_LOCK_MASK) == EFLASH_LOCK);
sahilmgandhi 18:6a4db94011d3 158 /* Erase Block #1 + info pages */
sahilmgandhi 18:6a4db94011d3 159 EFlash_Writel(SYS_EFLASH_WADDR, eflash.basebank1_me);
sahilmgandhi 18:6a4db94011d3 160 EFlash_Writel(SYS_EFLASH_CTRL, EFLASH_MASS_ERASE);
sahilmgandhi 18:6a4db94011d3 161 /* Wait until eFlash controller is not busy */
sahilmgandhi 18:6a4db94011d3 162 while ((EFlash_Readl(SYS_EFLASH_STATUS)
sahilmgandhi 18:6a4db94011d3 163 & EFLASH_BUSY_MASK) == EFLASH_BUSY);
sahilmgandhi 18:6a4db94011d3 164 break;
sahilmgandhi 18:6a4db94011d3 165 case 4:
sahilmgandhi 18:6a4db94011d3 166 /* Wait until eFlash controller gets unlocked */
sahilmgandhi 18:6a4db94011d3 167 while ((EFlash_Readl(SYS_EFLASH_STATUS)
sahilmgandhi 18:6a4db94011d3 168 & EFLASH_LOCK_MASK) == EFLASH_LOCK);
sahilmgandhi 18:6a4db94011d3 169 /* Erase Block #0 */
sahilmgandhi 18:6a4db94011d3 170 EFlash_Writel(SYS_EFLASH_WADDR, eflash.basebank0);
sahilmgandhi 18:6a4db94011d3 171 EFlash_Writel(SYS_EFLASH_CTRL, EFLASH_MASS_ERASE);
sahilmgandhi 18:6a4db94011d3 172 /* Wait until eFlash controller is not busy */
sahilmgandhi 18:6a4db94011d3 173 while ((EFlash_Readl(SYS_EFLASH_STATUS)
sahilmgandhi 18:6a4db94011d3 174 & EFLASH_BUSY_MASK) == EFLASH_BUSY);
sahilmgandhi 18:6a4db94011d3 175 /* Wait until eFlash controller gets unlocked */
sahilmgandhi 18:6a4db94011d3 176 while ((EFlash_Readl(SYS_EFLASH_STATUS)
sahilmgandhi 18:6a4db94011d3 177 & EFLASH_LOCK_MASK) == EFLASH_LOCK);
sahilmgandhi 18:6a4db94011d3 178 /* Erase Block #1 */
sahilmgandhi 18:6a4db94011d3 179 EFlash_Writel(SYS_EFLASH_WADDR, eflash.basebank1);
sahilmgandhi 18:6a4db94011d3 180 EFlash_Writel(SYS_EFLASH_CTRL, EFLASH_MASS_ERASE);
sahilmgandhi 18:6a4db94011d3 181 /* Wait until eFlash controller gets unlocked */
sahilmgandhi 18:6a4db94011d3 182 /* Wait until eFlash controller is not busy */
sahilmgandhi 18:6a4db94011d3 183 while ((EFlash_Readl(SYS_EFLASH_STATUS)
sahilmgandhi 18:6a4db94011d3 184 & EFLASH_BUSY_MASK) == EFLASH_BUSY);
sahilmgandhi 18:6a4db94011d3 185 break;
sahilmgandhi 18:6a4db94011d3 186 case 5:
sahilmgandhi 18:6a4db94011d3 187 /* Wait until eFlash controller gets unlocked */
sahilmgandhi 18:6a4db94011d3 188 while ((EFlash_Readl(SYS_EFLASH_STATUS)
sahilmgandhi 18:6a4db94011d3 189 & EFLASH_LOCK_MASK) == EFLASH_LOCK);
sahilmgandhi 18:6a4db94011d3 190 /* Erase Block #0 + info pages */
sahilmgandhi 18:6a4db94011d3 191 EFlash_Writel(SYS_EFLASH_WADDR, eflash.basebank0_me);
sahilmgandhi 18:6a4db94011d3 192 EFlash_Writel(SYS_EFLASH_CTRL, EFLASH_MASS_ERASE);
sahilmgandhi 18:6a4db94011d3 193 /* Wait until eFlash controller is not busy */
sahilmgandhi 18:6a4db94011d3 194 while ((EFlash_Readl(SYS_EFLASH_STATUS)
sahilmgandhi 18:6a4db94011d3 195 & EFLASH_BUSY_MASK) == EFLASH_BUSY);
sahilmgandhi 18:6a4db94011d3 196 /* Wait until eFlash controller gets unlocked */
sahilmgandhi 18:6a4db94011d3 197 while ((EFlash_Readl(SYS_EFLASH_STATUS)
sahilmgandhi 18:6a4db94011d3 198 & EFLASH_LOCK_MASK) == EFLASH_LOCK);
sahilmgandhi 18:6a4db94011d3 199 /* Erase Block #1 + info pages */
sahilmgandhi 18:6a4db94011d3 200 EFlash_Writel(SYS_EFLASH_WADDR, eflash.basebank1_me);
sahilmgandhi 18:6a4db94011d3 201 EFlash_Writel(SYS_EFLASH_CTRL, EFLASH_MASS_ERASE);
sahilmgandhi 18:6a4db94011d3 202 /* Wait until eFlash controller is not busy */
sahilmgandhi 18:6a4db94011d3 203 while ((EFlash_Readl(SYS_EFLASH_STATUS)
sahilmgandhi 18:6a4db94011d3 204 & EFLASH_BUSY_MASK) == EFLASH_BUSY);
sahilmgandhi 18:6a4db94011d3 205 break;
sahilmgandhi 18:6a4db94011d3 206 default:
sahilmgandhi 18:6a4db94011d3 207 break;
sahilmgandhi 18:6a4db94011d3 208 }
sahilmgandhi 18:6a4db94011d3 209 }
sahilmgandhi 18:6a4db94011d3 210
sahilmgandhi 18:6a4db94011d3 211 /* EFlash_ErasePage: Erase a Page */
sahilmgandhi 18:6a4db94011d3 212 void EFlash_ErasePage(unsigned int waddr)
sahilmgandhi 18:6a4db94011d3 213 {
sahilmgandhi 18:6a4db94011d3 214 /* Erase the page starting a waddr */
sahilmgandhi 18:6a4db94011d3 215 EFlash_Writel(SYS_EFLASH_WADDR, waddr);
sahilmgandhi 18:6a4db94011d3 216 EFlash_Writel(SYS_EFLASH_CTRL, EFLASH_ERASE);
sahilmgandhi 18:6a4db94011d3 217 /* Wait until eFlash controller gets unlocked */
sahilmgandhi 18:6a4db94011d3 218 while ((EFlash_Readl(SYS_EFLASH_STATUS)
sahilmgandhi 18:6a4db94011d3 219 & EFLASH_BUSY_MASK) == EFLASH_BUSY);
sahilmgandhi 18:6a4db94011d3 220 }
sahilmgandhi 18:6a4db94011d3 221
sahilmgandhi 18:6a4db94011d3 222 /*
sahilmgandhi 18:6a4db94011d3 223 * EFlash_Write: Write function
sahilmgandhi 18:6a4db94011d3 224 * Parameters:
sahilmgandhi 18:6a4db94011d3 225 * waddr - address in flash
sahilmgandhi 18:6a4db94011d3 226 * data - data to be written
sahilmgandhi 18:6a4db94011d3 227 */
sahilmgandhi 18:6a4db94011d3 228 void EFlash_Write(unsigned int waddr, unsigned int data)
sahilmgandhi 18:6a4db94011d3 229 {
sahilmgandhi 18:6a4db94011d3 230 /* Set Write Data Register */
sahilmgandhi 18:6a4db94011d3 231 EFlash_Writel(SYS_EFLASH_WDATA, data);
sahilmgandhi 18:6a4db94011d3 232 /* Set Write Address Register */
sahilmgandhi 18:6a4db94011d3 233 EFlash_Writel(SYS_EFLASH_WADDR, waddr);
sahilmgandhi 18:6a4db94011d3 234 /* Start Write Operation through CTRL register */
sahilmgandhi 18:6a4db94011d3 235 EFlash_Writel(SYS_EFLASH_CTRL, EFLASH_WRITE);
sahilmgandhi 18:6a4db94011d3 236 /* Wait until eFlash controller gets unlocked */
sahilmgandhi 18:6a4db94011d3 237 while ((EFlash_Readl(SYS_EFLASH_STATUS)
sahilmgandhi 18:6a4db94011d3 238 & EFLASH_BUSY_MASK) == EFLASH_BUSY);
sahilmgandhi 18:6a4db94011d3 239
sahilmgandhi 18:6a4db94011d3 240 /* Flash Cache invalidate if FCache enabled */
sahilmgandhi 18:6a4db94011d3 241 if (FCache_isEnabled() == 1)
sahilmgandhi 18:6a4db94011d3 242 FCache_Invalidate();
sahilmgandhi 18:6a4db94011d3 243 }
sahilmgandhi 18:6a4db94011d3 244
sahilmgandhi 18:6a4db94011d3 245 /*
sahilmgandhi 18:6a4db94011d3 246 * EFlash_WritePage: Write Page function
sahilmgandhi 18:6a4db94011d3 247 * Parameters:
sahilmgandhi 18:6a4db94011d3 248 * waddr - address in flash
sahilmgandhi 18:6a4db94011d3 249 * page_size - data to be written
sahilmgandhi 18:6a4db94011d3 250 * buf - buffer containing the data
sahilmgandhi 18:6a4db94011d3 251 */
sahilmgandhi 18:6a4db94011d3 252 int EFlash_WritePage(unsigned int waddr, unsigned int page_size,
sahilmgandhi 18:6a4db94011d3 253 unsigned char *buf)
sahilmgandhi 18:6a4db94011d3 254 {
sahilmgandhi 18:6a4db94011d3 255 unsigned int page_index;
sahilmgandhi 18:6a4db94011d3 256 unsigned int data;
sahilmgandhi 18:6a4db94011d3 257
sahilmgandhi 18:6a4db94011d3 258 /* To be verified */
sahilmgandhi 18:6a4db94011d3 259 for(page_index = 0; page_index < page_size; page_index = page_index + 4) {
sahilmgandhi 18:6a4db94011d3 260 /* Recreate the 32 bit word */
sahilmgandhi 18:6a4db94011d3 261 data = ((unsigned int) buf[page_index + 3]) << 24 |
sahilmgandhi 18:6a4db94011d3 262 ((unsigned int) buf[page_index + 2]) << 16 |
sahilmgandhi 18:6a4db94011d3 263 ((unsigned int) buf[page_index + 1]) << 8 |
sahilmgandhi 18:6a4db94011d3 264 ((unsigned int) buf[page_index]);
sahilmgandhi 18:6a4db94011d3 265 /* Write the word in memory */
sahilmgandhi 18:6a4db94011d3 266 EFlash_Write(waddr, data);
sahilmgandhi 18:6a4db94011d3 267 waddr += 4;
sahilmgandhi 18:6a4db94011d3 268 }
sahilmgandhi 18:6a4db94011d3 269
sahilmgandhi 18:6a4db94011d3 270 return 0;
sahilmgandhi 18:6a4db94011d3 271 }
sahilmgandhi 18:6a4db94011d3 272
sahilmgandhi 18:6a4db94011d3 273 /*
sahilmgandhi 18:6a4db94011d3 274 * EFlash_Read: Read function
sahilmgandhi 18:6a4db94011d3 275 * Parameters:
sahilmgandhi 18:6a4db94011d3 276 * waddr - address in flash
sahilmgandhi 18:6a4db94011d3 277 * Returns:
sahilmgandhi 18:6a4db94011d3 278 * the vaule read at address waddr
sahilmgandhi 18:6a4db94011d3 279 */
sahilmgandhi 18:6a4db94011d3 280 unsigned int EFlash_Read(unsigned int waddr)
sahilmgandhi 18:6a4db94011d3 281 {
sahilmgandhi 18:6a4db94011d3 282 unsigned int eflash_read = EFlash_Readl(waddr);
sahilmgandhi 18:6a4db94011d3 283 return eflash_read;
sahilmgandhi 18:6a4db94011d3 284 }
sahilmgandhi 18:6a4db94011d3 285
sahilmgandhi 18:6a4db94011d3 286 /*
sahilmgandhi 18:6a4db94011d3 287 * EFlash_Verify: Verifies if the eFlash has been written correctly.
sahilmgandhi 18:6a4db94011d3 288 * Parameters:
sahilmgandhi 18:6a4db94011d3 289 * waddr - address in flash
sahilmgandhi 18:6a4db94011d3 290 * page_size - data to be written
sahilmgandhi 18:6a4db94011d3 291 * buf - buffer containing the data
sahilmgandhi 18:6a4db94011d3 292 * Returns:
sahilmgandhi 18:6a4db94011d3 293 * (waddr+page_size) - OK or Failed Address
sahilmgandhi 18:6a4db94011d3 294 */
sahilmgandhi 18:6a4db94011d3 295 unsigned int EFlash_Verify(unsigned int waddr, unsigned int page_size,
sahilmgandhi 18:6a4db94011d3 296 unsigned char *buf)
sahilmgandhi 18:6a4db94011d3 297 {
sahilmgandhi 18:6a4db94011d3 298 unsigned int page_index;
sahilmgandhi 18:6a4db94011d3 299 unsigned int eflash_data, buf_data;
sahilmgandhi 18:6a4db94011d3 300
sahilmgandhi 18:6a4db94011d3 301 /* To be verified */
sahilmgandhi 18:6a4db94011d3 302 for(page_index = 0; page_index < page_size; page_index = page_index + 4) {
sahilmgandhi 18:6a4db94011d3 303 /* Recreate the 32 bit word */
sahilmgandhi 18:6a4db94011d3 304 buf_data = ((unsigned int) buf[page_index + 3]) << 24 |
sahilmgandhi 18:6a4db94011d3 305 ((unsigned int) buf[page_index + 2]) << 16 |
sahilmgandhi 18:6a4db94011d3 306 ((unsigned int) buf[page_index + 1]) << 8 |
sahilmgandhi 18:6a4db94011d3 307 ((unsigned int) buf[page_index]);
sahilmgandhi 18:6a4db94011d3 308 /* Read the word in memory */
sahilmgandhi 18:6a4db94011d3 309 eflash_data = EFlash_Read(waddr);
sahilmgandhi 18:6a4db94011d3 310 if (eflash_data != buf_data)
sahilmgandhi 18:6a4db94011d3 311 break;
sahilmgandhi 18:6a4db94011d3 312 waddr += 4;
sahilmgandhi 18:6a4db94011d3 313 }
sahilmgandhi 18:6a4db94011d3 314
sahilmgandhi 18:6a4db94011d3 315 /* Allign the address before return */
sahilmgandhi 18:6a4db94011d3 316 return (waddr);
sahilmgandhi 18:6a4db94011d3 317 }
sahilmgandhi 18:6a4db94011d3 318
sahilmgandhi 18:6a4db94011d3 319 /*
sahilmgandhi 18:6a4db94011d3 320 * EFlash_BlankCheck: Verifies if there is any Blank Block in eFlash
sahilmgandhi 18:6a4db94011d3 321 * Parameters:
sahilmgandhi 18:6a4db94011d3 322 * waddr - address in flash
sahilmgandhi 18:6a4db94011d3 323 * page_size - data to be written
sahilmgandhi 18:6a4db94011d3 324 * pat - pattern of a blank block
sahilmgandhi 18:6a4db94011d3 325 * Returns:
sahilmgandhi 18:6a4db94011d3 326 * 0 - OK or 1- Failed
sahilmgandhi 18:6a4db94011d3 327 */
sahilmgandhi 18:6a4db94011d3 328 int EFlash_BlankCheck(unsigned int waddr, unsigned int page_size,
sahilmgandhi 18:6a4db94011d3 329 unsigned char pat)
sahilmgandhi 18:6a4db94011d3 330 {
sahilmgandhi 18:6a4db94011d3 331 unsigned int page_index;
sahilmgandhi 18:6a4db94011d3 332 unsigned int eflash_data, buf_data;
sahilmgandhi 18:6a4db94011d3 333
sahilmgandhi 18:6a4db94011d3 334 /* Page size div by 4 */
sahilmgandhi 18:6a4db94011d3 335 page_size = page_size >> 2;
sahilmgandhi 18:6a4db94011d3 336
sahilmgandhi 18:6a4db94011d3 337 /* To be verified */
sahilmgandhi 18:6a4db94011d3 338 for(page_index = 0; page_index < page_size; page_index = page_index + 4) {
sahilmgandhi 18:6a4db94011d3 339 /* Recreate the 32 bit word */
sahilmgandhi 18:6a4db94011d3 340 buf_data = ((unsigned int) pat) << 24 |
sahilmgandhi 18:6a4db94011d3 341 ((unsigned int) pat) << 16 |
sahilmgandhi 18:6a4db94011d3 342 ((unsigned int) pat) << 8 |
sahilmgandhi 18:6a4db94011d3 343 ((unsigned int) pat);
sahilmgandhi 18:6a4db94011d3 344 /* Read the word in memory */
sahilmgandhi 18:6a4db94011d3 345 eflash_data = EFlash_Read(waddr);
sahilmgandhi 18:6a4db94011d3 346 if (eflash_data != buf_data)
sahilmgandhi 18:6a4db94011d3 347 return 1;
sahilmgandhi 18:6a4db94011d3 348 waddr += 4;
sahilmgandhi 18:6a4db94011d3 349 }
sahilmgandhi 18:6a4db94011d3 350
sahilmgandhi 18:6a4db94011d3 351 return 0;
sahilmgandhi 18:6a4db94011d3 352 }
sahilmgandhi 18:6a4db94011d3 353
sahilmgandhi 18:6a4db94011d3 354 /*
sahilmgandhi 18:6a4db94011d3 355 * Delay ns (uncalibrated delay)
sahilmgandhi 18:6a4db94011d3 356 */
sahilmgandhi 18:6a4db94011d3 357 void EFlash_Delay(unsigned int period) {
sahilmgandhi 18:6a4db94011d3 358 int loop;
sahilmgandhi 18:6a4db94011d3 359 for (loop = 0; loop < period; loop++)
sahilmgandhi 18:6a4db94011d3 360 continue;
sahilmgandhi 18:6a4db94011d3 361 }