MacroRat / MouseCode

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Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_Maxim/TARGET_MAX32625/device/icc_regs.h@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /*******************************************************************************
sahilmgandhi 18:6a4db94011d3 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Permission is hereby granted, free of charge, to any person obtaining a
sahilmgandhi 18:6a4db94011d3 5 * copy of this software and associated documentation files (the "Software"),
sahilmgandhi 18:6a4db94011d3 6 * to deal in the Software without restriction, including without limitation
sahilmgandhi 18:6a4db94011d3 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
sahilmgandhi 18:6a4db94011d3 8 * and/or sell copies of the Software, and to permit persons to whom the
sahilmgandhi 18:6a4db94011d3 9 * Software is furnished to do so, subject to the following conditions:
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * The above copyright notice and this permission notice shall be included
sahilmgandhi 18:6a4db94011d3 12 * in all copies or substantial portions of the Software.
sahilmgandhi 18:6a4db94011d3 13 *
sahilmgandhi 18:6a4db94011d3 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
sahilmgandhi 18:6a4db94011d3 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
sahilmgandhi 18:6a4db94011d3 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
sahilmgandhi 18:6a4db94011d3 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
sahilmgandhi 18:6a4db94011d3 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
sahilmgandhi 18:6a4db94011d3 20 * OTHER DEALINGS IN THE SOFTWARE.
sahilmgandhi 18:6a4db94011d3 21 *
sahilmgandhi 18:6a4db94011d3 22 * Except as contained in this notice, the name of Maxim Integrated
sahilmgandhi 18:6a4db94011d3 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
sahilmgandhi 18:6a4db94011d3 24 * Products, Inc. Branding Policy.
sahilmgandhi 18:6a4db94011d3 25 *
sahilmgandhi 18:6a4db94011d3 26 * The mere transfer of this software does not imply any licenses
sahilmgandhi 18:6a4db94011d3 27 * of trade secrets, proprietary technology, copyrights, patents,
sahilmgandhi 18:6a4db94011d3 28 * trademarks, maskwork rights, or any other form of intellectual
sahilmgandhi 18:6a4db94011d3 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
sahilmgandhi 18:6a4db94011d3 30 * ownership rights.
sahilmgandhi 18:6a4db94011d3 31 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 32
sahilmgandhi 18:6a4db94011d3 33 #ifndef _MXC_ICC_REGS_H_
sahilmgandhi 18:6a4db94011d3 34 #define _MXC_ICC_REGS_H_
sahilmgandhi 18:6a4db94011d3 35
sahilmgandhi 18:6a4db94011d3 36 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 37 extern "C" {
sahilmgandhi 18:6a4db94011d3 38 #endif
sahilmgandhi 18:6a4db94011d3 39
sahilmgandhi 18:6a4db94011d3 40 #include <stdint.h>
sahilmgandhi 18:6a4db94011d3 41 #include "mxc_device.h"
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 /*
sahilmgandhi 18:6a4db94011d3 44 If types are not defined elsewhere (CMSIS) define them here
sahilmgandhi 18:6a4db94011d3 45 */
sahilmgandhi 18:6a4db94011d3 46 #ifndef __IO
sahilmgandhi 18:6a4db94011d3 47 #define __IO volatile
sahilmgandhi 18:6a4db94011d3 48 #endif
sahilmgandhi 18:6a4db94011d3 49 #ifndef __I
sahilmgandhi 18:6a4db94011d3 50 #define __I volatile const
sahilmgandhi 18:6a4db94011d3 51 #endif
sahilmgandhi 18:6a4db94011d3 52 #ifndef __O
sahilmgandhi 18:6a4db94011d3 53 #define __O volatile
sahilmgandhi 18:6a4db94011d3 54 #endif
sahilmgandhi 18:6a4db94011d3 55
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /*
sahilmgandhi 18:6a4db94011d3 58 Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
sahilmgandhi 18:6a4db94011d3 59 access to each register in module.
sahilmgandhi 18:6a4db94011d3 60 */
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 /* Offset Register Description
sahilmgandhi 18:6a4db94011d3 63 ============= ============================================================================ */
sahilmgandhi 18:6a4db94011d3 64 typedef struct {
sahilmgandhi 18:6a4db94011d3 65 __IO uint32_t id; /* 0x0000 Cache ID Register (INTERNAL USE ONLY) */
sahilmgandhi 18:6a4db94011d3 66 __IO uint32_t mem_cfg; /* 0x0004 Memory Configuration Register */
sahilmgandhi 18:6a4db94011d3 67 __I uint32_t rsv008[62]; /* 0x0008-0x00FC */
sahilmgandhi 18:6a4db94011d3 68 __IO uint32_t ctrl_stat; /* 0x0100 Control and Status */
sahilmgandhi 18:6a4db94011d3 69 __I uint32_t rsv104[383]; /* 0x0104-0x06FC */
sahilmgandhi 18:6a4db94011d3 70 __IO uint32_t invdt_all; /* 0x0700 Invalidate (Clear) Cache Control */
sahilmgandhi 18:6a4db94011d3 71 } mxc_icc_regs_t;
sahilmgandhi 18:6a4db94011d3 72
sahilmgandhi 18:6a4db94011d3 73
sahilmgandhi 18:6a4db94011d3 74 /*
sahilmgandhi 18:6a4db94011d3 75 Register offsets for module ICC.
sahilmgandhi 18:6a4db94011d3 76 */
sahilmgandhi 18:6a4db94011d3 77
sahilmgandhi 18:6a4db94011d3 78 #define MXC_R_ICC_OFFS_ID ((uint32_t)0x00000000UL)
sahilmgandhi 18:6a4db94011d3 79 #define MXC_R_ICC_OFFS_MEM_CFG ((uint32_t)0x00000004UL)
sahilmgandhi 18:6a4db94011d3 80 #define MXC_R_ICC_OFFS_CTRL_STAT ((uint32_t)0x00000100UL)
sahilmgandhi 18:6a4db94011d3 81 #define MXC_R_ICC_OFFS_INVDT_ALL ((uint32_t)0x00000700UL)
sahilmgandhi 18:6a4db94011d3 82
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84 /*
sahilmgandhi 18:6a4db94011d3 85 Field positions and masks for module ICC.
sahilmgandhi 18:6a4db94011d3 86 */
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88 #define MXC_F_ICC_ID_RTL_VERSION_POS 0
sahilmgandhi 18:6a4db94011d3 89 #define MXC_F_ICC_ID_RTL_VERSION ((uint32_t)(0x0000003FUL << MXC_F_ICC_ID_RTL_VERSION_POS))
sahilmgandhi 18:6a4db94011d3 90 #define MXC_F_ICC_ID_PART_NUM_POS 6
sahilmgandhi 18:6a4db94011d3 91 #define MXC_F_ICC_ID_PART_NUM ((uint32_t)(0x0000000FUL << MXC_F_ICC_ID_PART_NUM_POS))
sahilmgandhi 18:6a4db94011d3 92 #define MXC_F_ICC_ID_CACHE_ID_POS 10
sahilmgandhi 18:6a4db94011d3 93 #define MXC_F_ICC_ID_CACHE_ID ((uint32_t)(0x0000003FUL << MXC_F_ICC_ID_CACHE_ID_POS))
sahilmgandhi 18:6a4db94011d3 94
sahilmgandhi 18:6a4db94011d3 95 #define MXC_F_ICC_MEM_CFG_CACHE_SIZE_POS 0
sahilmgandhi 18:6a4db94011d3 96 #define MXC_F_ICC_MEM_CFG_CACHE_SIZE ((uint32_t)(0x0000FFFFUL << MXC_F_ICC_MEM_CFG_CACHE_SIZE_POS))
sahilmgandhi 18:6a4db94011d3 97 #define MXC_F_ICC_MEM_CFG_MAIN_MEMORY_SIZE_POS 16
sahilmgandhi 18:6a4db94011d3 98 #define MXC_F_ICC_MEM_CFG_MAIN_MEMORY_SIZE ((uint32_t)(0x0000FFFFUL << MXC_F_ICC_MEM_CFG_MAIN_MEMORY_SIZE_POS))
sahilmgandhi 18:6a4db94011d3 99
sahilmgandhi 18:6a4db94011d3 100 #define MXC_F_ICC_CTRL_STAT_ENABLE_POS 0
sahilmgandhi 18:6a4db94011d3 101 #define MXC_F_ICC_CTRL_STAT_ENABLE ((uint32_t)(0x00000001UL << MXC_F_ICC_CTRL_STAT_ENABLE_POS))
sahilmgandhi 18:6a4db94011d3 102 #define MXC_F_ICC_CTRL_STAT_READY_POS 16
sahilmgandhi 18:6a4db94011d3 103 #define MXC_F_ICC_CTRL_STAT_READY ((uint32_t)(0x00000001UL << MXC_F_ICC_CTRL_STAT_READY_POS))
sahilmgandhi 18:6a4db94011d3 104
sahilmgandhi 18:6a4db94011d3 105
sahilmgandhi 18:6a4db94011d3 106
sahilmgandhi 18:6a4db94011d3 107 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 108 }
sahilmgandhi 18:6a4db94011d3 109 #endif
sahilmgandhi 18:6a4db94011d3 110
sahilmgandhi 18:6a4db94011d3 111 #endif /* _MXC_ICC_REGS_H_ */
sahilmgandhi 18:6a4db94011d3 112