MacroRat / MouseCode

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Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_Maxim/TARGET_MAX32620/sleep.c@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /*******************************************************************************
sahilmgandhi 18:6a4db94011d3 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Permission is hereby granted, free of charge, to any person obtaining a
sahilmgandhi 18:6a4db94011d3 5 * copy of this software and associated documentation files (the "Software"),
sahilmgandhi 18:6a4db94011d3 6 * to deal in the Software without restriction, including without limitation
sahilmgandhi 18:6a4db94011d3 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
sahilmgandhi 18:6a4db94011d3 8 * and/or sell copies of the Software, and to permit persons to whom the
sahilmgandhi 18:6a4db94011d3 9 * Software is furnished to do so, subject to the following conditions:
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * The above copyright notice and this permission notice shall be included
sahilmgandhi 18:6a4db94011d3 12 * in all copies or substantial portions of the Software.
sahilmgandhi 18:6a4db94011d3 13 *
sahilmgandhi 18:6a4db94011d3 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
sahilmgandhi 18:6a4db94011d3 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
sahilmgandhi 18:6a4db94011d3 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
sahilmgandhi 18:6a4db94011d3 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
sahilmgandhi 18:6a4db94011d3 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
sahilmgandhi 18:6a4db94011d3 20 * OTHER DEALINGS IN THE SOFTWARE.
sahilmgandhi 18:6a4db94011d3 21 *
sahilmgandhi 18:6a4db94011d3 22 * Except as contained in this notice, the name of Maxim Integrated
sahilmgandhi 18:6a4db94011d3 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
sahilmgandhi 18:6a4db94011d3 24 * Products, Inc. Branding Policy.
sahilmgandhi 18:6a4db94011d3 25 *
sahilmgandhi 18:6a4db94011d3 26 * The mere transfer of this software does not imply any licenses
sahilmgandhi 18:6a4db94011d3 27 * of trade secrets, proprietary technology, copyrights, patents,
sahilmgandhi 18:6a4db94011d3 28 * trademarks, maskwork rights, or any other form of intellectual
sahilmgandhi 18:6a4db94011d3 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
sahilmgandhi 18:6a4db94011d3 30 * ownership rights.
sahilmgandhi 18:6a4db94011d3 31 *******************************************************************************
sahilmgandhi 18:6a4db94011d3 32 */
sahilmgandhi 18:6a4db94011d3 33
sahilmgandhi 18:6a4db94011d3 34 #include "sleep_api.h"
sahilmgandhi 18:6a4db94011d3 35 #include "pwrman_regs.h"
sahilmgandhi 18:6a4db94011d3 36 #include "pwrseq_regs.h"
sahilmgandhi 18:6a4db94011d3 37 #include "clkman_regs.h"
sahilmgandhi 18:6a4db94011d3 38 #include "ioman_regs.h"
sahilmgandhi 18:6a4db94011d3 39 #include "rtc_regs.h"
sahilmgandhi 18:6a4db94011d3 40 #include "usb_regs.h"
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #define REVISION_A3 2
sahilmgandhi 18:6a4db94011d3 43 #define REVISION_A4 3
sahilmgandhi 18:6a4db94011d3 44
sahilmgandhi 18:6a4db94011d3 45 // USB state to be restored upon wakeup
sahilmgandhi 18:6a4db94011d3 46 typedef struct {
sahilmgandhi 18:6a4db94011d3 47 uint32_t dev_cn;
sahilmgandhi 18:6a4db94011d3 48 uint32_t dev_inten;
sahilmgandhi 18:6a4db94011d3 49 uint32_t ep_base;
sahilmgandhi 18:6a4db94011d3 50 uint32_t ep[MXC_USB_NUM_EP];
sahilmgandhi 18:6a4db94011d3 51 } usb_state_t;
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 static mxc_uart_regs_t *stdio_uart = (mxc_uart_regs_t*)STDIO_UART;
sahilmgandhi 18:6a4db94011d3 54 static int restore_usb;
sahilmgandhi 18:6a4db94011d3 55 static usb_state_t usb_state;
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 void hal_sleep(void)
sahilmgandhi 18:6a4db94011d3 58 {
sahilmgandhi 18:6a4db94011d3 59 // Normal sleep mode for ARM core
sahilmgandhi 18:6a4db94011d3 60 SCB->SCR = 0;
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 __DSB();
sahilmgandhi 18:6a4db94011d3 63 __WFI();
sahilmgandhi 18:6a4db94011d3 64 }
sahilmgandhi 18:6a4db94011d3 65
sahilmgandhi 18:6a4db94011d3 66 static void usb_sleep(void)
sahilmgandhi 18:6a4db94011d3 67 {
sahilmgandhi 18:6a4db94011d3 68 int i;
sahilmgandhi 18:6a4db94011d3 69
sahilmgandhi 18:6a4db94011d3 70 if (MXC_USB->cn & MXC_F_USB_CN_USB_EN) {
sahilmgandhi 18:6a4db94011d3 71 // The USB module will not survive Deep Sleep.
sahilmgandhi 18:6a4db94011d3 72
sahilmgandhi 18:6a4db94011d3 73 // Save the USB state to restore it upon wakeup
sahilmgandhi 18:6a4db94011d3 74 usb_state.dev_cn = MXC_USB->dev_cn;
sahilmgandhi 18:6a4db94011d3 75 usb_state.dev_inten = MXC_USB->dev_inten;
sahilmgandhi 18:6a4db94011d3 76 usb_state.ep_base = MXC_USB->ep_base;
sahilmgandhi 18:6a4db94011d3 77 for (i = 0; i < MXC_USB_NUM_EP; i++) {
sahilmgandhi 18:6a4db94011d3 78 usb_state.ep[i] = MXC_USB->ep[i] & (MXC_F_USB_EP_DIR | MXC_F_USB_EP_BUF2 | MXC_F_USB_EP_INT_EN | MXC_F_USB_EP_NAK_EN);
sahilmgandhi 18:6a4db94011d3 79 }
sahilmgandhi 18:6a4db94011d3 80 restore_usb = 1;
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 // Shut down the USB module.
sahilmgandhi 18:6a4db94011d3 83 MXC_USB->dev_inten = 0;
sahilmgandhi 18:6a4db94011d3 84 MXC_USB->dev_cn = 0;
sahilmgandhi 18:6a4db94011d3 85 MXC_USB->cn = 0;
sahilmgandhi 18:6a4db94011d3 86 restore_usb = 1; // USB should be restored upon wakeup
sahilmgandhi 18:6a4db94011d3 87 } else {
sahilmgandhi 18:6a4db94011d3 88 restore_usb = 0;
sahilmgandhi 18:6a4db94011d3 89 }
sahilmgandhi 18:6a4db94011d3 90 }
sahilmgandhi 18:6a4db94011d3 91
sahilmgandhi 18:6a4db94011d3 92 // Restore the USB module state.
sahilmgandhi 18:6a4db94011d3 93 static void usb_wakeup(void)
sahilmgandhi 18:6a4db94011d3 94 {
sahilmgandhi 18:6a4db94011d3 95 int i;
sahilmgandhi 18:6a4db94011d3 96
sahilmgandhi 18:6a4db94011d3 97 if (restore_usb) {
sahilmgandhi 18:6a4db94011d3 98 MXC_USB->cn = MXC_F_USB_CN_USB_EN;
sahilmgandhi 18:6a4db94011d3 99 MXC_USB->dev_cn = MXC_F_USB_DEV_CN_URST;
sahilmgandhi 18:6a4db94011d3 100 MXC_USB->dev_cn = 0;
sahilmgandhi 18:6a4db94011d3 101 for (i = 0; i < MXC_USB_NUM_EP; i++) {
sahilmgandhi 18:6a4db94011d3 102 MXC_USB->ep[i] = usb_state.ep[i];
sahilmgandhi 18:6a4db94011d3 103 }
sahilmgandhi 18:6a4db94011d3 104 MXC_USB->ep_base = usb_state.ep_base;
sahilmgandhi 18:6a4db94011d3 105 MXC_USB->dev_cn = usb_state.dev_cn;
sahilmgandhi 18:6a4db94011d3 106 MXC_USB->dev_inten = usb_state.dev_inten;
sahilmgandhi 18:6a4db94011d3 107 restore_usb = 0;
sahilmgandhi 18:6a4db94011d3 108 }
sahilmgandhi 18:6a4db94011d3 109 }
sahilmgandhi 18:6a4db94011d3 110
sahilmgandhi 18:6a4db94011d3 111 // Low-power stop mode
sahilmgandhi 18:6a4db94011d3 112 void hal_deepsleep(void)
sahilmgandhi 18:6a4db94011d3 113 {
sahilmgandhi 18:6a4db94011d3 114 unsigned int part_rev = MXC_PWRMAN->mask_id0 & MXC_F_PWRMAN_MASK_ID0_REVISION_ID;
sahilmgandhi 18:6a4db94011d3 115
sahilmgandhi 18:6a4db94011d3 116 // Deep Sleep is not working properly on Revisions A3 and earlier
sahilmgandhi 18:6a4db94011d3 117 if (part_rev <= REVISION_A3) {
sahilmgandhi 18:6a4db94011d3 118 sleep();
sahilmgandhi 18:6a4db94011d3 119 return;
sahilmgandhi 18:6a4db94011d3 120 }
sahilmgandhi 18:6a4db94011d3 121
sahilmgandhi 18:6a4db94011d3 122 // Wait for all STDIO characters to be sent. The UART clock will stop.
sahilmgandhi 18:6a4db94011d3 123 while ((stdio_uart->tx_fifo_ctrl & MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY) ||
sahilmgandhi 18:6a4db94011d3 124 !(stdio_uart->intfl & MXC_F_UART_INTFL_TX_DONE));
sahilmgandhi 18:6a4db94011d3 125
sahilmgandhi 18:6a4db94011d3 126 __disable_irq();
sahilmgandhi 18:6a4db94011d3 127
sahilmgandhi 18:6a4db94011d3 128 // Do not enter Deep Sleep if connected to VBUS
sahilmgandhi 18:6a4db94011d3 129 if (MXC_USB->dev_intfl & MXC_F_USB_DEV_INTFL_VBUS_ST) {
sahilmgandhi 18:6a4db94011d3 130 __enable_irq();
sahilmgandhi 18:6a4db94011d3 131 sleep();
sahilmgandhi 18:6a4db94011d3 132 return;
sahilmgandhi 18:6a4db94011d3 133 }
sahilmgandhi 18:6a4db94011d3 134
sahilmgandhi 18:6a4db94011d3 135 // The USB module will not survive Deep Sleep. Shut it down.
sahilmgandhi 18:6a4db94011d3 136 usb_sleep();
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 // Make sure RTC is not pending before sleeping, if its still synchronizing
sahilmgandhi 18:6a4db94011d3 139 // we might not wake up.
sahilmgandhi 18:6a4db94011d3 140 while (MXC_RTCTMR->ctrl & MXC_F_RTC_CTRL_PENDING);
sahilmgandhi 18:6a4db94011d3 141
sahilmgandhi 18:6a4db94011d3 142 // Clear any active GPIO Wake Up Events
sahilmgandhi 18:6a4db94011d3 143 if (MXC_PWRSEQ->flags & MXC_F_PWRSEQ_FLAGS_PWR_IOWAKEUP) {
sahilmgandhi 18:6a4db94011d3 144 // NOTE: These must be cleared before clearing IOWAKEUP
sahilmgandhi 18:6a4db94011d3 145 MXC_PWRSEQ->reg1 |= MXC_F_PWRSEQ_REG1_PWR_CLR_IO_EVENT_LATCH;
sahilmgandhi 18:6a4db94011d3 146 MXC_PWRSEQ->reg1 &= ~MXC_F_PWRSEQ_REG1_PWR_CLR_IO_EVENT_LATCH;
sahilmgandhi 18:6a4db94011d3 147
sahilmgandhi 18:6a4db94011d3 148 MXC_PWRSEQ->flags |= MXC_F_PWRSEQ_FLAGS_PWR_IOWAKEUP;
sahilmgandhi 18:6a4db94011d3 149 }
sahilmgandhi 18:6a4db94011d3 150
sahilmgandhi 18:6a4db94011d3 151 // Set the LP1 select bit so CPU goes to LP1 during SLEEPDEEP
sahilmgandhi 18:6a4db94011d3 152 if (part_rev == REVISION_A4) {
sahilmgandhi 18:6a4db94011d3 153 MXC_PWRSEQ->reg0 &= ~MXC_F_PWRSEQ_REG0_PWR_LP1; // A4 requires part to go to pseudo LP0
sahilmgandhi 18:6a4db94011d3 154 } else {
sahilmgandhi 18:6a4db94011d3 155 MXC_PWRSEQ->reg0 |= MXC_F_PWRSEQ_REG0_PWR_LP1;
sahilmgandhi 18:6a4db94011d3 156 }
sahilmgandhi 18:6a4db94011d3 157
sahilmgandhi 18:6a4db94011d3 158 // The SLEEPDEEP bit will cause a WFE() to trigger LP0/LP1 (depending on ..._REG0_PWR_LP1 state)
sahilmgandhi 18:6a4db94011d3 159 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
sahilmgandhi 18:6a4db94011d3 160
sahilmgandhi 18:6a4db94011d3 161 if (part_rev == REVISION_A4) {
sahilmgandhi 18:6a4db94011d3 162 // WORKAROUND: Toggle SVM bits, which send extra clocks to the power sequencer to fix retention controller
sahilmgandhi 18:6a4db94011d3 163 MXC_PWRSEQ->msk_flags |= MXC_F_PWRSEQ_MSK_FLAGS_PWR_TVDD12_RST_BAD;
sahilmgandhi 18:6a4db94011d3 164 MXC_PWRSEQ->reg0 &= ~(MXC_F_PWRSEQ_REG0_PWR_SVMTVDD12EN_RUN);
sahilmgandhi 18:6a4db94011d3 165 MXC_PWRSEQ->reg0 |= MXC_F_PWRSEQ_REG0_PWR_SVMTVDD12EN_RUN;
sahilmgandhi 18:6a4db94011d3 166 MXC_PWRSEQ->msk_flags &= ~MXC_F_PWRSEQ_MSK_FLAGS_PWR_TVDD12_RST_BAD;
sahilmgandhi 18:6a4db94011d3 167 }
sahilmgandhi 18:6a4db94011d3 168
sahilmgandhi 18:6a4db94011d3 169 // Enable Retention controller
sahilmgandhi 18:6a4db94011d3 170 MXC_PWRSEQ->retn_ctrl0 |= MXC_F_PWRSEQ_RETN_CTRL0_RETN_CTRL_EN;
sahilmgandhi 18:6a4db94011d3 171
sahilmgandhi 18:6a4db94011d3 172 // Clear the firstboot bit, which is generated by a POR event and locks out LPx modes
sahilmgandhi 18:6a4db94011d3 173 MXC_PWRSEQ->reg0 &= ~MXC_F_PWRSEQ_REG0_PWR_FIRST_BOOT;
sahilmgandhi 18:6a4db94011d3 174
sahilmgandhi 18:6a4db94011d3 175 // Freeze GPIO using MBUS so that it doesn't flail while digital core is asleep
sahilmgandhi 18:6a4db94011d3 176 MXC_PWRSEQ->reg1 |= MXC_F_PWRSEQ_REG1_PWR_MBUS_GATE;
sahilmgandhi 18:6a4db94011d3 177
sahilmgandhi 18:6a4db94011d3 178 // Dummy read to make sure SSB writes are complete
sahilmgandhi 18:6a4db94011d3 179 MXC_PWRSEQ->reg0 = MXC_PWRSEQ->reg0;
sahilmgandhi 18:6a4db94011d3 180
sahilmgandhi 18:6a4db94011d3 181 if (part_rev == REVISION_A4) {
sahilmgandhi 18:6a4db94011d3 182 // Note: ARM deep-sleep requires a specific sequence to clear event latches,
sahilmgandhi 18:6a4db94011d3 183 // otherwise the CPU will not enter sleep.
sahilmgandhi 18:6a4db94011d3 184 __SEV();
sahilmgandhi 18:6a4db94011d3 185 __WFE();
sahilmgandhi 18:6a4db94011d3 186 __WFI();
sahilmgandhi 18:6a4db94011d3 187 } else {
sahilmgandhi 18:6a4db94011d3 188 // Note: ARM deep-sleep requires a specific sequence to clear event latches,
sahilmgandhi 18:6a4db94011d3 189 // otherwise the CPU will not enter sleep.
sahilmgandhi 18:6a4db94011d3 190 __SEV();
sahilmgandhi 18:6a4db94011d3 191 __WFE();
sahilmgandhi 18:6a4db94011d3 192 __WFE();
sahilmgandhi 18:6a4db94011d3 193 }
sahilmgandhi 18:6a4db94011d3 194
sahilmgandhi 18:6a4db94011d3 195 // We'll wakeup here ...
sahilmgandhi 18:6a4db94011d3 196
sahilmgandhi 18:6a4db94011d3 197 // Unfreeze the GPIO by clearing MBUS_GATE
sahilmgandhi 18:6a4db94011d3 198 MXC_PWRSEQ->reg1 &= ~MXC_F_PWRSEQ_REG1_PWR_MBUS_GATE;
sahilmgandhi 18:6a4db94011d3 199
sahilmgandhi 18:6a4db94011d3 200 usb_wakeup();
sahilmgandhi 18:6a4db94011d3 201
sahilmgandhi 18:6a4db94011d3 202 // Clear power sequencer event flags (write-1-to-clear)
sahilmgandhi 18:6a4db94011d3 203 // RTC and GPIO flags are cleared in their interrupts handlers
sahilmgandhi 18:6a4db94011d3 204 // NOTE: We are ignoring all of these potential wake up types
sahilmgandhi 18:6a4db94011d3 205 MXC_PWRSEQ->flags = (MXC_F_PWRSEQ_FLAGS_PWR_POWER_FAIL |
sahilmgandhi 18:6a4db94011d3 206 MXC_F_PWRSEQ_FLAGS_PWR_BOOT_FAIL |
sahilmgandhi 18:6a4db94011d3 207 MXC_F_PWRSEQ_FLAGS_PWR_FLASH_DISCHARGE |
sahilmgandhi 18:6a4db94011d3 208 MXC_F_PWRSEQ_FLAGS_PWR_VDD12_RST_BAD |
sahilmgandhi 18:6a4db94011d3 209 MXC_F_PWRSEQ_FLAGS_PWR_VDD18_RST_BAD |
sahilmgandhi 18:6a4db94011d3 210 MXC_F_PWRSEQ_FLAGS_PWR_VRTC_RST_BAD |
sahilmgandhi 18:6a4db94011d3 211 MXC_F_PWRSEQ_FLAGS_PWR_VDDB_RST_BAD |
sahilmgandhi 18:6a4db94011d3 212 MXC_F_PWRSEQ_FLAGS_PWR_TVDD12_RST_BAD |
sahilmgandhi 18:6a4db94011d3 213 MXC_F_PWRSEQ_FLAGS_PWR_POR18Z_FAIL_LATCH |
sahilmgandhi 18:6a4db94011d3 214 MXC_F_PWRSEQ_FLAGS_PWR_USB_PLUG_WAKEUP |
sahilmgandhi 18:6a4db94011d3 215 MXC_F_PWRSEQ_FLAGS_PWR_USB_REMOVE_WAKEUP |
sahilmgandhi 18:6a4db94011d3 216 MXC_F_PWRSEQ_FLAGS_PWR_TVDD12_BAD);
sahilmgandhi 18:6a4db94011d3 217
sahilmgandhi 18:6a4db94011d3 218 __enable_irq();
sahilmgandhi 18:6a4db94011d3 219 }