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Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_Maxim/TARGET_MAX32610/spi_api.c@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /*******************************************************************************
sahilmgandhi 18:6a4db94011d3 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Permission is hereby granted, free of charge, to any person obtaining a
sahilmgandhi 18:6a4db94011d3 5 * copy of this software and associated documentation files (the "Software"),
sahilmgandhi 18:6a4db94011d3 6 * to deal in the Software without restriction, including without limitation
sahilmgandhi 18:6a4db94011d3 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
sahilmgandhi 18:6a4db94011d3 8 * and/or sell copies of the Software, and to permit persons to whom the
sahilmgandhi 18:6a4db94011d3 9 * Software is furnished to do so, subject to the following conditions:
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * The above copyright notice and this permission notice shall be included
sahilmgandhi 18:6a4db94011d3 12 * in all copies or substantial portions of the Software.
sahilmgandhi 18:6a4db94011d3 13 *
sahilmgandhi 18:6a4db94011d3 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
sahilmgandhi 18:6a4db94011d3 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
sahilmgandhi 18:6a4db94011d3 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
sahilmgandhi 18:6a4db94011d3 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
sahilmgandhi 18:6a4db94011d3 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
sahilmgandhi 18:6a4db94011d3 20 * OTHER DEALINGS IN THE SOFTWARE.
sahilmgandhi 18:6a4db94011d3 21 *
sahilmgandhi 18:6a4db94011d3 22 * Except as contained in this notice, the name of Maxim Integrated
sahilmgandhi 18:6a4db94011d3 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
sahilmgandhi 18:6a4db94011d3 24 * Products, Inc. Branding Policy.
sahilmgandhi 18:6a4db94011d3 25 *
sahilmgandhi 18:6a4db94011d3 26 * The mere transfer of this software does not imply any licenses
sahilmgandhi 18:6a4db94011d3 27 * of trade secrets, proprietary technology, copyrights, patents,
sahilmgandhi 18:6a4db94011d3 28 * trademarks, maskwork rights, or any other form of intellectual
sahilmgandhi 18:6a4db94011d3 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
sahilmgandhi 18:6a4db94011d3 30 * ownership rights.
sahilmgandhi 18:6a4db94011d3 31 *******************************************************************************
sahilmgandhi 18:6a4db94011d3 32 */
sahilmgandhi 18:6a4db94011d3 33
sahilmgandhi 18:6a4db94011d3 34 #include <string.h>
sahilmgandhi 18:6a4db94011d3 35 #include "mbed_assert.h"
sahilmgandhi 18:6a4db94011d3 36 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 37 #include "spi_api.h"
sahilmgandhi 18:6a4db94011d3 38 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 39 #include "ioman_regs.h"
sahilmgandhi 18:6a4db94011d3 40 #include "clkman_regs.h"
sahilmgandhi 18:6a4db94011d3 41 #include "PeripheralPins.h"
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 #define DEFAULT_CHAR 8
sahilmgandhi 18:6a4db94011d3 44 #define DEFAULT_MODE 0
sahilmgandhi 18:6a4db94011d3 45 #define DEFAULT_FREQ 1000000
sahilmgandhi 18:6a4db94011d3 46
sahilmgandhi 18:6a4db94011d3 47 // Formatting settings
sahilmgandhi 18:6a4db94011d3 48 static int spi_bits;
sahilmgandhi 18:6a4db94011d3 49
sahilmgandhi 18:6a4db94011d3 50 //******************************************************************************
sahilmgandhi 18:6a4db94011d3 51 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
sahilmgandhi 18:6a4db94011d3 52 {
sahilmgandhi 18:6a4db94011d3 53 // Make sure pins are pointing to the same SPI instance
sahilmgandhi 18:6a4db94011d3 54 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
sahilmgandhi 18:6a4db94011d3 55 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
sahilmgandhi 18:6a4db94011d3 56 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
sahilmgandhi 18:6a4db94011d3 57 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
sahilmgandhi 18:6a4db94011d3 58
sahilmgandhi 18:6a4db94011d3 59 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
sahilmgandhi 18:6a4db94011d3 60 SPIName spi_cntl;
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 // Give the application the option to manually control Slave Select
sahilmgandhi 18:6a4db94011d3 63 if((SPIName)spi_ssel != (SPIName)NC) {
sahilmgandhi 18:6a4db94011d3 64 spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
sahilmgandhi 18:6a4db94011d3 65 } else {
sahilmgandhi 18:6a4db94011d3 66 spi_cntl = spi_sclk;
sahilmgandhi 18:6a4db94011d3 67 }
sahilmgandhi 18:6a4db94011d3 68
sahilmgandhi 18:6a4db94011d3 69 SPIName spi = (SPIName)pinmap_merge(spi_data, spi_cntl);
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71 MBED_ASSERT((SPIName)spi != (SPIName)NC);
sahilmgandhi 18:6a4db94011d3 72
sahilmgandhi 18:6a4db94011d3 73 // Set the obj pointer to the proper SPI Instance
sahilmgandhi 18:6a4db94011d3 74 obj->spi = (mxc_spi_regs_t*)spi;
sahilmgandhi 18:6a4db94011d3 75
sahilmgandhi 18:6a4db94011d3 76 // Set the SPI index and FIFOs
sahilmgandhi 18:6a4db94011d3 77 obj->index = MXC_SPI_BASE_TO_INSTANCE(obj->spi);
sahilmgandhi 18:6a4db94011d3 78 obj->rxfifo = MXC_SPI_GET_RXFIFO(obj->index);
sahilmgandhi 18:6a4db94011d3 79 obj->txfifo = MXC_SPI_GET_TXFIFO(obj->index);
sahilmgandhi 18:6a4db94011d3 80
sahilmgandhi 18:6a4db94011d3 81 // Configure the pins
sahilmgandhi 18:6a4db94011d3 82 pinmap_pinout(mosi, PinMap_SPI_MOSI);
sahilmgandhi 18:6a4db94011d3 83 pinmap_pinout(miso, PinMap_SPI_MISO);
sahilmgandhi 18:6a4db94011d3 84 pinmap_pinout(sclk, PinMap_SPI_SCLK);
sahilmgandhi 18:6a4db94011d3 85 pinmap_pinout(ssel, PinMap_SPI_SSEL);
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 // Enable SPI and FIFOs
sahilmgandhi 18:6a4db94011d3 88 obj->spi->gen_ctrl = (MXC_F_SPI_GEN_CTRL_SPI_MSTR_EN |
sahilmgandhi 18:6a4db94011d3 89 MXC_F_SPI_GEN_CTRL_TX_FIFO_EN |
sahilmgandhi 18:6a4db94011d3 90 MXC_F_SPI_GEN_CTRL_RX_FIFO_EN );
sahilmgandhi 18:6a4db94011d3 91 }
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 //******************************************************************************
sahilmgandhi 18:6a4db94011d3 94 void spi_format(spi_t *obj, int bits, int mode, int slave)
sahilmgandhi 18:6a4db94011d3 95 {
sahilmgandhi 18:6a4db94011d3 96 // Check the validity of the inputs
sahilmgandhi 18:6a4db94011d3 97 MBED_ASSERT(((bits >= 1) && (bits <= 32)) && ((mode >= 0) && (mode <= 3)));
sahilmgandhi 18:6a4db94011d3 98
sahilmgandhi 18:6a4db94011d3 99 // Only supports master mode
sahilmgandhi 18:6a4db94011d3 100 MBED_ASSERT(!slave);
sahilmgandhi 18:6a4db94011d3 101
sahilmgandhi 18:6a4db94011d3 102 // Save formatting data
sahilmgandhi 18:6a4db94011d3 103 spi_bits = bits;
sahilmgandhi 18:6a4db94011d3 104
sahilmgandhi 18:6a4db94011d3 105 // Set the mode
sahilmgandhi 18:6a4db94011d3 106 obj->spi->mstr_cfg &= ~(MXC_F_SPI_MSTR_CFG_SPI_MODE);
sahilmgandhi 18:6a4db94011d3 107 obj->spi->mstr_cfg |= (mode << MXC_F_SPI_MSTR_CFG_SPI_MODE_POS);
sahilmgandhi 18:6a4db94011d3 108 }
sahilmgandhi 18:6a4db94011d3 109
sahilmgandhi 18:6a4db94011d3 110 //******************************************************************************
sahilmgandhi 18:6a4db94011d3 111 void spi_frequency(spi_t *obj, int hz)
sahilmgandhi 18:6a4db94011d3 112 {
sahilmgandhi 18:6a4db94011d3 113 // Maximum frequency is half the system frequency
sahilmgandhi 18:6a4db94011d3 114 MBED_ASSERT((unsigned int)hz <= (SystemCoreClock / 2));
sahilmgandhi 18:6a4db94011d3 115 unsigned clocks = ((SystemCoreClock/2)/(hz));
sahilmgandhi 18:6a4db94011d3 116
sahilmgandhi 18:6a4db94011d3 117 // Figure out the divider ratio
sahilmgandhi 18:6a4db94011d3 118 int clk_div = 1;
sahilmgandhi 18:6a4db94011d3 119 while(clk_div < 10) {
sahilmgandhi 18:6a4db94011d3 120 if(clocks < 0x10) {
sahilmgandhi 18:6a4db94011d3 121 break;
sahilmgandhi 18:6a4db94011d3 122 }
sahilmgandhi 18:6a4db94011d3 123 clk_div++;
sahilmgandhi 18:6a4db94011d3 124 clocks = clocks >> 1;
sahilmgandhi 18:6a4db94011d3 125 }
sahilmgandhi 18:6a4db94011d3 126
sahilmgandhi 18:6a4db94011d3 127 // Turn on the SPI clock
sahilmgandhi 18:6a4db94011d3 128 if(obj->index == 0) {
sahilmgandhi 18:6a4db94011d3 129 MXC_CLKMAN->clk_ctrl_3_spi0 = clk_div;
sahilmgandhi 18:6a4db94011d3 130 } else if(obj->index == 1) {
sahilmgandhi 18:6a4db94011d3 131 MXC_CLKMAN->clk_ctrl_4_spi1 = clk_div;
sahilmgandhi 18:6a4db94011d3 132 } else if(obj->index == 2) {
sahilmgandhi 18:6a4db94011d3 133 MXC_CLKMAN->clk_ctrl_5_spi2 = clk_div;
sahilmgandhi 18:6a4db94011d3 134 } else {
sahilmgandhi 18:6a4db94011d3 135 MBED_ASSERT(0);
sahilmgandhi 18:6a4db94011d3 136 }
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 // Set the number of clocks to hold sclk high and low
sahilmgandhi 18:6a4db94011d3 139 MXC_SET_FIELD(&obj->spi->mstr_cfg, (MXC_F_SPI_MSTR_CFG_SCK_HI_CLK | MXC_F_SPI_MSTR_CFG_SCK_LO_CLK),
sahilmgandhi 18:6a4db94011d3 140 ((clocks << MXC_F_SPI_MSTR_CFG_SCK_HI_CLK_POS) | (clocks << MXC_F_SPI_MSTR_CFG_SCK_LO_CLK_POS)));
sahilmgandhi 18:6a4db94011d3 141 }
sahilmgandhi 18:6a4db94011d3 142
sahilmgandhi 18:6a4db94011d3 143 //******************************************************************************
sahilmgandhi 18:6a4db94011d3 144 int spi_master_write(spi_t *obj, int value)
sahilmgandhi 18:6a4db94011d3 145 {
sahilmgandhi 18:6a4db94011d3 146 int bits = spi_bits;
sahilmgandhi 18:6a4db94011d3 147 if(spi_bits == 32) {
sahilmgandhi 18:6a4db94011d3 148 bits = 0;
sahilmgandhi 18:6a4db94011d3 149 }
sahilmgandhi 18:6a4db94011d3 150 // Create the header
sahilmgandhi 18:6a4db94011d3 151 uint16_t header = ((0x3 << MXC_F_SPI_FIFO_DIR_POS ) | // TX and RX
sahilmgandhi 18:6a4db94011d3 152 (0x0 << MXC_F_SPI_FIFO_UNIT_POS) | // Send bits
sahilmgandhi 18:6a4db94011d3 153 (bits << MXC_F_SPI_FIFO_SIZE_POS) | // Number of units
sahilmgandhi 18:6a4db94011d3 154 (0x1 << MXC_F_SPI_FIFO_DASS_POS)); // Deassert SS
sahilmgandhi 18:6a4db94011d3 155
sahilmgandhi 18:6a4db94011d3 156 // Send the message header
sahilmgandhi 18:6a4db94011d3 157 obj->txfifo->txfifo_16 = header;
sahilmgandhi 18:6a4db94011d3 158
sahilmgandhi 18:6a4db94011d3 159 // Send the data
sahilmgandhi 18:6a4db94011d3 160 if(spi_bits < 17) {
sahilmgandhi 18:6a4db94011d3 161 obj->txfifo->txfifo_16 = (uint16_t)value;
sahilmgandhi 18:6a4db94011d3 162 } else {
sahilmgandhi 18:6a4db94011d3 163 obj->txfifo->txfifo_32 = (uint32_t)value;
sahilmgandhi 18:6a4db94011d3 164 }
sahilmgandhi 18:6a4db94011d3 165
sahilmgandhi 18:6a4db94011d3 166 // Get the data
sahilmgandhi 18:6a4db94011d3 167 bits = spi_bits;
sahilmgandhi 18:6a4db94011d3 168 int result = 0;
sahilmgandhi 18:6a4db94011d3 169 int i = 0;
sahilmgandhi 18:6a4db94011d3 170 while(bits > 0) {
sahilmgandhi 18:6a4db94011d3 171 // Wait for data
sahilmgandhi 18:6a4db94011d3 172 while(((obj->spi->fifo_ctrl & MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED)
sahilmgandhi 18:6a4db94011d3 173 >> MXC_F_SPI_FIFO_CTRL_RX_FIFO_USED_POS) < 1) {}
sahilmgandhi 18:6a4db94011d3 174
sahilmgandhi 18:6a4db94011d3 175 result |= (obj->rxfifo->rxfifo_8 << (i++*8));
sahilmgandhi 18:6a4db94011d3 176 bits-=8;
sahilmgandhi 18:6a4db94011d3 177 }
sahilmgandhi 18:6a4db94011d3 178
sahilmgandhi 18:6a4db94011d3 179 return result;
sahilmgandhi 18:6a4db94011d3 180 }
sahilmgandhi 18:6a4db94011d3 181
sahilmgandhi 18:6a4db94011d3 182 //******************************************************************************
sahilmgandhi 18:6a4db94011d3 183 int spi_busy(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 184 {
sahilmgandhi 18:6a4db94011d3 185 return !(obj->spi->intfl & MXC_F_SPI_INTFL_TX_READY);
sahilmgandhi 18:6a4db94011d3 186 }