MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NXP/TARGET_LPC43XX/serial_api.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2013 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 *
sahilmgandhi 18:6a4db94011d3 16 * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
sahilmgandhi 18:6a4db94011d3 17 */
sahilmgandhi 18:6a4db94011d3 18 // math.h required for floating point operations for baud rate calculation
sahilmgandhi 18:6a4db94011d3 19 #include <math.h>
sahilmgandhi 18:6a4db94011d3 20 #include <string.h>
sahilmgandhi 18:6a4db94011d3 21 #include <stdlib.h>
sahilmgandhi 18:6a4db94011d3 22
sahilmgandhi 18:6a4db94011d3 23 #include "serial_api.h"
sahilmgandhi 18:6a4db94011d3 24 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 25 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 26 #include "mbed_error.h"
sahilmgandhi 18:6a4db94011d3 27 #include "gpio_api.h"
sahilmgandhi 18:6a4db94011d3 28
sahilmgandhi 18:6a4db94011d3 29 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 30 * INITIALIZATION
sahilmgandhi 18:6a4db94011d3 31 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 32 #define UART_NUM 4
sahilmgandhi 18:6a4db94011d3 33
sahilmgandhi 18:6a4db94011d3 34 // SCU mode for UART pins
sahilmgandhi 18:6a4db94011d3 35 #define SCU_PINIO_UART_TX SCU_MODE_PULLDOWN
sahilmgandhi 18:6a4db94011d3 36 #define SCU_PINIO_UART_RX SCU_PINIO_PULLNONE
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 static const PinMap PinMap_UART_TX[] = {
sahilmgandhi 18:6a4db94011d3 39 {P1_13, UART_1, (SCU_PINIO_UART_TX | 1)},
sahilmgandhi 18:6a4db94011d3 40 {P1_15, UART_2, (SCU_PINIO_UART_TX | 1)},
sahilmgandhi 18:6a4db94011d3 41 {P2_0, UART_0, (SCU_PINIO_UART_TX | 1)},
sahilmgandhi 18:6a4db94011d3 42 {P2_3, UART_3, (SCU_PINIO_UART_TX | 2)},
sahilmgandhi 18:6a4db94011d3 43 {P2_10, UART_2, (SCU_PINIO_UART_TX | 2)},
sahilmgandhi 18:6a4db94011d3 44 {P3_4, UART_1, (SCU_PINIO_UART_TX | 4)},
sahilmgandhi 18:6a4db94011d3 45 {P4_1, UART_3, (SCU_PINIO_UART_TX | 6)},
sahilmgandhi 18:6a4db94011d3 46 {P5_6, UART_1, (SCU_PINIO_UART_TX | 4)},
sahilmgandhi 18:6a4db94011d3 47 {P6_4, UART_0, (SCU_PINIO_UART_TX | 2)},
sahilmgandhi 18:6a4db94011d3 48 {P7_1, UART_2, (SCU_PINIO_UART_TX | 6)},
sahilmgandhi 18:6a4db94011d3 49 {P9_3, UART_3, (SCU_PINIO_UART_TX | 7)},
sahilmgandhi 18:6a4db94011d3 50 {P9_5, UART_0, (SCU_PINIO_UART_TX | 7)},
sahilmgandhi 18:6a4db94011d3 51 {PA_1, UART_2, (SCU_PINIO_UART_TX | 3)},
sahilmgandhi 18:6a4db94011d3 52 {PC_13, UART_1, (SCU_PINIO_UART_TX | 2)},
sahilmgandhi 18:6a4db94011d3 53 {PE_11, UART_1, (SCU_PINIO_UART_TX | 2)},
sahilmgandhi 18:6a4db94011d3 54 {PF_2, UART_3, (SCU_PINIO_UART_TX | 1)},
sahilmgandhi 18:6a4db94011d3 55 {PF_10, UART_0, (SCU_PINIO_UART_TX | 1)},
sahilmgandhi 18:6a4db94011d3 56 {NC, NC, 0}
sahilmgandhi 18:6a4db94011d3 57 };
sahilmgandhi 18:6a4db94011d3 58
sahilmgandhi 18:6a4db94011d3 59 static const PinMap PinMap_UART_RX[] = {
sahilmgandhi 18:6a4db94011d3 60 {P1_14, UART_1, (SCU_PINIO_UART_RX | 1)},
sahilmgandhi 18:6a4db94011d3 61 {P1_16, UART_2, (SCU_PINIO_UART_RX | 1)},
sahilmgandhi 18:6a4db94011d3 62 {P2_1, UART_0, (SCU_PINIO_UART_RX | 1)},
sahilmgandhi 18:6a4db94011d3 63 {P2_4, UART_3, (SCU_PINIO_UART_RX | 2)},
sahilmgandhi 18:6a4db94011d3 64 {P2_11, UART_2, (SCU_PINIO_UART_RX | 2)},
sahilmgandhi 18:6a4db94011d3 65 {P3_5, UART_1, (SCU_PINIO_UART_RX | 4)},
sahilmgandhi 18:6a4db94011d3 66 {P4_2, UART_3, (SCU_PINIO_UART_RX | 6)},
sahilmgandhi 18:6a4db94011d3 67 {P5_7, UART_1, (SCU_PINIO_UART_RX | 4)},
sahilmgandhi 18:6a4db94011d3 68 {P6_5, UART_0, (SCU_PINIO_UART_RX | 2)},
sahilmgandhi 18:6a4db94011d3 69 {P7_2, UART_2, (SCU_PINIO_UART_RX | 6)},
sahilmgandhi 18:6a4db94011d3 70 {P9_4, UART_3, (SCU_PINIO_UART_RX | 7)},
sahilmgandhi 18:6a4db94011d3 71 {P9_6, UART_0, (SCU_PINIO_UART_RX | 7)},
sahilmgandhi 18:6a4db94011d3 72 {PA_2, UART_2, (SCU_PINIO_UART_RX | 3)},
sahilmgandhi 18:6a4db94011d3 73 {PC_14, UART_1, (SCU_PINIO_UART_RX | 2)},
sahilmgandhi 18:6a4db94011d3 74 {PE_12, UART_1, (SCU_PINIO_UART_RX | 2)},
sahilmgandhi 18:6a4db94011d3 75 {PF_3, UART_3, (SCU_PINIO_UART_RX | 1)},
sahilmgandhi 18:6a4db94011d3 76 {PF_11, UART_0, (SCU_PINIO_UART_RX | 1)},
sahilmgandhi 18:6a4db94011d3 77 {NC, NC, 0}
sahilmgandhi 18:6a4db94011d3 78 };
sahilmgandhi 18:6a4db94011d3 79
sahilmgandhi 18:6a4db94011d3 80 #if (DEVICE_SERIAL_FC)
sahilmgandhi 18:6a4db94011d3 81 // RTS/CTS PinMap for flow control
sahilmgandhi 18:6a4db94011d3 82 static const PinMap PinMap_UART_RTS[] = {
sahilmgandhi 18:6a4db94011d3 83 {P1_9, UART_1, (SCU_PINIO_FAST | 1)},
sahilmgandhi 18:6a4db94011d3 84 {P5_2, UART_1, (SCU_PINIO_FAST | 4)},
sahilmgandhi 18:6a4db94011d3 85 {PC_3, UART_1, (SCU_PINIO_FAST | 2)},
sahilmgandhi 18:6a4db94011d3 86 {PE_5, UART_1, (SCU_PINIO_FAST | 2)},
sahilmgandhi 18:6a4db94011d3 87 {NC, NC, 0}
sahilmgandhi 18:6a4db94011d3 88 };
sahilmgandhi 18:6a4db94011d3 89
sahilmgandhi 18:6a4db94011d3 90 static const PinMap PinMap_UART_CTS[] = {
sahilmgandhi 18:6a4db94011d3 91 {P1_11, UART_1, (SCU_PINIO_FAST | 1)},
sahilmgandhi 18:6a4db94011d3 92 {P5_4, UART_1, (SCU_PINIO_FAST | 4),
sahilmgandhi 18:6a4db94011d3 93 {PC_2, UART_1, (SCU_PINIO_FAST | 2)},
sahilmgandhi 18:6a4db94011d3 94 {PE_7, UART_1, (SCU_PINIO_FAST | 2)},
sahilmgandhi 18:6a4db94011d3 95 {NC, NC, 0}
sahilmgandhi 18:6a4db94011d3 96 };
sahilmgandhi 18:6a4db94011d3 97 #endif
sahilmgandhi 18:6a4db94011d3 98
sahilmgandhi 18:6a4db94011d3 99 static uart_irq_handler irq_handler;
sahilmgandhi 18:6a4db94011d3 100
sahilmgandhi 18:6a4db94011d3 101 int stdio_uart_inited = 0;
sahilmgandhi 18:6a4db94011d3 102 serial_t stdio_uart;
sahilmgandhi 18:6a4db94011d3 103
sahilmgandhi 18:6a4db94011d3 104 struct serial_global_data_s {
sahilmgandhi 18:6a4db94011d3 105 uint32_t serial_irq_id;
sahilmgandhi 18:6a4db94011d3 106 gpio_t sw_rts, sw_cts;
sahilmgandhi 18:6a4db94011d3 107 uint8_t count, rx_irq_set_flow, rx_irq_set_api;
sahilmgandhi 18:6a4db94011d3 108 };
sahilmgandhi 18:6a4db94011d3 109
sahilmgandhi 18:6a4db94011d3 110 static struct serial_global_data_s uart_data[UART_NUM];
sahilmgandhi 18:6a4db94011d3 111
sahilmgandhi 18:6a4db94011d3 112 void serial_init(serial_t *obj, PinName tx, PinName rx) {
sahilmgandhi 18:6a4db94011d3 113 int is_stdio_uart = 0;
sahilmgandhi 18:6a4db94011d3 114
sahilmgandhi 18:6a4db94011d3 115 // determine the UART to use
sahilmgandhi 18:6a4db94011d3 116 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 117 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
sahilmgandhi 18:6a4db94011d3 118 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
sahilmgandhi 18:6a4db94011d3 119 if ((int)uart == NC) {
sahilmgandhi 18:6a4db94011d3 120 error("Serial pinout mapping failed");
sahilmgandhi 18:6a4db94011d3 121 }
sahilmgandhi 18:6a4db94011d3 122
sahilmgandhi 18:6a4db94011d3 123 obj->uart = (LPC_USART_T *)uart;
sahilmgandhi 18:6a4db94011d3 124
sahilmgandhi 18:6a4db94011d3 125 // enable fifos and default rx trigger level
sahilmgandhi 18:6a4db94011d3 126 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
sahilmgandhi 18:6a4db94011d3 127 | 0 << 1 // Rx Fifo Reset
sahilmgandhi 18:6a4db94011d3 128 | 0 << 2 // Tx Fifo Reset
sahilmgandhi 18:6a4db94011d3 129 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
sahilmgandhi 18:6a4db94011d3 130
sahilmgandhi 18:6a4db94011d3 131 // disable irqs
sahilmgandhi 18:6a4db94011d3 132 obj->uart->IER = 0 << 0 // Rx Data available irq enable
sahilmgandhi 18:6a4db94011d3 133 | 0 << 1 // Tx Fifo empty irq enable
sahilmgandhi 18:6a4db94011d3 134 | 0 << 2; // Rx Line Status irq enable
sahilmgandhi 18:6a4db94011d3 135
sahilmgandhi 18:6a4db94011d3 136 // set default baud rate and format
sahilmgandhi 18:6a4db94011d3 137 serial_baud (obj, 9600);
sahilmgandhi 18:6a4db94011d3 138 serial_format(obj, 8, ParityNone, 1);
sahilmgandhi 18:6a4db94011d3 139
sahilmgandhi 18:6a4db94011d3 140 // pinout the chosen uart
sahilmgandhi 18:6a4db94011d3 141 pinmap_pinout(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 142 pinmap_pinout(rx, PinMap_UART_RX);
sahilmgandhi 18:6a4db94011d3 143
sahilmgandhi 18:6a4db94011d3 144 // set rx/tx pins in PullUp mode
sahilmgandhi 18:6a4db94011d3 145 if (tx != NC) {
sahilmgandhi 18:6a4db94011d3 146 pin_mode(tx, PullUp);
sahilmgandhi 18:6a4db94011d3 147 }
sahilmgandhi 18:6a4db94011d3 148 if (rx != NC) {
sahilmgandhi 18:6a4db94011d3 149 pin_mode(rx, PullUp);
sahilmgandhi 18:6a4db94011d3 150 }
sahilmgandhi 18:6a4db94011d3 151
sahilmgandhi 18:6a4db94011d3 152 switch (uart) {
sahilmgandhi 18:6a4db94011d3 153 case UART_0: obj->index = 0; break;
sahilmgandhi 18:6a4db94011d3 154 case UART_1: obj->index = 1; break;
sahilmgandhi 18:6a4db94011d3 155 case UART_2: obj->index = 2; break;
sahilmgandhi 18:6a4db94011d3 156 case UART_3: obj->index = 3; break;
sahilmgandhi 18:6a4db94011d3 157 }
sahilmgandhi 18:6a4db94011d3 158 uart_data[obj->index].sw_rts.pin = NC;
sahilmgandhi 18:6a4db94011d3 159 uart_data[obj->index].sw_cts.pin = NC;
sahilmgandhi 18:6a4db94011d3 160 serial_set_flow_control(obj, FlowControlNone, NC, NC);
sahilmgandhi 18:6a4db94011d3 161
sahilmgandhi 18:6a4db94011d3 162 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
sahilmgandhi 18:6a4db94011d3 163
sahilmgandhi 18:6a4db94011d3 164 if (is_stdio_uart) {
sahilmgandhi 18:6a4db94011d3 165 stdio_uart_inited = 1;
sahilmgandhi 18:6a4db94011d3 166 serial_baud (obj, STDIO_BAUD);
sahilmgandhi 18:6a4db94011d3 167 memcpy(&stdio_uart, obj, sizeof(serial_t));
sahilmgandhi 18:6a4db94011d3 168 }
sahilmgandhi 18:6a4db94011d3 169 }
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171 void serial_free(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 172 uart_data[obj->index].serial_irq_id = 0;
sahilmgandhi 18:6a4db94011d3 173 }
sahilmgandhi 18:6a4db94011d3 174
sahilmgandhi 18:6a4db94011d3 175 // serial_baud
sahilmgandhi 18:6a4db94011d3 176 // set the baud rate, taking in to account the current SystemFrequency
sahilmgandhi 18:6a4db94011d3 177 void serial_baud(serial_t *obj, int baudrate) {
sahilmgandhi 18:6a4db94011d3 178 uint32_t PCLK = SystemCoreClock;
sahilmgandhi 18:6a4db94011d3 179
sahilmgandhi 18:6a4db94011d3 180 // First we check to see if the basic divide with no DivAddVal/MulVal
sahilmgandhi 18:6a4db94011d3 181 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
sahilmgandhi 18:6a4db94011d3 182 // MulVal = 1. Otherwise, we search the valid ratio value range to find
sahilmgandhi 18:6a4db94011d3 183 // the closest match. This could be more elegant, using search methods
sahilmgandhi 18:6a4db94011d3 184 // and/or lookup tables, but the brute force method is not that much
sahilmgandhi 18:6a4db94011d3 185 // slower, and is more maintainable.
sahilmgandhi 18:6a4db94011d3 186 uint16_t DL = PCLK / (16 * baudrate);
sahilmgandhi 18:6a4db94011d3 187
sahilmgandhi 18:6a4db94011d3 188 uint8_t DivAddVal = 0;
sahilmgandhi 18:6a4db94011d3 189 uint8_t MulVal = 1;
sahilmgandhi 18:6a4db94011d3 190 int hit = 0;
sahilmgandhi 18:6a4db94011d3 191 uint16_t dlv;
sahilmgandhi 18:6a4db94011d3 192 uint8_t mv, dav;
sahilmgandhi 18:6a4db94011d3 193 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
sahilmgandhi 18:6a4db94011d3 194 int err_best = baudrate, b;
sahilmgandhi 18:6a4db94011d3 195 for (mv = 1; mv < 16 && !hit; mv++)
sahilmgandhi 18:6a4db94011d3 196 {
sahilmgandhi 18:6a4db94011d3 197 for (dav = 0; dav < mv; dav++)
sahilmgandhi 18:6a4db94011d3 198 {
sahilmgandhi 18:6a4db94011d3 199 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
sahilmgandhi 18:6a4db94011d3 200 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
sahilmgandhi 18:6a4db94011d3 201 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
sahilmgandhi 18:6a4db94011d3 202 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
sahilmgandhi 18:6a4db94011d3 203 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
sahilmgandhi 18:6a4db94011d3 204
sahilmgandhi 18:6a4db94011d3 205 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
sahilmgandhi 18:6a4db94011d3 206 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
sahilmgandhi 18:6a4db94011d3 207 else // 2 bits headroom, use more precision
sahilmgandhi 18:6a4db94011d3 208 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
sahilmgandhi 18:6a4db94011d3 209
sahilmgandhi 18:6a4db94011d3 210 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
sahilmgandhi 18:6a4db94011d3 211 if (dlv == 0)
sahilmgandhi 18:6a4db94011d3 212 dlv = 1;
sahilmgandhi 18:6a4db94011d3 213
sahilmgandhi 18:6a4db94011d3 214 // datasheet says if dav > 0 then DL must be >= 2
sahilmgandhi 18:6a4db94011d3 215 if ((dav > 0) && (dlv < 2))
sahilmgandhi 18:6a4db94011d3 216 dlv = 2;
sahilmgandhi 18:6a4db94011d3 217
sahilmgandhi 18:6a4db94011d3 218 // integer rearrangement of the baudrate equation (with rounding)
sahilmgandhi 18:6a4db94011d3 219 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
sahilmgandhi 18:6a4db94011d3 220
sahilmgandhi 18:6a4db94011d3 221 // check to see how we went
sahilmgandhi 18:6a4db94011d3 222 b = abs(b - baudrate);
sahilmgandhi 18:6a4db94011d3 223 if (b < err_best)
sahilmgandhi 18:6a4db94011d3 224 {
sahilmgandhi 18:6a4db94011d3 225 err_best = b;
sahilmgandhi 18:6a4db94011d3 226
sahilmgandhi 18:6a4db94011d3 227 DL = dlv;
sahilmgandhi 18:6a4db94011d3 228 MulVal = mv;
sahilmgandhi 18:6a4db94011d3 229 DivAddVal = dav;
sahilmgandhi 18:6a4db94011d3 230
sahilmgandhi 18:6a4db94011d3 231 if (b == baudrate)
sahilmgandhi 18:6a4db94011d3 232 {
sahilmgandhi 18:6a4db94011d3 233 hit = 1;
sahilmgandhi 18:6a4db94011d3 234 break;
sahilmgandhi 18:6a4db94011d3 235 }
sahilmgandhi 18:6a4db94011d3 236 }
sahilmgandhi 18:6a4db94011d3 237 }
sahilmgandhi 18:6a4db94011d3 238 }
sahilmgandhi 18:6a4db94011d3 239 }
sahilmgandhi 18:6a4db94011d3 240
sahilmgandhi 18:6a4db94011d3 241 // set LCR[DLAB] to enable writing to divider registers
sahilmgandhi 18:6a4db94011d3 242 obj->uart->LCR |= (1 << 7);
sahilmgandhi 18:6a4db94011d3 243
sahilmgandhi 18:6a4db94011d3 244 // set divider values
sahilmgandhi 18:6a4db94011d3 245 obj->uart->DLM = (DL >> 8) & 0xFF;
sahilmgandhi 18:6a4db94011d3 246 obj->uart->DLL = (DL >> 0) & 0xFF;
sahilmgandhi 18:6a4db94011d3 247 obj->uart->FDR = (uint32_t) DivAddVal << 0
sahilmgandhi 18:6a4db94011d3 248 | (uint32_t) MulVal << 4;
sahilmgandhi 18:6a4db94011d3 249
sahilmgandhi 18:6a4db94011d3 250 // clear LCR[DLAB]
sahilmgandhi 18:6a4db94011d3 251 obj->uart->LCR &= ~(1 << 7);
sahilmgandhi 18:6a4db94011d3 252 }
sahilmgandhi 18:6a4db94011d3 253
sahilmgandhi 18:6a4db94011d3 254 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
sahilmgandhi 18:6a4db94011d3 255 // 0: 1 stop bits, 1: 2 stop bits
sahilmgandhi 18:6a4db94011d3 256 if (stop_bits != 1 && stop_bits != 2) {
sahilmgandhi 18:6a4db94011d3 257 error("Invalid stop bits specified");
sahilmgandhi 18:6a4db94011d3 258 }
sahilmgandhi 18:6a4db94011d3 259 stop_bits -= 1;
sahilmgandhi 18:6a4db94011d3 260
sahilmgandhi 18:6a4db94011d3 261 // 0: 5 data bits ... 3: 8 data bits
sahilmgandhi 18:6a4db94011d3 262 if (data_bits < 5 || data_bits > 8) {
sahilmgandhi 18:6a4db94011d3 263 error("Invalid number of bits (%d) in serial format, should be 5..8", data_bits);
sahilmgandhi 18:6a4db94011d3 264 }
sahilmgandhi 18:6a4db94011d3 265 data_bits -= 5;
sahilmgandhi 18:6a4db94011d3 266
sahilmgandhi 18:6a4db94011d3 267 int parity_enable, parity_select;
sahilmgandhi 18:6a4db94011d3 268 switch (parity) {
sahilmgandhi 18:6a4db94011d3 269 case ParityNone: parity_enable = 0; parity_select = 0; break;
sahilmgandhi 18:6a4db94011d3 270 case ParityOdd : parity_enable = 1; parity_select = 0; break;
sahilmgandhi 18:6a4db94011d3 271 case ParityEven: parity_enable = 1; parity_select = 1; break;
sahilmgandhi 18:6a4db94011d3 272 case ParityForced1: parity_enable = 1; parity_select = 2; break;
sahilmgandhi 18:6a4db94011d3 273 case ParityForced0: parity_enable = 1; parity_select = 3; break;
sahilmgandhi 18:6a4db94011d3 274 default:
sahilmgandhi 18:6a4db94011d3 275 error("Invalid serial parity setting");
sahilmgandhi 18:6a4db94011d3 276 return;
sahilmgandhi 18:6a4db94011d3 277 }
sahilmgandhi 18:6a4db94011d3 278
sahilmgandhi 18:6a4db94011d3 279 obj->uart->LCR = data_bits << 0
sahilmgandhi 18:6a4db94011d3 280 | stop_bits << 2
sahilmgandhi 18:6a4db94011d3 281 | parity_enable << 3
sahilmgandhi 18:6a4db94011d3 282 | parity_select << 4;
sahilmgandhi 18:6a4db94011d3 283 }
sahilmgandhi 18:6a4db94011d3 284
sahilmgandhi 18:6a4db94011d3 285 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 286 * INTERRUPTS HANDLING
sahilmgandhi 18:6a4db94011d3 287 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 288 static inline void uart_irq(uint32_t iir, uint32_t index, LPC_USART_T *puart) {
sahilmgandhi 18:6a4db94011d3 289 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
sahilmgandhi 18:6a4db94011d3 290 SerialIrq irq_type;
sahilmgandhi 18:6a4db94011d3 291 switch (iir) {
sahilmgandhi 18:6a4db94011d3 292 case 1: irq_type = TxIrq; break;
sahilmgandhi 18:6a4db94011d3 293 case 2: irq_type = RxIrq; break;
sahilmgandhi 18:6a4db94011d3 294 default: return;
sahilmgandhi 18:6a4db94011d3 295 }
sahilmgandhi 18:6a4db94011d3 296 if ((RxIrq == irq_type) && (NC != uart_data[index].sw_rts.pin)) {
sahilmgandhi 18:6a4db94011d3 297 gpio_write(&uart_data[index].sw_rts, 1);
sahilmgandhi 18:6a4db94011d3 298 // Disable interrupt if it wasn't enabled by other part of the application
sahilmgandhi 18:6a4db94011d3 299 if (!uart_data[index].rx_irq_set_api)
sahilmgandhi 18:6a4db94011d3 300 puart->IER &= ~(1 << RxIrq);
sahilmgandhi 18:6a4db94011d3 301 }
sahilmgandhi 18:6a4db94011d3 302 if (uart_data[index].serial_irq_id != 0)
sahilmgandhi 18:6a4db94011d3 303 if ((irq_type != RxIrq) || (uart_data[index].rx_irq_set_api))
sahilmgandhi 18:6a4db94011d3 304 irq_handler(uart_data[index].serial_irq_id, irq_type);
sahilmgandhi 18:6a4db94011d3 305 }
sahilmgandhi 18:6a4db94011d3 306
sahilmgandhi 18:6a4db94011d3 307 void uart0_irq() {uart_irq((LPC_USART0->IIR >> 1) & 0x7, 0, (LPC_USART_T*)LPC_USART0);}
sahilmgandhi 18:6a4db94011d3 308 void uart1_irq() {uart_irq((LPC_UART1->IIR >> 1) & 0x7, 1, (LPC_USART_T*)LPC_UART1);}
sahilmgandhi 18:6a4db94011d3 309 void uart2_irq() {uart_irq((LPC_USART2->IIR >> 1) & 0x7, 2, (LPC_USART_T*)LPC_USART2);}
sahilmgandhi 18:6a4db94011d3 310 void uart3_irq() {uart_irq((LPC_USART3->IIR >> 1) & 0x7, 3, (LPC_USART_T*)LPC_USART3);}
sahilmgandhi 18:6a4db94011d3 311
sahilmgandhi 18:6a4db94011d3 312 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
sahilmgandhi 18:6a4db94011d3 313 irq_handler = handler;
sahilmgandhi 18:6a4db94011d3 314 uart_data[obj->index].serial_irq_id = id;
sahilmgandhi 18:6a4db94011d3 315 }
sahilmgandhi 18:6a4db94011d3 316
sahilmgandhi 18:6a4db94011d3 317 static void serial_irq_set_internal(serial_t *obj, SerialIrq irq, uint32_t enable) {
sahilmgandhi 18:6a4db94011d3 318 IRQn_Type irq_n = (IRQn_Type)0;
sahilmgandhi 18:6a4db94011d3 319 uint32_t vector = 0;
sahilmgandhi 18:6a4db94011d3 320 switch ((int)obj->uart) {
sahilmgandhi 18:6a4db94011d3 321 case UART_0: irq_n=USART0_IRQn; vector = (uint32_t)&uart0_irq; break;
sahilmgandhi 18:6a4db94011d3 322 case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
sahilmgandhi 18:6a4db94011d3 323 case UART_2: irq_n=USART2_IRQn; vector = (uint32_t)&uart2_irq; break;
sahilmgandhi 18:6a4db94011d3 324 case UART_3: irq_n=USART3_IRQn; vector = (uint32_t)&uart3_irq; break;
sahilmgandhi 18:6a4db94011d3 325 }
sahilmgandhi 18:6a4db94011d3 326
sahilmgandhi 18:6a4db94011d3 327 if (enable) {
sahilmgandhi 18:6a4db94011d3 328 obj->uart->IER |= 1 << irq;
sahilmgandhi 18:6a4db94011d3 329 NVIC_SetVector(irq_n, vector);
sahilmgandhi 18:6a4db94011d3 330 NVIC_EnableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 331 } else if ((TxIrq == irq) || (uart_data[obj->index].rx_irq_set_api + uart_data[obj->index].rx_irq_set_flow == 0)) { // disable
sahilmgandhi 18:6a4db94011d3 332 int all_disabled = 0;
sahilmgandhi 18:6a4db94011d3 333 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
sahilmgandhi 18:6a4db94011d3 334 obj->uart->IER &= ~(1 << irq);
sahilmgandhi 18:6a4db94011d3 335 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
sahilmgandhi 18:6a4db94011d3 336 if (all_disabled)
sahilmgandhi 18:6a4db94011d3 337 NVIC_DisableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 338 }
sahilmgandhi 18:6a4db94011d3 339 }
sahilmgandhi 18:6a4db94011d3 340
sahilmgandhi 18:6a4db94011d3 341 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
sahilmgandhi 18:6a4db94011d3 342 if (RxIrq == irq)
sahilmgandhi 18:6a4db94011d3 343 uart_data[obj->index].rx_irq_set_api = enable;
sahilmgandhi 18:6a4db94011d3 344 serial_irq_set_internal(obj, irq, enable);
sahilmgandhi 18:6a4db94011d3 345 }
sahilmgandhi 18:6a4db94011d3 346
sahilmgandhi 18:6a4db94011d3 347 #if (DEVICE_SERIAL_FC)
sahilmgandhi 18:6a4db94011d3 348 static void serial_flow_irq_set(serial_t *obj, uint32_t enable) {
sahilmgandhi 18:6a4db94011d3 349 uart_data[obj->index].rx_irq_set_flow = enable;
sahilmgandhi 18:6a4db94011d3 350 serial_irq_set_internal(obj, RxIrq, enable);
sahilmgandhi 18:6a4db94011d3 351 }
sahilmgandhi 18:6a4db94011d3 352 #endif
sahilmgandhi 18:6a4db94011d3 353
sahilmgandhi 18:6a4db94011d3 354 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 355 * READ/WRITE
sahilmgandhi 18:6a4db94011d3 356 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 357 int serial_getc(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 358 while (!serial_readable(obj));
sahilmgandhi 18:6a4db94011d3 359 int data = obj->uart->RBR;
sahilmgandhi 18:6a4db94011d3 360 if (NC != uart_data[obj->index].sw_rts.pin) {
sahilmgandhi 18:6a4db94011d3 361 gpio_write(&uart_data[obj->index].sw_rts, 0);
sahilmgandhi 18:6a4db94011d3 362 obj->uart->IER |= 1 << RxIrq;
sahilmgandhi 18:6a4db94011d3 363 }
sahilmgandhi 18:6a4db94011d3 364 return data;
sahilmgandhi 18:6a4db94011d3 365 }
sahilmgandhi 18:6a4db94011d3 366
sahilmgandhi 18:6a4db94011d3 367 void serial_putc(serial_t *obj, int c) {
sahilmgandhi 18:6a4db94011d3 368 while (!serial_writable(obj));
sahilmgandhi 18:6a4db94011d3 369 obj->uart->THR = c;
sahilmgandhi 18:6a4db94011d3 370 uart_data[obj->index].count++;
sahilmgandhi 18:6a4db94011d3 371 }
sahilmgandhi 18:6a4db94011d3 372
sahilmgandhi 18:6a4db94011d3 373 int serial_readable(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 374 return obj->uart->LSR & 0x01;
sahilmgandhi 18:6a4db94011d3 375 }
sahilmgandhi 18:6a4db94011d3 376
sahilmgandhi 18:6a4db94011d3 377 int serial_writable(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 378 int isWritable = 1;
sahilmgandhi 18:6a4db94011d3 379 if (NC != uart_data[obj->index].sw_cts.pin)
sahilmgandhi 18:6a4db94011d3 380 isWritable = (gpio_read(&uart_data[obj->index].sw_cts) == 0) && (obj->uart->LSR & 0x40); //If flow control: writable if CTS low + UART done
sahilmgandhi 18:6a4db94011d3 381 else {
sahilmgandhi 18:6a4db94011d3 382 if (obj->uart->LSR & 0x20)
sahilmgandhi 18:6a4db94011d3 383 uart_data[obj->index].count = 0;
sahilmgandhi 18:6a4db94011d3 384 else if (uart_data[obj->index].count >= 16)
sahilmgandhi 18:6a4db94011d3 385 isWritable = 0;
sahilmgandhi 18:6a4db94011d3 386 }
sahilmgandhi 18:6a4db94011d3 387 return isWritable;
sahilmgandhi 18:6a4db94011d3 388 }
sahilmgandhi 18:6a4db94011d3 389
sahilmgandhi 18:6a4db94011d3 390 void serial_clear(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 391 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
sahilmgandhi 18:6a4db94011d3 392 | 1 << 1 // rx FIFO reset
sahilmgandhi 18:6a4db94011d3 393 | 1 << 2 // tx FIFO reset
sahilmgandhi 18:6a4db94011d3 394 | 0 << 6; // interrupt depth
sahilmgandhi 18:6a4db94011d3 395 }
sahilmgandhi 18:6a4db94011d3 396
sahilmgandhi 18:6a4db94011d3 397 void serial_pinout_tx(PinName tx) {
sahilmgandhi 18:6a4db94011d3 398 pinmap_pinout(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 399 }
sahilmgandhi 18:6a4db94011d3 400
sahilmgandhi 18:6a4db94011d3 401 void serial_break_set(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 402 obj->uart->LCR |= (1 << 6);
sahilmgandhi 18:6a4db94011d3 403 }
sahilmgandhi 18:6a4db94011d3 404
sahilmgandhi 18:6a4db94011d3 405 void serial_break_clear(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 406 obj->uart->LCR &= ~(1 << 6);
sahilmgandhi 18:6a4db94011d3 407 }
sahilmgandhi 18:6a4db94011d3 408
sahilmgandhi 18:6a4db94011d3 409 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
sahilmgandhi 18:6a4db94011d3 410 #if (DEVICE_SERIAL_FC)
sahilmgandhi 18:6a4db94011d3 411 #endif
sahilmgandhi 18:6a4db94011d3 412 }