MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NXP/TARGET_LPC43XX/device/system_LPC43xx.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /*
sahilmgandhi 18:6a4db94011d3 2 * @brief LPC43xx/LPC18xx mcu header
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Copyright(C) NXP Semiconductors, 2012
sahilmgandhi 18:6a4db94011d3 5 * All rights reserved.
sahilmgandhi 18:6a4db94011d3 6 *
sahilmgandhi 18:6a4db94011d3 7 * Software that is described herein is for illustrative purposes only
sahilmgandhi 18:6a4db94011d3 8 * which provides customers with programming information regarding the
sahilmgandhi 18:6a4db94011d3 9 * LPC products. This software is supplied "AS IS" without any warranties of
sahilmgandhi 18:6a4db94011d3 10 * any kind, and NXP Semiconductors and its licensor disclaim any and
sahilmgandhi 18:6a4db94011d3 11 * all warranties, express or implied, including all implied warranties of
sahilmgandhi 18:6a4db94011d3 12 * merchantability, fitness for a particular purpose and non-infringement of
sahilmgandhi 18:6a4db94011d3 13 * intellectual property rights. NXP Semiconductors assumes no responsibility
sahilmgandhi 18:6a4db94011d3 14 * or liability for the use of the software, conveys no license or rights under any
sahilmgandhi 18:6a4db94011d3 15 * patent, copyright, mask work right, or any other intellectual property rights in
sahilmgandhi 18:6a4db94011d3 16 * or to any products. NXP Semiconductors reserves the right to make changes
sahilmgandhi 18:6a4db94011d3 17 * in the software without notification. NXP Semiconductors also makes no
sahilmgandhi 18:6a4db94011d3 18 * representation or warranty that such application will be suitable for the
sahilmgandhi 18:6a4db94011d3 19 * specified use without further testing or modification.
sahilmgandhi 18:6a4db94011d3 20 *
sahilmgandhi 18:6a4db94011d3 21 * Permission to use, copy, modify, and distribute this software and its
sahilmgandhi 18:6a4db94011d3 22 * documentation is hereby granted, under NXP Semiconductors' and its
sahilmgandhi 18:6a4db94011d3 23 * licensor's relevant copyrights in the software, without fee, provided that it
sahilmgandhi 18:6a4db94011d3 24 * is used in conjunction with NXP Semiconductors microcontrollers. This
sahilmgandhi 18:6a4db94011d3 25 * copyright, permission, and disclaimer notice must appear in all copies of
sahilmgandhi 18:6a4db94011d3 26 * this code.
sahilmgandhi 18:6a4db94011d3 27 */
sahilmgandhi 18:6a4db94011d3 28
sahilmgandhi 18:6a4db94011d3 29 #ifndef __SYSTEM_LPC43XX_H
sahilmgandhi 18:6a4db94011d3 30 #define __SYSTEM_LPC43XX_H
sahilmgandhi 18:6a4db94011d3 31
sahilmgandhi 18:6a4db94011d3 32 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 33 extern "C" {
sahilmgandhi 18:6a4db94011d3 34 #endif
sahilmgandhi 18:6a4db94011d3 35
sahilmgandhi 18:6a4db94011d3 36 /* System initialization options */
sahilmgandhi 18:6a4db94011d3 37 #define PIN_SETUP 1 /* Configure pins during initialization */
sahilmgandhi 18:6a4db94011d3 38 #define CLOCK_SETUP 1 /* Configure clocks during initialization */
sahilmgandhi 18:6a4db94011d3 39 #define MEMORY_SETUP 0 /* Configure external memory during init */
sahilmgandhi 18:6a4db94011d3 40 #define SPIFI_INIT 1 /* Initialize SPIFI */
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 /* Crystal frequency into device */
sahilmgandhi 18:6a4db94011d3 43 #define CRYSTAL_MAIN_FREQ_IN 12000000
sahilmgandhi 18:6a4db94011d3 44
sahilmgandhi 18:6a4db94011d3 45 /* Crystal frequency into device for RTC/32K input */
sahilmgandhi 18:6a4db94011d3 46 #define CRYSTAL_32K_FREQ_IN 32768
sahilmgandhi 18:6a4db94011d3 47
sahilmgandhi 18:6a4db94011d3 48 /* Default CPU clock frequency */
sahilmgandhi 18:6a4db94011d3 49 #if defined(CHIP_LPC43XX)
sahilmgandhi 18:6a4db94011d3 50 #define MAX_CLOCK_FREQ (204000000)
sahilmgandhi 18:6a4db94011d3 51 #else
sahilmgandhi 18:6a4db94011d3 52 #define MAX_CLOCK_FREQ (180000000)
sahilmgandhi 18:6a4db94011d3 53 #endif
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 #if defined(__FPU_PRESENT) && __FPU_PRESENT == 1
sahilmgandhi 18:6a4db94011d3 56 /* FPU declarations */
sahilmgandhi 18:6a4db94011d3 57 #define LPC_CPACR 0xE000ED88
sahilmgandhi 18:6a4db94011d3 58
sahilmgandhi 18:6a4db94011d3 59 #define SCB_MVFR0 0xE000EF40
sahilmgandhi 18:6a4db94011d3 60 #define SCB_MVFR0_RESET 0x10110021
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 #define SCB_MVFR1 0xE000EF44
sahilmgandhi 18:6a4db94011d3 63 #define SCB_MVFR1_RESET 0x11000011
sahilmgandhi 18:6a4db94011d3 64
sahilmgandhi 18:6a4db94011d3 65 #if defined(__ARMCC_VERSION)
sahilmgandhi 18:6a4db94011d3 66 void fpuInit(void) __attribute__ ((section("BOOTSTRAP_CODE")));
sahilmgandhi 18:6a4db94011d3 67 #else
sahilmgandhi 18:6a4db94011d3 68 extern void fpuInit(void);
sahilmgandhi 18:6a4db94011d3 69 #endif
sahilmgandhi 18:6a4db94011d3 70 #endif
sahilmgandhi 18:6a4db94011d3 71
sahilmgandhi 18:6a4db94011d3 72 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
sahilmgandhi 18:6a4db94011d3 73
sahilmgandhi 18:6a4db94011d3 74 /**
sahilmgandhi 18:6a4db94011d3 75 * Initialize the system
sahilmgandhi 18:6a4db94011d3 76 *
sahilmgandhi 18:6a4db94011d3 77 * @param none
sahilmgandhi 18:6a4db94011d3 78 * @return none
sahilmgandhi 18:6a4db94011d3 79 *
sahilmgandhi 18:6a4db94011d3 80 * @brief Setup the microcontroller system.
sahilmgandhi 18:6a4db94011d3 81 * Initialize the System and update the SystemCoreClock variable.
sahilmgandhi 18:6a4db94011d3 82 */
sahilmgandhi 18:6a4db94011d3 83 extern void SystemInit (void);
sahilmgandhi 18:6a4db94011d3 84 extern void SystemCoreClockUpdate(void);
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 87 }
sahilmgandhi 18:6a4db94011d3 88 #endif
sahilmgandhi 18:6a4db94011d3 89
sahilmgandhi 18:6a4db94011d3 90 #endif /* __SYSTEM_LPC43XX_H */