MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_Freescale/TARGET_K20XX/serial_api.c@34:69342782fb68, 2017-05-26 (annotated)

Committer:
sahilmgandhi
Date:
Fri May 26 17:21:04 2017 +0000
Revision:
34:69342782fb68
Parent:
18:6a4db94011d3 
Added small reverse turns before the break so that we can stop faster.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2015 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16 #include "mbed_assert.h"
sahilmgandhi 18:6a4db94011d3 17 #include "serial_api.h"
sahilmgandhi 18:6a4db94011d3 18
sahilmgandhi 18:6a4db94011d3 19 #include <string.h>
sahilmgandhi 18:6a4db94011d3 20
sahilmgandhi 18:6a4db94011d3 21 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 22 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 23 #include "clk_freqs.h"
sahilmgandhi 18:6a4db94011d3 24 #include "PeripheralPins.h"
sahilmgandhi 18:6a4db94011d3 25
sahilmgandhi 18:6a4db94011d3 26 #define UART_NUM 3
sahilmgandhi 18:6a4db94011d3 27
sahilmgandhi 18:6a4db94011d3 28 static uint32_t serial_irq_ids[UART_NUM] = {0};
sahilmgandhi 18:6a4db94011d3 29 static uart_irq_handler irq_handler;
sahilmgandhi 18:6a4db94011d3 30
sahilmgandhi 18:6a4db94011d3 31 int stdio_uart_inited = 0;
sahilmgandhi 18:6a4db94011d3 32 serial_t stdio_uart;
sahilmgandhi 18:6a4db94011d3 33
sahilmgandhi 18:6a4db94011d3 34 void serial_init(serial_t *obj, PinName tx, PinName rx) {
sahilmgandhi 18:6a4db94011d3 35 // determine the UART to use
sahilmgandhi 18:6a4db94011d3 36 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 37 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
sahilmgandhi 18:6a4db94011d3 38 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
sahilmgandhi 18:6a4db94011d3 39 MBED_ASSERT((int)uart != NC);
sahilmgandhi 18:6a4db94011d3 40
sahilmgandhi 18:6a4db94011d3 41 obj->uart = (UART_Type *)uart;
sahilmgandhi 18:6a4db94011d3 42 // enable clk
sahilmgandhi 18:6a4db94011d3 43 switch (uart) {
sahilmgandhi 18:6a4db94011d3 44 case UART_0:
sahilmgandhi 18:6a4db94011d3 45 mcgpllfll_frequency();
sahilmgandhi 18:6a4db94011d3 46 SIM->SCGC4 |= SIM_SCGC4_UART0_MASK;
sahilmgandhi 18:6a4db94011d3 47 break;
sahilmgandhi 18:6a4db94011d3 48 case UART_1:
sahilmgandhi 18:6a4db94011d3 49 mcgpllfll_frequency();
sahilmgandhi 18:6a4db94011d3 50 SIM->SCGC4 |= SIM_SCGC4_UART1_MASK;
sahilmgandhi 18:6a4db94011d3 51 break;
sahilmgandhi 18:6a4db94011d3 52 case UART_2:
sahilmgandhi 18:6a4db94011d3 53 SIM->SCGC4 |= SIM_SCGC4_UART2_MASK;
sahilmgandhi 18:6a4db94011d3 54 break;
sahilmgandhi 18:6a4db94011d3 55 }
sahilmgandhi 18:6a4db94011d3 56 // Disable UART before changing registers
sahilmgandhi 18:6a4db94011d3 57 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
sahilmgandhi 18:6a4db94011d3 58
sahilmgandhi 18:6a4db94011d3 59 switch (uart) {
sahilmgandhi 18:6a4db94011d3 60 case UART_0:
sahilmgandhi 18:6a4db94011d3 61 obj->index = 0;
sahilmgandhi 18:6a4db94011d3 62 break;
sahilmgandhi 18:6a4db94011d3 63 case UART_1:
sahilmgandhi 18:6a4db94011d3 64 obj->index = 1;
sahilmgandhi 18:6a4db94011d3 65 break;
sahilmgandhi 18:6a4db94011d3 66 case UART_2:
sahilmgandhi 18:6a4db94011d3 67 obj->index = 2;
sahilmgandhi 18:6a4db94011d3 68 break;
sahilmgandhi 18:6a4db94011d3 69 }
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71 // set default baud rate and format
sahilmgandhi 18:6a4db94011d3 72 serial_baud (obj, 9600);
sahilmgandhi 18:6a4db94011d3 73 serial_format(obj, 8, ParityNone, 1);
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 // pinout the chosen uart
sahilmgandhi 18:6a4db94011d3 76 pinmap_pinout(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 77 pinmap_pinout(rx, PinMap_UART_RX);
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 // set rx/tx pins in PullUp mode
sahilmgandhi 18:6a4db94011d3 80 if (tx != NC) {
sahilmgandhi 18:6a4db94011d3 81 pin_mode(tx, PullUp);
sahilmgandhi 18:6a4db94011d3 82 }
sahilmgandhi 18:6a4db94011d3 83 if (rx != NC) {
sahilmgandhi 18:6a4db94011d3 84 pin_mode(rx, PullUp);
sahilmgandhi 18:6a4db94011d3 85 }
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 obj->uart->C2 |= (UART_C2_RE_MASK | UART_C2_TE_MASK);
sahilmgandhi 18:6a4db94011d3 88
sahilmgandhi 18:6a4db94011d3 89 if (uart == STDIO_UART) {
sahilmgandhi 18:6a4db94011d3 90 stdio_uart_inited = 1;
sahilmgandhi 18:6a4db94011d3 91 memcpy(&stdio_uart, obj, sizeof(serial_t));
sahilmgandhi 18:6a4db94011d3 92 }
sahilmgandhi 18:6a4db94011d3 93 }
sahilmgandhi 18:6a4db94011d3 94
sahilmgandhi 18:6a4db94011d3 95 void serial_free(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 96 serial_irq_ids[obj->index] = 0;
sahilmgandhi 18:6a4db94011d3 97 }
sahilmgandhi 18:6a4db94011d3 98
sahilmgandhi 18:6a4db94011d3 99 void serial_baud(serial_t *obj, int baudrate) {
sahilmgandhi 18:6a4db94011d3 100 // save C2 state
sahilmgandhi 18:6a4db94011d3 101 uint8_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
sahilmgandhi 18:6a4db94011d3 102
sahilmgandhi 18:6a4db94011d3 103 // Disable UART before changing registers
sahilmgandhi 18:6a4db94011d3 104 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
sahilmgandhi 18:6a4db94011d3 105
sahilmgandhi 18:6a4db94011d3 106 uint32_t PCLK;
sahilmgandhi 18:6a4db94011d3 107 if (obj->uart != UART2) {
sahilmgandhi 18:6a4db94011d3 108 PCLK = mcgpllfll_frequency();
sahilmgandhi 18:6a4db94011d3 109 }
sahilmgandhi 18:6a4db94011d3 110 else {
sahilmgandhi 18:6a4db94011d3 111 PCLK = bus_frequency();
sahilmgandhi 18:6a4db94011d3 112 }
sahilmgandhi 18:6a4db94011d3 113
sahilmgandhi 18:6a4db94011d3 114 uint16_t DL = PCLK / (16 * baudrate);
sahilmgandhi 18:6a4db94011d3 115 uint32_t BRFA = (2 * PCLK) / baudrate - 32 * DL;
sahilmgandhi 18:6a4db94011d3 116
sahilmgandhi 18:6a4db94011d3 117 // set BDH and BDL
sahilmgandhi 18:6a4db94011d3 118 obj->uart->BDH = (obj->uart->BDH & ~(0x1f)) | ((DL >> 8) & 0x1f);
sahilmgandhi 18:6a4db94011d3 119 obj->uart->BDL = (obj->uart->BDL & ~(0xff)) | ((DL >> 0) & 0xff);
sahilmgandhi 18:6a4db94011d3 120
sahilmgandhi 18:6a4db94011d3 121 obj->uart->C4 &= ~0x1F;
sahilmgandhi 18:6a4db94011d3 122 obj->uart->C4 |= BRFA & 0x1F;
sahilmgandhi 18:6a4db94011d3 123
sahilmgandhi 18:6a4db94011d3 124 // restore C2 state
sahilmgandhi 18:6a4db94011d3 125 obj->uart->C2 |= c2_state;
sahilmgandhi 18:6a4db94011d3 126 }
sahilmgandhi 18:6a4db94011d3 127
sahilmgandhi 18:6a4db94011d3 128 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
sahilmgandhi 18:6a4db94011d3 129 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
sahilmgandhi 18:6a4db94011d3 130 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven));
sahilmgandhi 18:6a4db94011d3 131 MBED_ASSERT((data_bits == 8) || (data_bits == 9));
sahilmgandhi 18:6a4db94011d3 132
sahilmgandhi 18:6a4db94011d3 133 // save C2 state
sahilmgandhi 18:6a4db94011d3 134 uint32_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
sahilmgandhi 18:6a4db94011d3 135
sahilmgandhi 18:6a4db94011d3 136 // Disable UART before changing registers
sahilmgandhi 18:6a4db94011d3 137 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
sahilmgandhi 18:6a4db94011d3 138
sahilmgandhi 18:6a4db94011d3 139 // 8 data bits = 0 ... 9 data bits = 1
sahilmgandhi 18:6a4db94011d3 140 data_bits -= 8;
sahilmgandhi 18:6a4db94011d3 141
sahilmgandhi 18:6a4db94011d3 142 uint32_t parity_enable, parity_select;
sahilmgandhi 18:6a4db94011d3 143 switch (parity) {
sahilmgandhi 18:6a4db94011d3 144 case ParityNone:
sahilmgandhi 18:6a4db94011d3 145 parity_enable = 0;
sahilmgandhi 18:6a4db94011d3 146 parity_select = 0;
sahilmgandhi 18:6a4db94011d3 147 break;
sahilmgandhi 18:6a4db94011d3 148 case ParityOdd :
sahilmgandhi 18:6a4db94011d3 149 parity_enable = 1;
sahilmgandhi 18:6a4db94011d3 150 parity_select = 1;
sahilmgandhi 18:6a4db94011d3 151 data_bits++;
sahilmgandhi 18:6a4db94011d3 152 break;
sahilmgandhi 18:6a4db94011d3 153 case ParityEven:
sahilmgandhi 18:6a4db94011d3 154 parity_enable = 1;
sahilmgandhi 18:6a4db94011d3 155 parity_select = 0;
sahilmgandhi 18:6a4db94011d3 156 data_bits++;
sahilmgandhi 18:6a4db94011d3 157 break;
sahilmgandhi 18:6a4db94011d3 158 default:
sahilmgandhi 18:6a4db94011d3 159 break;
sahilmgandhi 18:6a4db94011d3 160 }
sahilmgandhi 18:6a4db94011d3 161
sahilmgandhi 18:6a4db94011d3 162 stop_bits -= 1;
sahilmgandhi 18:6a4db94011d3 163
sahilmgandhi 18:6a4db94011d3 164 uint32_t m10 = 0;
sahilmgandhi 18:6a4db94011d3 165
sahilmgandhi 18:6a4db94011d3 166 // 9 data bits + parity - only uart0 support
sahilmgandhi 18:6a4db94011d3 167 if (data_bits == 2) {
sahilmgandhi 18:6a4db94011d3 168 MBED_ASSERT(obj->index == 0);
sahilmgandhi 18:6a4db94011d3 169 data_bits = 0;
sahilmgandhi 18:6a4db94011d3 170 m10 = 1;
sahilmgandhi 18:6a4db94011d3 171 }
sahilmgandhi 18:6a4db94011d3 172
sahilmgandhi 18:6a4db94011d3 173 // data bits, parity and parity mode
sahilmgandhi 18:6a4db94011d3 174 obj->uart->C1 = ((data_bits << 4)
sahilmgandhi 18:6a4db94011d3 175 | (parity_enable << 1)
sahilmgandhi 18:6a4db94011d3 176 | (parity_select << 0));
sahilmgandhi 18:6a4db94011d3 177
sahilmgandhi 18:6a4db94011d3 178 //enable 10bit mode if needed
sahilmgandhi 18:6a4db94011d3 179 if (obj->index == 0) {
sahilmgandhi 18:6a4db94011d3 180 obj->uart->C4 &= ~UART_C4_M10_MASK;
sahilmgandhi 18:6a4db94011d3 181 obj->uart->C4 |= (m10 << UART_C4_M10_SHIFT);
sahilmgandhi 18:6a4db94011d3 182 }
sahilmgandhi 18:6a4db94011d3 183
sahilmgandhi 18:6a4db94011d3 184 // stop bits
sahilmgandhi 18:6a4db94011d3 185 obj->uart->BDH &= ~UART_BDH_SBR_MASK;
sahilmgandhi 18:6a4db94011d3 186 obj->uart->BDH |= (stop_bits << UART_BDH_SBR_SHIFT);
sahilmgandhi 18:6a4db94011d3 187
sahilmgandhi 18:6a4db94011d3 188 // restore C2 state
sahilmgandhi 18:6a4db94011d3 189 obj->uart->C2 |= c2_state;
sahilmgandhi 18:6a4db94011d3 190 }
sahilmgandhi 18:6a4db94011d3 191
sahilmgandhi 18:6a4db94011d3 192 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 193 * INTERRUPTS HANDLING
sahilmgandhi 18:6a4db94011d3 194 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 195 static inline void uart_irq(uint8_t status, uint32_t index) {
sahilmgandhi 18:6a4db94011d3 196 if (serial_irq_ids[index] != 0) {
sahilmgandhi 18:6a4db94011d3 197 if (status & UART_S1_TDRE_MASK)
sahilmgandhi 18:6a4db94011d3 198 irq_handler(serial_irq_ids[index], TxIrq);
sahilmgandhi 18:6a4db94011d3 199
sahilmgandhi 18:6a4db94011d3 200 if (status & UART_S1_RDRF_MASK)
sahilmgandhi 18:6a4db94011d3 201 irq_handler(serial_irq_ids[index], RxIrq);
sahilmgandhi 18:6a4db94011d3 202 }
sahilmgandhi 18:6a4db94011d3 203 }
sahilmgandhi 18:6a4db94011d3 204
sahilmgandhi 18:6a4db94011d3 205 void uart0_irq() {uart_irq(UART0->S1, 0);}
sahilmgandhi 18:6a4db94011d3 206 void uart1_irq() {uart_irq(UART1->S1, 1);}
sahilmgandhi 18:6a4db94011d3 207 void uart2_irq() {uart_irq(UART2->S1, 2);}
sahilmgandhi 18:6a4db94011d3 208
sahilmgandhi 18:6a4db94011d3 209 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
sahilmgandhi 18:6a4db94011d3 210 irq_handler = handler;
sahilmgandhi 18:6a4db94011d3 211 serial_irq_ids[obj->index] = id;
sahilmgandhi 18:6a4db94011d3 212 }
sahilmgandhi 18:6a4db94011d3 213
sahilmgandhi 18:6a4db94011d3 214 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
sahilmgandhi 18:6a4db94011d3 215 IRQn_Type irq_n = (IRQn_Type)0;
sahilmgandhi 18:6a4db94011d3 216 uint32_t vector = 0;
sahilmgandhi 18:6a4db94011d3 217 switch ((int)obj->uart) {
sahilmgandhi 18:6a4db94011d3 218 case UART_0:
sahilmgandhi 18:6a4db94011d3 219 irq_n=UART0_RX_TX_IRQn;
sahilmgandhi 18:6a4db94011d3 220 vector = (uint32_t)&uart0_irq;
sahilmgandhi 18:6a4db94011d3 221 break;
sahilmgandhi 18:6a4db94011d3 222 case UART_1:
sahilmgandhi 18:6a4db94011d3 223 irq_n=UART1_RX_TX_IRQn;
sahilmgandhi 18:6a4db94011d3 224 vector = (uint32_t)&uart1_irq;
sahilmgandhi 18:6a4db94011d3 225 break;
sahilmgandhi 18:6a4db94011d3 226 case UART_2:
sahilmgandhi 18:6a4db94011d3 227 irq_n=UART2_RX_TX_IRQn;
sahilmgandhi 18:6a4db94011d3 228 vector = (uint32_t)&uart2_irq;
sahilmgandhi 18:6a4db94011d3 229 break;
sahilmgandhi 18:6a4db94011d3 230 }
sahilmgandhi 18:6a4db94011d3 231
sahilmgandhi 18:6a4db94011d3 232 if (enable) {
sahilmgandhi 18:6a4db94011d3 233 switch (irq) {
sahilmgandhi 18:6a4db94011d3 234 case RxIrq:
sahilmgandhi 18:6a4db94011d3 235 obj->uart->C2 |= (UART_C2_RIE_MASK);
sahilmgandhi 18:6a4db94011d3 236 break;
sahilmgandhi 18:6a4db94011d3 237 case TxIrq:
sahilmgandhi 18:6a4db94011d3 238 obj->uart->C2 |= (UART_C2_TIE_MASK);
sahilmgandhi 18:6a4db94011d3 239 break;
sahilmgandhi 18:6a4db94011d3 240 }
sahilmgandhi 18:6a4db94011d3 241 NVIC_SetVector(irq_n, vector);
sahilmgandhi 18:6a4db94011d3 242 NVIC_EnableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 243
sahilmgandhi 18:6a4db94011d3 244 } else { // disable
sahilmgandhi 18:6a4db94011d3 245 int all_disabled = 0;
sahilmgandhi 18:6a4db94011d3 246 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
sahilmgandhi 18:6a4db94011d3 247 switch (irq) {
sahilmgandhi 18:6a4db94011d3 248 case RxIrq:
sahilmgandhi 18:6a4db94011d3 249 obj->uart->C2 &= ~(UART_C2_RIE_MASK);
sahilmgandhi 18:6a4db94011d3 250 break;
sahilmgandhi 18:6a4db94011d3 251 case TxIrq:
sahilmgandhi 18:6a4db94011d3 252 obj->uart->C2 &= ~(UART_C2_TIE_MASK);
sahilmgandhi 18:6a4db94011d3 253 break;
sahilmgandhi 18:6a4db94011d3 254 }
sahilmgandhi 18:6a4db94011d3 255 switch (other_irq) {
sahilmgandhi 18:6a4db94011d3 256 case RxIrq:
sahilmgandhi 18:6a4db94011d3 257 all_disabled = (obj->uart->C2 & (UART_C2_RIE_MASK)) == 0;
sahilmgandhi 18:6a4db94011d3 258 break;
sahilmgandhi 18:6a4db94011d3 259 case TxIrq:
sahilmgandhi 18:6a4db94011d3 260 all_disabled = (obj->uart->C2 & (UART_C2_TIE_MASK)) == 0;
sahilmgandhi 18:6a4db94011d3 261 break;
sahilmgandhi 18:6a4db94011d3 262 }
sahilmgandhi 18:6a4db94011d3 263 if (all_disabled)
sahilmgandhi 18:6a4db94011d3 264 NVIC_DisableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 265 }
sahilmgandhi 18:6a4db94011d3 266 }
sahilmgandhi 18:6a4db94011d3 267
sahilmgandhi 18:6a4db94011d3 268 int serial_getc(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 269 while (!serial_readable(obj));
sahilmgandhi 18:6a4db94011d3 270 return obj->uart->D;
sahilmgandhi 18:6a4db94011d3 271 }
sahilmgandhi 18:6a4db94011d3 272
sahilmgandhi 18:6a4db94011d3 273 void serial_putc(serial_t *obj, int c) {
sahilmgandhi 18:6a4db94011d3 274 while (!serial_writable(obj));
sahilmgandhi 18:6a4db94011d3 275 obj->uart->D = c;
sahilmgandhi 18:6a4db94011d3 276 }
sahilmgandhi 18:6a4db94011d3 277
sahilmgandhi 18:6a4db94011d3 278 int serial_readable(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 279
sahilmgandhi 18:6a4db94011d3 280 return (obj->uart->S1 & UART_S1_RDRF_MASK);
sahilmgandhi 18:6a4db94011d3 281 }
sahilmgandhi 18:6a4db94011d3 282
sahilmgandhi 18:6a4db94011d3 283 int serial_writable(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 284
sahilmgandhi 18:6a4db94011d3 285 return (obj->uart->S1 & UART_S1_TDRE_MASK);
sahilmgandhi 18:6a4db94011d3 286 }
sahilmgandhi 18:6a4db94011d3 287
sahilmgandhi 18:6a4db94011d3 288 void serial_clear(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 289 }
sahilmgandhi 18:6a4db94011d3 290
sahilmgandhi 18:6a4db94011d3 291 void serial_pinout_tx(PinName tx) {
sahilmgandhi 18:6a4db94011d3 292 pinmap_pinout(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 293 }
sahilmgandhi 18:6a4db94011d3 294
sahilmgandhi 18:6a4db94011d3 295 void serial_break_set(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 296 obj->uart->C2 |= UART_C2_SBK_MASK;
sahilmgandhi 18:6a4db94011d3 297 }
sahilmgandhi 18:6a4db94011d3 298
sahilmgandhi 18:6a4db94011d3 299 void serial_break_clear(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 300 obj->uart->C2 &= ~UART_C2_SBK_MASK;
sahilmgandhi 18:6a4db94011d3 301 }