MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_GCC_ARM/startup_MK20DX256.S@34:69342782fb68, 2017-05-26 (annotated)

Committer:
sahilmgandhi
Date:
Fri May 26 17:21:04 2017 +0000
Revision:
34:69342782fb68
Parent:
18:6a4db94011d3 
Added small reverse turns before the break so that we can stop faster.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* File: startup_MK20DX256.s
sahilmgandhi 18:6a4db94011d3 2 * Purpose: startup file for Cortex-M4 devices. Should use with
sahilmgandhi 18:6a4db94011d3 3 * GCC for ARM Embedded Processors
sahilmgandhi 18:6a4db94011d3 4 * Version: V1.3
sahilmgandhi 18:6a4db94011d3 5 * Date: 08 Feb 2012
sahilmgandhi 18:6a4db94011d3 6 *
sahilmgandhi 18:6a4db94011d3 7 * Copyright (c) 2015, ARM Limited
sahilmgandhi 18:6a4db94011d3 8 * All rights reserved.
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Redistribution and use in source and binary forms, with or without
sahilmgandhi 18:6a4db94011d3 11 * modification, are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 12 * Redistributions of source code must retain the above copyright
sahilmgandhi 18:6a4db94011d3 13 notice, this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 14 * Redistributions in binary form must reproduce the above copyright
sahilmgandhi 18:6a4db94011d3 15 notice, this list of conditions and the following disclaimer in the
sahilmgandhi 18:6a4db94011d3 16 documentation and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 17 * Neither the name of the ARM Limited nor the
sahilmgandhi 18:6a4db94011d3 18 names of its contributors may be used to endorse or promote products
sahilmgandhi 18:6a4db94011d3 19 derived from this software without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 20 *
sahilmgandhi 18:6a4db94011d3 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
sahilmgandhi 18:6a4db94011d3 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
sahilmgandhi 18:6a4db94011d3 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 24 * DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
sahilmgandhi 18:6a4db94011d3 25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
sahilmgandhi 18:6a4db94011d3 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
sahilmgandhi 18:6a4db94011d3 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
sahilmgandhi 18:6a4db94011d3 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
sahilmgandhi 18:6a4db94011d3 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
sahilmgandhi 18:6a4db94011d3 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 31 */
sahilmgandhi 18:6a4db94011d3 32 .syntax unified
sahilmgandhi 18:6a4db94011d3 33 .arch armv7-m
sahilmgandhi 18:6a4db94011d3 34
sahilmgandhi 18:6a4db94011d3 35 .section .stack
sahilmgandhi 18:6a4db94011d3 36 .align 3
sahilmgandhi 18:6a4db94011d3 37 #ifdef __STACK_SIZE
sahilmgandhi 18:6a4db94011d3 38 .equ Stack_Size, __STACK_SIZE
sahilmgandhi 18:6a4db94011d3 39 #else
sahilmgandhi 18:6a4db94011d3 40 .equ Stack_Size, 0x400
sahilmgandhi 18:6a4db94011d3 41 #endif
sahilmgandhi 18:6a4db94011d3 42 .globl __StackTop
sahilmgandhi 18:6a4db94011d3 43 .globl __StackLimit
sahilmgandhi 18:6a4db94011d3 44 __StackLimit:
sahilmgandhi 18:6a4db94011d3 45 .space Stack_Size
sahilmgandhi 18:6a4db94011d3 46 .size __StackLimit, . - __StackLimit
sahilmgandhi 18:6a4db94011d3 47 __StackTop:
sahilmgandhi 18:6a4db94011d3 48 .size __StackTop, . - __StackTop
sahilmgandhi 18:6a4db94011d3 49
sahilmgandhi 18:6a4db94011d3 50 .section .heap
sahilmgandhi 18:6a4db94011d3 51 .align 3
sahilmgandhi 18:6a4db94011d3 52 #ifdef __HEAP_SIZE
sahilmgandhi 18:6a4db94011d3 53 .equ Heap_Size, __HEAP_SIZE
sahilmgandhi 18:6a4db94011d3 54 #else
sahilmgandhi 18:6a4db94011d3 55 .equ Heap_Size, 0xC00
sahilmgandhi 18:6a4db94011d3 56 #endif
sahilmgandhi 18:6a4db94011d3 57 .globl __HeapBase
sahilmgandhi 18:6a4db94011d3 58 .globl __HeapLimit
sahilmgandhi 18:6a4db94011d3 59 __HeapBase:
sahilmgandhi 18:6a4db94011d3 60 .if Heap_Size
sahilmgandhi 18:6a4db94011d3 61 .space Heap_Size
sahilmgandhi 18:6a4db94011d3 62 .endif
sahilmgandhi 18:6a4db94011d3 63 .size __HeapBase, . - __HeapBase
sahilmgandhi 18:6a4db94011d3 64 __HeapLimit:
sahilmgandhi 18:6a4db94011d3 65 .size __HeapLimit, . - __HeapLimit
sahilmgandhi 18:6a4db94011d3 66
sahilmgandhi 18:6a4db94011d3 67 .section .isr_vector
sahilmgandhi 18:6a4db94011d3 68 .align 2
sahilmgandhi 18:6a4db94011d3 69 .globl __isr_vector
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71 __isr_vector:
sahilmgandhi 18:6a4db94011d3 72 .long __StackTop /* Top of Stack */
sahilmgandhi 18:6a4db94011d3 73 .long Reset_Handler /* Reset Handler */
sahilmgandhi 18:6a4db94011d3 74 .long NMI_Handler /* NMI Handler */
sahilmgandhi 18:6a4db94011d3 75 .long HardFault_Handler /* Hard Fault Handler */
sahilmgandhi 18:6a4db94011d3 76 .long MemManage_Handler /* MPU Fault Handler */
sahilmgandhi 18:6a4db94011d3 77 .long BusFault_Handler /* Bus Fault Handler */
sahilmgandhi 18:6a4db94011d3 78 .long UsageFault_Handler /* Usage Fault Handler */
sahilmgandhi 18:6a4db94011d3 79 .long 0 /* Reserved */
sahilmgandhi 18:6a4db94011d3 80 .long 0 /* Reserved */
sahilmgandhi 18:6a4db94011d3 81 .long 0 /* Reserved */
sahilmgandhi 18:6a4db94011d3 82 .long 0 /* Reserved */
sahilmgandhi 18:6a4db94011d3 83 .long SVC_Handler /* SVCall Handler */
sahilmgandhi 18:6a4db94011d3 84 .long DebugMon_Handler /* Debug Monitor Handler */
sahilmgandhi 18:6a4db94011d3 85 .long 0 /* Reserved */
sahilmgandhi 18:6a4db94011d3 86 .long PendSV_Handler /* PendSV Handler */
sahilmgandhi 18:6a4db94011d3 87 .long SysTick_Handler /* SysTick Handler */
sahilmgandhi 18:6a4db94011d3 88
sahilmgandhi 18:6a4db94011d3 89 /* External interrupts */
sahilmgandhi 18:6a4db94011d3 90 .long DMA0_IRQHandler // DMA channel 0 transfer complete interrupt
sahilmgandhi 18:6a4db94011d3 91 .long DMA1_IRQHandler // DMA channel 0 transfer complete interrupt
sahilmgandhi 18:6a4db94011d3 92 .long DMA2_IRQHandler // DMA channel 0 transfer complete interrupt
sahilmgandhi 18:6a4db94011d3 93 .long DMA3_IRQHandler // DMA channel 0 transfer complete interrupt
sahilmgandhi 18:6a4db94011d3 94 .long DMA4_IRQHandler // DMA channel 0 transfer complete interrupt
sahilmgandhi 18:6a4db94011d3 95 .long DMA5_IRQHandler // DMA channel 0 transfer complete interrupt
sahilmgandhi 18:6a4db94011d3 96 .long DMA6_IRQHandler // DMA channel 0 transfer complete interrupt
sahilmgandhi 18:6a4db94011d3 97 .long DMA7_IRQHandler // DMA channel 0 transfer complete interrupt
sahilmgandhi 18:6a4db94011d3 98 .long DMA8_IRQHandler // DMA channel 0 transfer complete interrupt
sahilmgandhi 18:6a4db94011d3 99 .long DMA9_IRQHandler // DMA channel 0 transfer complete interrupt
sahilmgandhi 18:6a4db94011d3 100 .long DMA10_IRQHandler // DMA channel 0 transfer complete interrupt
sahilmgandhi 18:6a4db94011d3 101 .long DMA11_IRQHandler // DMA channel 0 transfer complete interrupt
sahilmgandhi 18:6a4db94011d3 102 .long DMA12_IRQHandler // DMA channel 0 transfer complete interrupt
sahilmgandhi 18:6a4db94011d3 103 .long DMA13_IRQHandler // DMA channel 0 transfer complete interrupt
sahilmgandhi 18:6a4db94011d3 104 .long DMA14_IRQHandler // DMA channel 0 transfer complete interrupt
sahilmgandhi 18:6a4db94011d3 105 .long DMA15_IRQHandler // DMA channel 0 transfer complete interrupt
sahilmgandhi 18:6a4db94011d3 106 .long DMA_Error_IRQHandler // DMA error interrupt
sahilmgandhi 18:6a4db94011d3 107 .long Reserved33_IRQHandler // Reserved interrupt 33
sahilmgandhi 18:6a4db94011d3 108 .long FTFL_IRQHandler // FTFL interrupt
sahilmgandhi 18:6a4db94011d3 109 .long Read_Collision_IRQHandler // Read collision interrupt
sahilmgandhi 18:6a4db94011d3 110 .long LVD_LVW_IRQHandler // Low Voltage Detect, Low Voltage Warning
sahilmgandhi 18:6a4db94011d3 111 .long LLW_IRQHandler // Low Leakage Wakeup
sahilmgandhi 18:6a4db94011d3 112 .long Watchdog_IRQHandler // WDOG interrupt
sahilmgandhi 18:6a4db94011d3 113 .long Reserved39_IRQHandler // Reserved interrupt 39
sahilmgandhi 18:6a4db94011d3 114 .long I2C0_IRQHandler // I2C0 interrupt
sahilmgandhi 18:6a4db94011d3 115 .long I2C1_IRQHandler // I2C1 interrupt
sahilmgandhi 18:6a4db94011d3 116 .long SPI0_IRQHandler // SPI0 interrupt
sahilmgandhi 18:6a4db94011d3 117 .long SPI1_IRQHandler // SPI1 interrupt
sahilmgandhi 18:6a4db94011d3 118 .long Reserved44_IRQHandler // Reserved interrupt 44
sahilmgandhi 18:6a4db94011d3 119 .long CAN0_ORed_Message_buffer_IRQHandler // CAN0 OR'd message buffers interrupt
sahilmgandhi 18:6a4db94011d3 120 .long CAN0_Bus_Off_IRQHandler // CAN0 bus off interrupt
sahilmgandhi 18:6a4db94011d3 121 .long CAN0_Error_IRQHandler // CAN0 error interrupt
sahilmgandhi 18:6a4db94011d3 122 .long CAN0_Tx_Warning_IRQHandler // CAN0 Tx warning interrupt
sahilmgandhi 18:6a4db94011d3 123 .long CAN0_Rx_Warning_IRQHandler // CAN0 Rx warning interrupt
sahilmgandhi 18:6a4db94011d3 124 .long CAN0_Wake_Up_IRQHandler // CAN0 wake up interrupt
sahilmgandhi 18:6a4db94011d3 125 .long I2S0_Tx_IRQHandler // I2S0 transmit interrupt
sahilmgandhi 18:6a4db94011d3 126 .long I2S0_Rx_IRQHandler // I2S0 receive interrupt
sahilmgandhi 18:6a4db94011d3 127 .long Reserved53_IRQHandler // Reserved interrupt 53
sahilmgandhi 18:6a4db94011d3 128 .long Reserved54_IRQHandler // Reserved interrupt 54
sahilmgandhi 18:6a4db94011d3 129 .long Reserved55_IRQHandler // Reserved interrupt 55
sahilmgandhi 18:6a4db94011d3 130 .long Reserved56_IRQHandler // Reserved interrupt 56
sahilmgandhi 18:6a4db94011d3 131 .long Reserved57_IRQHandler // Reserved interrupt 57
sahilmgandhi 18:6a4db94011d3 132 .long Reserved58_IRQHandler // Reserved interrupt 58
sahilmgandhi 18:6a4db94011d3 133 .long Reserved59_IRQHandler // Reserved interrupt 59
sahilmgandhi 18:6a4db94011d3 134 .long UART0_LON_IRQHandler // UART0 LON interrupt
sahilmgandhi 18:6a4db94011d3 135 .long UART0_RX_TX_IRQHandler // UART0 receive/transmit interrupt
sahilmgandhi 18:6a4db94011d3 136 .long UART0_ERR_IRQHandler // UART0 error interrupt
sahilmgandhi 18:6a4db94011d3 137 .long UART1_RX_TX_IRQHandler // UART1 receive/transmit interrupt
sahilmgandhi 18:6a4db94011d3 138 .long UART1_ERR_IRQHandler // UART1 error interrupt
sahilmgandhi 18:6a4db94011d3 139 .long UART2_RX_TX_IRQHandler // UART2 receive/transmit interrupt
sahilmgandhi 18:6a4db94011d3 140 .long UART2_ERR_IRQHandler // UART2 error interrupt
sahilmgandhi 18:6a4db94011d3 141 .long Reserved67_IRQHandler // Reserved interrupt 67
sahilmgandhi 18:6a4db94011d3 142 .long Reserved68_IRQHandler // Reserved interrupt 68
sahilmgandhi 18:6a4db94011d3 143 .long Reserved69_IRQHandler // Reserved interrupt 69
sahilmgandhi 18:6a4db94011d3 144 .long Reserved70_IRQHandler // Reserved interrupt 70
sahilmgandhi 18:6a4db94011d3 145 .long Reserved71_IRQHandler // Reserved interrupt 71
sahilmgandhi 18:6a4db94011d3 146 .long Reserved72_IRQHandler // Reserved interrupt 72
sahilmgandhi 18:6a4db94011d3 147 .long ADC0_IRQHandler // ADC0 interrupt
sahilmgandhi 18:6a4db94011d3 148 .long ADC1_IRQHandler // ADC1 interrupt
sahilmgandhi 18:6a4db94011d3 149 .long CMP0_IRQHandler // CMP0 interrupt
sahilmgandhi 18:6a4db94011d3 150 .long CMP1_IRQHandler // CMP1 interrupt
sahilmgandhi 18:6a4db94011d3 151 .long CMP2_IRQHandler // CMP2 interrupt
sahilmgandhi 18:6a4db94011d3 152 .long FTM0_IRQHandler // FTM0 fault, overflow and channels interrupt
sahilmgandhi 18:6a4db94011d3 153 .long FTM1_IRQHandler // FTM1 fault, overflow and channels interrupt
sahilmgandhi 18:6a4db94011d3 154 .long FTM2_IRQHandler // FTM2 fault, overflow and channels interrupt
sahilmgandhi 18:6a4db94011d3 155 .long CMT_IRQHandler // CMT interrupt
sahilmgandhi 18:6a4db94011d3 156 .long RTC_IRQHandler // RTC interrupt
sahilmgandhi 18:6a4db94011d3 157 .long RTC_Seconds_IRQHandler // RTC seconds interrupt
sahilmgandhi 18:6a4db94011d3 158 .long PIT0_IRQHandler // PIT timer channel 0 interrupt
sahilmgandhi 18:6a4db94011d3 159 .long PIT1_IRQHandler // PIT timer channel 1 interrupt
sahilmgandhi 18:6a4db94011d3 160 .long PIT2_IRQHandler // PIT timer channel 2 interrupt
sahilmgandhi 18:6a4db94011d3 161 .long PIT3_IRQHandler // PIT timer channel 3 interrupt
sahilmgandhi 18:6a4db94011d3 162 .long PDB0_IRQHandler // PDB0 interrupt
sahilmgandhi 18:6a4db94011d3 163 .long USB0_IRQHandler // USB0 interrupt
sahilmgandhi 18:6a4db94011d3 164 .long USBDCD_IRQHandler // USBDCD interrupt
sahilmgandhi 18:6a4db94011d3 165 .long Reserved91_IRQHandler // Reserved interrupt 91
sahilmgandhi 18:6a4db94011d3 166 .long Reserved92_IRQHandler // Reserved interrupt 92
sahilmgandhi 18:6a4db94011d3 167 .long Reserved93_IRQHandler // Reserved interrupt 93
sahilmgandhi 18:6a4db94011d3 168 .long Reserved94_IRQHandler // Reserved interrupt 94
sahilmgandhi 18:6a4db94011d3 169 .long Reserved95_IRQHandler // Reserved interrupt 95
sahilmgandhi 18:6a4db94011d3 170 .long Reserved96_IRQHandler // Reserved interrupt 96
sahilmgandhi 18:6a4db94011d3 171 .long DAC0_IRQHandler // DAC0 interrupt
sahilmgandhi 18:6a4db94011d3 172 .long Reserved98_IRQHandler // Reserved interrupt 98
sahilmgandhi 18:6a4db94011d3 173 .long TSI0_IRQHandler // TSI0 interrupt
sahilmgandhi 18:6a4db94011d3 174 .long MCG_IRQHandler // MCG interrupt
sahilmgandhi 18:6a4db94011d3 175 .long LPTimer_IRQHandler // LPTimer interrupt
sahilmgandhi 18:6a4db94011d3 176 .long Reserved102_IRQHandler // Reserved interrupt 102
sahilmgandhi 18:6a4db94011d3 177 .long PORTA_IRQHandler // Port A interrupt
sahilmgandhi 18:6a4db94011d3 178 .long PORTB_IRQHandler // Port B interrupt
sahilmgandhi 18:6a4db94011d3 179 .long PORTC_IRQHandler // Port C interrupt
sahilmgandhi 18:6a4db94011d3 180 .long PORTD_IRQHandler // Port D interrupt
sahilmgandhi 18:6a4db94011d3 181 .long PORTE_IRQHandler // Port E interrupt
sahilmgandhi 18:6a4db94011d3 182 .long Reserved108_IRQHandler // Reserved interrupt 108
sahilmgandhi 18:6a4db94011d3 183 .long Reserved109_IRQHandler // Reserved interrupt 109
sahilmgandhi 18:6a4db94011d3 184 .long SWI_IRQHandler // Software interrupt
sahilmgandhi 18:6a4db94011d3 185
sahilmgandhi 18:6a4db94011d3 186 .size __isr_vector, . - __isr_vector
sahilmgandhi 18:6a4db94011d3 187
sahilmgandhi 18:6a4db94011d3 188 .section .text.Reset_Handler
sahilmgandhi 18:6a4db94011d3 189 .thumb
sahilmgandhi 18:6a4db94011d3 190 .thumb_func
sahilmgandhi 18:6a4db94011d3 191 .align 2
sahilmgandhi 18:6a4db94011d3 192 .globl Reset_Handler
sahilmgandhi 18:6a4db94011d3 193 .type Reset_Handler, %function
sahilmgandhi 18:6a4db94011d3 194 Reset_Handler:
sahilmgandhi 18:6a4db94011d3 195 /*
sahilmgandhi 18:6a4db94011d3 196 * Call SystemInit before loading the .data section to prevent the watchdog
sahilmgandhi 18:6a4db94011d3 197 * from resetting the board.
sahilmgandhi 18:6a4db94011d3 198 */
sahilmgandhi 18:6a4db94011d3 199 ldr r0, =SystemInit
sahilmgandhi 18:6a4db94011d3 200 blx r0
sahilmgandhi 18:6a4db94011d3 201
sahilmgandhi 18:6a4db94011d3 202 /* Loop to copy data from read only memory to RAM. The ranges
sahilmgandhi 18:6a4db94011d3 203 * of copy from/to are specified by following symbols evaluated in
sahilmgandhi 18:6a4db94011d3 204 * linker script.
sahilmgandhi 18:6a4db94011d3 205 * __etext: End of code section, i.e., begin of data sections to copy from.
sahilmgandhi 18:6a4db94011d3 206 * __data_start__/__data_end__: RAM address range that data should be
sahilmgandhi 18:6a4db94011d3 207 * copied to. Both must be aligned to 4 bytes boundary. */
sahilmgandhi 18:6a4db94011d3 208
sahilmgandhi 18:6a4db94011d3 209 ldr r1, =__etext
sahilmgandhi 18:6a4db94011d3 210 ldr r2, =__data_start__
sahilmgandhi 18:6a4db94011d3 211 ldr r3, =__data_end__
sahilmgandhi 18:6a4db94011d3 212
sahilmgandhi 18:6a4db94011d3 213 .Lflash_to_ram_loop:
sahilmgandhi 18:6a4db94011d3 214 cmp r2, r3
sahilmgandhi 18:6a4db94011d3 215 ittt lt
sahilmgandhi 18:6a4db94011d3 216 ldrlt r0, [r1], #4
sahilmgandhi 18:6a4db94011d3 217 strlt r0, [r2], #4
sahilmgandhi 18:6a4db94011d3 218 blt .Lflash_to_ram_loop
sahilmgandhi 18:6a4db94011d3 219
sahilmgandhi 18:6a4db94011d3 220 .Lflash_to_ram_loop_end:
sahilmgandhi 18:6a4db94011d3 221
sahilmgandhi 18:6a4db94011d3 222 ldr r0, =_start
sahilmgandhi 18:6a4db94011d3 223 bx r0
sahilmgandhi 18:6a4db94011d3 224 .pool
sahilmgandhi 18:6a4db94011d3 225 .size Reset_Handler, . - Reset_Handler
sahilmgandhi 18:6a4db94011d3 226
sahilmgandhi 18:6a4db94011d3 227 .text
sahilmgandhi 18:6a4db94011d3 228 /* Macro to define default handlers. Default handler
sahilmgandhi 18:6a4db94011d3 229 * will be weak symbol and just dead loops. They can be
sahilmgandhi 18:6a4db94011d3 230 * overwritten by other handlers */
sahilmgandhi 18:6a4db94011d3 231 .macro def_default_handler handler_name
sahilmgandhi 18:6a4db94011d3 232 .align 1
sahilmgandhi 18:6a4db94011d3 233 .thumb_func
sahilmgandhi 18:6a4db94011d3 234 .weak \handler_name
sahilmgandhi 18:6a4db94011d3 235 .type \handler_name, %function
sahilmgandhi 18:6a4db94011d3 236 \handler_name :
sahilmgandhi 18:6a4db94011d3 237 b .
sahilmgandhi 18:6a4db94011d3 238 .size \handler_name, . - \handler_name
sahilmgandhi 18:6a4db94011d3 239 .endm
sahilmgandhi 18:6a4db94011d3 240
sahilmgandhi 18:6a4db94011d3 241 def_default_handler NMI_Handler
sahilmgandhi 18:6a4db94011d3 242 def_default_handler HardFault_Handler
sahilmgandhi 18:6a4db94011d3 243 def_default_handler MemManage_Handler
sahilmgandhi 18:6a4db94011d3 244 def_default_handler BusFault_Handler
sahilmgandhi 18:6a4db94011d3 245 def_default_handler UsageFault_Handler
sahilmgandhi 18:6a4db94011d3 246 def_default_handler SVC_Handler
sahilmgandhi 18:6a4db94011d3 247 def_default_handler DebugMon_Handler
sahilmgandhi 18:6a4db94011d3 248 def_default_handler PendSV_Handler
sahilmgandhi 18:6a4db94011d3 249 def_default_handler SysTick_Handler
sahilmgandhi 18:6a4db94011d3 250 def_default_handler Default_Handler
sahilmgandhi 18:6a4db94011d3 251
sahilmgandhi 18:6a4db94011d3 252 .macro def_irq_default_handler handler_name
sahilmgandhi 18:6a4db94011d3 253 .weak \handler_name
sahilmgandhi 18:6a4db94011d3 254 .set \handler_name, Default_Handler
sahilmgandhi 18:6a4db94011d3 255 .endm
sahilmgandhi 18:6a4db94011d3 256
sahilmgandhi 18:6a4db94011d3 257
sahilmgandhi 18:6a4db94011d3 258 def_irq_default_handler DMA0_IRQHandler
sahilmgandhi 18:6a4db94011d3 259 def_irq_default_handler DMA1_IRQHandler
sahilmgandhi 18:6a4db94011d3 260 def_irq_default_handler DMA2_IRQHandler
sahilmgandhi 18:6a4db94011d3 261 def_irq_default_handler DMA3_IRQHandler
sahilmgandhi 18:6a4db94011d3 262 def_irq_default_handler DMA4_IRQHandler
sahilmgandhi 18:6a4db94011d3 263 def_irq_default_handler DMA5_IRQHandler
sahilmgandhi 18:6a4db94011d3 264 def_irq_default_handler DMA6_IRQHandler
sahilmgandhi 18:6a4db94011d3 265 def_irq_default_handler DMA7_IRQHandler
sahilmgandhi 18:6a4db94011d3 266 def_irq_default_handler DMA8_IRQHandler
sahilmgandhi 18:6a4db94011d3 267 def_irq_default_handler DMA9_IRQHandler
sahilmgandhi 18:6a4db94011d3 268 def_irq_default_handler DMA10_IRQHandler
sahilmgandhi 18:6a4db94011d3 269 def_irq_default_handler DMA11_IRQHandler
sahilmgandhi 18:6a4db94011d3 270 def_irq_default_handler DMA12_IRQHandler
sahilmgandhi 18:6a4db94011d3 271 def_irq_default_handler DMA13_IRQHandler
sahilmgandhi 18:6a4db94011d3 272 def_irq_default_handler DMA14_IRQHandler
sahilmgandhi 18:6a4db94011d3 273 def_irq_default_handler DMA15_IRQHandler
sahilmgandhi 18:6a4db94011d3 274 def_irq_default_handler DMA_Error_IRQHandler
sahilmgandhi 18:6a4db94011d3 275 def_irq_default_handler Reserved33_IRQHandler
sahilmgandhi 18:6a4db94011d3 276 def_irq_default_handler FTFL_IRQHandler
sahilmgandhi 18:6a4db94011d3 277 def_irq_default_handler Read_Collision_IRQHandler
sahilmgandhi 18:6a4db94011d3 278 def_irq_default_handler LVD_LVW_IRQHandler
sahilmgandhi 18:6a4db94011d3 279 def_irq_default_handler LLW_IRQHandler
sahilmgandhi 18:6a4db94011d3 280 def_irq_default_handler Watchdog_IRQHandler
sahilmgandhi 18:6a4db94011d3 281 def_irq_default_handler Reserved39_IRQHandler
sahilmgandhi 18:6a4db94011d3 282 def_irq_default_handler I2C0_IRQHandler
sahilmgandhi 18:6a4db94011d3 283 def_irq_default_handler I2C1_IRQHandler
sahilmgandhi 18:6a4db94011d3 284 def_irq_default_handler SPI0_IRQHandler
sahilmgandhi 18:6a4db94011d3 285 def_irq_default_handler SPI1_IRQHandler
sahilmgandhi 18:6a4db94011d3 286 def_irq_default_handler Reserved44_IRQHandler
sahilmgandhi 18:6a4db94011d3 287 def_irq_default_handler CAN0_ORed_Message_buffer_IRQHandler
sahilmgandhi 18:6a4db94011d3 288 def_irq_default_handler CAN0_Bus_Off_IRQHandler
sahilmgandhi 18:6a4db94011d3 289 def_irq_default_handler CAN0_Error_IRQHandler
sahilmgandhi 18:6a4db94011d3 290 def_irq_default_handler CAN0_Tx_Warning_IRQHandler
sahilmgandhi 18:6a4db94011d3 291 def_irq_default_handler CAN0_Rx_Warning_IRQHandler
sahilmgandhi 18:6a4db94011d3 292 def_irq_default_handler CAN0_Wake_Up_IRQHandler
sahilmgandhi 18:6a4db94011d3 293 def_irq_default_handler I2S0_Tx_IRQHandler
sahilmgandhi 18:6a4db94011d3 294 def_irq_default_handler I2S0_Rx_IRQHandler
sahilmgandhi 18:6a4db94011d3 295 def_irq_default_handler Reserved53_IRQHandler
sahilmgandhi 18:6a4db94011d3 296 def_irq_default_handler Reserved54_IRQHandler
sahilmgandhi 18:6a4db94011d3 297 def_irq_default_handler Reserved55_IRQHandler
sahilmgandhi 18:6a4db94011d3 298 def_irq_default_handler Reserved56_IRQHandler
sahilmgandhi 18:6a4db94011d3 299 def_irq_default_handler Reserved57_IRQHandler
sahilmgandhi 18:6a4db94011d3 300 def_irq_default_handler Reserved58_IRQHandler
sahilmgandhi 18:6a4db94011d3 301 def_irq_default_handler Reserved59_IRQHandler
sahilmgandhi 18:6a4db94011d3 302 def_irq_default_handler UART0_LON_IRQHandler
sahilmgandhi 18:6a4db94011d3 303 def_irq_default_handler UART0_RX_TX_IRQHandler
sahilmgandhi 18:6a4db94011d3 304 def_irq_default_handler UART0_ERR_IRQHandler
sahilmgandhi 18:6a4db94011d3 305 def_irq_default_handler UART1_RX_TX_IRQHandler
sahilmgandhi 18:6a4db94011d3 306 def_irq_default_handler UART1_ERR_IRQHandler
sahilmgandhi 18:6a4db94011d3 307 def_irq_default_handler UART2_RX_TX_IRQHandler
sahilmgandhi 18:6a4db94011d3 308 def_irq_default_handler UART2_ERR_IRQHandler
sahilmgandhi 18:6a4db94011d3 309 def_irq_default_handler Reserved67_IRQHandler
sahilmgandhi 18:6a4db94011d3 310 def_irq_default_handler Reserved68_IRQHandler
sahilmgandhi 18:6a4db94011d3 311 def_irq_default_handler Reserved69_IRQHandler
sahilmgandhi 18:6a4db94011d3 312 def_irq_default_handler Reserved70_IRQHandler
sahilmgandhi 18:6a4db94011d3 313 def_irq_default_handler Reserved71_IRQHandler
sahilmgandhi 18:6a4db94011d3 314 def_irq_default_handler Reserved72_IRQHandler
sahilmgandhi 18:6a4db94011d3 315 def_irq_default_handler ADC0_IRQHandler
sahilmgandhi 18:6a4db94011d3 316 def_irq_default_handler ADC1_IRQHandler
sahilmgandhi 18:6a4db94011d3 317 def_irq_default_handler CMP0_IRQHandler
sahilmgandhi 18:6a4db94011d3 318 def_irq_default_handler CMP1_IRQHandler
sahilmgandhi 18:6a4db94011d3 319 def_irq_default_handler CMP2_IRQHandler
sahilmgandhi 18:6a4db94011d3 320 def_irq_default_handler FTM0_IRQHandler
sahilmgandhi 18:6a4db94011d3 321 def_irq_default_handler FTM1_IRQHandler
sahilmgandhi 18:6a4db94011d3 322 def_irq_default_handler FTM2_IRQHandler
sahilmgandhi 18:6a4db94011d3 323 def_irq_default_handler CMT_IRQHandler
sahilmgandhi 18:6a4db94011d3 324 def_irq_default_handler RTC_IRQHandler
sahilmgandhi 18:6a4db94011d3 325 def_irq_default_handler RTC_Seconds_IRQHandler
sahilmgandhi 18:6a4db94011d3 326 def_irq_default_handler PIT0_IRQHandler
sahilmgandhi 18:6a4db94011d3 327 def_irq_default_handler PIT1_IRQHandler
sahilmgandhi 18:6a4db94011d3 328 def_irq_default_handler PIT2_IRQHandler
sahilmgandhi 18:6a4db94011d3 329 def_irq_default_handler PIT3_IRQHandler
sahilmgandhi 18:6a4db94011d3 330 def_irq_default_handler PDB0_IRQHandler
sahilmgandhi 18:6a4db94011d3 331 def_irq_default_handler USB0_IRQHandler
sahilmgandhi 18:6a4db94011d3 332 def_irq_default_handler USBDCD_IRQHandler
sahilmgandhi 18:6a4db94011d3 333 def_irq_default_handler Reserved91_IRQHandler
sahilmgandhi 18:6a4db94011d3 334 def_irq_default_handler Reserved92_IRQHandler
sahilmgandhi 18:6a4db94011d3 335 def_irq_default_handler Reserved93_IRQHandler
sahilmgandhi 18:6a4db94011d3 336 def_irq_default_handler Reserved94_IRQHandler
sahilmgandhi 18:6a4db94011d3 337 def_irq_default_handler Reserved95_IRQHandler
sahilmgandhi 18:6a4db94011d3 338 def_irq_default_handler Reserved96_IRQHandler
sahilmgandhi 18:6a4db94011d3 339 def_irq_default_handler DAC0_IRQHandler
sahilmgandhi 18:6a4db94011d3 340 def_irq_default_handler Reserved98_IRQHandler
sahilmgandhi 18:6a4db94011d3 341 def_irq_default_handler TSI0_IRQHandler
sahilmgandhi 18:6a4db94011d3 342 def_irq_default_handler MCG_IRQHandler
sahilmgandhi 18:6a4db94011d3 343 def_irq_default_handler LPTimer_IRQHandler
sahilmgandhi 18:6a4db94011d3 344 def_irq_default_handler Reserved102_IRQHandler
sahilmgandhi 18:6a4db94011d3 345 def_irq_default_handler PORTA_IRQHandler
sahilmgandhi 18:6a4db94011d3 346 def_irq_default_handler PORTB_IRQHandler
sahilmgandhi 18:6a4db94011d3 347 def_irq_default_handler PORTC_IRQHandler
sahilmgandhi 18:6a4db94011d3 348 def_irq_default_handler PORTD_IRQHandler
sahilmgandhi 18:6a4db94011d3 349 def_irq_default_handler PORTE_IRQHandler
sahilmgandhi 18:6a4db94011d3 350 def_irq_default_handler Reserved108_IRQHandler
sahilmgandhi 18:6a4db94011d3 351 def_irq_default_handler Reserved109_IRQHandler
sahilmgandhi 18:6a4db94011d3 352 def_irq_default_handler SWI_IRQHandler
sahilmgandhi 18:6a4db94011d3 353 def_irq_default_handler DefaultISR
sahilmgandhi 18:6a4db94011d3 354
sahilmgandhi 18:6a4db94011d3 355 /* Flash protection region, placed at 0x400 */
sahilmgandhi 18:6a4db94011d3 356 .text
sahilmgandhi 18:6a4db94011d3 357 .thumb
sahilmgandhi 18:6a4db94011d3 358 .align 2
sahilmgandhi 18:6a4db94011d3 359 .section .kinetis_flash_config_field,"a",%progbits
sahilmgandhi 18:6a4db94011d3 360 kinetis_flash_config:
sahilmgandhi 18:6a4db94011d3 361 .long 0xffffffff
sahilmgandhi 18:6a4db94011d3 362 .long 0xffffffff
sahilmgandhi 18:6a4db94011d3 363 .long 0xffffffff
sahilmgandhi 18:6a4db94011d3 364 .long 0xfffffffe
sahilmgandhi 18:6a4db94011d3 365
sahilmgandhi 18:6a4db94011d3 366 .end