CorsoSTM32 / TextLCD

It shows by an example how to use TextLCD library

Dependents:   STMNucleoF401RE_ExampleCode_04_LCD

TextLCD.cpp@41:b4ec0bc9d921, 2015-11-02 (annotated)

Committer:
perlatecnica
Date:
Mon Nov 02 13:50:43 2015 +0000
Revision:
41:b4ec0bc9d921
Parent:
40:d3496c3ea301 
v1.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wim 37:ce348c002929 1 /* mbed TextLCD Library, for LCDs based on HD44780 controllers
simon 6:e4cb7ddee0d3 2 * Copyright (c) 2007-2010, sford, http://mbed.org
wim 14:0c32b66b14b8 3 * 2013, v01: WH, Added LCD types, fixed LCD address issues, added Cursor and UDCs
wim 14:0c32b66b14b8 4 * 2013, v02: WH, Added I2C and SPI bus interfaces
wim 15:b70ebfffb258 5 * 2013, v03: WH, Added support for LCD40x4 which uses 2 controllers
wim 18:bd65dc10f27f 6 * 2013, v04: WH, Added support for Display On/Off, improved 4bit bootprocess
wim 18:bd65dc10f27f 7 * 2013, v05: WH, Added support for 8x2B, added some UDCs
wim 19:c747b9e2e7b8 8 * 2013, v06: WH, Added support for devices that use internal DC/DC converters
wim 20:e0da005a777f 9 * 2013, v07: WH, Added support for backlight and include portdefinitions for LCD2004 Module from DFROBOT
wim 22:35742ec80c24 10 * 2014, v08: WH, Refactored in Base and Derived Classes to deal with mbed lib change regarding 'NC' defined pins
wim 25:6162b31128c9 11 * 2014, v09: WH/EO, Added Class for Native SPI controllers such as ST7032
wim 26:bd897a001012 12 * 2014, v10: WH, Added Class for Native I2C controllers such as ST7032i, Added support for MCP23008 I2C portexpander, Added support for Adafruit module
wim 30:033048611c01 13 * 2014, v11: WH, Added support for native I2C controllers such as PCF21XX, Improved the _initCtrl() method to deal with differences between all supported controllers
wim 32:59c4b8f648d4 14 * 2014, v12: WH, Added support for native I2C controller PCF2119 and native I2C/SPI controllers SSD1803, ST7036, added setContrast method (by JH1PJL) for supported devices (eg ST7032i)
wim 34:e5a0dcb43ecc 15 * 2014, v13: WH, Added support for controllers US2066/SSD1311 (OLED), added setUDCBlink() method for supported devices (eg SSD1803), fixed issue in setPower()
wim 34:e5a0dcb43ecc 16 * 2014, v14: WH, Added support for PT6314 (VFD), added setOrient() method for supported devices (eg SSD1803, US2066), added Double Height lines for supported devices,
wim 34:e5a0dcb43ecc 17 * added 16 UDCs for supported devices (eg PCF2103), moved UDC defines to TextLCD_UDC file, added TextLCD_Config.h for feature and footprint settings.
wim 35:311be6444a39 18 * 2014, v15: WH, Added AC780 support, added I2C expander modules, fixed setBacklight() for inverted logic modules. Fixed bug in LCD_SPI_N define
wim 36:9f5f86dfd44a 19 * 2014, v16: WH, Added ST7070 and KS0073 support, added setIcon(), clrIcon() and setInvert() method for supported devices
wim 37:ce348c002929 20 * 2015, v17: WH, Clean up low-level _writeCommand() and _writeData(), Added support for alternative fonttables (eg PCF21XX), Added ST7066_ACM controller for ACM1602 module
wim 38:cbe275b0b647 21 * 2015, v18: WH, Performance improvement I2C portexpander
wim 38:cbe275b0b647 22 * 2015, v19: WH, Fixed Adafruit I2C/SPI portexpander pinmappings, fixed SYDZ Backlight
wim 39:e9c2319de9c5 23 * 2015, v20: WH, Fixed occasional Init fail caused by insufficient wait time after ReturnHome command (0x02), Added defines to reduce memory footprint (eg LCD_ICON),
wim 40:d3496c3ea301 24 * Fixed and Added more fonttable support for PCF2119R_3V3, Added HD66712 controller.
simon 1:ac48b187213c 25 *
simon 1:ac48b187213c 26 * Permission is hereby granted, free of charge, to any person obtaining a copy
simon 1:ac48b187213c 27 * of this software and associated documentation files (the "Software"), to deal
simon 1:ac48b187213c 28 * in the Software without restriction, including without limitation the rights
simon 1:ac48b187213c 29 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
simon 1:ac48b187213c 30 * copies of the Software, and to permit persons to whom the Software is
simon 1:ac48b187213c 31 * furnished to do so, subject to the following conditions:
simon 1:ac48b187213c 32 *
simon 1:ac48b187213c 33 * The above copyright notice and this permission notice shall be included in
simon 1:ac48b187213c 34 * all copies or substantial portions of the Software.
simon 1:ac48b187213c 35 *
simon 1:ac48b187213c 36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
simon 1:ac48b187213c 37 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
simon 1:ac48b187213c 38 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
simon 1:ac48b187213c 39 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
simon 1:ac48b187213c 40 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
simon 1:ac48b187213c 41 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
simon 1:ac48b187213c 42 * THE SOFTWARE.
simon 1:ac48b187213c 43 */
wim 34:e5a0dcb43ecc 44 #include "mbed.h"
simon 1:ac48b187213c 45 #include "TextLCD.h"
wim 34:e5a0dcb43ecc 46 #include "TextLCD_UDC.inc"
wim 34:e5a0dcb43ecc 47
wim 21:9eb628d9e164 48 /** Create a TextLCD_Base interface
wim 15:b70ebfffb258 49 *
wim 21:9eb628d9e164 50 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 21:9eb628d9e164 51 * @param ctrl LCD controller (default = HD44780)
wim 15:b70ebfffb258 52 */
wim 21:9eb628d9e164 53 TextLCD_Base::TextLCD_Base(LCDType type, LCDCtrl ctrl) : _type(type), _ctrl(ctrl) {
wim 30:033048611c01 54
wim 30:033048611c01 55 // Extract LCDType data
wim 30:033048611c01 56
wim 30:033048611c01 57 // Columns encoded in b7..b0
wim 30:033048611c01 58 _nr_cols = (_type & 0xFF);
wim 30:033048611c01 59
wim 30:033048611c01 60 // Rows encoded in b15..b8
wim 30:033048611c01 61 _nr_rows = ((_type >> 8) & 0xFF);
wim 30:033048611c01 62
wim 30:033048611c01 63 // Addressing mode encoded in b19..b16
wim 30:033048611c01 64 _addr_mode = _type & LCD_T_ADR_MSK;
wim 37:ce348c002929 65
wim 37:ce348c002929 66 // Font table, encoded in LCDCtrl
wim 39:e9c2319de9c5 67 _font = _ctrl & LCD_C_FNT_MSK;
wim 14:0c32b66b14b8 68 }
wim 14:0c32b66b14b8 69
wim 21:9eb628d9e164 70 /** Init the LCD Controller(s)
wim 21:9eb628d9e164 71 * Clear display
wim 36:9f5f86dfd44a 72 * @param _LCDDatalength dl sets the datalength of data/commands
wim 36:9f5f86dfd44a 73 * @return none
wim 21:9eb628d9e164 74 */
wim 36:9f5f86dfd44a 75 void TextLCD_Base::_init(_LCDDatalength dl) {
wim 38:cbe275b0b647 76
wim 38:cbe275b0b647 77 wait_ms(100); // Wait 100ms to ensure powered up
wim 15:b70ebfffb258 78
wim 15:b70ebfffb258 79 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 80 if(_type==LCD40x4) {
wim 30:033048611c01 81 _ctrl_idx=_LCDCtrl_1; // Select 2nd controller
wim 36:9f5f86dfd44a 82 _initCtrl(dl); // Init 2nd controller
wim 15:b70ebfffb258 83 }
wim 15:b70ebfffb258 84
wim 15:b70ebfffb258 85 // Select and configure primary LCD controller
wim 27:22d5086f6ba6 86 _ctrl_idx=_LCDCtrl_0; // Select primary controller
wim 36:9f5f86dfd44a 87 _initCtrl(dl); // Init primary controller
wim 28:30fa94f7341c 88
wim 32:59c4b8f648d4 89 // Clear whole display and Reset Cursor location
wim 32:59c4b8f648d4 90 // Note: This will make sure that some 3-line displays that skip topline of a 4-line configuration
wim 32:59c4b8f648d4 91 // are cleared and init cursor correctly.
wim 32:59c4b8f648d4 92 cls();
wim 15:b70ebfffb258 93 }
wim 15:b70ebfffb258 94
wim 21:9eb628d9e164 95 /** Init the LCD controller
wim 36:9f5f86dfd44a 96 * Set number of lines, fonttype, no cursor etc
wim 36:9f5f86dfd44a 97 * The controller is accessed in 4-bit parallel mode either directly via mbed pins or through I2C or SPI expander.
wim 36:9f5f86dfd44a 98 * Some controllers also support native I2C or SPI interfaces.
wim 36:9f5f86dfd44a 99 *
wim 36:9f5f86dfd44a 100 * @param _LCDDatalength dl sets the 4 or 8 bit datalength of data/commands. Required for some native serial modes.
wim 36:9f5f86dfd44a 101 * @return none
wim 30:033048611c01 102 *
wim 30:033048611c01 103 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 21:9eb628d9e164 104 */
wim 36:9f5f86dfd44a 105 void TextLCD_Base::_initCtrl(_LCDDatalength dl) {
wim 32:59c4b8f648d4 106 int _bias_lines=0; // Set Bias and lines (Instr Set 1), temporary variable.
wim 32:59c4b8f648d4 107 int _lines=0; // Set lines (Ext Instr Set), temporary variable.
wim 36:9f5f86dfd44a 108
wim 26:bd897a001012 109 this->_setRS(false); // command mode
simon 1:ac48b187213c 110
wim 37:ce348c002929 111 if (dl == _LCD_DL_4) {
wim 37:ce348c002929 112 // The Controller could be in 8 bit mode (power-on reset) or in 4 bit mode (warm reboot) at this point.
wim 37:ce348c002929 113 // Follow this procedure to make sure the Controller enters the correct state. The hardware interface
wim 37:ce348c002929 114 // between the uP and the LCD can only write the 4 most significant bits (Most Significant Nibble, MSN).
wim 37:ce348c002929 115 // In 4 bit mode the LCD expects the MSN first, followed by the LSN.
wim 37:ce348c002929 116 //
wim 38:cbe275b0b647 117 // Current state: 8 bit mode | 4 bit mode, MSN is next | 4 bit mode, LSN is next
wim 37:ce348c002929 118 //-------------------------------------------------------------------------------------------------
wim 38:cbe275b0b647 119 _writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, | set 8 bit mode (MSN), | set dummy LSN,
wim 38:cbe275b0b647 120 // remains in 8 bit mode | remains in 4 bit mode | remains in 4 bit mode
wim 37:ce348c002929 121 wait_ms(15); //
wim 37:ce348c002929 122
wim 38:cbe275b0b647 123 _writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, | set dummy LSN, | set 8bit mode (MSN),
wim 38:cbe275b0b647 124 // remains in 8 bit mode | change to 8 bit mode | remains in 4 bit mode
wim 37:ce348c002929 125 wait_ms(15); //
wim 33:900a94bc7585 126
wim 38:cbe275b0b647 127 _writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, | set 8 bit mode (MSN) and dummy LSN, | set dummy LSN,
wim 38:cbe275b0b647 128 // remains in 8 bit mode | remains in 8 bit mode | change to 8 bit mode
wim 37:ce348c002929 129 wait_ms(15); //
wim 37:ce348c002929 130
wim 37:ce348c002929 131 // Controller is now in 8 bit mode
wim 37:ce348c002929 132
wim 37:ce348c002929 133 _writeNibble(0x2); // Change to 4-bit mode (MSN), the LSN is undefined dummy
wim 37:ce348c002929 134 wait_us(40); // most instructions take 40us
wim 37:ce348c002929 135
wim 37:ce348c002929 136 // Controller is now in 4-bit mode
wim 37:ce348c002929 137 // Note: 4/8 bit mode is ignored for most native SPI and I2C devices. They dont use the parallel bus.
wim 37:ce348c002929 138 // However, _writeNibble() method is void anyway for native SPI and I2C devices.
wim 38:cbe275b0b647 139 }
wim 38:cbe275b0b647 140 else {
wim 38:cbe275b0b647 141 // Reset in 8 bit mode, final Function set will follow
wim 38:cbe275b0b647 142 _writeCommand(0x30); // Function set 0 0 1 DL=1 N F x x
wim 39:e9c2319de9c5 143 wait_ms(1); // most instructions take 40us
wim 37:ce348c002929 144 }
wim 25:6162b31128c9 145
wim 29:a3663151aa65 146 // Device specific initialisations: DC/DC converter to generate VLCD or VLED, number of lines etc
wim 19:c747b9e2e7b8 147 switch (_ctrl) {
wim 32:59c4b8f648d4 148
wim 36:9f5f86dfd44a 149 case KS0073:
wim 36:9f5f86dfd44a 150 // Initialise Display configuration
wim 36:9f5f86dfd44a 151 switch (_type) {
wim 36:9f5f86dfd44a 152 case LCD8x1: //8x1 is a regular 1 line display
wim 36:9f5f86dfd44a 153 case LCD12x1:
wim 36:9f5f86dfd44a 154 case LCD16x1:
wim 36:9f5f86dfd44a 155 case LCD20x1:
wim 36:9f5f86dfd44a 156 case LCD24x1:
wim 36:9f5f86dfd44a 157 // case LCD32x1: // EXT pin is High, extension driver needed
wim 36:9f5f86dfd44a 158 // case LCD40x1: // EXT pin is High, extension driver needed
wim 36:9f5f86dfd44a 159 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 160 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 161 // N=0 (1-line mode, N=1 2-line mode)
wim 36:9f5f86dfd44a 162 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 163 // DH=1 (Disp shift enable, special mode for KS0073)
wim 36:9f5f86dfd44a 164 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 165
wim 36:9f5f86dfd44a 166 _function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 167 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 168 // N=0 (1-line mode, N=1 2-line mode)
wim 36:9f5f86dfd44a 169 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 170 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 171 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 172
wim 36:9f5f86dfd44a 173 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 174 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 175 break;
wim 36:9f5f86dfd44a 176
wim 36:9f5f86dfd44a 177 // case LCD12x3D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 178 // case LCD12x3D1: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 179 case LCD12x4D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 180 // case LCD16x3D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 181 // case LCD16x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 182 case LCD20x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 183 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 184 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 185 // N=0 (dont care for 4 line mode)
wim 36:9f5f86dfd44a 186 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 187 // DH=1 (Disp shift enable, special mode for KS0073)
wim 36:9f5f86dfd44a 188 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 189
wim 36:9f5f86dfd44a 190 _function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 191 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 192 // N=0 (1-line mode), N=1 (2-line mode)
wim 36:9f5f86dfd44a 193 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 194 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 195 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 196
wim 36:9f5f86dfd44a 197 _function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 198 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 199 break;
wim 36:9f5f86dfd44a 200
wim 36:9f5f86dfd44a 201
wim 36:9f5f86dfd44a 202 case LCD16x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 203 // case LCD24x3D: // Special mode for KS0078
wim 36:9f5f86dfd44a 204 // case LCD24x3D1: // Special mode for KS0078
wim 36:9f5f86dfd44a 205 case LCD24x4D: // Special mode for KS0078
wim 36:9f5f86dfd44a 206 error("Error: LCD Controller type does not support this Display type\n\r");
wim 36:9f5f86dfd44a 207 break;
wim 36:9f5f86dfd44a 208
wim 36:9f5f86dfd44a 209 default:
wim 36:9f5f86dfd44a 210 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 36:9f5f86dfd44a 211 _function = 0x0A; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 212 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 213 // N=1 (2-line mode), N=0 (1-line mode)
wim 36:9f5f86dfd44a 214 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 215 // DH=1 (Disp shift enable, special mode for KS0073)
wim 36:9f5f86dfd44a 216 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 217
wim 36:9f5f86dfd44a 218 _function_1 = 0x0C; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 219 // DL=0 (4 bits bus)
wim 36:9f5f86dfd44a 220 // N=1 (2 line mode), N=0 (1-line mode)
wim 36:9f5f86dfd44a 221 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 222 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 223 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 224
wim 36:9f5f86dfd44a 225 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 226 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 227 break;
wim 36:9f5f86dfd44a 228 } // switch type
wim 36:9f5f86dfd44a 229
wim 36:9f5f86dfd44a 230 // init special features
wim 36:9f5f86dfd44a 231 _writeCommand(0x20 | _function_1);// Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 232 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 36:9f5f86dfd44a 233 // N=0 (1 line mode), N=1 (2 line mode)
wim 36:9f5f86dfd44a 234 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 235 // BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 236 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 237
wim 36:9f5f86dfd44a 238 _writeCommand(0x08 | _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 239 // FW=0 (5-dot font, special mode for KS0073)
wim 36:9f5f86dfd44a 240 // BW=0 (Cur BW invert disable, special mode for KS0073)
wim 36:9f5f86dfd44a 241 // NW=0 (1,2 Line), NW=1 (4 line, special mode for KS0073)
wim 36:9f5f86dfd44a 242
wim 36:9f5f86dfd44a 243 _writeCommand(0x10); // Scroll/Shift set 0001 DS/HS4 DS/HS3 DS/HS2 DS/HS1 (Ext Regs)
wim 36:9f5f86dfd44a 244 // Dotscroll/Display shift enable (Special mode for KS0073)
wim 36:9f5f86dfd44a 245
wim 36:9f5f86dfd44a 246 _writeCommand(0x80); // Scroll Quantity set 1 0 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 (Ext Regs)
wim 36:9f5f86dfd44a 247 // Scroll quantity (Special mode for KS0073)
wim 36:9f5f86dfd44a 248
wim 36:9f5f86dfd44a 249 _writeCommand(0x20 | _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 250 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 36:9f5f86dfd44a 251 // N=0 (1 line mode), N=1 (2 line mode)
wim 36:9f5f86dfd44a 252 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 253 // DH=1 (Disp shift enable/disable, special mode for KS0073)
wim 36:9f5f86dfd44a 254 // REV=0 (Reverse/Normal, special mode for KS0073)
wim 36:9f5f86dfd44a 255 break; // case KS0073 Controller
wim 36:9f5f86dfd44a 256
wim 36:9f5f86dfd44a 257
wim 29:a3663151aa65 258 case KS0078:
wim 29:a3663151aa65 259 // Initialise Display configuration
wim 29:a3663151aa65 260 switch (_type) {
wim 29:a3663151aa65 261 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 262 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 263 // case LCD12x1:
wim 29:a3663151aa65 264 case LCD16x1:
wim 30:033048611c01 265 // case LCD20x1:
wim 29:a3663151aa65 266 case LCD24x1:
wim 32:59c4b8f648d4 267 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 268 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 269 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 270 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 271 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 272 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 273
wim 33:900a94bc7585 274 _function_1 = 0x04; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 275 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 276 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 277 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 278 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 279 // 0
wim 30:033048611c01 280
wim 32:59c4b8f648d4 281 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 282 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 29:a3663151aa65 283 break;
wim 29:a3663151aa65 284
wim 36:9f5f86dfd44a 285 // case LCD12x3D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 286 // case LCD12x3D1: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 287 // case LCD12x4D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 288 // case LCD16x3D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 289 // case LCD16x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 290 // case LCD20x4D: // Special mode for KS0073, KS0078
wim 30:033048611c01 291 // case LCD24x3D: // Special mode for KS0078
wim 30:033048611c01 292 // case LCD24x3D1: // Special mode for KS0078
wim 30:033048611c01 293 case LCD24x4D: // Special mode for KS0078
wim 32:59c4b8f648d4 294 _function = 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 295 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 296 // N=0 (dont care for 4 line mode)
wim 32:59c4b8f648d4 297 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 298 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 299 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 300
wim 33:900a94bc7585 301 _function_1 = 0x04; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 302 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 303 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 304 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 305 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 306 // 0
wim 29:a3663151aa65 307
wim 32:59c4b8f648d4 308 _function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 309 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 30:033048611c01 310 break;
wim 33:900a94bc7585 311
wim 33:900a94bc7585 312 case LCD16x3G: // Special mode for ST7036
wim 33:900a94bc7585 313 error("Error: LCD Controller type does not support this Display type\n\r");
wim 33:900a94bc7585 314 break;
wim 30:033048611c01 315
wim 29:a3663151aa65 316 default:
wim 30:033048611c01 317 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 32:59c4b8f648d4 318 _function = 0x0A; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 319 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 320 // N=1 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 321 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 322 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 323 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 324
wim 33:900a94bc7585 325 _function_1 = 0x0C; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 326 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 327 // N=1 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 328 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 329 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 330 // 0
wim 30:033048611c01 331
wim 32:59c4b8f648d4 332 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 333 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 29:a3663151aa65 334 break;
wim 29:a3663151aa65 335 } // switch type
wim 29:a3663151aa65 336
wim 32:59c4b8f648d4 337 // init special features
wim 32:59c4b8f648d4 338 _writeCommand(0x20 | _function_1);// Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 339 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 32:59c4b8f648d4 340 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 341 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 342 // BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 343 // 0
wim 32:59c4b8f648d4 344
wim 32:59c4b8f648d4 345 _writeCommand(0x08 | _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 346 // FW=0 (5-dot font, special mode for KS0078)
wim 32:59c4b8f648d4 347 // BW=0 (Cur BW invert disable, special mode for KS0078)
wim 32:59c4b8f648d4 348 // NW=0 (1,2 Line), NW=1 (4 line, special mode for KS0078)
wim 32:59c4b8f648d4 349
wim 32:59c4b8f648d4 350 _writeCommand(0x10); // Scroll/Shift set 0001 DS/HS4 DS/HS3 DS/HS2 DS/HS1 (Ext Regs)
wim 32:59c4b8f648d4 351 // Dotscroll/Display shift enable (Special mode for KS0078)
wim 32:59c4b8f648d4 352
wim 32:59c4b8f648d4 353 _writeCommand(0x80); // Scroll Quantity set 1 0 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 (Ext Regs)
wim 32:59c4b8f648d4 354 // Scroll quantity (Special mode for KS0078)
wim 32:59c4b8f648d4 355
wim 32:59c4b8f648d4 356 _writeCommand(0x20 | _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 357 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 32:59c4b8f648d4 358 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 359 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 360 // DH=1 (Disp shift enable/disable, special mode for KS0078)
wim 32:59c4b8f648d4 361 // REV=0 (Reverse/Normal, special mode for KS0078)
wim 29:a3663151aa65 362 break; // case KS0078 Controller
wim 29:a3663151aa65 363
wim 26:bd897a001012 364 case ST7032_3V3:
wim 26:bd897a001012 365 // ST7032 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 26:bd897a001012 366 case ST7032_5V:
wim 32:59c4b8f648d4 367 // ST7032 controller: Disable Voltage booster for VLCD. VDD=5V
wim 29:a3663151aa65 368
wim 29:a3663151aa65 369 // Initialise Display configuration
wim 29:a3663151aa65 370 switch (_type) {
wim 29:a3663151aa65 371 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 372 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 373 // case LCD12x1:
wim 29:a3663151aa65 374 case LCD16x1:
wim 30:033048611c01 375 // case LCD20x1:
wim 32:59c4b8f648d4 376 case LCD24x1:
wim 32:59c4b8f648d4 377 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=0 (1-line display mode), F=0 (5*7dot), 0, IS
wim 32:59c4b8f648d4 378 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 379 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 380 break;
wim 28:30fa94f7341c 381
wim 32:59c4b8f648d4 382 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 383 case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 384 case LCD12x4D: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 385 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 386 case LCD24x4D: // Special mode for KS0078
wim 32:59c4b8f648d4 387 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 388 break;
wim 29:a3663151aa65 389
wim 32:59c4b8f648d4 390 default:
wim 32:59c4b8f648d4 391 // All other LCD types are initialised as 2 Line displays
wim 32:59c4b8f648d4 392 _function = 0x08; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=1 (2-line display mode), F=0 (5*7dot), 0, IS
wim 32:59c4b8f648d4 393 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 394 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 395 break;
wim 32:59c4b8f648d4 396 } // switch type
wim 32:59c4b8f648d4 397
wim 32:59c4b8f648d4 398 // init special features
wim 33:900a94bc7585 399 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 33:900a94bc7585 400
wim 33:900a94bc7585 401 _writeCommand(0x1C); // Internal OSC frequency adjustment Framefreq=183HZ, Bias will be 1/4 (Instr Set=1)
wim 32:59c4b8f648d4 402
wim 32:59c4b8f648d4 403 _contrast = LCD_ST7032_CONTRAST;
wim 32:59c4b8f648d4 404 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast Low bits, 0 1 1 1 C3 C2 C1 C0 (IS=1)
wim 32:59c4b8f648d4 405
wim 32:59c4b8f648d4 406
wim 32:59c4b8f648d4 407 if (_ctrl == ST7032_3V3) {
wim 36:9f5f86dfd44a 408 // _icon_power = 0x04; // Icon display off, Booster circuit is turned on (IS=1)
wim 36:9f5f86dfd44a 409 _icon_power = 0x0C; // Icon display on, Booster circuit is turned on (IS=1)
wim 32:59c4b8f648d4 410 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 411 }
wim 32:59c4b8f648d4 412 else {
wim 36:9f5f86dfd44a 413 // _icon_power = 0x00; // Icon display off, Booster circuit is turned off (IS=1)
wim 36:9f5f86dfd44a 414 _icon_power = 0x08; // Icon display on, Booster circuit is turned off (IS=1)
wim 32:59c4b8f648d4 415 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 416 }
wim 32:59c4b8f648d4 417 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Icon, Booster and Contrast High bits, 0 1 0 1 Ion Bon C5 C4 (IS=1)
wim 32:59c4b8f648d4 418 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 419
wim 32:59c4b8f648d4 420 _writeCommand(0x68 | (LCD_ST7032_RAB & 0x07)); // Voltage follower, 0 1 1 0 FOn=1, Ampl ratio Rab2=1, Rab1=0, Rab0=0 (IS=1)
wim 32:59c4b8f648d4 421 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 422
wim 32:59c4b8f648d4 423 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 424
wim 32:59c4b8f648d4 425 break; // case ST7032_3V3 Controller
wim 32:59c4b8f648d4 426 // case ST7032_5V Controller
wim 32:59c4b8f648d4 427
wim 32:59c4b8f648d4 428 case ST7036_3V3:
wim 32:59c4b8f648d4 429 // ST7036 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 32:59c4b8f648d4 430 // Note: supports 1,2 (LCD_T_A) or 3 lines (LCD_T_G)
wim 32:59c4b8f648d4 431 case ST7036_5V:
wim 32:59c4b8f648d4 432 // ST7036 controller: Disable Voltage booster for VLCD. VDD=5V
wim 32:59c4b8f648d4 433 // Note: supports 1,2 (LCD_T_A) or 3 lines (LCD_T_G)
wim 32:59c4b8f648d4 434
wim 32:59c4b8f648d4 435 // Initialise Display configuration
wim 32:59c4b8f648d4 436 switch (_type) {
wim 32:59c4b8f648d4 437 case LCD8x1: //8x1 is a regular 1 line display
wim 32:59c4b8f648d4 438 case LCD8x2B: //8x2D is a special case of 16x1
wim 32:59c4b8f648d4 439 // case LCD12x1:
wim 32:59c4b8f648d4 440 case LCD16x1:
wim 32:59c4b8f648d4 441 case LCD24x1:
wim 32:59c4b8f648d4 442 _function = 0x00; // Set function, 0 0 1 DL=0 (4-bit Databus), N=0 (1 Line), DH=0 (5x7font), IS2, IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 443 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 444 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 445
wim 32:59c4b8f648d4 446 _bias_lines = 0x04; // Bias: 1/5, 1 or 2-Lines LCD
wim 32:59c4b8f648d4 447 break;
wim 32:59c4b8f648d4 448
wim 32:59c4b8f648d4 449 // case LCD12x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 450 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 451 _function = 0x08; // Set function, 0 0 1 DL=0 (4-bit Databus), N=1 (2 Line), DH=0 (5x7font), IS2,IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 452 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 453 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 454
wim 32:59c4b8f648d4 455 _bias_lines = 0x05; // Bias: 1/5, 3-Lines LCD
wim 32:59c4b8f648d4 456 break;
wim 32:59c4b8f648d4 457
wim 32:59c4b8f648d4 458 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 459 // case LCD16x3D1: // Special mode for SSD1803
wim 30:033048611c01 460 case LCD12x4D: // Special mode for PCF2116
wim 30:033048611c01 461 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 462 error("Error: LCD Controller type does not support this Display type\n\r");
wim 29:a3663151aa65 463 break;
wim 28:30fa94f7341c 464
wim 29:a3663151aa65 465 default:
wim 32:59c4b8f648d4 466 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 32:59c4b8f648d4 467 _function = 0x08; // Set function, 0 0 1 DL=0 (4-bit Databus), N=1 (2 Line), DH=0 (5x7font), IS2,IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 468 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 469 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 470
wim 32:59c4b8f648d4 471 _bias_lines = 0x04; // Bias: 1/5, 1 or 2-Lines LCD
wim 32:59c4b8f648d4 472 break;
wim 32:59c4b8f648d4 473 } // switch type
wim 32:59c4b8f648d4 474
wim 29:a3663151aa65 475
wim 32:59c4b8f648d4 476 // init special features
wim 33:900a94bc7585 477 _writeCommand(0x20 | _function | 0x01); // Set function, IS2,IS1 = 01 (Select Instr Set = 1)
wim 32:59c4b8f648d4 478 _writeCommand(0x10 | _bias_lines); // Set Bias and 1,2 or 3 lines (Instr Set 1)
wim 29:a3663151aa65 479
wim 32:59c4b8f648d4 480 _contrast = LCD_ST7036_CONTRAST;
wim 32:59c4b8f648d4 481 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast, 0 1 1 1 C3 C2 C1 C0 (Instr Set 1)
wim 32:59c4b8f648d4 482
wim 32:59c4b8f648d4 483 if (_ctrl == ST7036_3V3) {
wim 36:9f5f86dfd44a 484 _icon_power = 0x0C; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=1 Bon=1 C5 C4 (Instr Set 1)
wim 36:9f5f86dfd44a 485 // _icon_power = 0x04; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=0 Bon=1 C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 486 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 487 }
wim 32:59c4b8f648d4 488 else {
wim 36:9f5f86dfd44a 489 _icon_power = 0x08; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=1 Bon=0 C5 C4 (Instr Set 1)
wim 36:9f5f86dfd44a 490 // _icon_power = 0x00; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=0 Bon=0 C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 491 }
wim 29:a3663151aa65 492
wim 32:59c4b8f648d4 493 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Contrast C5, C4 (Instr Set 1)
wim 32:59c4b8f648d4 494 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 495
wim 32:59c4b8f648d4 496 _writeCommand(0x68 | (LCD_ST7036_RAB & 0x07)); // Voltagefollower On = 1, Ampl ratio Rab2, Rab1, Rab0 = 1 0 1 (Instr Set 1)
wim 32:59c4b8f648d4 497 wait_ms(10); // Wait 10ms to ensure powered up
wim 28:30fa94f7341c 498
wim 32:59c4b8f648d4 499 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instruction Set = 0)
wim 32:59c4b8f648d4 500
wim 32:59c4b8f648d4 501 break; // case ST7036_3V3 Controller
wim 32:59c4b8f648d4 502 // case ST7036_5V Controller
wim 36:9f5f86dfd44a 503
wim 36:9f5f86dfd44a 504 case ST7070:
wim 36:9f5f86dfd44a 505 // Initialise Display configuration
wim 36:9f5f86dfd44a 506 switch (_type) {
wim 36:9f5f86dfd44a 507 case LCD8x1: //8x1 is a regular 1 line display
wim 36:9f5f86dfd44a 508 case LCD8x2B: //8x2D is a special case of 16x1
wim 36:9f5f86dfd44a 509 // case LCD12x1:
wim 36:9f5f86dfd44a 510 case LCD16x1:
wim 36:9f5f86dfd44a 511 case LCD24x1:
wim 36:9f5f86dfd44a 512 _function = dl | 0x00; // Set function, 0 0 1 DL=0 (4-bit Databus), N=0 (1 Line), EXT=0, x, x
wim 36:9f5f86dfd44a 513 // Note: 4 bit mode is NOT ignored for native SPI !
wim 36:9f5f86dfd44a 514 // Saved to allow switch between Instruction sets at later time
wim 36:9f5f86dfd44a 515 break;
wim 36:9f5f86dfd44a 516
wim 36:9f5f86dfd44a 517 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 36:9f5f86dfd44a 518 // case LCD16x3D1: // Special mode for SSD1803
wim 36:9f5f86dfd44a 519 case LCD12x4D: // Special mode for PCF2116
wim 36:9f5f86dfd44a 520 case LCD24x4D: // Special mode for KS0078
wim 36:9f5f86dfd44a 521 // case LCD12x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 522 case LCD16x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 523 error("Error: LCD Controller type does not support this Display type\n\r");
wim 36:9f5f86dfd44a 524 break;
wim 36:9f5f86dfd44a 525
wim 36:9f5f86dfd44a 526 default:
wim 36:9f5f86dfd44a 527 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 36:9f5f86dfd44a 528 _function = dl | 0x08; // Set function, 0 0 1 DL, N=1 (2 Line), EXT=0, x, x
wim 36:9f5f86dfd44a 529 // Note: 4 bit mode is NOT ignored for native SPI !
wim 36:9f5f86dfd44a 530 // Saved to allow switch between Instruction sets at later time
wim 36:9f5f86dfd44a 531 break;
wim 36:9f5f86dfd44a 532 } // switch type
wim 36:9f5f86dfd44a 533
wim 36:9f5f86dfd44a 534 // _writeCommand(0x00); // NOP, make sure to sync SPI
wim 36:9f5f86dfd44a 535
wim 36:9f5f86dfd44a 536 // init special features
wim 36:9f5f86dfd44a 537 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 538
wim 36:9f5f86dfd44a 539 _writeCommand(0x04 | 0x00); // Set Bias resistors 0 0 0 0 0 1 Rb1,Rb0= 0 0 (Extern Res) (Instr Set 1)
wim 36:9f5f86dfd44a 540
wim 36:9f5f86dfd44a 541 _writeCommand(0x40 | 0x00); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 542 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 543 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 544
wim 36:9f5f86dfd44a 545 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 546
wim 36:9f5f86dfd44a 547 break; // case ST7070 Controller
wim 36:9f5f86dfd44a 548
wim 32:59c4b8f648d4 549 case SSD1803_3V3:
wim 32:59c4b8f648d4 550 // SSD1803 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 32:59c4b8f648d4 551 // Note: supports 1,2, 3 or 4 lines
wim 32:59c4b8f648d4 552 // case SSD1803_5V:
wim 32:59c4b8f648d4 553 // SSD1803 controller: No Voltage booster for VLCD. VDD=5V
wim 32:59c4b8f648d4 554
wim 29:a3663151aa65 555 // Initialise Display configuration
wim 29:a3663151aa65 556 switch (_type) {
wim 29:a3663151aa65 557 case LCD8x1: //8x1 is a regular 1 line display
wim 30:033048611c01 558 case LCD8x2B: //8x2D is a special case of 16x1
wim 29:a3663151aa65 559 // case LCD12x1:
wim 29:a3663151aa65 560 case LCD16x1:
wim 29:a3663151aa65 561 case LCD24x1:
wim 32:59c4b8f648d4 562 _function = 0x00; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 563 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 564 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 565 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 566 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 567 // DH=0 Double Height disable
wim 32:59c4b8f648d4 568 // IS=0
wim 32:59c4b8f648d4 569
wim 33:900a94bc7585 570 _function_1 = 0x02; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 571 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 572 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 573 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 574 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 575 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 576 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 577
wim 32:59c4b8f648d4 578 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 579 // NW=0 1-Line LCD (N=0)
wim 29:a3663151aa65 580 break;
wim 32:59c4b8f648d4 581
wim 33:900a94bc7585 582 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 583 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 584 case LCD16x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 585 // case LCD16x3D1: // Special mode for SSD1803
wim 32:59c4b8f648d4 586 // case LCD20x3D: // Special mode for SSD1803
wim 32:59c4b8f648d4 587 _function = 0x00; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 588 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 589 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 590 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 591 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 592 // DH=0 Double Height disable
wim 32:59c4b8f648d4 593 // IS=0
wim 32:59c4b8f648d4 594
wim 33:900a94bc7585 595 _function_1 = 0x02; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 596 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 597 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 598 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 599 // N=0 1 Line / 3 Line
wim 32:59c4b8f648d4 600 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 601 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 602
wim 32:59c4b8f648d4 603 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 604 // NW=1 3-Line LCD (N=0)
wim 29:a3663151aa65 605 break;
wim 30:033048611c01 606
wim 39:e9c2319de9c5 607 // case LCD10x2D: // Special mode for SSD1803, 4-line mode but switch to double height font
wim 39:e9c2319de9c5 608 case LCD10x4D: // Special mode for SSD1803
wim 32:59c4b8f648d4 609 case LCD20x4D: // Special mode for SSD1803
wim 32:59c4b8f648d4 610 _function = 0x08; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 611 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 612 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 613 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 614 // N=1 4 Line
wim 32:59c4b8f648d4 615 // DH=0 Double Height disable
wim 32:59c4b8f648d4 616 // IS=0
wim 32:59c4b8f648d4 617
wim 33:900a94bc7585 618 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 619 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 620 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 621 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 622 // N=1 4 Line
wim 32:59c4b8f648d4 623 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 624 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 625
wim 32:59c4b8f648d4 626 _lines = 0x01; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 627 // NW=1 4-Line LCD (N=1)
wim 32:59c4b8f648d4 628 break;
wim 32:59c4b8f648d4 629
wim 33:900a94bc7585 630 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 631 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 632 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 633 break;
wim 30:033048611c01 634
wim 29:a3663151aa65 635 default:
wim 30:033048611c01 636 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 32:59c4b8f648d4 637 _function = 0x08; // Set function 0 0 1 DL N DH RE(0) IS
wim 32:59c4b8f648d4 638 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 639 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 640 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 641 // N=1 2 line / 4 Line
wim 32:59c4b8f648d4 642 // DH=0 Double Height disable
wim 36:9f5f86dfd44a 643 // RE=0
wim 32:59c4b8f648d4 644 // IS=0
wim 29:a3663151aa65 645
wim 33:900a94bc7585 646 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 647 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 648 // DL=0 4-bit Databus,
wim 32:59c4b8f648d4 649 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 650 // N=1 2 line / 4 Line
wim 32:59c4b8f648d4 651 // BE=0 Blink Enable off, special feature of SSD1803
wim 36:9f5f86dfd44a 652 // RE=1
wim 32:59c4b8f648d4 653 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 654
wim 32:59c4b8f648d4 655 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 32:59c4b8f648d4 656 // NW=0 2-Line LCD (N=1)
wim 32:59c4b8f648d4 657 break;
wim 32:59c4b8f648d4 658 } // switch type
wim 32:59c4b8f648d4 659
wim 32:59c4b8f648d4 660
wim 32:59c4b8f648d4 661 // init special features
wim 33:900a94bc7585 662 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 663 // Select Extended Instruction Set
wim 33:900a94bc7585 664
wim 33:900a94bc7585 665 _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 666 // _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 667 wait_ms(5); // Wait to ensure completion or SSD1803 fails to set Top/Bottom after reset..
wim 33:900a94bc7585 668
wim 33:900a94bc7585 669 _writeCommand(0x08 | _lines); // Set ext function 0 0 0 0 1 FW BW NW 1,2,3 or 4 lines (Ext Instr Set)
wim 32:59c4b8f648d4 670
wim 32:59c4b8f648d4 671 _writeCommand(0x10); // Double Height and Bias, 0 0 0 1 UD2=0, UD1=0, BS1=0 Bias 1/5, DH=0 (Ext Instr Set)
wim 32:59c4b8f648d4 672
wim 32:59c4b8f648d4 673 // _writeCommand(0x76); // Set TC Control, 0 1 1 1 0 1 1 0 (Ext Instr Set)
wim 32:59c4b8f648d4 674 // _writeData(0x02); // Set TC data, 0 0 0 0 0 TC2,TC1,TC0 = 0 1 0 (Ext Instr Set)
wim 32:59c4b8f648d4 675
wim 32:59c4b8f648d4 676 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS=1 Select Instruction Set 1
wim 32:59c4b8f648d4 677 // Select Std Instr set, Select IS=1
wim 32:59c4b8f648d4 678
wim 32:59c4b8f648d4 679 _contrast = LCD_SSD1_CONTRAST;
wim 32:59c4b8f648d4 680 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast 0 1 1 1 C3, C2, C1, C0 (Instr Set 1)
wim 32:59c4b8f648d4 681
wim 36:9f5f86dfd44a 682 // _icon_power = 0x04; // Icon off, Booster on (Instr Set 1)
wim 36:9f5f86dfd44a 683 _icon_power = 0x0C; // Icon on, Booster on (Instr Set 1)
wim 32:59c4b8f648d4 684 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 685 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Power, Icon and Contrast, 0 1 0 1 Ion Bon C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 686 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 687
wim 32:59c4b8f648d4 688 _writeCommand(0x68 | (LCD_SSD1_RAB & 0x07)); // Set Voltagefollower 0 1 1 0 Don = 1, Ampl ratio Rab2, Rab1, Rab0 = 1 1 0 (Instr Set 1)
wim 32:59c4b8f648d4 689 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 690
wim 33:900a94bc7585 691 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 692 // Select Extended Instruction Set 1
wim 32:59c4b8f648d4 693 _writeCommand(0x10); // Shift/Scroll enable, 0 0 0 1 DS4/HS4 DS3/HS3 DS2/HS2 DS1/HS1 (Ext Instr Set 1)
wim 32:59c4b8f648d4 694
wim 32:59c4b8f648d4 695
wim 32:59c4b8f648d4 696 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 32:59c4b8f648d4 697 // Select Std Instr set, Select IS=0
wim 32:59c4b8f648d4 698
wim 32:59c4b8f648d4 699 break; // case SSD1803 Controller
wim 32:59c4b8f648d4 700
wim 29:a3663151aa65 701
wim 32:59c4b8f648d4 702 // Note1: The PCF21XX family of controllers has several types that dont have an onboard voltage generator for V-LCD.
wim 32:59c4b8f648d4 703 // You must supply this LCD voltage externally and not try to enable VGen.
wim 32:59c4b8f648d4 704 // Note2: The early versions of PCF2116 controllers (eg PCF2116C) can not generate sufficiently negative voltage for the LCD at a VDD of 3V3.
wim 32:59c4b8f648d4 705 // You must supply this voltage externally and not enable VGen or you must use a higher VDD (e.g. 5V) and enable VGen.
wim 32:59c4b8f648d4 706 // More recent versions of the controller (eg PCF2116K) have an improved VGen that will work with 3V3.
wim 32:59c4b8f648d4 707 // Note3: See datasheet, PCF2116 and other types provide a V0 pin to control the LCD contrast voltage that is provided by VGen. This pins allows
wim 32:59c4b8f648d4 708 // contrast control similar to that of pin 3 on the standard 14pin LCD module connector.
wim 32:59c4b8f648d4 709 // You can disable VGen by connecting Vo to VDD. VLCD will then be used directly as LCD voltage.
wim 32:59c4b8f648d4 710 // Note4: PCF2113 and PCF2119 are different wrt to VLCD generator! There is no V0 pin. The contrast voltage is software controlled by setting the VA and VB registers.
wim 32:59c4b8f648d4 711 // Vgen is automatically switched off when the contrast voltage VA or VB is set to 0x00. Note that certain limits apply to allowed values for VA and VB.
wim 32:59c4b8f648d4 712 // Note5: See datasheet, members of the PCF21XX family support different numbers of rows/columns. Not all can support 3 or 4 rows.
wim 32:59c4b8f648d4 713 // Note6: See datasheet, the PCF21XX-C and PCF21XX-K use a non-standard character set. This may result is strange looking text when not corrected..
wim 32:59c4b8f648d4 714
wim 34:e5a0dcb43ecc 715 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 716 // PCF2103 controller: No Voltage generator for VLCD, VDD=3V3..5V, VLCD input controls contrast voltage.
wim 34:e5a0dcb43ecc 717 // Initialise Display configuration
wim 34:e5a0dcb43ecc 718 switch (_type) {
wim 34:e5a0dcb43ecc 719 case LCD24x1:
wim 34:e5a0dcb43ecc 720 _function = 0x00; //FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=0 1-line/24 chars display mode, 0, H=0
wim 34:e5a0dcb43ecc 721 //Note: 4 bit mode is ignored for I2C mode
wim 34:e5a0dcb43ecc 722 break;
wim 34:e5a0dcb43ecc 723
wim 34:e5a0dcb43ecc 724 // case LCD12x1D: //Special mode for PCF21XX, Only top line used
wim 34:e5a0dcb43ecc 725 case LCD12x2:
wim 34:e5a0dcb43ecc 726 _function = 0x04; //FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=1 2-line/12 chars display mode, 0, H=0
wim 34:e5a0dcb43ecc 727 //Note: 4 bit mode is ignored for I2C mode
wim 34:e5a0dcb43ecc 728 break;
wim 34:e5a0dcb43ecc 729
wim 34:e5a0dcb43ecc 730 default:
wim 34:e5a0dcb43ecc 731 error("Error: LCD Controller type does not support this Display type\n\r");
wim 34:e5a0dcb43ecc 732 break;
wim 34:e5a0dcb43ecc 733
wim 34:e5a0dcb43ecc 734 } // switch type
wim 34:e5a0dcb43ecc 735
wim 34:e5a0dcb43ecc 736 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 737 wait_ms(10); // Wait 10ms to ensure powered up
wim 34:e5a0dcb43ecc 738
wim 34:e5a0dcb43ecc 739 // Note: Display from GA628 shows 12 chars. This is actually the right half of a 24x1 display. The commons have been connected in reverse order.
wim 34:e5a0dcb43ecc 740 _writeCommand(0x05); // Display Conf Set 0000 0, 1, P=0, Q=1 (Instr. Set 1)
wim 34:e5a0dcb43ecc 741
wim 34:e5a0dcb43ecc 742 _writeCommand(0x02); // Screen Config 0000 001, L=0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 743 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=0 (no Icon blink), 0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 744
wim 34:e5a0dcb43ecc 745 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 746
wim 36:9f5f86dfd44a 747 #if(0)
wim 34:e5a0dcb43ecc 748 // Select CG RAM
wim 34:e5a0dcb43ecc 749 _writeCommand(0x40); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 34:e5a0dcb43ecc 750 // Store UDC/Icon pattern:
wim 34:e5a0dcb43ecc 751 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 34:e5a0dcb43ecc 752 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 34:e5a0dcb43ecc 753 for (int i=0; i<(8 * 8); i++) {
wim 34:e5a0dcb43ecc 754 // _writeData(0x1F); // All On
wim 34:e5a0dcb43ecc 755 _writeData(0x00); // All Off
wim 34:e5a0dcb43ecc 756 }
wim 36:9f5f86dfd44a 757 #endif
wim 34:e5a0dcb43ecc 758 break; // case PCF2103_3V3 Controller
wim 34:e5a0dcb43ecc 759
wim 30:033048611c01 760 case PCF2113_3V3:
wim 32:59c4b8f648d4 761 // PCF2113 controller: Initialise Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 29:a3663151aa65 762 // Initialise Display configuration
wim 29:a3663151aa65 763 switch (_type) {
wim 29:a3663151aa65 764 // case LCD12x1:
wim 33:900a94bc7585 765 // _function = 0x02; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=0 1-line/12 chars display mode, SL=1, IS=0
wim 32:59c4b8f648d4 766 // Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 767 case LCD24x1:
wim 33:900a94bc7585 768 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=0 1-line/24 chars display mode, SL=0, IS=0
wim 32:59c4b8f648d4 769 // Note: 4 bit mode is ignored for I2C mode
wim 30:033048611c01 770 break;
wim 30:033048611c01 771
wim 30:033048611c01 772 case LCD12x2:
wim 33:900a94bc7585 773 _function = 0x04; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=1 2-line/12 chars display mode, SL=0, IS=0
wim 30:033048611c01 774 break;
wim 30:033048611c01 775
wim 30:033048611c01 776 default:
wim 30:033048611c01 777 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 778 break;
wim 30:033048611c01 779
wim 30:033048611c01 780 } // switch type
wim 30:033048611c01 781
wim 32:59c4b8f648d4 782 // Init special features
wim 33:900a94bc7585 783 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 33:900a94bc7585 784
wim 33:900a94bc7585 785 _writeCommand(0x04); // Display Conf Set 0000 0, 1, P=0, Q=0 (Instr. Set 1)
wim 33:900a94bc7585 786 _writeCommand(0x10); // Temp Compensation Set 0001 0, 0, TC1=0, TC2=0 (Instr. Set 1)
wim 33:900a94bc7585 787 // _writeCommand(0x42); // HV GEN 0100 S1=1, S2=0 (2x multiplier) (Instr. Set 1)
wim 33:900a94bc7585 788 _writeCommand(0x40 | (LCD_PCF2_S12 & 0x03)); // HV Gen 0100 S1=1, S2=0 (2x multiplier) (Instr. Set 1)
wim 32:59c4b8f648d4 789
wim 32:59c4b8f648d4 790 _contrast = LCD_PCF2_CONTRAST;
wim 33:900a94bc7585 791 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) 1, V=0, VA=contrast
wim 33:900a94bc7585 792 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) 1, V=1, VB=contrast
wim 32:59c4b8f648d4 793 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 794
wim 33:900a94bc7585 795 _writeCommand(0x02); // Screen Config 0000 001, L=0 (Instr. Set 1)
wim 33:900a94bc7585 796 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=0 (no icon blink) DM=0 (no direct mode) (Instr. Set 1)
wim 33:900a94bc7585 797
wim 33:900a94bc7585 798 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 32:59c4b8f648d4 799
wim 30:033048611c01 800 break; // case PCF2113_3V3 Controller
wim 30:033048611c01 801
wim 30:033048611c01 802
wim 32:59c4b8f648d4 803 // case PCF2113_5V:
wim 32:59c4b8f648d4 804 // PCF2113 controller: No Voltage generator for VLCD. VDD=5V. Contrast voltage controlled by VA or VB.
wim 32:59c4b8f648d4 805 //@TODO
wim 32:59c4b8f648d4 806
wim 30:033048611c01 807
wim 30:033048611c01 808 case PCF2116_3V3:
wim 32:59c4b8f648d4 809 // PCF2116 controller: Voltage generator for VLCD. VDD=5V. V0 controls contrast voltage.
wim 30:033048611c01 810 // Initialise Display configuration
wim 30:033048611c01 811 switch (_type) {
wim 30:033048611c01 812 // case LCD12x1:
wim 30:033048611c01 813 // case LCD12x2:
wim 30:033048611c01 814 case LCD24x1:
wim 34:e5a0dcb43ecc 815 _writeCommand(0x22); //FUNCTION SET 0 0 1 DL=0 4-bit, N=0/M=0 1-line/24 chars display mode, G=1 Vgen on, 0
wim 29:a3663151aa65 816 //Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 817 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 818 break;
wim 29:a3663151aa65 819
wim 32:59c4b8f648d4 820 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 821 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 822 case LCD12x4D: // Special mode for PCF21XX:
wim 34:e5a0dcb43ecc 823 _writeCommand(0x2E); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=1 4-line/12 chars display mode, G=1 VGen on, 0
wim 29:a3663151aa65 824 //Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 825 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 826 break;
wim 30:033048611c01 827
wim 30:033048611c01 828 case LCD24x2:
wim 34:e5a0dcb43ecc 829 _writeCommand(0x2A); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=0 2-line/24 chars display mode, G=1 VGen on, 0
wim 29:a3663151aa65 830 //Note: 4 bit mode is ignored for I2C mode
wim 30:033048611c01 831 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 832 break;
wim 32:59c4b8f648d4 833
wim 30:033048611c01 834 default:
wim 30:033048611c01 835 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 836 break;
wim 30:033048611c01 837
wim 29:a3663151aa65 838 } // switch type
wim 29:a3663151aa65 839
wim 30:033048611c01 840 break; // case PCF2116_3V3 Controller
wim 29:a3663151aa65 841
wim 32:59c4b8f648d4 842
wim 32:59c4b8f648d4 843 //Experimental for cellphone 3-line display, SA=0x74, No Ack supported, Character set C or K, DL = 8 bit, N=0,M=1 (reserved mode !!), external VLCD -2V5
wim 32:59c4b8f648d4 844 //@TODO
wim 32:59c4b8f648d4 845 case PCF2116_5V:
wim 32:59c4b8f648d4 846 // PCF2116 controller: No Voltage generator for VLCD. VDD=5V. V0 controls contrast voltage.
wim 32:59c4b8f648d4 847 // Initialise Display configuration
wim 32:59c4b8f648d4 848 switch (_type) {
wim 32:59c4b8f648d4 849 // case LCD12x1:
wim 32:59c4b8f648d4 850 // case LCD12x2:
wim 32:59c4b8f648d4 851 // case LCD24x1:
wim 34:e5a0dcb43ecc 852 // _writeCommand(0x20); //FUNCTION SET 0 0 1 DL=0 4-bit, N=0/M=0 1-line/24 chars display mode, G=0 no Vgen, 0
wim 32:59c4b8f648d4 853 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 854 // wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 855 // break;
wim 32:59c4b8f648d4 856
wim 32:59c4b8f648d4 857 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 858 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 859 case LCD12x4D: // Special mode for PCF21XX:
wim 32:59c4b8f648d4 860 // _writeCommand(0x34); //FUNCTION SET 8 bit, N=0/M=1 4-line/12 chars display mode OK
wim 32:59c4b8f648d4 861 // _writeCommand(0x24); //FUNCTION SET 4 bit, N=0/M=1 4-line/12 chars display mode OK
wim 34:e5a0dcb43ecc 862 _writeCommand(0x2C); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=1 4-line/12 chars display mode, G=0 no Vgen, 0 OK
wim 32:59c4b8f648d4 863 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 864 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 865 break;
wim 32:59c4b8f648d4 866
wim 32:59c4b8f648d4 867 // case LCD24x2:
wim 32:59c4b8f648d4 868 // _writeCommand(0x28); //FUNCTION SET 4 bit, N=1/M=0 2-line/24 chars display mode
wim 32:59c4b8f648d4 869 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 870 // wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 871 // break;
wim 32:59c4b8f648d4 872
wim 32:59c4b8f648d4 873 default:
wim 32:59c4b8f648d4 874 error("Error: LCD Controller type does not support this Display type\n\r");
wim 32:59c4b8f648d4 875 break;
wim 32:59c4b8f648d4 876
wim 32:59c4b8f648d4 877 } // switch type
wim 32:59c4b8f648d4 878
wim 32:59c4b8f648d4 879 break; // case PCF2116_5V Controller
wim 32:59c4b8f648d4 880
wim 32:59c4b8f648d4 881 case PCF2119_3V3:
wim 39:e9c2319de9c5 882 case PCF2119R_3V3:
wim 32:59c4b8f648d4 883 // PCF2119 controller: Initialise Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 32:59c4b8f648d4 884 // Note1: See datasheet, the PCF2119 supports icons and provides separate constrast control for Icons and characters.
wim 32:59c4b8f648d4 885 // Note2: Vgen is switched off when the contrast voltage VA or VB is set to 0x00.
wim 32:59c4b8f648d4 886
wim 32:59c4b8f648d4 887 //POR or Hardware Reset should be applied
wim 32:59c4b8f648d4 888 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 889
wim 32:59c4b8f648d4 890 // Initialise Display configuration
wim 32:59c4b8f648d4 891 switch (_type) {
wim 32:59c4b8f648d4 892 case LCD8x1:
wim 32:59c4b8f648d4 893 // case LCD12x1:
wim 32:59c4b8f648d4 894 case LCD16x1:
wim 34:e5a0dcb43ecc 895 _function = 0x02; // FUNCTION SET 0 0 1 DL=0 4-bit, 0 , M=0 1-line/16 chars display mode, SL=1
wim 32:59c4b8f648d4 896 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 897 break;
wim 32:59c4b8f648d4 898
wim 32:59c4b8f648d4 899 case LCD24x1:
wim 32:59c4b8f648d4 900 // case LCD32x1:
wim 34:e5a0dcb43ecc 901 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 4-bit, 0 , M=0 1-line/32 chars display mode, SL=0
wim 32:59c4b8f648d4 902 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 903 break;
wim 32:59c4b8f648d4 904
wim 32:59c4b8f648d4 905 case LCD8x2:
wim 32:59c4b8f648d4 906 // case LCD12x2:
wim 32:59c4b8f648d4 907 case LCD16x2:
wim 34:e5a0dcb43ecc 908 _function = 0x04; // FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=1 2-line/16 chars display mode, SL=0
wim 32:59c4b8f648d4 909 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 910 break;
wim 32:59c4b8f648d4 911
wim 32:59c4b8f648d4 912 default:
wim 32:59c4b8f648d4 913 error("Error: LCD Controller type does not support this Display type\n\r");
wim 32:59c4b8f648d4 914 break;
wim 32:59c4b8f648d4 915
wim 32:59c4b8f648d4 916 } // switch type
wim 32:59c4b8f648d4 917
wim 32:59c4b8f648d4 918 // Init special features
wim 32:59c4b8f648d4 919 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instruction Set = 1
wim 32:59c4b8f648d4 920
wim 39:e9c2319de9c5 921 // _writeCommand(0x04); // DISP CONF SET (Instr. Set 1) 0000, 0, 1, P=0, Q=0 (IC at Bottom)
wim 39:e9c2319de9c5 922 // _writeCommand(0x05); // Display Conf Set 0000, 0, 1, P=0, Q=1
wim 39:e9c2319de9c5 923 // _writeCommand(0x06); // Display Conf Set 0000, 0, 1, P=1, Q=0
wim 39:e9c2319de9c5 924 _writeCommand(0x07); // Display Conf Set 0000, 0, 1, P=1, Q=1 (IC at Top)
wim 39:e9c2319de9c5 925
wim 32:59c4b8f648d4 926 _writeCommand(0x10); // TEMP CTRL SET (Instr. Set 1) 0001, 0, 0, TC1=0, TC2=0
wim 32:59c4b8f648d4 927 // _writeCommand(0x42); // HV GEN (Instr. Set 1) 0100, 0, 0, S1=1, S2=0 (2x multiplier)
wim 32:59c4b8f648d4 928 _writeCommand(0x40 | (LCD_PCF2_S12 & 0x03)); // HV GEN (Instr. Set 1) 0100, 0, 0, S1=1, S2=0 (2x multiplier)
wim 32:59c4b8f648d4 929
wim 32:59c4b8f648d4 930 _contrast = LCD_PCF2_CONTRAST;
wim 32:59c4b8f648d4 931 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=0, VA=contrast
wim 32:59c4b8f648d4 932 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=1, VB=contrast
wim 32:59c4b8f648d4 933 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 934
wim 32:59c4b8f648d4 935 _writeCommand(0x02); // SCRN CONF (Instr. Set 1) L=0
wim 32:59c4b8f648d4 936 _writeCommand(0x08); // ICON CONF (Instr. Set 1) IM=0 (Char mode) IB=0 (no icon blink) DM=0 (no direct mode)
wim 32:59c4b8f648d4 937
wim 32:59c4b8f648d4 938 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 939
wim 32:59c4b8f648d4 940 break; // case PCF2119_3V3 Controller
wim 32:59c4b8f648d4 941
wim 32:59c4b8f648d4 942 // case PCF2119_5V:
wim 32:59c4b8f648d4 943 // PCF2119 controller: No Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 32:59c4b8f648d4 944 // Note1: See datasheet, the PCF2119 supports icons and provides separate constrast control for Icons and characters.
wim 32:59c4b8f648d4 945 // Note2: Vgen is switched off when the contrast voltage VA or VB is set to 0x00.
wim 30:033048611c01 946 //@TODO
wim 29:a3663151aa65 947
wim 19:c747b9e2e7b8 948 case WS0010:
wim 19:c747b9e2e7b8 949 // WS0010 OLED controller: Initialise DC/DC Voltage converter for LEDs
wim 30:033048611c01 950 // Note1: Identical to RS0010
wim 30:033048611c01 951 // Note2: supports 1 or 2 lines (and 16x100 graphics)
wim 30:033048611c01 952 // supports 4 fonts (English/Japanese (default), Western European-I, English/Russian, Western European-II)
wim 19:c747b9e2e7b8 953 // Cursor/Disp shift set 0001 SC RL 0 0
wim 19:c747b9e2e7b8 954 //
wim 30:033048611c01 955 // Mode and Power set 0001 GC PWR 1 1
wim 19:c747b9e2e7b8 956 // GC = 0 (Graph Mode=1, Char Mode=0)
wim 30:033048611c01 957 // PWR = 1 (DC/DC On/Off)
wim 30:033048611c01 958
wim 30:033048611c01 959 //@Todo: This may be needed to enable a warm reboot
wim 32:59c4b8f648d4 960 //_writeCommand(0x13); // Char mode, DC/DC off
wim 30:033048611c01 961 //wait_ms(10); // Wait 10ms to ensure powered down
wim 32:59c4b8f648d4 962 _writeCommand(0x17); // Char mode, DC/DC on
wim 30:033048611c01 963 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 964
wim 29:a3663151aa65 965 // Initialise Display configuration
wim 29:a3663151aa65 966 switch (_type) {
wim 29:a3663151aa65 967 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 968 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 969 // case LCD12x1:
wim 29:a3663151aa65 970 case LCD16x1:
wim 30:033048611c01 971 case LCD24x1:
wim 30:033048611c01 972 _writeCommand(0x20); // Function set 001 DL N F FT1 FT0
wim 30:033048611c01 973 // DL=0 (4 bits bus)
wim 30:033048611c01 974 // N=0 (1 line)
wim 30:033048611c01 975 // F=0 (5x7 dots font)
wim 30:033048611c01 976 // FT=00 (00 = Engl/Jap, 01 = WestEur1, 10 = Engl/Russian, 11 = WestEur2
wim 30:033048611c01 977 break;
wim 30:033048611c01 978
wim 32:59c4b8f648d4 979 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 980 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 981 case LCD12x4D: // Special mode for PCF21XX:
wim 33:900a94bc7585 982 case LCD16x3G: // Special mode for ST7036
wim 30:033048611c01 983 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 984 error("Error: LCD Controller type does not support this Display type\n\r");
wim 29:a3663151aa65 985 break;
wim 29:a3663151aa65 986
wim 29:a3663151aa65 987 default:
wim 30:033048611c01 988 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 30:033048611c01 989 _writeCommand(0x28); // Function set 001 DL N F FT1 FT0
wim 30:033048611c01 990 // DL=0 (4 bits bus)
wim 30:033048611c01 991 // N=1 (2 lines)
wim 30:033048611c01 992 // F=0 (5x7 dots font)
wim 30:033048611c01 993 // FT=00 (00 = Engl/Jap, 01 = WestEur1, 10 = Engl/Russian, 11 = WestEur2
wim 30:033048611c01 994
wim 29:a3663151aa65 995 break;
wim 29:a3663151aa65 996 } // switch type
wim 29:a3663151aa65 997
wim 32:59c4b8f648d4 998 break; // case WS0010 Controller
wim 33:900a94bc7585 999
wim 33:900a94bc7585 1000
wim 33:900a94bc7585 1001 case US2066_3V3:
wim 33:900a94bc7585 1002 // US2066/SSD1311 OLED controller, Initialise for VDD=3V3
wim 33:900a94bc7585 1003 // Note: supports 1,2, 3 or 4 lines
wim 33:900a94bc7585 1004 // case USS2066_5V:
wim 33:900a94bc7585 1005 // US2066 controller, VDD=5V
wim 33:900a94bc7585 1006
wim 33:900a94bc7585 1007 // Initialise Display configuration
wim 33:900a94bc7585 1008 switch (_type) {
wim 33:900a94bc7585 1009 case LCD8x1: //8x1 is a regular 1 line display
wim 33:900a94bc7585 1010 case LCD8x2B: //8x2D is a special case of 16x1
wim 33:900a94bc7585 1011 // case LCD12x1:
wim 33:900a94bc7585 1012 case LCD16x1:
wim 33:900a94bc7585 1013 // case LCD20x1:
wim 33:900a94bc7585 1014 _function = 0x00; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1015 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1016 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1017 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1018 // DH=0 Double Height disable
wim 33:900a94bc7585 1019 // IS=0
wim 33:900a94bc7585 1020
wim 33:900a94bc7585 1021 _function_1 = 0x02; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1022 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1023 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1024 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1025 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1026 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1027
wim 33:900a94bc7585 1028 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1029 // NW=0 1-Line LCD (N=0)
wim 33:900a94bc7585 1030 break;
wim 33:900a94bc7585 1031
wim 33:900a94bc7585 1032 case LCD16x1C:
wim 33:900a94bc7585 1033 case LCD8x2:
wim 33:900a94bc7585 1034 case LCD16x2:
wim 33:900a94bc7585 1035 case LCD20x2:
wim 33:900a94bc7585 1036 _function = 0x08; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1037 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1038 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1039 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1040 // DH=0 Double Height disable
wim 33:900a94bc7585 1041 // IS=0
wim 33:900a94bc7585 1042
wim 33:900a94bc7585 1043 _function_1 = 0x0A; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1044 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1045 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1046 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1047 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1048 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1049
wim 33:900a94bc7585 1050 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1051 // NW=0 2-Line LCD (N=1)
wim 33:900a94bc7585 1052 break;
wim 33:900a94bc7585 1053
wim 33:900a94bc7585 1054 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 1055 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 1056 case LCD16x3D: // Special mode for KS0078, SSD1803 and US2066
wim 33:900a94bc7585 1057 // case LCD16x3D1: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1058 // case LCD20x3D: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1059 _function = 0x00; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1060 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1061 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1062 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1063 // DH=0 Double Height disable
wim 33:900a94bc7585 1064 // IS=0
wim 33:900a94bc7585 1065
wim 33:900a94bc7585 1066 _function_1 = 0x02; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1067 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1068 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1069 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1070 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1071 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1072
wim 33:900a94bc7585 1073 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1074 // NW=1 3-Line LCD (N=0)
wim 33:900a94bc7585 1075 break;
wim 33:900a94bc7585 1076
wim 33:900a94bc7585 1077 case LCD20x4D: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1078 _function = 0x08; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1079 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1080 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1081 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1082 // DH=0 Double Height disable
wim 33:900a94bc7585 1083 // IS=0
wim 33:900a94bc7585 1084
wim 33:900a94bc7585 1085 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 1086 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1087 // DL=0 bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1088 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1089 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1090 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1091
wim 33:900a94bc7585 1092 _lines = 0x01; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1093 // NW=1 4-Line LCD (N=1)
wim 33:900a94bc7585 1094 break;
wim 33:900a94bc7585 1095
wim 33:900a94bc7585 1096 // case LCD24x1:
wim 33:900a94bc7585 1097 // case LCD16x3G: // Special mode for ST7036
wim 33:900a94bc7585 1098 // case LCD24x4D: // Special mode for KS0078
wim 33:900a94bc7585 1099 default:
wim 33:900a94bc7585 1100 error("Error: LCD Controller type does not support this Display type\n\r");
wim 33:900a94bc7585 1101 break;
wim 33:900a94bc7585 1102
wim 33:900a94bc7585 1103 } // switch type
wim 33:900a94bc7585 1104
wim 34:e5a0dcb43ecc 1105 _writeCommand(0x00); // NOP, make sure to sync SPI
wim 33:900a94bc7585 1106
wim 33:900a94bc7585 1107 // init special features
wim 33:900a94bc7585 1108 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1109 // Select Extended Instruction Set
wim 33:900a94bc7585 1110
wim 33:900a94bc7585 1111 _writeCommand(0x71); // Function Select A: 0 1 1 1 0 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1112 _writeData(0x00); // Disable Internal VDD
wim 33:900a94bc7585 1113
wim 33:900a94bc7585 1114 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1115
wim 33:900a94bc7585 1116 _writeCommand(0xD5); // Display Clock Divide Ratio: 1 1 0 1 0 1 0 1 (Ext Instr Set, OLED Instr Set)
wim 33:900a94bc7585 1117 _writeCommand(0x70); // Display Clock Divide Ratio value: 0 1 1 1 0 0 0 0 (Ext Instr Set, OLED Instr Set)
wim 33:900a94bc7585 1118
wim 33:900a94bc7585 1119 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 1120
wim 33:900a94bc7585 1121 // _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 1122 _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 1123
wim 33:900a94bc7585 1124 _writeCommand(0x08 | _lines); // Set ext function 0 0 0 0 1 FW BW NW 1,2,3 or 4 lines (Ext Instr Set)
wim 33:900a94bc7585 1125
wim 34:e5a0dcb43ecc 1126 // _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 33:900a94bc7585 1127 // // Default
wim 33:900a94bc7585 1128
wim 33:900a94bc7585 1129 _writeCommand(0x72); // Function Select B: 0 1 1 1 0 0 1 0 (Ext Instr Set)
wim 33:900a94bc7585 1130 _writeData(0x01); // Select ROM A (CGRAM 8, CGROM 248)
wim 33:900a94bc7585 1131
wim 33:900a94bc7585 1132 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1133
wim 33:900a94bc7585 1134 _writeCommand(0xDA); // Set Segm Pins Config: 1 1 0 1 1 0 1 0 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1135 _writeCommand(0x10); // Set Segm Pins Config value: Altern Odd/Even, Disable Remap (Ext Instr Set, OLED)
wim 33:900a94bc7585 1136
wim 33:900a94bc7585 1137 _writeCommand(0xDC); // Function Select C: 1 1 0 1 1 1 0 0 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1138 // _writeCommand(0x00); // Set internal VSL, GPIO pin HiZ (always read low)
wim 33:900a94bc7585 1139 _writeCommand(0x80); // Set external VSL, GPIO pin HiZ (always read low)
wim 33:900a94bc7585 1140
wim 33:900a94bc7585 1141 _contrast = LCD_US20_CONTRAST;
wim 33:900a94bc7585 1142 _writeCommand(0x81); // Set Contrast Control: 1 0 0 0 0 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1143 _writeCommand((_contrast << 2) | 0x03); // Set Contrast Value: 8 bits, use 6 bits for compatibility
wim 33:900a94bc7585 1144
wim 33:900a94bc7585 1145 _writeCommand(0xD9); // Set Phase Length: 1 1 0 1 1 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1146 _writeCommand(0xF1); // Set Phase Length Value:
wim 33:900a94bc7585 1147
wim 33:900a94bc7585 1148 _writeCommand(0xDB); // Set VCOMH Deselect Lvl: 1 1 0 1 1 0 1 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1149 _writeCommand(0x30); // Set VCOMH Deselect Value: 0.83 x VCC
wim 33:900a94bc7585 1150
wim 33:900a94bc7585 1151 wait_ms(10); // Wait 10ms to ensure powered up
wim 33:900a94bc7585 1152
wim 33:900a94bc7585 1153 //Test Fade/Blinking. Hard Blink on/off, No fade in/out ??
wim 33:900a94bc7585 1154 // _writeCommand(0x23); // Set (Ext Instr Set, OLED)
wim 33:900a94bc7585 1155 // _writeCommand(0x3F); // Set interval 128 frames
wim 33:900a94bc7585 1156 //End Test Blinking
wim 33:900a94bc7585 1157
wim 33:900a94bc7585 1158 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 1159
wim 33:900a94bc7585 1160 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 X N DH RE(0) IS=1 Select Instruction Set 1
wim 33:900a94bc7585 1161 // Select Std Instr set, Select IS=1
wim 33:900a94bc7585 1162
wim 33:900a94bc7585 1163 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1164 // Select Ext Instr Set, IS=1
wim 33:900a94bc7585 1165 _writeCommand(0x10); // Shift/Scroll enable, 0 0 0 1 DS4/HS4 DS3/HS3 DS2/HS2 DS1/HS1 (Ext Instr Set, IS=1)
wim 33:900a94bc7585 1166
wim 33:900a94bc7585 1167 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 1168 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 1169 break; // case US2066/SSD1311 Controller
wim 33:900a94bc7585 1170
wim 34:e5a0dcb43ecc 1171 //not yet tested on hardware
wim 34:e5a0dcb43ecc 1172 case PT6314 :
wim 34:e5a0dcb43ecc 1173 // Initialise Display configuration
wim 34:e5a0dcb43ecc 1174 switch (_type) {
wim 34:e5a0dcb43ecc 1175 case LCD8x1: //8x1 is a regular 1 line display
wim 34:e5a0dcb43ecc 1176 case LCD8x2B: //8x2B is a special case of 16x1
wim 34:e5a0dcb43ecc 1177 // case LCD12x1:
wim 34:e5a0dcb43ecc 1178 case LCD16x1:
wim 34:e5a0dcb43ecc 1179 case LCD20x1:
wim 34:e5a0dcb43ecc 1180 case LCD24x1:
wim 34:e5a0dcb43ecc 1181 _function = 0x00; // Function set 001 DL N X BR1 BR0
wim 34:e5a0dcb43ecc 1182 // DL=0 (4 bits bus)
wim 34:e5a0dcb43ecc 1183 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 34:e5a0dcb43ecc 1184 // N=0 (1 line)
wim 34:e5a0dcb43ecc 1185 // X
wim 34:e5a0dcb43ecc 1186 // BR1=0 (2 significant bits for brightness
wim 34:e5a0dcb43ecc 1187 // BR0=0
wim 34:e5a0dcb43ecc 1188 // 0x0 = 100%
wim 34:e5a0dcb43ecc 1189 // 0x1 = 75%
wim 34:e5a0dcb43ecc 1190 // 0x2 = 50%
wim 34:e5a0dcb43ecc 1191 // 0x3 = 25%
wim 34:e5a0dcb43ecc 1192
wim 34:e5a0dcb43ecc 1193 break;
wim 34:e5a0dcb43ecc 1194
wim 34:e5a0dcb43ecc 1195 // All other valid LCD types are initialised as 2 Line displays
wim 34:e5a0dcb43ecc 1196 case LCD8x2:
wim 34:e5a0dcb43ecc 1197 case LCD16x2:
wim 34:e5a0dcb43ecc 1198 case LCD20x2:
wim 34:e5a0dcb43ecc 1199 case LCD24x2:
wim 34:e5a0dcb43ecc 1200 _function = 0x08; // Function set 001 DL N X BR1 BR2
wim 34:e5a0dcb43ecc 1201 // DL=0 (4 bits bus)
wim 34:e5a0dcb43ecc 1202 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 34:e5a0dcb43ecc 1203 // N=1 (2 lines)
wim 34:e5a0dcb43ecc 1204 // X
wim 34:e5a0dcb43ecc 1205 // BR1=0 (2 significant bits for brightness
wim 34:e5a0dcb43ecc 1206 // BR0=0
wim 34:e5a0dcb43ecc 1207 break;
wim 34:e5a0dcb43ecc 1208
wim 34:e5a0dcb43ecc 1209 default:
wim 34:e5a0dcb43ecc 1210 error("Error: LCD Controller type does not support this Display type\n\r");
wim 34:e5a0dcb43ecc 1211 break;
wim 34:e5a0dcb43ecc 1212 } // switch type
wim 34:e5a0dcb43ecc 1213
wim 34:e5a0dcb43ecc 1214 _contrast = LCD_PT63_CONTRAST;
wim 34:e5a0dcb43ecc 1215 _writeCommand(0x20 | _function | ((~_contrast) >> 4)); // Invert and shift to use 2 MSBs
wim 34:e5a0dcb43ecc 1216 break; // case PT6314 Controller (VFD)
wim 39:e9c2319de9c5 1217
wim 39:e9c2319de9c5 1218
wim 39:e9c2319de9c5 1219 case HD66712:
wim 39:e9c2319de9c5 1220 // Initialise Display configuration
wim 39:e9c2319de9c5 1221 switch (_type) {
wim 39:e9c2319de9c5 1222 case LCD8x1: //8x1 is a regular 1 line display
wim 39:e9c2319de9c5 1223 case LCD12x1:
wim 39:e9c2319de9c5 1224 case LCD16x1:
wim 39:e9c2319de9c5 1225 case LCD20x1:
wim 39:e9c2319de9c5 1226 case LCD24x1:
wim 39:e9c2319de9c5 1227 // case LCD32x1: // EXT pin is High, extension driver needed
wim 40:d3496c3ea301 1228 _function = 0x02; // Function set 001 DL N RE(0) - - (Std Regs)
wim 39:e9c2319de9c5 1229 // DL=0 (4 bits bus)
wim 39:e9c2319de9c5 1230 // N=0 (1-line mode, N=1 2-line mode)
wim 40:d3496c3ea301 1231 // RE=0 (Dis. Extended Regs, special mode for HD66712)
wim 40:d3496c3ea301 1232 //
wim 39:e9c2319de9c5 1233
wim 39:e9c2319de9c5 1234 _function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 39:e9c2319de9c5 1235 // DL=0 (4 bits bus)
wim 39:e9c2319de9c5 1236 // N=0 (1-line mode, N=1 2-line mode)
wim 40:d3496c3ea301 1237 // RE=1 (Ena Extended Regs; special mode for HD66712)
wim 40:d3496c3ea301 1238 // BE=0 (Blink Enable, CG/SEG RAM; special mode for HD66712)
wim 40:d3496c3ea301 1239 // LP=0 (LP=1 Low power mode, LP=0 Normal; special mode for HD66712)
wim 39:e9c2319de9c5 1240
wim 39:e9c2319de9c5 1241 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 40:d3496c3ea301 1242 // NW=0 (1,2 line), NW=1 (4 Line, special mode for HD66712)
wim 39:e9c2319de9c5 1243 break;
wim 39:e9c2319de9c5 1244
wim 40:d3496c3ea301 1245 // case LCD12x3D: // Special mode for KS0073, KS0078, PCF21XX and HD66712
wim 40:d3496c3ea301 1246 // case LCD12x3D1: // Special mode for KS0073, KS0078, PCF21XX and HD66712
wim 39:e9c2319de9c5 1247 case LCD12x4D: // Special mode for KS0073, KS0078, PCF21XX and HD66712
wim 40:d3496c3ea301 1248 // case LCD16x3D: // Special mode for KS0073, KS0078 and HD66712
wim 40:d3496c3ea301 1249 // case LCD16x4D: // Special mode for KS0073, KS0078 and HD66712
wim 39:e9c2319de9c5 1250 case LCD20x4D: // Special mode for KS0073, KS0078 and HD66712
wim 40:d3496c3ea301 1251 _function = 0x02; // Function set 001 DL N RE(0) - - (Std Regs)
wim 39:e9c2319de9c5 1252 // DL=0 (4 bits bus)
wim 40:d3496c3ea301 1253 // N=0 (1-line mode, N=1 2-line mode)
wim 40:d3496c3ea301 1254 // RE=0 (Dis. Extended Regs, special mode for HD66712)
wim 40:d3496c3ea301 1255 //
wim 39:e9c2319de9c5 1256
wim 39:e9c2319de9c5 1257 _function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 39:e9c2319de9c5 1258 // DL=0 (4 bits bus)
wim 40:d3496c3ea301 1259 // N=0 (1-line mode, N=1 2-line mode)
wim 40:d3496c3ea301 1260 // RE=1 (Ena Extended Regs; special mode for HD66712)
wim 40:d3496c3ea301 1261 // BE=0 (Blink Enable, CG/SEG RAM; special mode for HD66712)
wim 40:d3496c3ea301 1262 // LP=0 (LP=1 Low power mode, LP=0 Normal; special mode for HD66712)
wim 39:e9c2319de9c5 1263
wim 39:e9c2319de9c5 1264 _function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 40:d3496c3ea301 1265 // NW=0 (1,2 line), NW=1 (4 Line, special mode for HD66712)
wim 39:e9c2319de9c5 1266 break;
wim 39:e9c2319de9c5 1267
wim 39:e9c2319de9c5 1268 case LCD16x3G: // Special mode for ST7036
wim 39:e9c2319de9c5 1269 // case LCD24x3D: // Special mode for KS0078
wim 39:e9c2319de9c5 1270 // case LCD24x3D1: // Special mode for KS0078
wim 39:e9c2319de9c5 1271 case LCD24x4D: // Special mode for KS0078
wim 39:e9c2319de9c5 1272 error("Error: LCD Controller type does not support this Display type\n\r");
wim 39:e9c2319de9c5 1273 break;
wim 39:e9c2319de9c5 1274
wim 39:e9c2319de9c5 1275 default:
wim 39:e9c2319de9c5 1276 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 40:d3496c3ea301 1277 _function = 0x0A; // Function set 001 DL N RE(0) - - (Std Regs)
wim 39:e9c2319de9c5 1278 // DL=0 (4 bits bus)
wim 39:e9c2319de9c5 1279 // N=1 (2-line mode), N=0 (1-line mode)
wim 40:d3496c3ea301 1280 // RE=0 (Dis. Extended Regs, special mode for HD66712)
wim 39:e9c2319de9c5 1281
wim 39:e9c2319de9c5 1282 _function_1 = 0x0C; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 39:e9c2319de9c5 1283 // DL=0 (4 bits bus)
wim 39:e9c2319de9c5 1284 // N=1 (2 line mode), N=0 (1-line mode)
wim 40:d3496c3ea301 1285 // RE=1 (Ena Extended Regs, special mode for HD66712)
wim 40:d3496c3ea301 1286 // BE=0 (Blink Enable, CG/SEG RAM, special mode for HD66712)
wim 40:d3496c3ea301 1287 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 39:e9c2319de9c5 1288
wim 39:e9c2319de9c5 1289 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 40:d3496c3ea301 1290 // NW=0 (1,2 line), NW=1 (4 Line, special mode for HD66712)
wim 39:e9c2319de9c5 1291 break;
wim 39:e9c2319de9c5 1292 } // switch type
wim 39:e9c2319de9c5 1293
wim 39:e9c2319de9c5 1294 // init special features
wim 39:e9c2319de9c5 1295 _writeCommand(0x20 | _function_1);// Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 39:e9c2319de9c5 1296 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 39:e9c2319de9c5 1297 // N=0 (1 line mode), N=1 (2 line mode)
wim 40:d3496c3ea301 1298 // RE=1 (Ena Extended Regs, special mode for HD66712)
wim 40:d3496c3ea301 1299 // BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for HD66712)
wim 39:e9c2319de9c5 1300 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 39:e9c2319de9c5 1301
wim 39:e9c2319de9c5 1302 _writeCommand(0x08 | _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 40:d3496c3ea301 1303 // FW=0 (5-dot font, special mode for HD66712)
wim 40:d3496c3ea301 1304 // BW=0 (Cur BW invert disable, special mode for HD66712)
wim 40:d3496c3ea301 1305 // NW=0 (1,2 Line), NW=1 (4 line, special mode for HD66712)
wim 40:d3496c3ea301 1306
wim 40:d3496c3ea301 1307 _writeCommand(0x10); // Scroll/Shift set 0001 HS4 HS3 HS2 HS1 (Ext Regs)
wim 40:d3496c3ea301 1308 // Dotscroll/Display shift enable (Special mode for HD66712)
wim 40:d3496c3ea301 1309
wim 40:d3496c3ea301 1310 _writeCommand(0x80); // Scroll Quantity set 1 0 HDS5 HDS4 HDS3 HDS2 HDS1 HDS0 (Ext Regs)
wim 40:d3496c3ea301 1311 // Scroll quantity (Special mode for HD66712)
wim 39:e9c2319de9c5 1312
wim 39:e9c2319de9c5 1313 _writeCommand(0x20 | _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 39:e9c2319de9c5 1314 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 39:e9c2319de9c5 1315 // N=0 (1 line mode), N=1 (2 line mode)
wim 40:d3496c3ea301 1316 // RE=0 (Dis. Extended Regs, special mode for HD66712)
wim 40:d3496c3ea301 1317 // DH=1 (Disp shift enable/disable, special mode for HD66712)
wim 40:d3496c3ea301 1318 // REV=0 (Reverse/Normal, special mode for HD66712)
wim 39:e9c2319de9c5 1319 break; // case HD66712 Controller
wim 39:e9c2319de9c5 1320
wim 29:a3663151aa65 1321
wim 37:ce348c002929 1322 case ST7066_ACM: // ST7066 4/8 bit, I2C on ACM1602 using a PIC
wim 19:c747b9e2e7b8 1323 default:
wim 32:59c4b8f648d4 1324 // Devices fully compatible to HD44780 that do not use any DC/DC Voltage converters but external VLCD, no icons etc
wim 10:dd9b3a696acd 1325
wim 29:a3663151aa65 1326 // Initialise Display configuration
wim 29:a3663151aa65 1327 switch (_type) {
wim 29:a3663151aa65 1328 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 1329 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 1330 // case LCD12x1:
wim 29:a3663151aa65 1331 case LCD16x1:
wim 30:033048611c01 1332 // case LCD20x1:
wim 29:a3663151aa65 1333 case LCD24x1:
wim 30:033048611c01 1334 // case LCD40x1:
wim 32:59c4b8f648d4 1335 _function = 0x00; // Function set 001 DL N F - -
wim 29:a3663151aa65 1336 // DL=0 (4 bits bus)
wim 29:a3663151aa65 1337 // N=0 (1 line)
wim 29:a3663151aa65 1338 // F=0 (5x7 dots font)
wim 29:a3663151aa65 1339 break;
wim 29:a3663151aa65 1340
wim 32:59c4b8f648d4 1341 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 1342 case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 1343 case LCD12x4D: // Special mode for KS0078 and PCF21XX:
wim 33:900a94bc7585 1344 case LCD16x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 1345 // case LCD16x3D1: // Special mode for KS0078
wim 30:033048611c01 1346 // case LCD24x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 1347 // case LCD24x3D1: // Special mode for KS0078
wim 30:033048611c01 1348 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 1349 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 1350 break;
wim 30:033048611c01 1351
wim 30:033048611c01 1352 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 29:a3663151aa65 1353 default:
wim 32:59c4b8f648d4 1354 _function = 0x08; // Function set 001 DL N F - -
wim 29:a3663151aa65 1355 // DL=0 (4 bits bus)
wim 29:a3663151aa65 1356 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 29:a3663151aa65 1357 // N=1 (2 lines)
wim 29:a3663151aa65 1358 // F=0 (5x7 dots font, only option for 2 line display)
wim 32:59c4b8f648d4 1359 // - (Don't care)
wim 29:a3663151aa65 1360 break;
wim 29:a3663151aa65 1361 } // switch type
wim 10:dd9b3a696acd 1362
wim 34:e5a0dcb43ecc 1363 _writeCommand(0x20 | _function);
wim 29:a3663151aa65 1364 break; // case default Controller
wim 29:a3663151aa65 1365
wim 34:e5a0dcb43ecc 1366 } // switch Controller specific initialisations
wim 10:dd9b3a696acd 1367
wim 30:033048611c01 1368 // Controller general initialisations
wim 39:e9c2319de9c5 1369 // _writeCommand(0x01); // Clear Display and set cursor to 0
wim 32:59c4b8f648d4 1370 // wait_ms(10); // The CLS command takes 1.64 ms.
wim 32:59c4b8f648d4 1371 // // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 28:30fa94f7341c 1372
wim 39:e9c2319de9c5 1373 _writeCommand(0x02); // Cursor Home, DDRAM Address to Origin
wim 39:e9c2319de9c5 1374 wait_ms(10); // The Return Home command takes 1.64 ms.
wim 39:e9c2319de9c5 1375 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 28:30fa94f7341c 1376
wim 28:30fa94f7341c 1377 _writeCommand(0x06); // Entry Mode 0000 0 1 I/D S
wim 13:24506ba22480 1378 // Cursor Direction and Display Shift
wim 28:30fa94f7341c 1379 // I/D=1 (Cur incr)
wim 28:30fa94f7341c 1380 // S=0 (No display shift)
wim 10:dd9b3a696acd 1381
wim 29:a3663151aa65 1382 _writeCommand(0x14); // Cursor or Display shift 0001 S/C R/L x x
wim 29:a3663151aa65 1383 // S/C=0 Cursor moves
wim 29:a3663151aa65 1384 // R/L=1 Right
wim 29:a3663151aa65 1385 //
wim 29:a3663151aa65 1386
wim 13:24506ba22480 1387 // _writeCommand(0x0C); // Display Ctrl 0000 1 D C B
wim 17:652ab113bc2e 1388 // // Display On, Cursor Off, Blink Off
wim 36:9f5f86dfd44a 1389
wim 39:e9c2319de9c5 1390 // setCursor(CurOff_BlkOff);
wim 39:e9c2319de9c5 1391 setCursor(CurOn_BlkOff);
wim 21:9eb628d9e164 1392 setMode(DispOn);
simon 1:ac48b187213c 1393 }
simon 1:ac48b187213c 1394
wim 8:03116f75b66e 1395
wim 21:9eb628d9e164 1396 /** Clear the screen, Cursor home.
wim 39:e9c2319de9c5 1397 * Note: The whole display is initialised to charcode 0x20, which may not be a 'space' on some controllers with a
wim 39:e9c2319de9c5 1398 * different fontset such as the PCF2116C or PCF2119R. In this case you should fill the display with 'spaces'.
wim 21:9eb628d9e164 1399 */
wim 21:9eb628d9e164 1400 void TextLCD_Base::cls() {
wim 15:b70ebfffb258 1401
wim 15:b70ebfffb258 1402 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 1403 if(_type==LCD40x4) {
wim 21:9eb628d9e164 1404 _ctrl_idx=_LCDCtrl_1; // Select 2nd controller
wim 15:b70ebfffb258 1405
wim 15:b70ebfffb258 1406 // Second LCD controller Cursor always Off
wim 21:9eb628d9e164 1407 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 15:b70ebfffb258 1408
wim 15:b70ebfffb258 1409 // Second LCD controller Clearscreen
wim 27:22d5086f6ba6 1410 _writeCommand(0x01); // cls, and set cursor to 0
wim 39:e9c2319de9c5 1411 wait_ms(20); // The CLS command takes 1.64 ms.
wim 29:a3663151aa65 1412 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 15:b70ebfffb258 1413
wim 21:9eb628d9e164 1414 _ctrl_idx=_LCDCtrl_0; // Select primary controller
wim 15:b70ebfffb258 1415 }
wim 15:b70ebfffb258 1416
wim 15:b70ebfffb258 1417 // Primary LCD controller Clearscreen
wim 27:22d5086f6ba6 1418 _writeCommand(0x01); // cls, and set cursor to 0
wim 39:e9c2319de9c5 1419 wait_ms(20); // The CLS command takes 1.64 ms.
wim 29:a3663151aa65 1420 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 15:b70ebfffb258 1421
wim 15:b70ebfffb258 1422 // Restore cursormode on primary LCD controller when needed
wim 15:b70ebfffb258 1423 if(_type==LCD40x4) {
wim 17:652ab113bc2e 1424 _setCursorAndDisplayMode(_currentMode,_currentCursor);
wim 15:b70ebfffb258 1425 }
wim 15:b70ebfffb258 1426
wim 29:a3663151aa65 1427 setAddress(0, 0); // Reset Cursor location
wim 32:59c4b8f648d4 1428 // Note: This is needed because some displays (eg PCF21XX) don't use line 0 in the '3 Line' mode.
simon 1:ac48b187213c 1429 }
simon 1:ac48b187213c 1430
wim 29:a3663151aa65 1431 /** Locate cursor to a screen column and row
wim 29:a3663151aa65 1432 *
wim 29:a3663151aa65 1433 * @param column The horizontal position from the left, indexed from 0
wim 29:a3663151aa65 1434 * @param row The vertical position from the top, indexed from 0
wim 29:a3663151aa65 1435 */
wim 21:9eb628d9e164 1436 void TextLCD_Base::locate(int column, int row) {
wim 15:b70ebfffb258 1437
wim 15:b70ebfffb258 1438 // setAddress() does all the heavy lifting:
wim 15:b70ebfffb258 1439 // check column and row sanity,
wim 15:b70ebfffb258 1440 // switch controllers for LCD40x4 if needed
wim 15:b70ebfffb258 1441 // switch cursor for LCD40x4 if needed
wim 15:b70ebfffb258 1442 // set the new memory address to show cursor at correct location
wim 32:59c4b8f648d4 1443 setAddress(column, row);
wim 15:b70ebfffb258 1444 }
wim 30:033048611c01 1445
wim 15:b70ebfffb258 1446
wim 21:9eb628d9e164 1447 /** Write a single character (Stream implementation)
wim 21:9eb628d9e164 1448 */
wim 21:9eb628d9e164 1449 int TextLCD_Base::_putc(int value) {
wim 15:b70ebfffb258 1450 int addr;
wim 15:b70ebfffb258 1451
wim 15:b70ebfffb258 1452 if (value == '\n') {
wim 15:b70ebfffb258 1453 //No character to write
wim 15:b70ebfffb258 1454
wim 15:b70ebfffb258 1455 //Update Cursor
wim 15:b70ebfffb258 1456 _column = 0;
wim 15:b70ebfffb258 1457 _row++;
wim 15:b70ebfffb258 1458 if (_row >= rows()) {
wim 15:b70ebfffb258 1459 _row = 0;
wim 15:b70ebfffb258 1460 }
wim 15:b70ebfffb258 1461 }
wim 15:b70ebfffb258 1462 else {
wim 37:ce348c002929 1463 //Character to write
wim 40:d3496c3ea301 1464 #if (LCD_DEF_FONT == 1)
wim 37:ce348c002929 1465 _writeData(value);
wim 37:ce348c002929 1466 #else
wim 37:ce348c002929 1467 _writeData(ASCII_2_LCD(value));
wim 37:ce348c002929 1468 #endif
wim 15:b70ebfffb258 1469 //Update Cursor
wim 15:b70ebfffb258 1470 _column++;
wim 15:b70ebfffb258 1471 if (_column >= columns()) {
wim 15:b70ebfffb258 1472 _column = 0;
wim 15:b70ebfffb258 1473 _row++;
wim 15:b70ebfffb258 1474 if (_row >= rows()) {
wim 15:b70ebfffb258 1475 _row = 0;
wim 15:b70ebfffb258 1476 }
wim 15:b70ebfffb258 1477 }
wim 15:b70ebfffb258 1478 } //else
wim 15:b70ebfffb258 1479
wim 15:b70ebfffb258 1480 //Set next memoryaddress, make sure cursor blinks at next location
wim 15:b70ebfffb258 1481 addr = getAddress(_column, _row);
wim 15:b70ebfffb258 1482 _writeCommand(0x80 | addr);
wim 15:b70ebfffb258 1483
wim 15:b70ebfffb258 1484 return value;
wim 15:b70ebfffb258 1485 }
wim 15:b70ebfffb258 1486
wim 15:b70ebfffb258 1487
wim 16:c276b75e6585 1488 // get a single character (Stream implementation)
wim 21:9eb628d9e164 1489 int TextLCD_Base::_getc() {
simon 1:ac48b187213c 1490 return -1;
simon 1:ac48b187213c 1491 }
simon 1:ac48b187213c 1492
wim 37:ce348c002929 1493 /** Convert ASCII character code to the LCD fonttable code
wim 37:ce348c002929 1494 *
wim 37:ce348c002929 1495 * @param c The character to write to the display
wim 37:ce348c002929 1496 * @return The character code for the specific fonttable of the controller
wim 37:ce348c002929 1497 */
wim 37:ce348c002929 1498 int TextLCD_Base::ASCII_2_LCD (int c) {
wim 37:ce348c002929 1499
wim 37:ce348c002929 1500 //LCD_C_FT0 is default for HD44780 and compatible series
wim 37:ce348c002929 1501 if (_font == LCD_C_FT0) return c;
wim 37:ce348c002929 1502
wim 37:ce348c002929 1503 //LCD_C_FT1 for PCF21XXC series
wim 39:e9c2319de9c5 1504 //LCD_C_FT2 for PCF21XXR series
wim 39:e9c2319de9c5 1505 //Used code from Suga koubou library for PCF2119K and PCF2119R
wim 37:ce348c002929 1506 if (((c >= ' ') && (c <= '?')) || ((c >= 'A') && (c <= 'Z')) || ((c >= 'a') && (c <= 'z'))) {
wim 37:ce348c002929 1507 c |= 0x80;
wim 39:e9c2319de9c5 1508 } else if (c >= 0xF0 && c <= 0xFF) {
wim 37:ce348c002929 1509 c &= 0x0f;
wim 37:ce348c002929 1510 }
wim 37:ce348c002929 1511 return c;
wim 37:ce348c002929 1512
wim 37:ce348c002929 1513 //LCD_C_FT2 ...
wim 37:ce348c002929 1514 //@TODO add more, eg cyrillic
wim 37:ce348c002929 1515 //@TODO add method to switch between fonts for controllers that support this
wim 37:ce348c002929 1516 }
wim 37:ce348c002929 1517
wim 14:0c32b66b14b8 1518
wim 34:e5a0dcb43ecc 1519 #if(LCD_PRINTF != 1)
wim 34:e5a0dcb43ecc 1520 /** Write a character to the LCD
wim 34:e5a0dcb43ecc 1521 *
wim 34:e5a0dcb43ecc 1522 * @param c The character to write to the display
wim 34:e5a0dcb43ecc 1523 */
wim 34:e5a0dcb43ecc 1524 int TextLCD_Base::putc(int c){
wim 34:e5a0dcb43ecc 1525 return _putc(c);
wim 34:e5a0dcb43ecc 1526 }
wim 34:e5a0dcb43ecc 1527
wim 34:e5a0dcb43ecc 1528
wim 34:e5a0dcb43ecc 1529 /** Write a raw string to the LCD
wim 34:e5a0dcb43ecc 1530 *
wim 34:e5a0dcb43ecc 1531 * @param string text, may be followed by variables to emulate formatting the string.
wim 34:e5a0dcb43ecc 1532 * However, printf formatting is NOT supported and variables will be ignored!
wim 34:e5a0dcb43ecc 1533 */
wim 34:e5a0dcb43ecc 1534 int TextLCD_Base::printf(const char* text, ...) {
wim 34:e5a0dcb43ecc 1535
wim 34:e5a0dcb43ecc 1536 while (*text !=0) {
wim 34:e5a0dcb43ecc 1537 _putc(*text);
wim 34:e5a0dcb43ecc 1538 text++;
wim 34:e5a0dcb43ecc 1539 }
wim 34:e5a0dcb43ecc 1540 return 0;
wim 34:e5a0dcb43ecc 1541 }
wim 34:e5a0dcb43ecc 1542 #endif
wim 34:e5a0dcb43ecc 1543
wim 34:e5a0dcb43ecc 1544
wim 17:652ab113bc2e 1545 // Write a nibble using the 4-bit interface
wim 21:9eb628d9e164 1546 void TextLCD_Base::_writeNibble(int value) {
wim 17:652ab113bc2e 1547
wim 17:652ab113bc2e 1548 // Enable is Low
wim 21:9eb628d9e164 1549 this->_setEnable(true);
wim 38:cbe275b0b647 1550 this->_setData(value); // Low nibble of value on D4..D7
wim 17:652ab113bc2e 1551 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1552 this->_setEnable(false);
wim 17:652ab113bc2e 1553 wait_us(1); // Datahold time
wim 17:652ab113bc2e 1554 // Enable is Low
wim 17:652ab113bc2e 1555 }
wim 17:652ab113bc2e 1556
wim 16:c276b75e6585 1557 // Write a byte using the 4-bit interface
wim 21:9eb628d9e164 1558 void TextLCD_Base::_writeByte(int value) {
wim 15:b70ebfffb258 1559
wim 15:b70ebfffb258 1560 // Enable is Low
wim 21:9eb628d9e164 1561 this->_setEnable(true);
wim 21:9eb628d9e164 1562 this->_setData(value >> 4); // High nibble
wim 15:b70ebfffb258 1563 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1564 this->_setEnable(false);
wim 15:b70ebfffb258 1565 wait_us(1); // Data hold time
wim 15:b70ebfffb258 1566
wim 21:9eb628d9e164 1567 this->_setEnable(true);
wim 37:ce348c002929 1568 this->_setData(value); // Low nibble
wim 15:b70ebfffb258 1569 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1570 this->_setEnable(false);
wim 15:b70ebfffb258 1571 wait_us(1); // Datahold time
wim 15:b70ebfffb258 1572
wim 15:b70ebfffb258 1573 // Enable is Low
simon 1:ac48b187213c 1574 }
simon 1:ac48b187213c 1575
wim 21:9eb628d9e164 1576 // Write a command byte to the LCD controller
wim 21:9eb628d9e164 1577 void TextLCD_Base::_writeCommand(int command) {
wim 15:b70ebfffb258 1578
wim 21:9eb628d9e164 1579 this->_setRS(false);
wim 16:c276b75e6585 1580 wait_us(1); // Data setup time for RS
wim 15:b70ebfffb258 1581
wim 21:9eb628d9e164 1582 this->_writeByte(command);
wim 15:b70ebfffb258 1583 wait_us(40); // most instructions take 40us
simon 1:ac48b187213c 1584 }
simon 1:ac48b187213c 1585
wim 21:9eb628d9e164 1586 // Write a data byte to the LCD controller
wim 21:9eb628d9e164 1587 void TextLCD_Base::_writeData(int data) {
wim 15:b70ebfffb258 1588
wim 21:9eb628d9e164 1589 this->_setRS(true);
wim 16:c276b75e6585 1590 wait_us(1); // Data setup time for RS
wim 15:b70ebfffb258 1591
wim 21:9eb628d9e164 1592 this->_writeByte(data);
wim 15:b70ebfffb258 1593 wait_us(40); // data writes take 40us
simon 1:ac48b187213c 1594 }
simon 1:ac48b187213c 1595
wim 8:03116f75b66e 1596
wim 32:59c4b8f648d4 1597 // This replaces the original _address() method.
wim 8:03116f75b66e 1598 // It is confusing since it returns the memoryaddress or-ed with the set memorycommand 0x80.
wim 8:03116f75b66e 1599 // Left it in here for compatibility with older code. New applications should use getAddress() instead.
wim 21:9eb628d9e164 1600 int TextLCD_Base::_address(int column, int row) {
wim 8:03116f75b66e 1601 return 0x80 | getAddress(column, row);
wim 8:03116f75b66e 1602 }
wim 8:03116f75b66e 1603
wim 30:033048611c01 1604
wim 30:033048611c01 1605 // This is new method to return the memory address based on row, column and displaytype.
wim 30:033048611c01 1606 //
wim 30:033048611c01 1607 /** Return the memoryaddress of screen column and row location
wim 30:033048611c01 1608 *
wim 30:033048611c01 1609 * @param column The horizontal position from the left, indexed from 0
wim 30:033048611c01 1610 * @param row The vertical position from the top, indexed from 0
wim 36:9f5f86dfd44a 1611 * @return The memoryaddress of screen column and row location
wim 30:033048611c01 1612 *
wim 30:033048611c01 1613 */
wim 30:033048611c01 1614 int TextLCD_Base::getAddress(int column, int row) {
wim 30:033048611c01 1615
wim 30:033048611c01 1616 switch (_addr_mode) {
wim 30:033048611c01 1617
wim 30:033048611c01 1618 case LCD_T_A:
wim 30:033048611c01 1619 //Default addressing mode for 1, 2 and 4 rows (except 40x4)
wim 30:033048611c01 1620 //The two available rows are split and stacked on top of eachother. Addressing for 3rd and 4th line continues where lines 1 and 2 were split.
wim 30:033048611c01 1621 //Displays top rows when less than four are used.
wim 30:033048611c01 1622 switch (row) {
wim 30:033048611c01 1623 case 0:
wim 30:033048611c01 1624 return 0x00 + column;
wim 30:033048611c01 1625 case 1:
wim 30:033048611c01 1626 return 0x40 + column;
wim 30:033048611c01 1627 case 2:
wim 30:033048611c01 1628 return 0x00 + _nr_cols + column;
wim 30:033048611c01 1629 case 3:
wim 30:033048611c01 1630 return 0x40 + _nr_cols + column;
wim 30:033048611c01 1631 // Should never get here.
wim 39:e9c2319de9c5 1632 // default:
wim 39:e9c2319de9c5 1633 // return 0x00;
wim 30:033048611c01 1634 }
wim 30:033048611c01 1635
wim 30:033048611c01 1636 case LCD_T_B:
wim 30:033048611c01 1637 // LCD8x2B is a special layout of LCD16x1
wim 30:033048611c01 1638 if (row==0)
wim 30:033048611c01 1639 return 0x00 + column;
wim 30:033048611c01 1640 else
wim 30:033048611c01 1641 // return _nr_cols + column;
wim 30:033048611c01 1642 return 0x08 + column;
wim 30:033048611c01 1643
wim 30:033048611c01 1644 case LCD_T_C:
wim 30:033048611c01 1645 // LCD16x1C is a special layout of LCD8x2
wim 33:900a94bc7585 1646 // LCD32x1C is a special layout of LCD16x2
wim 33:900a94bc7585 1647 // LCD40x1C is a special layout of LCD20x2
wim 33:900a94bc7585 1648 #if(0)
wim 32:59c4b8f648d4 1649 if (column < 8)
wim 30:033048611c01 1650 return 0x00 + column;
wim 30:033048611c01 1651 else
wim 30:033048611c01 1652 return 0x40 + (column - 8);
wim 32:59c4b8f648d4 1653 #else
wim 32:59c4b8f648d4 1654 if (column < (_nr_cols >> 1))
wim 32:59c4b8f648d4 1655 return 0x00 + column;
wim 32:59c4b8f648d4 1656 else
wim 32:59c4b8f648d4 1657 return 0x40 + (column - (_nr_cols >> 1));
wim 32:59c4b8f648d4 1658 #endif
wim 30:033048611c01 1659
wim 30:033048611c01 1660 // Not sure about this one, seems wrong.
wim 30:033048611c01 1661 // Left in for compatibility with original library
wim 30:033048611c01 1662 // case LCD16x2B:
wim 30:033048611c01 1663 // return 0x00 + (row * 40) + column;
wim 30:033048611c01 1664
wim 30:033048611c01 1665 case LCD_T_D:
wim 36:9f5f86dfd44a 1666 //Alternate addressing mode for 3 and 4 row displays (except 40x4). Used by PCF21XX, KS0073, KS0078, SSD1803
wim 30:033048611c01 1667 //The 4 available rows start at a hardcoded address.
wim 30:033048611c01 1668 //Displays top rows when less than four are used.
wim 30:033048611c01 1669 switch (row) {
wim 30:033048611c01 1670 case 0:
wim 30:033048611c01 1671 return 0x00 + column;
wim 30:033048611c01 1672 case 1:
wim 30:033048611c01 1673 return 0x20 + column;
wim 30:033048611c01 1674 case 2:
wim 30:033048611c01 1675 return 0x40 + column;
wim 30:033048611c01 1676 case 3:
wim 30:033048611c01 1677 return 0x60 + column;
wim 30:033048611c01 1678 // Should never get here.
wim 39:e9c2319de9c5 1679 // default:
wim 39:e9c2319de9c5 1680 // return 0x00;
wim 30:033048611c01 1681 }
wim 30:033048611c01 1682
wim 30:033048611c01 1683 case LCD_T_D1:
wim 36:9f5f86dfd44a 1684 //Alternate addressing mode for 3 row displays. Used by PCF21XX, KS0073, KS0078, SSD1803
wim 30:033048611c01 1685 //The 4 available rows start at a hardcoded address.
wim 30:033048611c01 1686 //Skips top row of 4 row display and starts display at row 1
wim 30:033048611c01 1687 switch (row) {
wim 30:033048611c01 1688 case 0:
wim 30:033048611c01 1689 return 0x20 + column;
wim 30:033048611c01 1690 case 1:
wim 30:033048611c01 1691 return 0x40 + column;
wim 30:033048611c01 1692 case 2:
wim 30:033048611c01 1693 return 0x60 + column;
wim 30:033048611c01 1694 // Should never get here.
wim 39:e9c2319de9c5 1695 // default:
wim 39:e9c2319de9c5 1696 // return 0x00;
wim 30:033048611c01 1697 }
wim 30:033048611c01 1698
wim 30:033048611c01 1699 case LCD_T_E:
wim 30:033048611c01 1700 // LCD40x4 is a special case since it has 2 controllers.
wim 30:033048611c01 1701 // Each controller is configured as 40x2 (Type A)
wim 30:033048611c01 1702 if (row<2) {
wim 30:033048611c01 1703 // Test to see if we need to switch between controllers
wim 30:033048611c01 1704 if (_ctrl_idx != _LCDCtrl_0) {
wim 30:033048611c01 1705
wim 30:033048611c01 1706 // Second LCD controller Cursor Off
wim 30:033048611c01 1707 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 30:033048611c01 1708
wim 30:033048611c01 1709 // Select primary controller
wim 30:033048611c01 1710 _ctrl_idx = _LCDCtrl_0;
wim 30:033048611c01 1711
wim 30:033048611c01 1712 // Restore cursormode on primary LCD controller
wim 30:033048611c01 1713 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1714 }
wim 30:033048611c01 1715
wim 30:033048611c01 1716 return 0x00 + (row * 0x40) + column;
wim 30:033048611c01 1717 }
wim 30:033048611c01 1718 else {
wim 30:033048611c01 1719
wim 30:033048611c01 1720 // Test to see if we need to switch between controllers
wim 30:033048611c01 1721 if (_ctrl_idx != _LCDCtrl_1) {
wim 30:033048611c01 1722 // Primary LCD controller Cursor Off
wim 30:033048611c01 1723 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 30:033048611c01 1724
wim 30:033048611c01 1725 // Select secondary controller
wim 30:033048611c01 1726 _ctrl_idx = _LCDCtrl_1;
wim 30:033048611c01 1727
wim 30:033048611c01 1728 // Restore cursormode on secondary LCD controller
wim 30:033048611c01 1729 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1730 }
wim 30:033048611c01 1731
wim 30:033048611c01 1732 return 0x00 + ((row-2) * 0x40) + column;
wim 30:033048611c01 1733 }
wim 30:033048611c01 1734
wim 32:59c4b8f648d4 1735 case LCD_T_F:
wim 32:59c4b8f648d4 1736 //Alternate addressing mode for 3 row displays.
wim 32:59c4b8f648d4 1737 //The first half of 3rd row continues from 1st row, the second half continues from 2nd row.
wim 32:59c4b8f648d4 1738 switch (row) {
wim 32:59c4b8f648d4 1739 case 0:
wim 32:59c4b8f648d4 1740 return 0x00 + column;
wim 32:59c4b8f648d4 1741 case 1:
wim 32:59c4b8f648d4 1742 return 0x40 + column;
wim 32:59c4b8f648d4 1743 case 2:
wim 32:59c4b8f648d4 1744 if (column < (_nr_cols >> 1)) // check first or second half of line
wim 32:59c4b8f648d4 1745 return (0x00 + _nr_cols + column);
wim 32:59c4b8f648d4 1746 else
wim 32:59c4b8f648d4 1747 return (0x40 + _nr_cols + (column - (_nr_cols >> 1)));
wim 32:59c4b8f648d4 1748 // Should never get here.
wim 39:e9c2319de9c5 1749 // default:
wim 39:e9c2319de9c5 1750 // return 0x00;
wim 32:59c4b8f648d4 1751 }
wim 32:59c4b8f648d4 1752
wim 32:59c4b8f648d4 1753 case LCD_T_G:
wim 32:59c4b8f648d4 1754 //Alternate addressing mode for 3 row displays. Used by ST7036
wim 32:59c4b8f648d4 1755 switch (row) {
wim 32:59c4b8f648d4 1756 case 0:
wim 32:59c4b8f648d4 1757 return 0x00 + column;
wim 32:59c4b8f648d4 1758 case 1:
wim 32:59c4b8f648d4 1759 return 0x10 + column;
wim 32:59c4b8f648d4 1760 case 2:
wim 32:59c4b8f648d4 1761 return 0x20 + column;
wim 32:59c4b8f648d4 1762 // Should never get here.
wim 39:e9c2319de9c5 1763 // default:
wim 39:e9c2319de9c5 1764 // return 0x00;
wim 32:59c4b8f648d4 1765 }
wim 32:59c4b8f648d4 1766
wim 30:033048611c01 1767 // Should never get here.
wim 30:033048611c01 1768 default:
wim 30:033048611c01 1769 return 0x00;
wim 32:59c4b8f648d4 1770
wim 32:59c4b8f648d4 1771 } // switch _addr_mode
wim 30:033048611c01 1772 }
wim 30:033048611c01 1773
wim 30:033048611c01 1774
wim 29:a3663151aa65 1775 /** Set the memoryaddress of screen column and row location
wim 29:a3663151aa65 1776 *
wim 29:a3663151aa65 1777 * @param column The horizontal position from the left, indexed from 0
wim 29:a3663151aa65 1778 * @param row The vertical position from the top, indexed from 0
wim 29:a3663151aa65 1779 */
wim 21:9eb628d9e164 1780 void TextLCD_Base::setAddress(int column, int row) {
wim 15:b70ebfffb258 1781
wim 15:b70ebfffb258 1782 // Sanity Check column
wim 15:b70ebfffb258 1783 if (column < 0) {
wim 15:b70ebfffb258 1784 _column = 0;
wim 15:b70ebfffb258 1785 }
wim 36:9f5f86dfd44a 1786 else if (column >= _nr_cols) {
wim 36:9f5f86dfd44a 1787 _column = _nr_cols - 1;
wim 15:b70ebfffb258 1788 } else _column = column;
wim 8:03116f75b66e 1789
wim 15:b70ebfffb258 1790 // Sanity Check row
wim 15:b70ebfffb258 1791 if (row < 0) {
wim 15:b70ebfffb258 1792 _row = 0;
wim 15:b70ebfffb258 1793 }
wim 36:9f5f86dfd44a 1794 else if (row >= _nr_rows) {
wim 36:9f5f86dfd44a 1795 _row = _nr_rows - 1;
wim 15:b70ebfffb258 1796 } else _row = row;
wim 15:b70ebfffb258 1797
wim 15:b70ebfffb258 1798
wim 15:b70ebfffb258 1799 // Compute the memory address
wim 15:b70ebfffb258 1800 // For LCD40x4: switch controllers if needed
wim 15:b70ebfffb258 1801 // switch cursor if needed
wim 15:b70ebfffb258 1802 int addr = getAddress(_column, _row);
wim 8:03116f75b66e 1803
wim 13:24506ba22480 1804 _writeCommand(0x80 | addr);
wim 8:03116f75b66e 1805 }
simon 1:ac48b187213c 1806
wim 29:a3663151aa65 1807
wim 29:a3663151aa65 1808 /** Return the number of columns
wim 29:a3663151aa65 1809 *
wim 36:9f5f86dfd44a 1810 * @return The number of columns
wim 30:033048611c01 1811 *
wim 30:033048611c01 1812 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 29:a3663151aa65 1813 */
wim 21:9eb628d9e164 1814 int TextLCD_Base::columns() {
wim 30:033048611c01 1815
wim 30:033048611c01 1816 // Columns encoded in b7..b0
wim 30:033048611c01 1817 //return (_type & 0xFF);
wim 31:ef31cd8a00d1 1818 return _nr_cols;
simon 1:ac48b187213c 1819 }
simon 1:ac48b187213c 1820
wim 29:a3663151aa65 1821 /** Return the number of rows
wim 29:a3663151aa65 1822 *
wim 36:9f5f86dfd44a 1823 * @return The number of rows
wim 30:033048611c01 1824 *
wim 30:033048611c01 1825 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 29:a3663151aa65 1826 */
wim 21:9eb628d9e164 1827 int TextLCD_Base::rows() {
wim 30:033048611c01 1828
wim 30:033048611c01 1829 // Rows encoded in b15..b8
wim 30:033048611c01 1830 //return ((_type >> 8) & 0xFF);
wim 30:033048611c01 1831 return _nr_rows;
simon 1:ac48b187213c 1832 }
wim 10:dd9b3a696acd 1833
wim 29:a3663151aa65 1834 /** Set the Cursormode
wim 29:a3663151aa65 1835 *
wim 29:a3663151aa65 1836 * @param cursorMode The Cursor mode (CurOff_BlkOff, CurOn_BlkOff, CurOff_BlkOn, CurOn_BlkOn)
wim 29:a3663151aa65 1837 */
wim 21:9eb628d9e164 1838 void TextLCD_Base::setCursor(LCDCursor cursorMode) {
wim 15:b70ebfffb258 1839
wim 17:652ab113bc2e 1840 // Save new cursor mode, needed when 2 controllers are in use or when display is switched off/on
wim 17:652ab113bc2e 1841 _currentCursor = cursorMode;
wim 10:dd9b3a696acd 1842
wim 17:652ab113bc2e 1843 // Configure only current LCD controller
wim 31:ef31cd8a00d1 1844 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 15:b70ebfffb258 1845 }
wim 15:b70ebfffb258 1846
wim 29:a3663151aa65 1847 /** Set the Displaymode
wim 29:a3663151aa65 1848 *
wim 29:a3663151aa65 1849 * @param displayMode The Display mode (DispOff, DispOn)
wim 29:a3663151aa65 1850 */
wim 21:9eb628d9e164 1851 void TextLCD_Base::setMode(LCDMode displayMode) {
wim 17:652ab113bc2e 1852
wim 17:652ab113bc2e 1853 // Save new displayMode, needed when 2 controllers are in use or when cursor is changed
wim 17:652ab113bc2e 1854 _currentMode = displayMode;
wim 15:b70ebfffb258 1855
wim 17:652ab113bc2e 1856 // Select and configure second LCD controller when needed
wim 17:652ab113bc2e 1857 if(_type==LCD40x4) {
wim 21:9eb628d9e164 1858 if (_ctrl_idx==_LCDCtrl_0) {
wim 17:652ab113bc2e 1859 // Configure primary LCD controller
wim 17:652ab113bc2e 1860 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 11:9ec02df863a1 1861
wim 17:652ab113bc2e 1862 // Select 2nd controller
wim 21:9eb628d9e164 1863 _ctrl_idx=_LCDCtrl_1;
wim 17:652ab113bc2e 1864
wim 17:652ab113bc2e 1865 // Configure secondary LCD controller
wim 21:9eb628d9e164 1866 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 11:9ec02df863a1 1867
wim 17:652ab113bc2e 1868 // Restore current controller
wim 21:9eb628d9e164 1869 _ctrl_idx=_LCDCtrl_0;
wim 17:652ab113bc2e 1870 }
wim 17:652ab113bc2e 1871 else {
wim 17:652ab113bc2e 1872 // Select primary controller
wim 21:9eb628d9e164 1873 _ctrl_idx=_LCDCtrl_0;
wim 17:652ab113bc2e 1874
wim 17:652ab113bc2e 1875 // Configure primary LCD controller
wim 21:9eb628d9e164 1876 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 17:652ab113bc2e 1877
wim 17:652ab113bc2e 1878 // Restore current controller
wim 21:9eb628d9e164 1879 _ctrl_idx=_LCDCtrl_1;
wim 11:9ec02df863a1 1880
wim 17:652ab113bc2e 1881 // Configure secondary LCD controller
wim 17:652ab113bc2e 1882 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 10:dd9b3a696acd 1883 }
wim 17:652ab113bc2e 1884 }
wim 17:652ab113bc2e 1885 else {
wim 17:652ab113bc2e 1886 // Configure primary LCD controller
wim 17:652ab113bc2e 1887 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1888 }
wim 17:652ab113bc2e 1889 }
wim 17:652ab113bc2e 1890
wim 29:a3663151aa65 1891 /** Low level method to restore the cursortype and display mode for current controller
wim 29:a3663151aa65 1892 */
wim 36:9f5f86dfd44a 1893 void TextLCD_Base::_setCursorAndDisplayMode(LCDMode displayMode, LCDCursor cursorType) {
wim 36:9f5f86dfd44a 1894
wim 36:9f5f86dfd44a 1895 // Configure current LCD controller
wim 36:9f5f86dfd44a 1896 switch (_ctrl) {
wim 36:9f5f86dfd44a 1897 case ST7070:
wim 36:9f5f86dfd44a 1898 //ST7070 does not support Cursorblink. The P bit selects the font instead !
wim 36:9f5f86dfd44a 1899 _writeCommand(0x08 | displayMode | (cursorType & 0x02));
wim 36:9f5f86dfd44a 1900 break;
wim 36:9f5f86dfd44a 1901 default:
wim 36:9f5f86dfd44a 1902 _writeCommand(0x08 | displayMode | cursorType);
wim 36:9f5f86dfd44a 1903 break;
wim 36:9f5f86dfd44a 1904 } //switch
wim 10:dd9b3a696acd 1905 }
wim 10:dd9b3a696acd 1906
wim 29:a3663151aa65 1907 /** Set the Backlight mode
wim 29:a3663151aa65 1908 *
wim 29:a3663151aa65 1909 * @param backlightMode The Backlight mode (LightOff, LightOn)
wim 29:a3663151aa65 1910 */
wim 21:9eb628d9e164 1911 void TextLCD_Base::setBacklight(LCDBacklight backlightMode) {
wim 20:e0da005a777f 1912
wim 35:311be6444a39 1913 #if (BACKLIGHT_INV==0)
wim 35:311be6444a39 1914 // Positive Backlight control pin logic
wim 20:e0da005a777f 1915 if (backlightMode == LightOn) {
wim 35:311be6444a39 1916 this->_setBL(true);
wim 20:e0da005a777f 1917 }
wim 20:e0da005a777f 1918 else {
wim 21:9eb628d9e164 1919 this->_setBL(false);
wim 20:e0da005a777f 1920 }
wim 35:311be6444a39 1921 #else
wim 35:311be6444a39 1922 // Inverted Backlight control pin logic
wim 35:311be6444a39 1923 if (backlightMode == LightOn) {
wim 35:311be6444a39 1924 this->_setBL(false);
wim 35:311be6444a39 1925 }
wim 35:311be6444a39 1926 else {
wim 35:311be6444a39 1927 this->_setBL(true);
wim 35:311be6444a39 1928 }
wim 35:311be6444a39 1929 #endif
wim 20:e0da005a777f 1930 }
wim 20:e0da005a777f 1931
wim 29:a3663151aa65 1932 /** Set User Defined Characters
wim 29:a3663151aa65 1933 *
wim 34:e5a0dcb43ecc 1934 * @param unsigned char c The Index of the UDC (0..7) for HD44780 or clones and (0..15) for some more advanced controllers
wim 34:e5a0dcb43ecc 1935 * @param char *udc_data The bitpatterns for the UDC (8 bytes of 5 significant bits for bitpattern and 3 bits for blinkmode (advanced types))
wim 29:a3663151aa65 1936 */
wim 21:9eb628d9e164 1937 void TextLCD_Base::setUDC(unsigned char c, char *udc_data) {
wim 15:b70ebfffb258 1938
wim 15:b70ebfffb258 1939 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 1940 if(_type==LCD40x4) {
wim 19:c747b9e2e7b8 1941 _LCDCtrl_Idx current_ctrl_idx = _ctrl_idx; // Temp save current controller
wim 15:b70ebfffb258 1942
wim 15:b70ebfffb258 1943 // Select primary controller
wim 21:9eb628d9e164 1944 _ctrl_idx=_LCDCtrl_0;
wim 15:b70ebfffb258 1945
wim 15:b70ebfffb258 1946 // Configure primary LCD controller
wim 15:b70ebfffb258 1947 _setUDC(c, udc_data);
wim 15:b70ebfffb258 1948
wim 15:b70ebfffb258 1949 // Select 2nd controller
wim 21:9eb628d9e164 1950 _ctrl_idx=_LCDCtrl_1;
wim 15:b70ebfffb258 1951
wim 15:b70ebfffb258 1952 // Configure secondary LCD controller
wim 15:b70ebfffb258 1953 _setUDC(c, udc_data);
wim 11:9ec02df863a1 1954
wim 15:b70ebfffb258 1955 // Restore current controller
wim 19:c747b9e2e7b8 1956 _ctrl_idx=current_ctrl_idx;
wim 15:b70ebfffb258 1957 }
wim 15:b70ebfffb258 1958 else {
wim 15:b70ebfffb258 1959 // Configure primary LCD controller
wim 15:b70ebfffb258 1960 _setUDC(c, udc_data);
wim 34:e5a0dcb43ecc 1961 }
wim 15:b70ebfffb258 1962 }
wim 15:b70ebfffb258 1963
wim 34:e5a0dcb43ecc 1964 /** Low level method to store user defined characters for current controller
wim 34:e5a0dcb43ecc 1965 *
wim 34:e5a0dcb43ecc 1966 * @param unsigned char c The Index of the UDC (0..7) for HD44780 clones and (0..15) for some more advanced controllers
wim 34:e5a0dcb43ecc 1967 * @param char *udc_data The bitpatterns for the UDC (8 bytes of 5 significant bits for bitpattern and 3 bits for blinkmode (advanced types))
wim 34:e5a0dcb43ecc 1968 */
wim 34:e5a0dcb43ecc 1969 void TextLCD_Base::_setUDC(unsigned char c, char *udc_data) {
wim 34:e5a0dcb43ecc 1970
wim 34:e5a0dcb43ecc 1971 switch (_ctrl) {
wim 34:e5a0dcb43ecc 1972 case PCF2103_3V3 : // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 1973 case PCF2113_3V3 : // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 1974 case PCF2116_3V3 :
wim 34:e5a0dcb43ecc 1975 case PCF2116_5V :
wim 40:d3496c3ea301 1976 case PCF2119_3V3 : // Some UDCs may be used for Icons
wim 40:d3496c3ea301 1977 case PCF2119R_3V3: // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 1978 c = c & 0x0F; // mask down to valid range
wim 34:e5a0dcb43ecc 1979 break;
wim 34:e5a0dcb43ecc 1980
wim 34:e5a0dcb43ecc 1981 default:
wim 34:e5a0dcb43ecc 1982 c = c & 0x07; // mask down to valid range
wim 34:e5a0dcb43ecc 1983 break;
wim 34:e5a0dcb43ecc 1984 } //switch _ctrl
wim 34:e5a0dcb43ecc 1985
wim 34:e5a0dcb43ecc 1986 // Select DD RAM for current LCD controller
wim 34:e5a0dcb43ecc 1987 // This is needed to correctly set Bit 6 of the addresspointer for controllers that support 16 UDCs
wim 34:e5a0dcb43ecc 1988 _writeCommand(0x80 | ((c << 3) & 0x40)) ;
wim 34:e5a0dcb43ecc 1989
wim 34:e5a0dcb43ecc 1990 // Select CG RAM for current LCD controller
wim 34:e5a0dcb43ecc 1991 _writeCommand(0x40 | ((c << 3) & 0x3F)); //Set CG-RAM address, (note that Bit 6 is retained and can not be set by this command !)
wim 34:e5a0dcb43ecc 1992 //8 sequential locations needed per UDC
wim 34:e5a0dcb43ecc 1993 // Store UDC pattern
wim 34:e5a0dcb43ecc 1994 for (int i=0; i<8; i++) {
wim 34:e5a0dcb43ecc 1995 _writeData(*udc_data++);
wim 34:e5a0dcb43ecc 1996 }
wim 34:e5a0dcb43ecc 1997
wim 34:e5a0dcb43ecc 1998 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 34:e5a0dcb43ecc 1999 int addr = getAddress(_column, _row);
wim 34:e5a0dcb43ecc 2000 _writeCommand(0x80 | addr);
wim 34:e5a0dcb43ecc 2001 }
wim 32:59c4b8f648d4 2002
wim 39:e9c2319de9c5 2003 #if(LCD_BLINK == 1)
wim 36:9f5f86dfd44a 2004 /** Set UDC Blink and Icon blink
wim 33:900a94bc7585 2005 * setUDCBlink method is supported by some compatible devices (eg SSD1803)
wim 33:900a94bc7585 2006 *
wim 33:900a94bc7585 2007 * @param blinkMode The Blink mode (BlinkOff, BlinkOn)
wim 33:900a94bc7585 2008 */
wim 33:900a94bc7585 2009 void TextLCD_Base::setUDCBlink(LCDBlink blinkMode){
wim 36:9f5f86dfd44a 2010 // Blinking UDCs (and icons) are enabled when a specific controlbit (BE) is set.
wim 36:9f5f86dfd44a 2011 // The blinking pixels in the UDC and icons can be controlled by setting additional bits in the UDC or icon bitpattern.
wim 36:9f5f86dfd44a 2012 // UDCs are defined by an 8 byte bitpattern. The P0..P4 form the character pattern.
wim 33:900a94bc7585 2013 // P7 P6 P5 P4 P3 P2 P1 P0
wim 33:900a94bc7585 2014 // 0 B1 B0 x 0 1 1 1 0
wim 33:900a94bc7585 2015 // 1 B1 B0 x 1 0 0 0 1
wim 33:900a94bc7585 2016 // .............
wim 33:900a94bc7585 2017 // 7 B1 B0 x 1 0 0 0 1
wim 33:900a94bc7585 2018 //
wim 33:900a94bc7585 2019 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 33:900a94bc7585 2020 // B1 B0 Mode
wim 33:900a94bc7585 2021 // 0 0 No Blinking in this row of the UDC
wim 33:900a94bc7585 2022 // 0 1 Enabled pixels in P4 will blink
wim 33:900a94bc7585 2023 // 1 x Enabled pixels in P0..P4 will blink
wim 36:9f5f86dfd44a 2024 //
wim 36:9f5f86dfd44a 2025 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 2026 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2027 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2028 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 2029 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2030 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 33:900a94bc7585 2031 switch (blinkMode) {
wim 33:900a94bc7585 2032 case BlinkOn:
wim 36:9f5f86dfd44a 2033 // Controllers that support UDC/Icon Blink
wim 33:900a94bc7585 2034 switch (_ctrl) {
wim 40:d3496c3ea301 2035 case KS0073 :
wim 40:d3496c3ea301 2036 case KS0078 :
wim 40:d3496c3ea301 2037 case HD66712 :
wim 36:9f5f86dfd44a 2038 _function_1 |= 0x02; // Enable UDC/Icon Blink
wim 36:9f5f86dfd44a 2039 _writeCommand(0x20 | _function_1); // Function set 0 0 1 DL N RE(1) BE 0/LP (Ext Regs)
wim 33:900a94bc7585 2040
wim 33:900a94bc7585 2041 _writeCommand(0x20 | _function); // Function set 0 0 1 DL N RE(0) DH REV (Std Regs)
wim 40:d3496c3ea301 2042 break; // case KS0073, KS0078, HD66712 Controller
wim 33:900a94bc7585 2043
wim 33:900a94bc7585 2044 case US2066_3V3 :
wim 33:900a94bc7585 2045 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 2046 _function_1 |= 0x04; // Enable UDC/Icon Blink
wim 33:900a94bc7585 2047 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 2048 // Select Ext Instr Set
wim 33:900a94bc7585 2049
wim 33:900a94bc7585 2050 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2051 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2052 break; // case SSD1803, US2066
wim 36:9f5f86dfd44a 2053
wim 36:9f5f86dfd44a 2054 case PCF2103_3V3 :
wim 36:9f5f86dfd44a 2055 case PCF2113_3V3 :
wim 36:9f5f86dfd44a 2056 case PCF2119_3V3 :
wim 39:e9c2319de9c5 2057 case PCF2119R_3V3 :
wim 36:9f5f86dfd44a 2058 // Enable Icon Blink
wim 36:9f5f86dfd44a 2059 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 36:9f5f86dfd44a 2060 _writeCommand(0x08 | 0x02); // ICON Conf 0000 1, IM=0 (Char mode), IB=1 (Icon blink), 0 (Instr. Set 1)
wim 36:9f5f86dfd44a 2061 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 36:9f5f86dfd44a 2062
wim 36:9f5f86dfd44a 2063 break;
wim 33:900a94bc7585 2064
wim 33:900a94bc7585 2065 default:
wim 33:900a94bc7585 2066 //Unsupported feature for other controllers
wim 33:900a94bc7585 2067 break;
wim 33:900a94bc7585 2068 } //switch _ctrl
wim 33:900a94bc7585 2069
wim 36:9f5f86dfd44a 2070 break; // BlinkOn
wim 33:900a94bc7585 2071
wim 33:900a94bc7585 2072 case BlinkOff:
wim 33:900a94bc7585 2073 // Controllers that support UDC Blink
wim 33:900a94bc7585 2074 switch (_ctrl) {
wim 40:d3496c3ea301 2075 case KS0073 :
wim 40:d3496c3ea301 2076 case KS0078 :
wim 40:d3496c3ea301 2077 case HD66712:
wim 36:9f5f86dfd44a 2078 _function_1 &= ~0x02; // Disable UDC/Icon Blink
wim 36:9f5f86dfd44a 2079 _writeCommand(0x20 | _function_1); // Function set 0 0 1 DL N RE(1) BE 0/LP (Ext Regs)
wim 33:900a94bc7585 2080
wim 33:900a94bc7585 2081 _writeCommand(0x20 | _function); // Function set 0 0 1 DL N RE(0) DH REV (Std Regs)
wim 40:d3496c3ea301 2082 break; // case KS0073, KS0078, HD66712 Controller
wim 33:900a94bc7585 2083
wim 33:900a94bc7585 2084 case US2066_3V3 :
wim 33:900a94bc7585 2085 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 2086 _function_1 &= ~0x04; // Disable UDC/Icon Blink
wim 33:900a94bc7585 2087 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 2088 // Select Ext Instr Set
wim 33:900a94bc7585 2089
wim 33:900a94bc7585 2090 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2091 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2092 break; // case SSD1803, US2066
wim 36:9f5f86dfd44a 2093
wim 36:9f5f86dfd44a 2094 case PCF2103_3V3 :
wim 39:e9c2319de9c5 2095 case PCF2113_3V3 :
wim 39:e9c2319de9c5 2096 case PCF2119_3V3 :
wim 39:e9c2319de9c5 2097 case PCF2119R_3V3 :
wim 36:9f5f86dfd44a 2098 // Disable Icon Blink
wim 36:9f5f86dfd44a 2099 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 36:9f5f86dfd44a 2100 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=1 (Icon blink), 0 (Instr. Set 1)
wim 36:9f5f86dfd44a 2101 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 36:9f5f86dfd44a 2102
wim 36:9f5f86dfd44a 2103 break;
wim 33:900a94bc7585 2104
wim 33:900a94bc7585 2105 default:
wim 33:900a94bc7585 2106 //Unsupported feature for other controllers
wim 33:900a94bc7585 2107 break;
wim 33:900a94bc7585 2108 } //switch _ctrl
wim 33:900a94bc7585 2109
wim 36:9f5f86dfd44a 2110 break; //BlinkOff
wim 33:900a94bc7585 2111
wim 33:900a94bc7585 2112 default:
wim 33:900a94bc7585 2113 break;
wim 33:900a94bc7585 2114 } // blinkMode
wim 33:900a94bc7585 2115
wim 33:900a94bc7585 2116 } // setUDCBlink()
wim 39:e9c2319de9c5 2117 #endif
wim 33:900a94bc7585 2118
wim 32:59c4b8f648d4 2119 /** Set Contrast
wim 32:59c4b8f648d4 2120 * setContrast method is supported by some compatible devices (eg ST7032i) that have onboard LCD voltage generation
wim 32:59c4b8f648d4 2121 * Initial code for ST70XX imported from fork by JH1PJL
wim 32:59c4b8f648d4 2122 *
wim 32:59c4b8f648d4 2123 * @param unsigned char c contrast data (6 significant bits, valid range 0..63, Value 0 will disable the Vgen)
wim 32:59c4b8f648d4 2124 * @return none
wim 32:59c4b8f648d4 2125 */
wim 32:59c4b8f648d4 2126 //@TODO Add support for 40x4 dual controller
wim 32:59c4b8f648d4 2127 void TextLCD_Base::setContrast(unsigned char c) {
wim 32:59c4b8f648d4 2128
wim 32:59c4b8f648d4 2129 // Function set mode stored during Init. Make sure we dont accidentally switch between 1-line and 2-line mode!
wim 32:59c4b8f648d4 2130 // Icon/Booster mode stored during Init. Make sure we dont accidentally change this!
wim 32:59c4b8f648d4 2131
wim 32:59c4b8f648d4 2132 _contrast = c & 0x3F; // Sanity check
wim 32:59c4b8f648d4 2133
wim 33:900a94bc7585 2134 switch (_ctrl) {
wim 32:59c4b8f648d4 2135 case PCF2113_3V3 :
wim 39:e9c2319de9c5 2136 case PCF2119_3V3 :
wim 39:e9c2319de9c5 2137 case PCF2119R_3V3 :
wim 32:59c4b8f648d4 2138 if (_contrast < 5) _contrast = 0; // See datasheet. Sanity check for PCF2113/PCF2119
wim 32:59c4b8f648d4 2139 if (_contrast > 55) _contrast = 55;
wim 32:59c4b8f648d4 2140
wim 32:59c4b8f648d4 2141 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instruction Set = 1
wim 32:59c4b8f648d4 2142 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=0, VA=contrast
wim 32:59c4b8f648d4 2143 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=1, VB=contrast
wim 32:59c4b8f648d4 2144 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 2145 break;
wim 32:59c4b8f648d4 2146
wim 32:59c4b8f648d4 2147 case ST7032_3V3 :
wim 32:59c4b8f648d4 2148 case ST7032_5V :
wim 32:59c4b8f648d4 2149 case ST7036_3V3 :
wim 32:59c4b8f648d4 2150 // case ST7036_5V :
wim 32:59c4b8f648d4 2151 case SSD1803_3V3 :
wim 32:59c4b8f648d4 2152 _writeCommand(0x20 | _function | 0x01); // Select Instruction Set = 1
wim 32:59c4b8f648d4 2153 _writeCommand(0x70 | (_contrast & 0x0F)); // Contrast Low bits
wim 32:59c4b8f648d4 2154 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Contrast High bits
wim 32:59c4b8f648d4 2155 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 2156 break;
wim 32:59c4b8f648d4 2157
wim 33:900a94bc7585 2158 case US2066_3V3 :
wim 33:900a94bc7585 2159 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 2160 // Select Extended Instruction Set
wim 33:900a94bc7585 2161
wim 33:900a94bc7585 2162 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 2163
wim 33:900a94bc7585 2164 _writeCommand(0x81); // Set Contrast Control: 1 0 0 0 0 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 2165 _writeCommand((_contrast << 2) | 0x03); // Set Contrast Value: 8 bits. Use 6 bits for compatibility
wim 33:900a94bc7585 2166
wim 33:900a94bc7585 2167 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 2168
wim 33:900a94bc7585 2169 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2170 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2171 break;
wim 33:900a94bc7585 2172
wim 34:e5a0dcb43ecc 2173 //not yet tested on hardware
wim 32:59c4b8f648d4 2174 case PT6314 :
wim 32:59c4b8f648d4 2175 // Only 2 significant bits
wim 32:59c4b8f648d4 2176 // 0x00 = 100%
wim 32:59c4b8f648d4 2177 // 0x01 = 75%
wim 32:59c4b8f648d4 2178 // 0x02 = 50%
wim 32:59c4b8f648d4 2179 // 0x03 = 25%
wim 32:59c4b8f648d4 2180 _writeCommand(0x20 | _function | ((~_contrast) >> 4)); // Invert and shift to use 2 MSBs
wim 32:59c4b8f648d4 2181 break;
wim 32:59c4b8f648d4 2182
wim 32:59c4b8f648d4 2183 default:
wim 32:59c4b8f648d4 2184 //Unsupported feature for other controllers
wim 33:900a94bc7585 2185 break;
wim 33:900a94bc7585 2186 } // end switch
wim 33:900a94bc7585 2187 } // end setContrast()
wim 32:59c4b8f648d4 2188
wim 39:e9c2319de9c5 2189 #if(LCD_POWER == 1)
wim 32:59c4b8f648d4 2190 /** Set Power
wim 32:59c4b8f648d4 2191 * setPower method is supported by some compatible devices (eg SSD1803) that have power down modes
wim 32:59c4b8f648d4 2192 *
wim 32:59c4b8f648d4 2193 * @param bool powerOn Power on/off
wim 32:59c4b8f648d4 2194 * @return none
wim 32:59c4b8f648d4 2195 */
wim 32:59c4b8f648d4 2196 //@TODO Add support for 40x4 dual controller
wim 32:59c4b8f648d4 2197 void TextLCD_Base::setPower(bool powerOn) {
wim 32:59c4b8f648d4 2198
wim 32:59c4b8f648d4 2199 if (powerOn) {
wim 32:59c4b8f648d4 2200 // Switch on
wim 32:59c4b8f648d4 2201 setMode(DispOn);
wim 32:59c4b8f648d4 2202
wim 32:59c4b8f648d4 2203 // Controllers that supports specific Power Down mode
wim 32:59c4b8f648d4 2204 switch (_ctrl) {
wim 32:59c4b8f648d4 2205
wim 32:59c4b8f648d4 2206 // case PCF2113_3V3 :
wim 39:e9c2319de9c5 2207 // case PCF2119_3V3 :
wim 39:e9c2319de9c5 2208 // case PCF2119R_3V3 :
wim 32:59c4b8f648d4 2209 // case ST7032_3V3 :
wim 32:59c4b8f648d4 2210 //@todo
wim 33:900a94bc7585 2211 // enable Booster Bon
wim 33:900a94bc7585 2212
wim 33:900a94bc7585 2213 case WS0010:
wim 33:900a94bc7585 2214 _writeCommand(0x17); // Char mode, DC/DC on
wim 33:900a94bc7585 2215 wait_ms(10); // Wait 10ms to ensure powered up
wim 33:900a94bc7585 2216 break;
wim 33:900a94bc7585 2217
wim 36:9f5f86dfd44a 2218 case KS0073:
wim 33:900a94bc7585 2219 case KS0078:
wim 32:59c4b8f648d4 2220 case SSD1803_3V3 :
wim 32:59c4b8f648d4 2221 // case SSD1803_5V :
wim 33:900a94bc7585 2222 _writeCommand(0x20 | _function_1); // Select Ext Instr Set
wim 33:900a94bc7585 2223 _writeCommand(0x02); // Power On
wim 32:59c4b8f648d4 2224 _writeCommand(0x20 | _function); // Select Std Instr Set
wim 32:59c4b8f648d4 2225 break;
wim 32:59c4b8f648d4 2226
wim 32:59c4b8f648d4 2227 default:
wim 32:59c4b8f648d4 2228 //Unsupported feature for other controllers
wim 32:59c4b8f648d4 2229 break;
wim 32:59c4b8f648d4 2230 } // end switch
wim 32:59c4b8f648d4 2231 }
wim 32:59c4b8f648d4 2232 else {
wim 32:59c4b8f648d4 2233 // Switch off
wim 32:59c4b8f648d4 2234 setMode(DispOff);
wim 32:59c4b8f648d4 2235
wim 32:59c4b8f648d4 2236 // Controllers that support specific Power Down mode
wim 32:59c4b8f648d4 2237 switch (_ctrl) {
wim 32:59c4b8f648d4 2238
wim 32:59c4b8f648d4 2239 // case PCF2113_3V3 :
wim 39:e9c2319de9c5 2240 // case PCF2119_3V3 :
wim 39:e9c2319de9c5 2241 // case PCF2119R_3V3 :
wim 32:59c4b8f648d4 2242 // case ST7032_3V3 :
wim 32:59c4b8f648d4 2243 //@todo
wim 33:900a94bc7585 2244 // disable Booster Bon
wim 33:900a94bc7585 2245
wim 33:900a94bc7585 2246 case WS0010:
wim 33:900a94bc7585 2247 _writeCommand(0x13); // Char mode, DC/DC off
wim 33:900a94bc7585 2248 break;
wim 33:900a94bc7585 2249
wim 36:9f5f86dfd44a 2250 case KS0073:
wim 33:900a94bc7585 2251 case KS0078:
wim 32:59c4b8f648d4 2252 case SSD1803_3V3 :
wim 32:59c4b8f648d4 2253 // case SSD1803_5V :
wim 33:900a94bc7585 2254 _writeCommand(0x20 | _function_1); // Select Ext Instr Set
wim 33:900a94bc7585 2255 _writeCommand(0x03); // Power Down
wim 32:59c4b8f648d4 2256 _writeCommand(0x20 | _function); // Select Std Instr Set
wim 32:59c4b8f648d4 2257 break;
wim 32:59c4b8f648d4 2258
wim 32:59c4b8f648d4 2259 default:
wim 32:59c4b8f648d4 2260 //Unsupported feature for other controllers
wim 32:59c4b8f648d4 2261 break;
wim 32:59c4b8f648d4 2262 } // end switch
wim 32:59c4b8f648d4 2263 }
wim 33:900a94bc7585 2264 } // end setPower()
wim 39:e9c2319de9c5 2265 #endif
wim 39:e9c2319de9c5 2266
wim 39:e9c2319de9c5 2267 #if(LCD_ORIENT == 1)
wim 33:900a94bc7585 2268 /** Set Orient
wim 33:900a94bc7585 2269 * setOrient method is supported by some compatible devices (eg SSD1803, US2066) that have top/bottom view modes
wim 33:900a94bc7585 2270 *
wim 33:900a94bc7585 2271 * @param LCDOrient orient Orientation
wim 33:900a94bc7585 2272 * @return none
wim 33:900a94bc7585 2273 */
wim 33:900a94bc7585 2274 void TextLCD_Base::setOrient(LCDOrient orient){
wim 33:900a94bc7585 2275
wim 33:900a94bc7585 2276 switch (orient) {
wim 33:900a94bc7585 2277
wim 33:900a94bc7585 2278 case Top:
wim 33:900a94bc7585 2279 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2280 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 2281 case PCF2116_3V3:
wim 34:e5a0dcb43ecc 2282 case PCF2116_5V:
wim 34:e5a0dcb43ecc 2283 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 2284 _writeCommand(0x05); // Display Conf Set 0000 0, 1, P=0, Q=1 (Instr. Set 1)
wim 34:e5a0dcb43ecc 2285 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 2286 break;
wim 39:e9c2319de9c5 2287
wim 39:e9c2319de9c5 2288 case PCF2119_3V3:
wim 39:e9c2319de9c5 2289 case PCF2119R_3V3:
wim 39:e9c2319de9c5 2290 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 39:e9c2319de9c5 2291 _writeCommand(0x07); // Display Conf Set 0000 0, 1, P=1, Q=1 (Instr. Set 1)
wim 39:e9c2319de9c5 2292 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 39:e9c2319de9c5 2293 break;
wim 34:e5a0dcb43ecc 2294
wim 33:900a94bc7585 2295 case SSD1803_3V3 :
wim 33:900a94bc7585 2296 // case SSD1803_5V :
wim 33:900a94bc7585 2297 case US2066_3V3 :
wim 33:900a94bc7585 2298 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 2299 // Select Extended Instruction Set
wim 33:900a94bc7585 2300 // _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 2301 _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 2302
wim 33:900a94bc7585 2303 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2304 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2305 break;
wim 36:9f5f86dfd44a 2306
wim 36:9f5f86dfd44a 2307 case ST7070:
wim 36:9f5f86dfd44a 2308 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL, N, EXT=1, x, x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2309
wim 36:9f5f86dfd44a 2310 _writeCommand(0x40 | 0x00); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 2311 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 2312 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 2313 wait_ms(5); // Wait to ensure completion or ST7070 fails to set Top/Bottom after reset..
wim 36:9f5f86dfd44a 2314
wim 36:9f5f86dfd44a 2315 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2316
wim 36:9f5f86dfd44a 2317 break; // case ST7070 Controller
wim 33:900a94bc7585 2318
wim 33:900a94bc7585 2319 default:
wim 33:900a94bc7585 2320 //Unsupported feature for other controllers
wim 33:900a94bc7585 2321 break;
wim 33:900a94bc7585 2322
wim 33:900a94bc7585 2323 } // end switch _ctrl
wim 33:900a94bc7585 2324 break; // end Top
wim 33:900a94bc7585 2325
wim 33:900a94bc7585 2326 case Bottom:
wim 33:900a94bc7585 2327 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2328 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 2329 case PCF2116_3V3:
wim 34:e5a0dcb43ecc 2330 case PCF2116_5V:
wim 34:e5a0dcb43ecc 2331 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 2332 _writeCommand(0x06); // Display Conf Set 0000 0, 1, P=1, Q=0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 2333 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 2334 break;
wim 39:e9c2319de9c5 2335
wim 39:e9c2319de9c5 2336 case PCF2119_3V3:
wim 39:e9c2319de9c5 2337 case PCF2119R_3V3 :
wim 39:e9c2319de9c5 2338 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 39:e9c2319de9c5 2339 _writeCommand(0x04); // Display Conf Set 0000 0, 1, P=0, Q=0 (Instr. Set 1)
wim 39:e9c2319de9c5 2340 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 39:e9c2319de9c5 2341 break;
wim 34:e5a0dcb43ecc 2342
wim 33:900a94bc7585 2343 case SSD1803_3V3 :
wim 33:900a94bc7585 2344 // case SSD1803_5V :
wim 33:900a94bc7585 2345 case US2066_3V3 :
wim 33:900a94bc7585 2346 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 2347 // Select Extended Instruction Set
wim 33:900a94bc7585 2348 _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 2349 // _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 2350
wim 33:900a94bc7585 2351 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2352 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2353 break;
wim 36:9f5f86dfd44a 2354
wim 36:9f5f86dfd44a 2355 case ST7070:
wim 36:9f5f86dfd44a 2356 //Note: this does not result in correct top/bottom view.
wim 36:9f5f86dfd44a 2357 //The left and right half of each row are reversed and the addressing of both rows is also incorrect:
wim 36:9f5f86dfd44a 2358 //Top/bottomline when orientation is flipped:
wim 36:9f5f86dfd44a 2359 // 0x48...0x4F 0x40...0x47
wim 36:9f5f86dfd44a 2360 // 0x08...0x0F 0x00...0x07
wim 36:9f5f86dfd44a 2361 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2362
wim 36:9f5f86dfd44a 2363 _writeCommand(0x40 | 0x0F); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 2364 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 2365 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 2366 wait_ms(5); // Wait to ensure completion or ST7070 fails to set Top/Bottom after reset..
wim 36:9f5f86dfd44a 2367
wim 36:9f5f86dfd44a 2368 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2369
wim 36:9f5f86dfd44a 2370 break; // case ST7070 Controller
wim 33:900a94bc7585 2371
wim 33:900a94bc7585 2372 default:
wim 33:900a94bc7585 2373 //Unsupported feature for other controllers
wim 33:900a94bc7585 2374 break;
wim 33:900a94bc7585 2375
wim 33:900a94bc7585 2376 } // end switch _ctrl
wim 33:900a94bc7585 2377
wim 33:900a94bc7585 2378 break; // end Bottom
wim 33:900a94bc7585 2379 } // end switch orient
wim 33:900a94bc7585 2380 } // end setOrient()
wim 39:e9c2319de9c5 2381 #endif
wim 39:e9c2319de9c5 2382
wim 39:e9c2319de9c5 2383 #if(LCD_BIGFONT == 1)
wim 34:e5a0dcb43ecc 2384 /** Set Big Font
wim 34:e5a0dcb43ecc 2385 * setBigFont method is supported by some compatible devices (eg SSD1803, US2066)
wim 34:e5a0dcb43ecc 2386 *
wim 34:e5a0dcb43ecc 2387 * @param lines The selected Big Font lines (None, TopLine, CenterLine, BottomLine, TopBottomLine)
wim 34:e5a0dcb43ecc 2388 * Double height characters can be shown on lines 1+2, 2+3, 3+4 or 1+2 and 3+4
wim 34:e5a0dcb43ecc 2389 * Valid double height lines depend on the LCDs number of rows.
wim 34:e5a0dcb43ecc 2390 */
wim 34:e5a0dcb43ecc 2391 void TextLCD_Base::setBigFont(LCDBigFont lines) {
wim 34:e5a0dcb43ecc 2392
wim 34:e5a0dcb43ecc 2393 switch (lines) {
wim 34:e5a0dcb43ecc 2394 case None:
wim 34:e5a0dcb43ecc 2395 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2396 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2397 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2398 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2399 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2400 _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2401 // Default
wim 34:e5a0dcb43ecc 2402 _function = _function & ~0x04; // Set function, 0 0 1 DL N DH=0 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2403 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2404 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2405 break; // end US2066
wim 34:e5a0dcb43ecc 2406
wim 34:e5a0dcb43ecc 2407 default:
wim 34:e5a0dcb43ecc 2408 break; // end default
wim 34:e5a0dcb43ecc 2409 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2410 break; // end None
wim 34:e5a0dcb43ecc 2411
wim 34:e5a0dcb43ecc 2412 case TopLine:
wim 34:e5a0dcb43ecc 2413 if (_nr_rows < 2) return; //Sanity check
wim 34:e5a0dcb43ecc 2414
wim 34:e5a0dcb43ecc 2415 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2416 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2417 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2418 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2419 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2420 _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2421 // Default
wim 34:e5a0dcb43ecc 2422 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2423 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2424 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2425 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2426
wim 34:e5a0dcb43ecc 2427 default:
wim 34:e5a0dcb43ecc 2428 break; // end default
wim 34:e5a0dcb43ecc 2429 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2430 break; // end TopLine
wim 34:e5a0dcb43ecc 2431
wim 34:e5a0dcb43ecc 2432 case CenterLine:
wim 34:e5a0dcb43ecc 2433 if (_nr_rows != 4) return; //Sanity check
wim 34:e5a0dcb43ecc 2434
wim 34:e5a0dcb43ecc 2435 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2436 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2437 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2438 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2439 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2440 _writeCommand(0x14); // Double Height, 0 0 0 1 UD2=0, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2441 // Default
wim 34:e5a0dcb43ecc 2442 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2443 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2444 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2445 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2446
wim 34:e5a0dcb43ecc 2447 default:
wim 34:e5a0dcb43ecc 2448 break; // end default
wim 34:e5a0dcb43ecc 2449 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2450 break; // end CenterLine
wim 34:e5a0dcb43ecc 2451
wim 34:e5a0dcb43ecc 2452 case BottomLine:
wim 34:e5a0dcb43ecc 2453 if (_nr_rows < 3) return; //Sanity check
wim 34:e5a0dcb43ecc 2454
wim 34:e5a0dcb43ecc 2455 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2456 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2457 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2458 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2459 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2460 if (_nr_rows == 3) {
wim 34:e5a0dcb43ecc 2461 _writeCommand(0x14); // Double Height, 0 0 0 1 UD2=0, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2462 }
wim 34:e5a0dcb43ecc 2463 else {
wim 34:e5a0dcb43ecc 2464 _writeCommand(0x10); // Double Height, 0 0 0 1 UD2=0, UD1=0, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2465 }
wim 34:e5a0dcb43ecc 2466 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2467 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2468 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2469 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2470
wim 34:e5a0dcb43ecc 2471 default:
wim 34:e5a0dcb43ecc 2472 break; // end default
wim 34:e5a0dcb43ecc 2473 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2474 break; // end BottomLine
wim 34:e5a0dcb43ecc 2475
wim 34:e5a0dcb43ecc 2476 case TopBottomLine:
wim 34:e5a0dcb43ecc 2477 if (_nr_rows != 4) return; //Sanity check
wim 34:e5a0dcb43ecc 2478
wim 34:e5a0dcb43ecc 2479 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2480 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2481 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2482 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2483 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2484 _writeCommand(0x18); // Double Height, 0 0 0 1 UD2=1, UD1=0, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2485 // Default
wim 34:e5a0dcb43ecc 2486 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2487 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2488 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2489 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2490
wim 34:e5a0dcb43ecc 2491 default:
wim 34:e5a0dcb43ecc 2492 break; // end default
wim 34:e5a0dcb43ecc 2493 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2494 break; // end TopBottomLine
wim 34:e5a0dcb43ecc 2495
wim 34:e5a0dcb43ecc 2496 } // end switch lines
wim 34:e5a0dcb43ecc 2497
wim 34:e5a0dcb43ecc 2498 } // end setBigFont()
wim 39:e9c2319de9c5 2499 #endif
wim 39:e9c2319de9c5 2500
wim 39:e9c2319de9c5 2501 #if(LCD_ICON==1)
wim 36:9f5f86dfd44a 2502 /** Set Icons
wim 36:9f5f86dfd44a 2503 *
wim 36:9f5f86dfd44a 2504 * @param unsigned char idx The Index of the icon pattern (0..15) for KS0073 and similar controllers
wim 36:9f5f86dfd44a 2505 * and Index (0..31) for PCF2103 and similar controllers
wim 36:9f5f86dfd44a 2506 * @param unsigned char data The bitpattern for the icons (6 lsb for KS0073 bitpattern (5 lsb for KS0078) and 2 msb for blinkmode)
wim 36:9f5f86dfd44a 2507 * The bitpattern for the PCF2103 icons is 5 lsb (UDC 0..2) and 5 lsb for blinkmode (UDC 4..6)
wim 36:9f5f86dfd44a 2508 */
wim 36:9f5f86dfd44a 2509 void TextLCD_Base::setIcon(unsigned char idx, unsigned char data) {
wim 36:9f5f86dfd44a 2510 // Blinking icons are enabled when a specific controlbit (BE) is set.
wim 36:9f5f86dfd44a 2511 // The blinking pixels in the icons can be controlled by setting additional bits in the icon bitpattern.
wim 36:9f5f86dfd44a 2512 // Icons are defined by a byte bitpattern. The P0..P5 form the Icon pattern for KS0073, and P0..P4 for KS0078
wim 36:9f5f86dfd44a 2513 // P7 P6 P5 P4 P3 P2 P1 P0
wim 36:9f5f86dfd44a 2514 // 0 B1 B0 0 0 1 1 1 0
wim 36:9f5f86dfd44a 2515 // 1 B1 B0 1 1 0 0 0 1
wim 36:9f5f86dfd44a 2516 // .............
wim 36:9f5f86dfd44a 2517 // 15 B1 B0 1 1 0 0 0 1
wim 36:9f5f86dfd44a 2518 //
wim 36:9f5f86dfd44a 2519 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 36:9f5f86dfd44a 2520 // B1 B0 Mode
wim 36:9f5f86dfd44a 2521 // 0 0 No Blinking for this icon row
wim 36:9f5f86dfd44a 2522 // 0 1 Enabled pixels in P5 will blink
wim 36:9f5f86dfd44a 2523 // 1 x Enabled pixels in P0..P5 will blink
wim 36:9f5f86dfd44a 2524 //
wim 36:9f5f86dfd44a 2525 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 2526 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2527 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2528 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 2529 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2530 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2531
wim 36:9f5f86dfd44a 2532 switch (_ctrl) {
wim 36:9f5f86dfd44a 2533 case KS0073:
wim 36:9f5f86dfd44a 2534 case KS0078:
wim 36:9f5f86dfd44a 2535 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N RE(1) BE LP
wim 36:9f5f86dfd44a 2536 // Select Extended Instruction Set
wim 36:9f5f86dfd44a 2537 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2538
wim 36:9f5f86dfd44a 2539 _writeData(data); // Set Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2540
wim 36:9f5f86dfd44a 2541 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2542 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2543 break; // end KS0073, KS0078
wim 36:9f5f86dfd44a 2544
wim 36:9f5f86dfd44a 2545 case ST7032_3V3:
wim 36:9f5f86dfd44a 2546 case ST7032_5V:
wim 36:9f5f86dfd44a 2547 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 36:9f5f86dfd44a 2548 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2549
wim 36:9f5f86dfd44a 2550 _writeData(data & 0x1F); // Set Icon pattern, no blink support (Instr Set 1)
wim 36:9f5f86dfd44a 2551
wim 36:9f5f86dfd44a 2552 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2553 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2554 break; // end ST7032
wim 36:9f5f86dfd44a 2555
wim 36:9f5f86dfd44a 2556 case ST7036_3V3:
wim 36:9f5f86dfd44a 2557 case ST7036_5V:
wim 36:9f5f86dfd44a 2558 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH IS2,IS1 = 01 (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2559 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2560
wim 36:9f5f86dfd44a 2561 _writeData(data & 0x1F); // Set Icon pattern, no blink support (Instr Set 1)
wim 36:9f5f86dfd44a 2562
wim 36:9f5f86dfd44a 2563 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2564 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2565 break; // end ST7036
wim 36:9f5f86dfd44a 2566
wim 36:9f5f86dfd44a 2567 case SSD1803_3V3:
wim 36:9f5f86dfd44a 2568 // case SSD1803_5V:
wim 36:9f5f86dfd44a 2569 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2570 // Select Instruction Set 1
wim 36:9f5f86dfd44a 2571 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set = 1)
wim 36:9f5f86dfd44a 2572 _writeData(data); // Set Icon pattern (Instr Set = 1)
wim 36:9f5f86dfd44a 2573
wim 36:9f5f86dfd44a 2574 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2575 // Select IS=0
wim 36:9f5f86dfd44a 2576 break; // end SSD1803
wim 36:9f5f86dfd44a 2577
wim 36:9f5f86dfd44a 2578 case PCF2103_3V3:
wim 36:9f5f86dfd44a 2579 case PCF2113_3V3:
wim 39:e9c2319de9c5 2580 case PCF2119_3V3:
wim 39:e9c2319de9c5 2581 case PCF2119R_3V3:
wim 36:9f5f86dfd44a 2582 // Store UDC/Icon pattern for PCF2103 and PCF2113:
wim 36:9f5f86dfd44a 2583 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2584 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2585 // Store UDC/Icon pattern for PCF2119:
wim 36:9f5f86dfd44a 2586 // 4 x 8 rows x 5 bits = 160 bits for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2587 // 4 x 8 rows x 5 bits = 160 bits for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2588 _writeCommand(0x40 | (idx & 0x3F)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2589 _writeData(data); // Set Icon pattern (Instr Set = 1)
wim 36:9f5f86dfd44a 2590 break; // case PCF2103_3V3 Controller
wim 36:9f5f86dfd44a 2591
wim 36:9f5f86dfd44a 2592 default:
wim 36:9f5f86dfd44a 2593 break; // end default
wim 36:9f5f86dfd44a 2594 } // end switch _ctrl
wim 36:9f5f86dfd44a 2595
wim 36:9f5f86dfd44a 2596 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 36:9f5f86dfd44a 2597 int addr = getAddress(_column, _row);
wim 36:9f5f86dfd44a 2598 _writeCommand(0x80 | addr);
wim 36:9f5f86dfd44a 2599
wim 36:9f5f86dfd44a 2600 } // end setIcon()
wim 36:9f5f86dfd44a 2601
wim 36:9f5f86dfd44a 2602 /** Clear Icons
wim 36:9f5f86dfd44a 2603 *
wim 36:9f5f86dfd44a 2604 * @param none
wim 36:9f5f86dfd44a 2605 * @return none
wim 36:9f5f86dfd44a 2606 */
wim 36:9f5f86dfd44a 2607 //@TODO Add support for 40x4 dual controller
wim 36:9f5f86dfd44a 2608 void TextLCD_Base::clrIcon() {
wim 36:9f5f86dfd44a 2609 // Icons are defined by a byte bitpattern. The P0..P5 form the Icon pattern for KS0073, and P0..P4 for KS0078
wim 36:9f5f86dfd44a 2610 // P7 P6 P5 P4 P3 P2 P1 P0
wim 36:9f5f86dfd44a 2611 // 0 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2612 // 1 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2613 // .............
wim 36:9f5f86dfd44a 2614 // 15 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2615 //
wim 36:9f5f86dfd44a 2616 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 36:9f5f86dfd44a 2617 // B1 B0 Mode
wim 36:9f5f86dfd44a 2618 // 0 0 No Blinking for this icon row
wim 36:9f5f86dfd44a 2619 // 0 1 Enabled pixels in P5 will blink
wim 36:9f5f86dfd44a 2620 // 1 x Enabled pixels in P0..P5 will blink
wim 36:9f5f86dfd44a 2621 //
wim 36:9f5f86dfd44a 2622 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 2623 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2624 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2625 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 2626 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2627 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2628 int idx;
wim 36:9f5f86dfd44a 2629
wim 36:9f5f86dfd44a 2630 switch (_ctrl) {
wim 36:9f5f86dfd44a 2631 case KS0073:
wim 36:9f5f86dfd44a 2632 case KS0078:
wim 36:9f5f86dfd44a 2633 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N RE(1) BE LP
wim 36:9f5f86dfd44a 2634 // Select Extended Instruction Set
wim 36:9f5f86dfd44a 2635 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2636 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2637 _writeData(0x00); // Clear Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2638 }
wim 36:9f5f86dfd44a 2639 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Std Instruction Set
wim 36:9f5f86dfd44a 2640 // Select Std Instr set
wim 36:9f5f86dfd44a 2641 break; // end KS0073, KS0078
wim 36:9f5f86dfd44a 2642
wim 36:9f5f86dfd44a 2643 case ST7032_3V3:
wim 36:9f5f86dfd44a 2644 case ST7032_5V:
wim 36:9f5f86dfd44a 2645 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 36:9f5f86dfd44a 2646
wim 36:9f5f86dfd44a 2647 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2648 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2649 _writeData(0x00); // Clear Icon pattern (Instr Set 1)
wim 36:9f5f86dfd44a 2650 }
wim 36:9f5f86dfd44a 2651
wim 36:9f5f86dfd44a 2652 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2653 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2654 break; // end ST7032
wim 36:9f5f86dfd44a 2655
wim 36:9f5f86dfd44a 2656 case ST7036_3V3:
wim 36:9f5f86dfd44a 2657 case ST7036_5V:
wim 36:9f5f86dfd44a 2658 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH IS2,IS1 = 01 (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2659
wim 36:9f5f86dfd44a 2660 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2661 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2662 _writeData(0x00); // Clear Icon pattern (Instr Set 1)
wim 36:9f5f86dfd44a 2663 }
wim 36:9f5f86dfd44a 2664
wim 36:9f5f86dfd44a 2665 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2666 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2667 break; // end ST7036
wim 36:9f5f86dfd44a 2668
wim 36:9f5f86dfd44a 2669 case SSD1803_3V3:
wim 36:9f5f86dfd44a 2670 // case SSD1803_5V:
wim 36:9f5f86dfd44a 2671 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2672 // Select Instruction Set 1
wim 36:9f5f86dfd44a 2673 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2674 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2675 _writeData(0x00); // Clear Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2676 }
wim 36:9f5f86dfd44a 2677 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2678 // Select IS=0
wim 36:9f5f86dfd44a 2679 break; // end SSD1803
wim 36:9f5f86dfd44a 2680
wim 36:9f5f86dfd44a 2681 case PCF2103_3V3:
wim 36:9f5f86dfd44a 2682 case PCF2113_3V3:
wim 36:9f5f86dfd44a 2683 // PCF2103 and PCF2113 use part of the UDC RAM to control Icons
wim 36:9f5f86dfd44a 2684 // Select CG RAM
wim 36:9f5f86dfd44a 2685
wim 36:9f5f86dfd44a 2686 _writeCommand(0x40 | (0 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2687 // Store UDC/Icon pattern:
wim 36:9f5f86dfd44a 2688 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2689 for (int i=0; i<(3 * 8); i++) {
wim 36:9f5f86dfd44a 2690 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2691 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2692 }
wim 36:9f5f86dfd44a 2693
wim 36:9f5f86dfd44a 2694 _writeCommand(0x40 | (4 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2695 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2696 for (int i=0; i<(3 * 8); i++) {
wim 36:9f5f86dfd44a 2697 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2698 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2699 }
wim 36:9f5f86dfd44a 2700 break; // case PCF2103_3V3 Controller
wim 36:9f5f86dfd44a 2701
wim 39:e9c2319de9c5 2702 case PCF2119_3V3:
wim 39:e9c2319de9c5 2703 case PCF2119R_3V3:
wim 36:9f5f86dfd44a 2704 // PCF2119 uses part of the UDC RAM to control Icons
wim 36:9f5f86dfd44a 2705 // Select CG RAM
wim 36:9f5f86dfd44a 2706
wim 36:9f5f86dfd44a 2707 _writeCommand(0x40 | (0 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2708 // Store UDC/Icon pattern:
wim 36:9f5f86dfd44a 2709 // 4 x 8 rows x 5 bits = 160 bits for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2710 for (int i=0; i<(4 * 8); i++) {
wim 36:9f5f86dfd44a 2711 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2712 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2713 }
wim 36:9f5f86dfd44a 2714
wim 36:9f5f86dfd44a 2715 _writeCommand(0x40 | (4 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2716 // 4 x 8 rows x 5 bits = 160 bits for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2717 for (int i=0; i<(4 * 8); i++) {
wim 36:9f5f86dfd44a 2718 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2719 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2720 }
wim 36:9f5f86dfd44a 2721 break; // case PCF2119_3V3 Controller
wim 36:9f5f86dfd44a 2722
wim 36:9f5f86dfd44a 2723 default:
wim 36:9f5f86dfd44a 2724 break; // end default
wim 36:9f5f86dfd44a 2725 } // end switch _ctrl
wim 36:9f5f86dfd44a 2726
wim 36:9f5f86dfd44a 2727 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 36:9f5f86dfd44a 2728 int addr = getAddress(_column, _row);
wim 36:9f5f86dfd44a 2729 _writeCommand(0x80 | addr);
wim 36:9f5f86dfd44a 2730 } //end clrIcon()
wim 39:e9c2319de9c5 2731 #endif
wim 39:e9c2319de9c5 2732
wim 39:e9c2319de9c5 2733 #if(LCD_INVERT == 1)
wim 36:9f5f86dfd44a 2734 /** Set Invert
wim 36:9f5f86dfd44a 2735 * setInvert method is supported by some compatible devices (eg KS0073) to swap between black and white
wim 36:9f5f86dfd44a 2736 *
wim 36:9f5f86dfd44a 2737 * @param bool invertOn Invert on/off
wim 36:9f5f86dfd44a 2738 * @return none
wim 36:9f5f86dfd44a 2739 */
wim 36:9f5f86dfd44a 2740 //@TODO Add support for 40x4 dual controller
wim 36:9f5f86dfd44a 2741 void TextLCD_Base::setInvert(bool invertOn) {
wim 36:9f5f86dfd44a 2742
wim 36:9f5f86dfd44a 2743 if (invertOn) {
wim 36:9f5f86dfd44a 2744 // Controllers that support Invert
wim 36:9f5f86dfd44a 2745 switch (_ctrl) {
wim 36:9f5f86dfd44a 2746 case KS0073:
wim 36:9f5f86dfd44a 2747 case KS0078:
wim 36:9f5f86dfd44a 2748 _function = _function | 0x01; // Enable Invert
wim 36:9f5f86dfd44a 2749 _writeCommand(0x20 | _function); // Activate Invert (Std Instr Set)
wim 36:9f5f86dfd44a 2750 break;
wim 36:9f5f86dfd44a 2751 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 2752 // case SSD1803_5V :
wim 36:9f5f86dfd44a 2753 case US2066_3V3:
wim 36:9f5f86dfd44a 2754 // case USS2066_5V:
wim 36:9f5f86dfd44a 2755 _function_1 = _function_1 | 0x01; // Enable Invert
wim 36:9f5f86dfd44a 2756 // Set function, 0 0 1 DL N BE RE(1) REV (SSD1803)
wim 36:9f5f86dfd44a 2757 // Set function, 0 0 1 X N BE RE(1) REV (US2066)
wim 36:9f5f86dfd44a 2758 _writeCommand(0x20 | _function_1); // Activate Invert (Ext Instr Set)
wim 36:9f5f86dfd44a 2759 _writeCommand(0x20 | _function); // Return to Std Instr Set
wim 36:9f5f86dfd44a 2760 break;
wim 36:9f5f86dfd44a 2761 default:
wim 36:9f5f86dfd44a 2762 //Unsupported feature for other controllers
wim 36:9f5f86dfd44a 2763 break;
wim 36:9f5f86dfd44a 2764 } // end switch
wim 36:9f5f86dfd44a 2765 }
wim 36:9f5f86dfd44a 2766 else {
wim 36:9f5f86dfd44a 2767 // Controllers that support Invert
wim 36:9f5f86dfd44a 2768 switch (_ctrl) {
wim 36:9f5f86dfd44a 2769 case KS0073:
wim 36:9f5f86dfd44a 2770 case KS0078:
wim 36:9f5f86dfd44a 2771 _function = _function & ~0x01; // Disable Invert
wim 36:9f5f86dfd44a 2772 _writeCommand(0x20 | _function); // Disable Invert (Std Instr Set)
wim 36:9f5f86dfd44a 2773 break;
wim 36:9f5f86dfd44a 2774 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 2775 // case SSD1803_5V :
wim 36:9f5f86dfd44a 2776 case US2066_3V3:
wim 36:9f5f86dfd44a 2777 // case USS2066_5V:
wim 36:9f5f86dfd44a 2778 _function_1 = _function_1 & ~0x01; // Disable Invert
wim 36:9f5f86dfd44a 2779 // Set function, 0 0 1 DL N BE RE(1) REV (SSD1803)
wim 36:9f5f86dfd44a 2780 // Set function, 0 0 1 X N BE RE(1) REV (US2066)
wim 36:9f5f86dfd44a 2781 _writeCommand(0x20 | _function_1); // Activate Invert (Ext Instr Set)
wim 36:9f5f86dfd44a 2782 _writeCommand(0x20 | _function); // Return to Std Instr Set
wim 36:9f5f86dfd44a 2783 break;
wim 36:9f5f86dfd44a 2784
wim 36:9f5f86dfd44a 2785 default:
wim 36:9f5f86dfd44a 2786 //Unsupported feature for other controllers
wim 36:9f5f86dfd44a 2787 break;
wim 36:9f5f86dfd44a 2788 } // end switch
wim 36:9f5f86dfd44a 2789 }
wim 36:9f5f86dfd44a 2790 } // end setInvert()
wim 39:e9c2319de9c5 2791 #endif
wim 36:9f5f86dfd44a 2792
wim 23:d47f226efb24 2793 //--------- End TextLCD_Base -----------
wim 21:9eb628d9e164 2794
wim 22:35742ec80c24 2795
wim 23:d47f226efb24 2796 //--------- Start TextLCD Bus -----------
wim 21:9eb628d9e164 2797
wim 21:9eb628d9e164 2798 /* Create a TextLCD interface for using regular mbed pins
wim 21:9eb628d9e164 2799 *
wim 21:9eb628d9e164 2800 * @param rs Instruction/data control line
wim 21:9eb628d9e164 2801 * @param e Enable line (clock)
wim 21:9eb628d9e164 2802 * @param d4-d7 Data lines for using as a 4-bit interface
wim 21:9eb628d9e164 2803 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 21:9eb628d9e164 2804 * @param bl Backlight control line (optional, default = NC)
wim 21:9eb628d9e164 2805 * @param e2 Enable2 line (clock for second controller, LCD40x4 only)
wim 21:9eb628d9e164 2806 * @param ctrl LCD controller (default = HD44780)
wim 21:9eb628d9e164 2807 */
wim 21:9eb628d9e164 2808 TextLCD::TextLCD(PinName rs, PinName e,
wim 21:9eb628d9e164 2809 PinName d4, PinName d5, PinName d6, PinName d7,
wim 21:9eb628d9e164 2810 LCDType type, PinName bl, PinName e2, LCDCtrl ctrl) :
wim 21:9eb628d9e164 2811 TextLCD_Base(type, ctrl),
wim 22:35742ec80c24 2812 _rs(rs), _e(e), _d(d4, d5, d6, d7) {
wim 22:35742ec80c24 2813
wim 22:35742ec80c24 2814 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 22:35742ec80c24 2815 if (bl != NC) {
wim 22:35742ec80c24 2816 _bl = new DigitalOut(bl); //Construct new pin
wim 22:35742ec80c24 2817 _bl->write(0); //Deactivate
wim 22:35742ec80c24 2818 }
wim 22:35742ec80c24 2819 else {
wim 22:35742ec80c24 2820 // No Hardware Backlight pin
wim 22:35742ec80c24 2821 _bl = NULL; //Construct dummy pin
wim 22:35742ec80c24 2822 }
wim 22:35742ec80c24 2823
wim 22:35742ec80c24 2824 // The hardware Enable2 pin is only needed for LCD40x4. Test and make sure whether it exists or not to prevent illegal access.
wim 22:35742ec80c24 2825 if (e2 != NC) {
wim 22:35742ec80c24 2826 _e2 = new DigitalOut(e2); //Construct new pin
wim 22:35742ec80c24 2827 _e2->write(0); //Deactivate
wim 22:35742ec80c24 2828 }
wim 22:35742ec80c24 2829 else {
wim 22:35742ec80c24 2830 // No Hardware Enable pin
wim 22:35742ec80c24 2831 _e2 = NULL; //Construct dummy pin
wim 22:35742ec80c24 2832 }
wim 38:cbe275b0b647 2833
wim 38:cbe275b0b647 2834 _init(_LCD_DL_4); // Set Datalength to 4 bit for mbed bus interfaces
wim 21:9eb628d9e164 2835 }
wim 21:9eb628d9e164 2836
wim 29:a3663151aa65 2837 /** Destruct a TextLCD interface for using regular mbed pins
wim 29:a3663151aa65 2838 *
wim 29:a3663151aa65 2839 * @param none
wim 29:a3663151aa65 2840 * @return none
wim 29:a3663151aa65 2841 */
wim 29:a3663151aa65 2842 TextLCD::~TextLCD() {
wim 29:a3663151aa65 2843 if (_bl != NULL) {delete _bl;} // BL pin
wim 29:a3663151aa65 2844 if (_e2 != NULL) {delete _e2;} // E2 pin
wim 29:a3663151aa65 2845 }
wim 29:a3663151aa65 2846
wim 22:35742ec80c24 2847 /** Set E pin (or E2 pin)
wim 22:35742ec80c24 2848 * Used for mbed pins, I2C bus expander or SPI shiftregister
wim 22:35742ec80c24 2849 * Default PinName value for E2 is NC, must be used as pointer to avoid issues with mbed lib and DigitalOut pins
wim 22:35742ec80c24 2850 * @param value true or false
wim 22:35742ec80c24 2851 * @return none
wim 22:35742ec80c24 2852 */
wim 21:9eb628d9e164 2853 void TextLCD::_setEnable(bool value) {
wim 21:9eb628d9e164 2854
wim 22:35742ec80c24 2855 if(_ctrl_idx==_LCDCtrl_0) {
wim 22:35742ec80c24 2856 if (value) {
wim 22:35742ec80c24 2857 _e = 1; // Set E bit
wim 22:35742ec80c24 2858 }
wim 22:35742ec80c24 2859 else {
wim 22:35742ec80c24 2860 _e = 0; // Reset E bit
wim 22:35742ec80c24 2861 }
wim 22:35742ec80c24 2862 }
wim 22:35742ec80c24 2863 else {
wim 22:35742ec80c24 2864 if (value) {
wim 22:35742ec80c24 2865 if (_e2 != NULL) {_e2->write(1);} //Set E2 bit
wim 22:35742ec80c24 2866 }
wim 22:35742ec80c24 2867 else {
wim 22:35742ec80c24 2868 if (_e2 != NULL) {_e2->write(0);} //Reset E2 bit
wim 22:35742ec80c24 2869 }
wim 22:35742ec80c24 2870 }
wim 21:9eb628d9e164 2871 }
wim 21:9eb628d9e164 2872
wim 21:9eb628d9e164 2873 // Set RS pin
wim 21:9eb628d9e164 2874 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 2875 void TextLCD::_setRS(bool value) {
wim 21:9eb628d9e164 2876
wim 22:35742ec80c24 2877 if (value) {
wim 21:9eb628d9e164 2878 _rs = 1; // Set RS bit
wim 22:35742ec80c24 2879 }
wim 22:35742ec80c24 2880 else {
wim 21:9eb628d9e164 2881 _rs = 0; // Reset RS bit
wim 22:35742ec80c24 2882 }
wim 21:9eb628d9e164 2883 }
wim 21:9eb628d9e164 2884
wim 22:35742ec80c24 2885 /** Set BL pin
wim 22:35742ec80c24 2886 * Used for mbed pins, I2C bus expander or SPI shiftregister
wim 22:35742ec80c24 2887 * Default PinName value is NC, must be used as pointer to avoid issues with mbed lib and DigitalOut pins
wim 22:35742ec80c24 2888 * @param value true or false
wim 22:35742ec80c24 2889 * @return none
wim 22:35742ec80c24 2890 */
wim 21:9eb628d9e164 2891 void TextLCD::_setBL(bool value) {
wim 21:9eb628d9e164 2892
wim 22:35742ec80c24 2893 if (value) {
wim 22:35742ec80c24 2894 if (_bl != NULL) {_bl->write(1);} //Set BL bit
wim 22:35742ec80c24 2895 }
wim 22:35742ec80c24 2896 else {
wim 22:35742ec80c24 2897 if (_bl != NULL) {_bl->write(0);} //Reset BL bit
wim 22:35742ec80c24 2898 }
wim 21:9eb628d9e164 2899 }
wim 21:9eb628d9e164 2900
wim 21:9eb628d9e164 2901 // Place the 4bit data on the databus
wim 21:9eb628d9e164 2902 // Used for mbed pins, I2C bus expander or SPI shifregister
wim 21:9eb628d9e164 2903 void TextLCD::_setData(int value) {
wim 21:9eb628d9e164 2904 _d = value & 0x0F; // Write Databits
wim 21:9eb628d9e164 2905 }
wim 34:e5a0dcb43ecc 2906
wim 23:d47f226efb24 2907 //----------- End TextLCD ---------------
wim 21:9eb628d9e164 2908
wim 21:9eb628d9e164 2909
wim 23:d47f226efb24 2910 //--------- Start TextLCD_I2C -----------
wim 34:e5a0dcb43ecc 2911 #if(LCD_I2C == 1) /* I2C Expander PCF8574/MCP23008 */
wim 26:bd897a001012 2912 /** Create a TextLCD interface using an I2C PC8574 (or PCF8574A) or MCP23008 portexpander
wim 22:35742ec80c24 2913 *
wim 22:35742ec80c24 2914 * @param i2c I2C Bus
wim 26:bd897a001012 2915 * @param deviceAddress I2C slave address (PCF8574, PCF8574A or MCP23008, default = 0x40)
wim 22:35742ec80c24 2916 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 22:35742ec80c24 2917 * @param ctrl LCD controller (default = HD44780)
wim 22:35742ec80c24 2918 */
wim 21:9eb628d9e164 2919 TextLCD_I2C::TextLCD_I2C(I2C *i2c, char deviceAddress, LCDType type, LCDCtrl ctrl) :
wim 21:9eb628d9e164 2920 TextLCD_Base(type, ctrl),
wim 21:9eb628d9e164 2921 _i2c(i2c){
wim 21:9eb628d9e164 2922
wim 22:35742ec80c24 2923 _slaveAddress = deviceAddress & 0xFE;
wim 28:30fa94f7341c 2924
wim 28:30fa94f7341c 2925 // Setup the I2C bus
wim 28:30fa94f7341c 2926 // The max bitrate for PCF8574 is 100kbit, the max bitrate for MCP23008 is 400kbit,
wim 32:59c4b8f648d4 2927 _i2c->frequency(100000);
wim 21:9eb628d9e164 2928
wim 26:bd897a001012 2929 #if (MCP23008==1)
wim 26:bd897a001012 2930 // MCP23008 portexpander Init
wim 37:ce348c002929 2931 _writeRegister(IODIR, 0x00); // All pins are outputs
wim 37:ce348c002929 2932 _writeRegister(IPOL, 0x00); // No reverse polarity on inputs
wim 37:ce348c002929 2933 _writeRegister(GPINTEN, 0x00); // No interrupt on change of input pins
wim 37:ce348c002929 2934 _writeRegister(DEFVAL, 0x00); // Default value to compare against for interrupts
wim 37:ce348c002929 2935 _writeRegister(INTCON, 0x00); // No interrupt on changes, compare against previous pin value
wim 37:ce348c002929 2936 _writeRegister(IOCON, 0x20); // b1=0 - Interrupt polarity active low
wim 37:ce348c002929 2937 // b2=0 - Interrupt pin active driver output
wim 37:ce348c002929 2938 // b4=0 - Slew rate enable on SDA
wim 37:ce348c002929 2939 // b5=0 - Auto-increment on registeraddress
wim 37:ce348c002929 2940 // b5=1 - No auto-increment on registeraddress => needed for performance improved I2C expander mode
wim 37:ce348c002929 2941 _writeRegister(GPPU, 0x00); // No Pullup
wim 37:ce348c002929 2942 // INTF // Interrupt flags read (Read-Only)
wim 37:ce348c002929 2943 // INTCAP // Captured inputpins at time of interrupt (Read-Only)
wim 37:ce348c002929 2944 // _writeRegister(GPIO, 0x00); // Output/Input pins
wim 37:ce348c002929 2945 // _writeRegister(OLAT, 0x00); // Output Latch
wim 26:bd897a001012 2946
wim 21:9eb628d9e164 2947 // Init the portexpander bus
wim 38:cbe275b0b647 2948 _lcd_bus = LCD_BUS_I2C_DEF;
wim 21:9eb628d9e164 2949
wim 21:9eb628d9e164 2950 // write the new data to the portexpander
wim 37:ce348c002929 2951 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 2952 #else
wim 26:bd897a001012 2953 // PCF8574 of PCF8574A portexpander
wim 26:bd897a001012 2954
wim 26:bd897a001012 2955 // Init the portexpander bus
wim 38:cbe275b0b647 2956 _lcd_bus = LCD_BUS_I2C_DEF;
wim 26:bd897a001012 2957
wim 26:bd897a001012 2958 // write the new data to the portexpander
wim 21:9eb628d9e164 2959 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 26:bd897a001012 2960 #endif
wim 21:9eb628d9e164 2961
wim 37:ce348c002929 2962 _init(_LCD_DL_4); // Set Datalength to 4 bit for all serial expander interfaces
wim 21:9eb628d9e164 2963 }
wim 21:9eb628d9e164 2964
wim 37:ce348c002929 2965 // Set E bit (or E2 bit) in the databus shadowvalue
wim 37:ce348c002929 2966 // Used for mbed I2C bus expander
wim 37:ce348c002929 2967 void TextLCD_I2C::_setEnableBit(bool value) {
wim 21:9eb628d9e164 2968
wim 22:35742ec80c24 2969 if(_ctrl_idx==_LCDCtrl_0) {
wim 26:bd897a001012 2970 if (value) {
wim 38:cbe275b0b647 2971 _lcd_bus |= LCD_BUS_I2C_E; // Set E bit
wim 26:bd897a001012 2972 }
wim 26:bd897a001012 2973 else {
wim 38:cbe275b0b647 2974 _lcd_bus &= ~LCD_BUS_I2C_E; // Reset E bit
wim 26:bd897a001012 2975 }
wim 22:35742ec80c24 2976 }
wim 22:35742ec80c24 2977 else {
wim 26:bd897a001012 2978 if (value) {
wim 38:cbe275b0b647 2979 _lcd_bus |= LCD_BUS_I2C_E2; // Set E2 bit
wim 26:bd897a001012 2980 }
wim 26:bd897a001012 2981 else {
wim 38:cbe275b0b647 2982 _lcd_bus &= ~LCD_BUS_I2C_E2; // Reset E2bit
wim 26:bd897a001012 2983 }
wim 26:bd897a001012 2984 }
wim 37:ce348c002929 2985 }
wim 37:ce348c002929 2986
wim 37:ce348c002929 2987 // Set E pin (or E2 pin)
wim 37:ce348c002929 2988 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 2989 void TextLCD_I2C::_setEnable(bool value) {
wim 37:ce348c002929 2990
wim 37:ce348c002929 2991 // Place the E or E2 bit data on the databus shadowvalue
wim 37:ce348c002929 2992 _setEnableBit(value);
wim 26:bd897a001012 2993
wim 26:bd897a001012 2994 #if (MCP23008==1)
wim 26:bd897a001012 2995 // MCP23008 portexpander
wim 26:bd897a001012 2996
wim 26:bd897a001012 2997 // write the new data to the portexpander
wim 37:ce348c002929 2998 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 2999 #else
wim 26:bd897a001012 3000 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 3001
wim 22:35742ec80c24 3002 // write the new data to the I2C portexpander
wim 22:35742ec80c24 3003 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 26:bd897a001012 3004 #endif
wim 21:9eb628d9e164 3005 }
wim 21:9eb628d9e164 3006
wim 37:ce348c002929 3007
wim 21:9eb628d9e164 3008 // Set RS pin
wim 21:9eb628d9e164 3009 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 3010 void TextLCD_I2C::_setRS(bool value) {
wim 21:9eb628d9e164 3011
wim 26:bd897a001012 3012 if (value) {
wim 38:cbe275b0b647 3013 _lcd_bus |= LCD_BUS_I2C_RS; // Set RS bit
wim 26:bd897a001012 3014 }
wim 26:bd897a001012 3015 else {
wim 38:cbe275b0b647 3016 _lcd_bus &= ~LCD_BUS_I2C_RS; // Reset RS bit
wim 26:bd897a001012 3017 }
wim 26:bd897a001012 3018
wim 26:bd897a001012 3019 #if (MCP23008==1)
wim 26:bd897a001012 3020 // MCP23008 portexpander
wim 26:bd897a001012 3021
wim 26:bd897a001012 3022 // write the new data to the portexpander
wim 37:ce348c002929 3023 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 3024 #else
wim 26:bd897a001012 3025 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 3026
wim 22:35742ec80c24 3027 // write the new data to the I2C portexpander
wim 22:35742ec80c24 3028 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 30:033048611c01 3029 #endif
wim 21:9eb628d9e164 3030 }
wim 21:9eb628d9e164 3031
wim 21:9eb628d9e164 3032 // Set BL pin
wim 21:9eb628d9e164 3033 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 3034 void TextLCD_I2C::_setBL(bool value) {
wim 21:9eb628d9e164 3035
wim 26:bd897a001012 3036 if (value) {
wim 38:cbe275b0b647 3037 _lcd_bus |= LCD_BUS_I2C_BL; // Set BL bit
wim 26:bd897a001012 3038 }
wim 26:bd897a001012 3039 else {
wim 38:cbe275b0b647 3040 _lcd_bus &= ~LCD_BUS_I2C_BL; // Reset BL bit
wim 26:bd897a001012 3041 }
wim 26:bd897a001012 3042
wim 26:bd897a001012 3043 #if (MCP23008==1)
wim 26:bd897a001012 3044 // MCP23008 portexpander
wim 26:bd897a001012 3045
wim 26:bd897a001012 3046 // write the new data to the portexpander
wim 37:ce348c002929 3047 _writeRegister(GPIO, _lcd_bus);
wim 37:ce348c002929 3048 #else
wim 37:ce348c002929 3049 // PCF8574 of PCF8574A portexpander
wim 37:ce348c002929 3050
wim 37:ce348c002929 3051 // write the new data to the I2C portexpander
wim 37:ce348c002929 3052 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 37:ce348c002929 3053 #endif
wim 37:ce348c002929 3054 }
wim 37:ce348c002929 3055
wim 38:cbe275b0b647 3056 #if(0)
wim 38:cbe275b0b647 3057 // New optimized v018
wim 38:cbe275b0b647 3058 // Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574), same as v018
wim 38:cbe275b0b647 3059 // Place the 4bit data in the databus shadowvalue
wim 38:cbe275b0b647 3060 // Used for mbed I2C bus expander
wim 38:cbe275b0b647 3061 const char _LCD_DATA_BITS[16] = {
wim 38:cbe275b0b647 3062 0x00,
wim 38:cbe275b0b647 3063 ( LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3064 ( LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 3065 ( LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3066 ( LCD_BUS_I2C_D6 ),
wim 38:cbe275b0b647 3067 ( LCD_BUS_I2C_D6 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3068 ( LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 3069 ( LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3070 (LCD_BUS_I2C_D7 ),
wim 38:cbe275b0b647 3071 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3072 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 3073 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3074 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 ),
wim 38:cbe275b0b647 3075 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3076 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 3077 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4)
wim 38:cbe275b0b647 3078 };
wim 38:cbe275b0b647 3079 void TextLCD_I2C::_setDataBits(int value) {
wim 38:cbe275b0b647 3080
wim 38:cbe275b0b647 3081 //Clear all databits
wim 38:cbe275b0b647 3082 _lcd_bus &= ~LCD_BUS_I2C_MSK;
wim 38:cbe275b0b647 3083
wim 38:cbe275b0b647 3084 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 38:cbe275b0b647 3085 _lcd_bus |= _LCD_DATA_BITS[value & 0x0F];
wim 38:cbe275b0b647 3086 }
wim 39:e9c2319de9c5 3087 #endif
wim 39:e9c2319de9c5 3088
wim 39:e9c2319de9c5 3089 #if(0)
wim 38:cbe275b0b647 3090 //orig v017
wim 38:cbe275b0b647 3091 // Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574)
wim 37:ce348c002929 3092 // Place the 4bit data in the databus shadowvalue
wim 37:ce348c002929 3093 // Used for mbed I2C bus expander
wim 37:ce348c002929 3094 void TextLCD_I2C::_setDataBits(int value) {
wim 37:ce348c002929 3095
wim 37:ce348c002929 3096 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 37:ce348c002929 3097 if (value & 0x01){
wim 38:cbe275b0b647 3098 _lcd_bus |= LCD_BUS_I2C_D4; // Set Databit
wim 37:ce348c002929 3099 }
wim 37:ce348c002929 3100 else {
wim 38:cbe275b0b647 3101 _lcd_bus &= ~LCD_BUS_I2C_D4; // Reset Databit
wim 37:ce348c002929 3102 }
wim 37:ce348c002929 3103
wim 37:ce348c002929 3104 if (value & 0x02){
wim 38:cbe275b0b647 3105 _lcd_bus |= LCD_BUS_I2C_D5; // Set Databit
wim 37:ce348c002929 3106 }
wim 37:ce348c002929 3107 else {
wim 38:cbe275b0b647 3108 _lcd_bus &= ~LCD_BUS_I2C_D5; // Reset Databit
wim 37:ce348c002929 3109 }
wim 37:ce348c002929 3110
wim 37:ce348c002929 3111 if (value & 0x04) {
wim 38:cbe275b0b647 3112 _lcd_bus |= LCD_BUS_I2C_D6; // Set Databit
wim 37:ce348c002929 3113 }
wim 37:ce348c002929 3114 else {
wim 38:cbe275b0b647 3115 _lcd_bus &= ~LCD_BUS_I2C_D6; // Reset Databit
wim 37:ce348c002929 3116 }
wim 37:ce348c002929 3117
wim 37:ce348c002929 3118 if (value & 0x08) {
wim 38:cbe275b0b647 3119 _lcd_bus |= LCD_BUS_I2C_D7; // Set Databit
wim 37:ce348c002929 3120 }
wim 37:ce348c002929 3121 else {
wim 38:cbe275b0b647 3122 _lcd_bus &= ~LCD_BUS_I2C_D7; // Reset Databit
wim 37:ce348c002929 3123 }
wim 37:ce348c002929 3124 }
wim 38:cbe275b0b647 3125 #endif
wim 38:cbe275b0b647 3126
wim 39:e9c2319de9c5 3127 #if(1)
wim 39:e9c2319de9c5 3128 //orig v017, with optimised codesize
wim 39:e9c2319de9c5 3129 // Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574)
wim 39:e9c2319de9c5 3130 // Place the 4bit data in the databus shadowvalue
wim 39:e9c2319de9c5 3131 // Used for mbed I2C bus expander
wim 39:e9c2319de9c5 3132 void TextLCD_I2C::_setDataBits(int value) {
wim 39:e9c2319de9c5 3133
wim 39:e9c2319de9c5 3134 //Clear all databits
wim 39:e9c2319de9c5 3135 _lcd_bus &= ~LCD_BUS_I2C_MSK;
wim 39:e9c2319de9c5 3136
wim 39:e9c2319de9c5 3137 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 39:e9c2319de9c5 3138 if (value & 0x01){
wim 39:e9c2319de9c5 3139 _lcd_bus |= LCD_BUS_I2C_D4; // Set Databit
wim 39:e9c2319de9c5 3140 }
wim 39:e9c2319de9c5 3141
wim 39:e9c2319de9c5 3142 if (value & 0x02){
wim 39:e9c2319de9c5 3143 _lcd_bus |= LCD_BUS_I2C_D5; // Set Databit
wim 39:e9c2319de9c5 3144 }
wim 39:e9c2319de9c5 3145
wim 39:e9c2319de9c5 3146 if (value & 0x04) {
wim 39:e9c2319de9c5 3147 _lcd_bus |= LCD_BUS_I2C_D6; // Set Databit
wim 39:e9c2319de9c5 3148 }
wim 39:e9c2319de9c5 3149
wim 39:e9c2319de9c5 3150 if (value & 0x08) {
wim 39:e9c2319de9c5 3151 _lcd_bus |= LCD_BUS_I2C_D7; // Set Databit
wim 39:e9c2319de9c5 3152 }
wim 39:e9c2319de9c5 3153 }
wim 39:e9c2319de9c5 3154 #endif
wim 37:ce348c002929 3155
wim 37:ce348c002929 3156 // Place the 4bit data on the databus
wim 37:ce348c002929 3157 // Used for mbed pins, I2C bus expander or SPI shifregister
wim 37:ce348c002929 3158 void TextLCD_I2C::_setData(int value) {
wim 37:ce348c002929 3159
wim 37:ce348c002929 3160 // Place the 4bit data on the databus shadowvalue
wim 37:ce348c002929 3161 _setDataBits(value);
wim 37:ce348c002929 3162
wim 37:ce348c002929 3163 // Place the 4bit data on the databus
wim 37:ce348c002929 3164 #if (MCP23008==1)
wim 37:ce348c002929 3165 // MCP23008 portexpander
wim 37:ce348c002929 3166
wim 37:ce348c002929 3167 // write the new data to the portexpander
wim 37:ce348c002929 3168 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 3169 #else
wim 26:bd897a001012 3170 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 3171
wim 21:9eb628d9e164 3172 // write the new data to the I2C portexpander
wim 21:9eb628d9e164 3173 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 30:033048611c01 3174 #endif
wim 21:9eb628d9e164 3175 }
wim 21:9eb628d9e164 3176
wim 37:ce348c002929 3177 // Write data to MCP23008 I2C portexpander
wim 37:ce348c002929 3178 // Used for mbed I2C bus expander
wim 37:ce348c002929 3179 void TextLCD_I2C::_writeRegister (int reg, int value) {
wim 37:ce348c002929 3180 char data[] = {reg, value};
wim 37:ce348c002929 3181
wim 37:ce348c002929 3182 _i2c->write(_slaveAddress, data, 2);
wim 37:ce348c002929 3183 }
wim 37:ce348c002929 3184
wim 37:ce348c002929 3185 //New optimized
wim 37:ce348c002929 3186 //Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574)
wim 37:ce348c002929 3187 //Test faster _writeByte 0.14s vs 0.34s for a 20x4 fillscreen (MCP23008)
wim 37:ce348c002929 3188
wim 37:ce348c002929 3189 // Write a byte using I2C
wim 37:ce348c002929 3190 void TextLCD_I2C::_writeByte(int value) {
wim 37:ce348c002929 3191 char data[6];
wim 37:ce348c002929 3192
wim 37:ce348c002929 3193 #if (MCP23008==1)
wim 37:ce348c002929 3194 // MCP23008 portexpander
wim 37:ce348c002929 3195
wim 37:ce348c002929 3196 data[0] = GPIO; // set registeraddres
wim 37:ce348c002929 3197 // Note: auto-increment is disabled so all data will go to GPIO register
wim 37:ce348c002929 3198
wim 37:ce348c002929 3199 _setEnableBit(true); // set E
wim 37:ce348c002929 3200 _setDataBits(value >> 4); // set data high
wim 37:ce348c002929 3201 data[1] = _lcd_bus;
wim 37:ce348c002929 3202
wim 37:ce348c002929 3203 _setEnableBit(false); // clear E
wim 37:ce348c002929 3204 data[2] = _lcd_bus;
wim 37:ce348c002929 3205
wim 37:ce348c002929 3206 _setEnableBit(true); // set E
wim 37:ce348c002929 3207 _setDataBits(value); // set data low
wim 37:ce348c002929 3208 data[3] = _lcd_bus;
wim 37:ce348c002929 3209
wim 37:ce348c002929 3210 _setEnableBit(false); // clear E
wim 37:ce348c002929 3211 data[4] = _lcd_bus;
wim 37:ce348c002929 3212
wim 37:ce348c002929 3213 // write the packed data to the I2C portexpander
wim 37:ce348c002929 3214 _i2c->write(_slaveAddress, data, 5);
wim 37:ce348c002929 3215 #else
wim 37:ce348c002929 3216 // PCF8574 of PCF8574A portexpander
wim 37:ce348c002929 3217
wim 37:ce348c002929 3218 _setEnableBit(true); // set E
wim 37:ce348c002929 3219 _setDataBits(value >> 4); // set data high
wim 37:ce348c002929 3220 data[0] = _lcd_bus;
wim 37:ce348c002929 3221
wim 37:ce348c002929 3222 _setEnableBit(false); // clear E
wim 37:ce348c002929 3223 data[1] = _lcd_bus;
wim 37:ce348c002929 3224
wim 37:ce348c002929 3225 _setEnableBit(true); // set E
wim 37:ce348c002929 3226 _setDataBits(value); // set data low
wim 37:ce348c002929 3227 data[2] = _lcd_bus;
wim 37:ce348c002929 3228
wim 37:ce348c002929 3229 _setEnableBit(false); // clear E
wim 37:ce348c002929 3230 data[3] = _lcd_bus;
wim 37:ce348c002929 3231
wim 37:ce348c002929 3232 // write the packed data to the I2C portexpander
wim 37:ce348c002929 3233 _i2c->write(_slaveAddress, data, 4);
wim 37:ce348c002929 3234 #endif
wim 37:ce348c002929 3235 }
wim 37:ce348c002929 3236
wim 37:ce348c002929 3237 #endif /* I2C Expander PCF8574/MCP23008 */
wim 37:ce348c002929 3238 //---------- End TextLCD_I2C ------------
wim 37:ce348c002929 3239
wim 37:ce348c002929 3240
wim 37:ce348c002929 3241 //--------- Start TextLCD_SPI -----------
wim 37:ce348c002929 3242 #if(LCD_SPI == 1) /* SPI Expander SN74595 */
wim 37:ce348c002929 3243
wim 37:ce348c002929 3244 /** Create a TextLCD interface using an SPI 74595 portexpander
wim 37:ce348c002929 3245 *
wim 37:ce348c002929 3246 * @param spi SPI Bus
wim 37:ce348c002929 3247 * @param cs chip select pin (active low)
wim 37:ce348c002929 3248 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 37:ce348c002929 3249 * @param ctrl LCD controller (default = HD44780)
wim 37:ce348c002929 3250 */
wim 37:ce348c002929 3251 TextLCD_SPI::TextLCD_SPI(SPI *spi, PinName cs, LCDType type, LCDCtrl ctrl) :
wim 37:ce348c002929 3252 TextLCD_Base(type, ctrl),
wim 37:ce348c002929 3253 _spi(spi),
wim 38:cbe275b0b647 3254 _cs(cs) {
wim 37:ce348c002929 3255 // Init cs
wim 37:ce348c002929 3256 _cs = 1;
wim 37:ce348c002929 3257
wim 37:ce348c002929 3258 // Setup the spi for 8 bit data, low steady state clock,
wim 37:ce348c002929 3259 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 37:ce348c002929 3260 _spi->format(8,0);
wim 37:ce348c002929 3261 _spi->frequency(500000);
wim 37:ce348c002929 3262 //_spi.frequency(1000000);
wim 37:ce348c002929 3263
wim 38:cbe275b0b647 3264 wait_ms(100); // Wait 100ms to ensure LCD powered up
wim 38:cbe275b0b647 3265
wim 37:ce348c002929 3266 // Init the portexpander bus
wim 38:cbe275b0b647 3267 _lcd_bus = LCD_BUS_SPI_DEF;
wim 37:ce348c002929 3268
wim 37:ce348c002929 3269 // write the new data to the portexpander
wim 37:ce348c002929 3270 _cs = 0;
wim 37:ce348c002929 3271 _spi->write(_lcd_bus);
wim 37:ce348c002929 3272 _cs = 1;
wim 37:ce348c002929 3273
wim 37:ce348c002929 3274 _init(_LCD_DL_4); // Set Datalength to 4 bit for all serial expander interfaces
wim 37:ce348c002929 3275 }
wim 37:ce348c002929 3276
wim 37:ce348c002929 3277 // Set E pin (or E2 pin)
wim 37:ce348c002929 3278 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3279 void TextLCD_SPI::_setEnable(bool value) {
wim 37:ce348c002929 3280
wim 37:ce348c002929 3281 if(_ctrl_idx==_LCDCtrl_0) {
wim 37:ce348c002929 3282 if (value) {
wim 38:cbe275b0b647 3283 _lcd_bus |= LCD_BUS_SPI_E; // Set E bit
wim 37:ce348c002929 3284 }
wim 37:ce348c002929 3285 else {
wim 38:cbe275b0b647 3286 _lcd_bus &= ~LCD_BUS_SPI_E; // Reset E bit
wim 37:ce348c002929 3287 }
wim 37:ce348c002929 3288 }
wim 37:ce348c002929 3289 else {
wim 37:ce348c002929 3290 if (value) {
wim 38:cbe275b0b647 3291 _lcd_bus |= LCD_BUS_SPI_E2; // Set E2 bit
wim 37:ce348c002929 3292 }
wim 37:ce348c002929 3293 else {
wim 38:cbe275b0b647 3294 _lcd_bus &= ~LCD_BUS_SPI_E2; // Reset E2 bit
wim 37:ce348c002929 3295 }
wim 37:ce348c002929 3296 }
wim 37:ce348c002929 3297
wim 37:ce348c002929 3298 // write the new data to the SPI portexpander
wim 37:ce348c002929 3299 _cs = 0;
wim 37:ce348c002929 3300 _spi->write(_lcd_bus);
wim 37:ce348c002929 3301 _cs = 1;
wim 37:ce348c002929 3302 }
wim 37:ce348c002929 3303
wim 37:ce348c002929 3304 // Set RS pin
wim 37:ce348c002929 3305 // Used for mbed pins, I2C bus expander or SPI shiftregister and SPI_N
wim 37:ce348c002929 3306 void TextLCD_SPI::_setRS(bool value) {
wim 37:ce348c002929 3307
wim 37:ce348c002929 3308 if (value) {
wim 38:cbe275b0b647 3309 _lcd_bus |= LCD_BUS_SPI_RS; // Set RS bit
wim 37:ce348c002929 3310 }
wim 37:ce348c002929 3311 else {
wim 38:cbe275b0b647 3312 _lcd_bus &= ~LCD_BUS_SPI_RS; // Reset RS bit
wim 37:ce348c002929 3313 }
wim 37:ce348c002929 3314
wim 37:ce348c002929 3315 // write the new data to the SPI portexpander
wim 37:ce348c002929 3316 _cs = 0;
wim 37:ce348c002929 3317 _spi->write(_lcd_bus);
wim 37:ce348c002929 3318 _cs = 1;
wim 37:ce348c002929 3319 }
wim 37:ce348c002929 3320
wim 37:ce348c002929 3321 // Set BL pin
wim 37:ce348c002929 3322 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3323 void TextLCD_SPI::_setBL(bool value) {
wim 37:ce348c002929 3324
wim 37:ce348c002929 3325 if (value) {
wim 38:cbe275b0b647 3326 _lcd_bus |= LCD_BUS_SPI_BL; // Set BL bit
wim 37:ce348c002929 3327 }
wim 37:ce348c002929 3328 else {
wim 38:cbe275b0b647 3329 _lcd_bus &= ~LCD_BUS_SPI_BL; // Reset BL bit
wim 37:ce348c002929 3330 }
wim 37:ce348c002929 3331
wim 37:ce348c002929 3332 // write the new data to the SPI portexpander
wim 37:ce348c002929 3333 _cs = 0;
wim 37:ce348c002929 3334 _spi->write(_lcd_bus);
wim 37:ce348c002929 3335 _cs = 1;
wim 37:ce348c002929 3336 }
wim 21:9eb628d9e164 3337
wim 21:9eb628d9e164 3338 // Place the 4bit data on the databus
wim 37:ce348c002929 3339 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3340 void TextLCD_SPI::_setData(int value) {
wim 22:35742ec80c24 3341
wim 22:35742ec80c24 3342 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 37:ce348c002929 3343 if (value & 0x01) {
wim 38:cbe275b0b647 3344 _lcd_bus |= LCD_BUS_SPI_D4; // Set Databit
wim 26:bd897a001012 3345 }
wim 37:ce348c002929 3346 else {
wim 38:cbe275b0b647 3347 _lcd_bus &= ~LCD_BUS_SPI_D4; // Reset Databit
wim 37:ce348c002929 3348 }
wim 37:ce348c002929 3349
wim 37:ce348c002929 3350 if (value & 0x02) {
wim 38:cbe275b0b647 3351 _lcd_bus |= LCD_BUS_SPI_D5; // Set Databit
wim 26:bd897a001012 3352 }
wim 26:bd897a001012 3353 else {
wim 38:cbe275b0b647 3354 _lcd_bus &= ~LCD_BUS_SPI_D5; // Reset Databit
wim 37:ce348c002929 3355 }
wim 37:ce348c002929 3356
wim 37:ce348c002929 3357 if (value & 0x04) {
wim 38:cbe275b0b647 3358 _lcd_bus |= LCD_BUS_SPI_D6; // Set Databit
wim 26:bd897a001012 3359 }
wim 37:ce348c002929 3360 else {
wim 38:cbe275b0b647 3361 _lcd_bus &= ~LCD_BUS_SPI_D6; // Reset Databit
wim 37:ce348c002929 3362 }
wim 37:ce348c002929 3363
wim 37:ce348c002929 3364 if (value & 0x08) {
wim 38:cbe275b0b647 3365 _lcd_bus |= LCD_BUS_SPI_D7; // Set Databit
wim 26:bd897a001012 3366 }
wim 26:bd897a001012 3367 else {
wim 38:cbe275b0b647 3368 _lcd_bus &= ~LCD_BUS_SPI_D7; // Reset Databit
wim 26:bd897a001012 3369 }
wim 21:9eb628d9e164 3370
wim 37:ce348c002929 3371 // write the new data to the SPI portexpander
wim 37:ce348c002929 3372 _cs = 0;
wim 37:ce348c002929 3373 _spi->write(_lcd_bus);
wim 37:ce348c002929 3374 _cs = 1;
wim 22:35742ec80c24 3375 }
wim 21:9eb628d9e164 3376
wim 37:ce348c002929 3377 #endif /* SPI Expander SN74595 */
wim 37:ce348c002929 3378 //---------- End TextLCD_SPI ------------
wim 21:9eb628d9e164 3379
wim 21:9eb628d9e164 3380
wim 28:30fa94f7341c 3381 //--------- Start TextLCD_I2C_N ---------
wim 34:e5a0dcb43ecc 3382 #if(LCD_I2C_N == 1) /* Native I2C */
wim 28:30fa94f7341c 3383
wim 28:30fa94f7341c 3384 /** Create a TextLCD interface using a controller with native I2C interface
wim 28:30fa94f7341c 3385 *
wim 28:30fa94f7341c 3386 * @param i2c I2C Bus
wim 28:30fa94f7341c 3387 * @param deviceAddress I2C slave address (default = 0x7C)
wim 28:30fa94f7341c 3388 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 28:30fa94f7341c 3389 * @param bl Backlight control line (optional, default = NC)
wim 28:30fa94f7341c 3390 * @param ctrl LCD controller (default = ST7032_3V3)
wim 28:30fa94f7341c 3391 */
wim 28:30fa94f7341c 3392 TextLCD_I2C_N::TextLCD_I2C_N(I2C *i2c, char deviceAddress, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 28:30fa94f7341c 3393 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 3394
wim 33:900a94bc7585 3395 _i2c(i2c){
wim 30:033048611c01 3396
wim 28:30fa94f7341c 3397 _slaveAddress = deviceAddress & 0xFE;
wim 28:30fa94f7341c 3398
wim 28:30fa94f7341c 3399 // Setup the I2C bus
wim 29:a3663151aa65 3400 // The max bitrate for ST7032i is 400kbit, lets stick to default here
wim 29:a3663151aa65 3401 _i2c->frequency(100000);
wim 32:59c4b8f648d4 3402
wim 30:033048611c01 3403
wim 28:30fa94f7341c 3404 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 28:30fa94f7341c 3405 if (bl != NC) {
wim 28:30fa94f7341c 3406 _bl = new DigitalOut(bl); //Construct new pin
wim 28:30fa94f7341c 3407 _bl->write(0); //Deactivate
wim 28:30fa94f7341c 3408 }
wim 28:30fa94f7341c 3409 else {
wim 28:30fa94f7341c 3410 // No Hardware Backlight pin
wim 28:30fa94f7341c 3411 _bl = NULL; //Construct dummy pin
wim 28:30fa94f7341c 3412 }
wim 28:30fa94f7341c 3413
wim 30:033048611c01 3414 //Sanity check
wim 30:033048611c01 3415 if (_ctrl & LCD_C_I2C) {
wim 36:9f5f86dfd44a 3416 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 3417 }
wim 30:033048611c01 3418 else {
wim 30:033048611c01 3419 error("Error: LCD Controller type does not support native I2C interface\n\r");
wim 30:033048611c01 3420 }
wim 28:30fa94f7341c 3421 }
wim 28:30fa94f7341c 3422
wim 28:30fa94f7341c 3423 TextLCD_I2C_N::~TextLCD_I2C_N() {
wim 28:30fa94f7341c 3424 if (_bl != NULL) {delete _bl;} // BL pin
wim 28:30fa94f7341c 3425 }
wim 28:30fa94f7341c 3426
wim 28:30fa94f7341c 3427 // Not used in this mode
wim 28:30fa94f7341c 3428 void TextLCD_I2C_N::_setEnable(bool value) {
wim 28:30fa94f7341c 3429 }
wim 28:30fa94f7341c 3430
wim 28:30fa94f7341c 3431 // Set RS pin
wim 28:30fa94f7341c 3432 // Used for mbed pins, I2C bus expander or SPI shiftregister and native I2C or SPI
wim 28:30fa94f7341c 3433 void TextLCD_I2C_N::_setRS(bool value) {
wim 30:033048611c01 3434 // The controlbyte defines the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3435 // Start Slaveaddress+RW b7 b6 b5 b4 b3 b2 b1 b0 b7...........b0 Stop
wim 30:033048611c01 3436 // Co RS RW 0 0 0 0 0 command or data
wim 30:033048611c01 3437 //
wim 30:033048611c01 3438 // C0=1 indicates that another controlbyte will follow after the next data or command byte
wim 30:033048611c01 3439 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3440 // RW=0 means write to controller. RW=1 means that controller will be read from after the next command.
wim 30:033048611c01 3441 // Many native I2C controllers dont support this option and it is not used by this lib.
wim 30:033048611c01 3442 //
wim 30:033048611c01 3443
wim 28:30fa94f7341c 3444 if (value) {
wim 28:30fa94f7341c 3445 _controlbyte = 0x40; // Next byte is data, No more control bytes will follow
wim 28:30fa94f7341c 3446 }
wim 28:30fa94f7341c 3447 else {
wim 28:30fa94f7341c 3448 _controlbyte = 0x00; // Next byte is command, No more control bytes will follow
wim 28:30fa94f7341c 3449 }
wim 28:30fa94f7341c 3450 }
wim 28:30fa94f7341c 3451
wim 28:30fa94f7341c 3452 // Set BL pin
wim 28:30fa94f7341c 3453 void TextLCD_I2C_N::_setBL(bool value) {
wim 28:30fa94f7341c 3454 if (_bl) {
wim 28:30fa94f7341c 3455 _bl->write(value);
wim 28:30fa94f7341c 3456 }
wim 28:30fa94f7341c 3457 }
wim 29:a3663151aa65 3458
wim 29:a3663151aa65 3459 // Not used in this mode
wim 29:a3663151aa65 3460 void TextLCD_I2C_N::_setData(int value) {
wim 29:a3663151aa65 3461 }
wim 29:a3663151aa65 3462
wim 28:30fa94f7341c 3463 // Write a byte using I2C
wim 28:30fa94f7341c 3464 void TextLCD_I2C_N::_writeByte(int value) {
wim 30:033048611c01 3465 // The controlbyte defines the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3466 // Start Slaveaddress+RW b7 b6 b5 b4 b3 b2 b1 b0 b7...........b0 Stop
wim 30:033048611c01 3467 // Co RS RW 0 0 0 0 0 command or data
wim 30:033048611c01 3468 //
wim 30:033048611c01 3469 // C0=1 indicates that another controlbyte will follow after the next data or command byte
wim 30:033048611c01 3470 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3471 // RW=0 means write to controller. RW=1 means that controller will be read from after the next command.
wim 30:033048611c01 3472 // Many native I2C controllers dont support this option and it is not used by this lib.
wim 30:033048611c01 3473 //
wim 28:30fa94f7341c 3474 char data[] = {_controlbyte, value};
wim 28:30fa94f7341c 3475
wim 32:59c4b8f648d4 3476 #if(LCD_I2C_ACK==1)
wim 32:59c4b8f648d4 3477 //Controllers that support ACK
wim 30:033048611c01 3478 _i2c->write(_slaveAddress, data, 2);
wim 32:59c4b8f648d4 3479 #else
wim 32:59c4b8f648d4 3480 //Controllers that dont support ACK
wim 37:ce348c002929 3481 //Note: This may be issue with some mbed platforms that dont fully/correctly support I2C byte operations.
wim 32:59c4b8f648d4 3482 _i2c->start();
wim 32:59c4b8f648d4 3483 _i2c->write(_slaveAddress);
wim 32:59c4b8f648d4 3484 _i2c->write(data[0]);
wim 32:59c4b8f648d4 3485 _i2c->write(data[1]);
wim 32:59c4b8f648d4 3486 _i2c->stop();
wim 32:59c4b8f648d4 3487 #endif
wim 28:30fa94f7341c 3488 }
wim 34:e5a0dcb43ecc 3489 #endif /* Native I2C */
wim 28:30fa94f7341c 3490 //-------- End TextLCD_I2C_N ------------
wim 28:30fa94f7341c 3491
wim 28:30fa94f7341c 3492
wim 25:6162b31128c9 3493 //--------- Start TextLCD_SPI_N ---------
wim 34:e5a0dcb43ecc 3494 #if(LCD_SPI_N == 1) /* Native SPI bus */
wim 30:033048611c01 3495 /** Create a TextLCD interface using a controller with a native SPI4 interface
Sissors 24:fb3399713710 3496 *
Sissors 24:fb3399713710 3497 * @param spi SPI Bus
Sissors 24:fb3399713710 3498 * @param cs chip select pin (active low)
wim 25:6162b31128c9 3499 * @param rs Instruction/data control line
Sissors 24:fb3399713710 3500 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 25:6162b31128c9 3501 * @param bl Backlight control line (optional, default = NC)
wim 26:bd897a001012 3502 * @param ctrl LCD controller (default = ST7032_3V3)
wim 25:6162b31128c9 3503 */
wim 25:6162b31128c9 3504 TextLCD_SPI_N::TextLCD_SPI_N(SPI *spi, PinName cs, PinName rs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 25:6162b31128c9 3505 TextLCD_Base(type, ctrl),
wim 25:6162b31128c9 3506 _spi(spi),
wim 25:6162b31128c9 3507 _cs(cs),
wim 25:6162b31128c9 3508 _rs(rs) {
Sissors 24:fb3399713710 3509
wim 32:59c4b8f648d4 3510 // Init CS
wim 32:59c4b8f648d4 3511 _cs = 1;
wim 32:59c4b8f648d4 3512
wim 36:9f5f86dfd44a 3513 // Setup the spi for 8 bit data, high steady state clock,
wim 36:9f5f86dfd44a 3514 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3515 // _spi->format(8,3);
wim 37:ce348c002929 3516 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3517 // _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3518
Sissors 24:fb3399713710 3519 // Setup the spi for 8 bit data, low steady state clock,
Sissors 24:fb3399713710 3520 // rising edge capture, with a 500KHz or 1MHz clock rate
Sissors 24:fb3399713710 3521 _spi->format(8,0);
wim 36:9f5f86dfd44a 3522 // _spi->frequency(500000);
Sissors 24:fb3399713710 3523 _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3524
Sissors 24:fb3399713710 3525 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
Sissors 24:fb3399713710 3526 if (bl != NC) {
Sissors 24:fb3399713710 3527 _bl = new DigitalOut(bl); //Construct new pin
Sissors 24:fb3399713710 3528 _bl->write(0); //Deactivate
Sissors 24:fb3399713710 3529 }
Sissors 24:fb3399713710 3530 else {
Sissors 24:fb3399713710 3531 // No Hardware Backlight pin
Sissors 24:fb3399713710 3532 _bl = NULL; //Construct dummy pin
Sissors 24:fb3399713710 3533 }
wim 30:033048611c01 3534
wim 30:033048611c01 3535 //Sanity check
wim 30:033048611c01 3536 if (_ctrl & LCD_C_SPI4) {
wim 36:9f5f86dfd44a 3537 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 36:9f5f86dfd44a 3538 // ST7070 must set datalength to 8 bits!
wim 30:033048611c01 3539 }
wim 30:033048611c01 3540 else {
wim 30:033048611c01 3541 error("Error: LCD Controller type does not support native SPI4 interface\n\r");
wim 30:033048611c01 3542 }
Sissors 24:fb3399713710 3543 }
Sissors 24:fb3399713710 3544
wim 25:6162b31128c9 3545 TextLCD_SPI_N::~TextLCD_SPI_N() {
Sissors 24:fb3399713710 3546 if (_bl != NULL) {delete _bl;} // BL pin
Sissors 24:fb3399713710 3547 }
Sissors 24:fb3399713710 3548
Sissors 24:fb3399713710 3549 // Not used in this mode
wim 25:6162b31128c9 3550 void TextLCD_SPI_N::_setEnable(bool value) {
Sissors 24:fb3399713710 3551 }
Sissors 24:fb3399713710 3552
Sissors 24:fb3399713710 3553 // Set RS pin
wim 36:9f5f86dfd44a 3554 // Used for mbed pins, I2C bus expander or SPI shiftregister, SPI_N
wim 25:6162b31128c9 3555 void TextLCD_SPI_N::_setRS(bool value) {
Sissors 24:fb3399713710 3556 _rs = value;
Sissors 24:fb3399713710 3557 }
Sissors 24:fb3399713710 3558
Sissors 24:fb3399713710 3559 // Set BL pin
wim 25:6162b31128c9 3560 void TextLCD_SPI_N::_setBL(bool value) {
wim 26:bd897a001012 3561 if (_bl) {
Sissors 24:fb3399713710 3562 _bl->write(value);
wim 26:bd897a001012 3563 }
Sissors 24:fb3399713710 3564 }
Sissors 24:fb3399713710 3565
wim 29:a3663151aa65 3566 // Not used in this mode
wim 29:a3663151aa65 3567 void TextLCD_SPI_N::_setData(int value) {
wim 29:a3663151aa65 3568 }
wim 29:a3663151aa65 3569
Sissors 24:fb3399713710 3570 // Write a byte using SPI
wim 25:6162b31128c9 3571 void TextLCD_SPI_N::_writeByte(int value) {
Sissors 24:fb3399713710 3572 _cs = 0;
Sissors 24:fb3399713710 3573 wait_us(1);
Sissors 24:fb3399713710 3574 _spi->write(value);
Sissors 24:fb3399713710 3575 wait_us(1);
Sissors 24:fb3399713710 3576 _cs = 1;
Sissors 24:fb3399713710 3577 }
wim 34:e5a0dcb43ecc 3578 #endif /* Native SPI bus */
wim 25:6162b31128c9 3579 //-------- End TextLCD_SPI_N ------------
wim 21:9eb628d9e164 3580
wim 21:9eb628d9e164 3581
wim 36:9f5f86dfd44a 3582 //-------- Start TextLCD_SPI_N_3_8 --------
wim 36:9f5f86dfd44a 3583 #if(LCD_SPI_N_3_8 == 1) /* Native SPI bus */
wim 36:9f5f86dfd44a 3584
wim 36:9f5f86dfd44a 3585 /** Create a TextLCD interface using a controller with a native SPI3 8 bits interface
wim 36:9f5f86dfd44a 3586 * This mode is supported by ST7070. Note that implementation in TexTLCD is not very efficient due to
wim 36:9f5f86dfd44a 3587 * structure of the TextLCD library: each databyte is written separately and requires a separate 'count command' set to 1 byte.
wim 36:9f5f86dfd44a 3588 *
wim 36:9f5f86dfd44a 3589 * @param spi SPI Bus
wim 36:9f5f86dfd44a 3590 * @param cs chip select pin (active low)
wim 36:9f5f86dfd44a 3591 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 36:9f5f86dfd44a 3592 * @param bl Backlight control line (optional, default = NC)
wim 36:9f5f86dfd44a 3593 * @param ctrl LCD controller (default = ST7070)
wim 36:9f5f86dfd44a 3594 */
wim 36:9f5f86dfd44a 3595 TextLCD_SPI_N_3_8::TextLCD_SPI_N_3_8(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 36:9f5f86dfd44a 3596 TextLCD_Base(type, ctrl),
wim 36:9f5f86dfd44a 3597 _spi(spi),
wim 36:9f5f86dfd44a 3598 _cs(cs) {
wim 36:9f5f86dfd44a 3599
wim 36:9f5f86dfd44a 3600 // Init CS
wim 36:9f5f86dfd44a 3601 _cs = 1;
wim 36:9f5f86dfd44a 3602
wim 36:9f5f86dfd44a 3603 // Setup the spi for 8 bit data, high steady state clock,
wim 36:9f5f86dfd44a 3604 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3605 // _spi->format(8,3);
wim 37:ce348c002929 3606 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3607 // _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3608
wim 36:9f5f86dfd44a 3609 // Setup the spi for 8 bit data, low steady state clock,
wim 36:9f5f86dfd44a 3610 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3611 _spi->format(8,0);
wim 36:9f5f86dfd44a 3612 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3613 _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3614
wim 36:9f5f86dfd44a 3615
wim 36:9f5f86dfd44a 3616 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 36:9f5f86dfd44a 3617 if (bl != NC) {
wim 36:9f5f86dfd44a 3618 _bl = new DigitalOut(bl); //Construct new pin
wim 36:9f5f86dfd44a 3619 _bl->write(0); //Deactivate
wim 36:9f5f86dfd44a 3620 }
wim 36:9f5f86dfd44a 3621 else {
wim 36:9f5f86dfd44a 3622 // No Hardware Backlight pin
wim 36:9f5f86dfd44a 3623 _bl = NULL; //Construct dummy pin
wim 36:9f5f86dfd44a 3624 }
wim 36:9f5f86dfd44a 3625
wim 36:9f5f86dfd44a 3626 //Sanity check
wim 36:9f5f86dfd44a 3627 if (_ctrl & LCD_C_SPI3_8) {
wim 36:9f5f86dfd44a 3628 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 36:9f5f86dfd44a 3629 }
wim 36:9f5f86dfd44a 3630 else {
wim 36:9f5f86dfd44a 3631 error("Error: LCD Controller type does not support native SPI3 8 bits interface\n\r");
wim 36:9f5f86dfd44a 3632 }
wim 36:9f5f86dfd44a 3633 }
wim 36:9f5f86dfd44a 3634
wim 36:9f5f86dfd44a 3635 TextLCD_SPI_N_3_8::~TextLCD_SPI_N_3_8() {
wim 36:9f5f86dfd44a 3636 if (_bl != NULL) {delete _bl;} // BL pin
wim 36:9f5f86dfd44a 3637 }
wim 36:9f5f86dfd44a 3638
wim 36:9f5f86dfd44a 3639 // Not used in this mode
wim 36:9f5f86dfd44a 3640 void TextLCD_SPI_N_3_8::_setEnable(bool value) {
wim 36:9f5f86dfd44a 3641 }
wim 36:9f5f86dfd44a 3642
wim 36:9f5f86dfd44a 3643 // Used for mbed pins, I2C bus expander or SPI shiftregister, SPI_N
wim 36:9f5f86dfd44a 3644 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 36:9f5f86dfd44a 3645 void TextLCD_SPI_N_3_8::_setRS(bool value) {
wim 36:9f5f86dfd44a 3646
wim 36:9f5f86dfd44a 3647 if (value) {
wim 36:9f5f86dfd44a 3648 _controlbyte = 0x01; // Next byte is data, No more control bytes will follow
wim 36:9f5f86dfd44a 3649 }
wim 36:9f5f86dfd44a 3650 else {
wim 36:9f5f86dfd44a 3651 _controlbyte = 0x00; // Next byte is command, No more control bytes will follow
wim 36:9f5f86dfd44a 3652 }
wim 36:9f5f86dfd44a 3653 }
wim 36:9f5f86dfd44a 3654
wim 36:9f5f86dfd44a 3655 // Set BL pin
wim 36:9f5f86dfd44a 3656 void TextLCD_SPI_N_3_8::_setBL(bool value) {
wim 36:9f5f86dfd44a 3657 if (_bl) {
wim 36:9f5f86dfd44a 3658 _bl->write(value);
wim 36:9f5f86dfd44a 3659 }
wim 36:9f5f86dfd44a 3660 }
wim 36:9f5f86dfd44a 3661
wim 36:9f5f86dfd44a 3662 // Not used in this mode
wim 36:9f5f86dfd44a 3663 void TextLCD_SPI_N_3_8::_setData(int value) {
wim 36:9f5f86dfd44a 3664 }
wim 36:9f5f86dfd44a 3665
wim 36:9f5f86dfd44a 3666 // Write a byte using SPI3 8 bits mode (ST7070)
wim 36:9f5f86dfd44a 3667 void TextLCD_SPI_N_3_8::_writeByte(int value) {
wim 36:9f5f86dfd44a 3668
wim 36:9f5f86dfd44a 3669 if (_controlbyte == 0x00) { // Byte is command
wim 36:9f5f86dfd44a 3670 _cs = 0;
wim 36:9f5f86dfd44a 3671 wait_us(1);
wim 36:9f5f86dfd44a 3672 _spi->write(value);
wim 36:9f5f86dfd44a 3673 wait_us(1);
wim 36:9f5f86dfd44a 3674 _cs = 1;
wim 36:9f5f86dfd44a 3675 }
wim 36:9f5f86dfd44a 3676 else { // Byte is data
wim 36:9f5f86dfd44a 3677 // Select Extended Instr Set
wim 36:9f5f86dfd44a 3678 _cs = 0;
wim 36:9f5f86dfd44a 3679 wait_us(1);
wim 36:9f5f86dfd44a 3680 _spi->write(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1));
wim 36:9f5f86dfd44a 3681 wait_us(1);
wim 36:9f5f86dfd44a 3682 _cs = 1;
wim 36:9f5f86dfd44a 3683
wim 36:9f5f86dfd44a 3684 wait_us(40); // Wait until command has finished...
wim 36:9f5f86dfd44a 3685
wim 36:9f5f86dfd44a 3686 // Set Count to 1 databyte
wim 36:9f5f86dfd44a 3687 _cs = 0;
wim 36:9f5f86dfd44a 3688 wait_us(1);
wim 36:9f5f86dfd44a 3689 _spi->write(0x80); // Set display data length, 1 L6 L5 L4 L3 L2 L1 L0 (Instr Set = 1)
wim 36:9f5f86dfd44a 3690 wait_us(1);
wim 36:9f5f86dfd44a 3691 _cs = 1;
wim 36:9f5f86dfd44a 3692
wim 36:9f5f86dfd44a 3693 wait_us(40);
wim 36:9f5f86dfd44a 3694
wim 36:9f5f86dfd44a 3695 // Write 1 databyte
wim 36:9f5f86dfd44a 3696 _cs = 0;
wim 36:9f5f86dfd44a 3697 wait_us(1);
wim 36:9f5f86dfd44a 3698 _spi->write(value); // Write data (Instr Set = 1)
wim 36:9f5f86dfd44a 3699 wait_us(1);
wim 36:9f5f86dfd44a 3700 _cs = 1;
wim 36:9f5f86dfd44a 3701
wim 36:9f5f86dfd44a 3702 wait_us(40);
wim 36:9f5f86dfd44a 3703
wim 36:9f5f86dfd44a 3704 // Select Standard Instr Set
wim 36:9f5f86dfd44a 3705 _cs = 0;
wim 36:9f5f86dfd44a 3706 wait_us(1);
wim 36:9f5f86dfd44a 3707 _spi->write(0x20 | _function); // Set function, 0 0 1 DL N EXT=0 x x (Select Instr Set = 0));
wim 36:9f5f86dfd44a 3708 wait_us(1);
wim 36:9f5f86dfd44a 3709 _cs = 1;
wim 36:9f5f86dfd44a 3710 }
wim 36:9f5f86dfd44a 3711 }
wim 36:9f5f86dfd44a 3712 #endif /* Native SPI bus */
wim 36:9f5f86dfd44a 3713 //------- End TextLCD_SPI_N_3_8 -----------
wim 36:9f5f86dfd44a 3714
wim 36:9f5f86dfd44a 3715
wim 30:033048611c01 3716 //-------- Start TextLCD_SPI_N_3_9 --------
wim 34:e5a0dcb43ecc 3717 #if(LCD_SPI_N_3_9 == 1) /* Native SPI bus */
wim 34:e5a0dcb43ecc 3718 //Code checked out on logic analyser. Not yet tested on hardware..
wim 30:033048611c01 3719
wim 30:033048611c01 3720 /** Create a TextLCD interface using a controller with a native SPI3 9 bits interface
wim 30:033048611c01 3721 *
wim 30:033048611c01 3722 * @param spi SPI Bus
wim 30:033048611c01 3723 * @param cs chip select pin (active low)
wim 30:033048611c01 3724 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 30:033048611c01 3725 * @param bl Backlight control line (optional, default = NC)
wim 30:033048611c01 3726 * @param ctrl LCD controller (default = AIP31068)
wim 30:033048611c01 3727 */
wim 30:033048611c01 3728 TextLCD_SPI_N_3_9::TextLCD_SPI_N_3_9(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 30:033048611c01 3729 TextLCD_Base(type, ctrl),
wim 30:033048611c01 3730 _spi(spi),
wim 33:900a94bc7585 3731 _cs(cs) {
wim 32:59c4b8f648d4 3732
wim 32:59c4b8f648d4 3733 // Init CS
wim 32:59c4b8f648d4 3734 _cs = 1;
wim 32:59c4b8f648d4 3735
wim 34:e5a0dcb43ecc 3736 // Setup the spi for 9 bit data, high steady state clock,
wim 30:033048611c01 3737 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 32:59c4b8f648d4 3738 _spi->format(9,3);
wim 30:033048611c01 3739 _spi->frequency(1000000);
wim 30:033048611c01 3740
wim 30:033048611c01 3741 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 30:033048611c01 3742 if (bl != NC) {
wim 30:033048611c01 3743 _bl = new DigitalOut(bl); //Construct new pin
wim 30:033048611c01 3744 _bl->write(0); //Deactivate
wim 30:033048611c01 3745 }
wim 30:033048611c01 3746 else {
wim 30:033048611c01 3747 // No Hardware Backlight pin
wim 30:033048611c01 3748 _bl = NULL; //Construct dummy pin
wim 30:033048611c01 3749 }
wim 30:033048611c01 3750
wim 30:033048611c01 3751 //Sanity check
wim 36:9f5f86dfd44a 3752 if (_ctrl & LCD_C_SPI3_9) {
wim 36:9f5f86dfd44a 3753 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 3754 }
wim 30:033048611c01 3755 else {
wim 30:033048611c01 3756 error("Error: LCD Controller type does not support native SPI3 9 bits interface\n\r");
wim 30:033048611c01 3757 }
wim 30:033048611c01 3758 }
wim 30:033048611c01 3759
wim 30:033048611c01 3760 TextLCD_SPI_N_3_9::~TextLCD_SPI_N_3_9() {
wim 30:033048611c01 3761 if (_bl != NULL) {delete _bl;} // BL pin
wim 30:033048611c01 3762 }
wim 30:033048611c01 3763
wim 30:033048611c01 3764 // Not used in this mode
wim 30:033048611c01 3765 void TextLCD_SPI_N_3_9::_setEnable(bool value) {
wim 30:033048611c01 3766 }
wim 30:033048611c01 3767
wim 30:033048611c01 3768 // Set RS pin
wim 30:033048611c01 3769 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 30:033048611c01 3770 void TextLCD_SPI_N_3_9::_setRS(bool value) {
wim 30:033048611c01 3771 // The controlbits define the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3772 // b8 b7...........b0
wim 30:033048611c01 3773 // RS command or data
wim 30:033048611c01 3774 //
wim 30:033048611c01 3775 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3776 //
wim 30:033048611c01 3777
wim 30:033048611c01 3778 if (value) {
wim 30:033048611c01 3779 _controlbyte = 0x01; // Next byte is data
wim 30:033048611c01 3780 }
wim 30:033048611c01 3781 else {
wim 30:033048611c01 3782 _controlbyte = 0x00; // Next byte is command
wim 34:e5a0dcb43ecc 3783 }
wim 30:033048611c01 3784 }
wim 30:033048611c01 3785
wim 30:033048611c01 3786 // Set BL pin
wim 30:033048611c01 3787 void TextLCD_SPI_N_3_9::_setBL(bool value) {
wim 30:033048611c01 3788 if (_bl) {
wim 30:033048611c01 3789 _bl->write(value);
wim 30:033048611c01 3790 }
wim 30:033048611c01 3791 }
wim 30:033048611c01 3792
wim 30:033048611c01 3793 // Not used in this mode
wim 30:033048611c01 3794 void TextLCD_SPI_N_3_9::_setData(int value) {
wim 30:033048611c01 3795 }
wim 30:033048611c01 3796
wim 30:033048611c01 3797 // Write a byte using SPI3 9 bits mode
wim 30:033048611c01 3798 void TextLCD_SPI_N_3_9::_writeByte(int value) {
wim 30:033048611c01 3799 _cs = 0;
wim 30:033048611c01 3800 wait_us(1);
wim 30:033048611c01 3801 _spi->write( (_controlbyte << 8) | (value & 0xFF));
wim 30:033048611c01 3802 wait_us(1);
wim 30:033048611c01 3803 _cs = 1;
wim 30:033048611c01 3804 }
wim 34:e5a0dcb43ecc 3805 #endif /* Native SPI bus */
wim 30:033048611c01 3806 //------- End TextLCD_SPI_N_3_9 -----------
wim 34:e5a0dcb43ecc 3807
wim 34:e5a0dcb43ecc 3808
wim 30:033048611c01 3809 //------- Start TextLCD_SPI_N_3_10 --------
wim 34:e5a0dcb43ecc 3810 #if(LCD_SPI_N_3_10 == 1) /* Native SPI bus */
wim 30:033048611c01 3811
wim 30:033048611c01 3812 /** Create a TextLCD interface using a controller with a native SPI3 10 bits interface
wim 30:033048611c01 3813 *
wim 30:033048611c01 3814 * @param spi SPI Bus
wim 30:033048611c01 3815 * @param cs chip select pin (active low)
wim 30:033048611c01 3816 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 30:033048611c01 3817 * @param bl Backlight control line (optional, default = NC)
wim 30:033048611c01 3818 * @param ctrl LCD controller (default = AIP31068)
wim 30:033048611c01 3819 */
wim 30:033048611c01 3820 TextLCD_SPI_N_3_10::TextLCD_SPI_N_3_10(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 30:033048611c01 3821 TextLCD_Base(type, ctrl),
wim 30:033048611c01 3822 _spi(spi),
wim 30:033048611c01 3823 _cs(cs) {
wim 30:033048611c01 3824
wim 32:59c4b8f648d4 3825 // Init CS
wim 32:59c4b8f648d4 3826 _cs = 1;
wim 32:59c4b8f648d4 3827
wim 30:033048611c01 3828 // Setup the spi for 10 bit data, low steady state clock,
wim 30:033048611c01 3829 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 30:033048611c01 3830 _spi->format(10,0);
wim 30:033048611c01 3831 _spi->frequency(1000000);
wim 30:033048611c01 3832
wim 30:033048611c01 3833 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 30:033048611c01 3834 if (bl != NC) {
wim 30:033048611c01 3835 _bl = new DigitalOut(bl); //Construct new pin
wim 30:033048611c01 3836 _bl->write(0); //Deactivate
wim 30:033048611c01 3837 }
wim 30:033048611c01 3838 else {
wim 30:033048611c01 3839 // No Hardware Backlight pin
wim 30:033048611c01 3840 _bl = NULL; //Construct dummy pin
wim 30:033048611c01 3841 }
wim 30:033048611c01 3842
wim 30:033048611c01 3843 //Sanity check
wim 30:033048611c01 3844 if (_ctrl & LCD_C_SPI3_10) {
wim 36:9f5f86dfd44a 3845 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 3846 }
wim 30:033048611c01 3847 else {
wim 30:033048611c01 3848 error("Error: LCD Controller type does not support native SPI3 10 bits interface\n\r");
wim 30:033048611c01 3849 }
wim 30:033048611c01 3850 }
wim 30:033048611c01 3851
wim 30:033048611c01 3852 TextLCD_SPI_N_3_10::~TextLCD_SPI_N_3_10() {
wim 30:033048611c01 3853 if (_bl != NULL) {delete _bl;} // BL pin
wim 30:033048611c01 3854 }
wim 30:033048611c01 3855
wim 30:033048611c01 3856 // Not used in this mode
wim 30:033048611c01 3857 void TextLCD_SPI_N_3_10::_setEnable(bool value) {
wim 30:033048611c01 3858 }
wim 30:033048611c01 3859
wim 30:033048611c01 3860 // Set RS pin
wim 30:033048611c01 3861 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 30:033048611c01 3862 void TextLCD_SPI_N_3_10::_setRS(bool value) {
wim 30:033048611c01 3863 // The controlbits define the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3864 // b9 b8 b7...........b0
wim 30:033048611c01 3865 // RS RW command or data
wim 30:033048611c01 3866 //
wim 30:033048611c01 3867 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3868 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 30:033048611c01 3869 //
wim 30:033048611c01 3870
wim 30:033048611c01 3871 if (value) {
wim 30:033048611c01 3872 _controlbyte = 0x02; // Next byte is data
wim 30:033048611c01 3873 }
wim 30:033048611c01 3874 else {
wim 30:033048611c01 3875 _controlbyte = 0x00; // Next byte is command
wim 34:e5a0dcb43ecc 3876 }
wim 30:033048611c01 3877 }
wim 30:033048611c01 3878
wim 30:033048611c01 3879 // Set BL pin
wim 30:033048611c01 3880 void TextLCD_SPI_N_3_10::_setBL(bool value) {
wim 30:033048611c01 3881 if (_bl) {
wim 30:033048611c01 3882 _bl->write(value);
wim 30:033048611c01 3883 }
wim 30:033048611c01 3884 }
wim 30:033048611c01 3885
wim 30:033048611c01 3886 // Not used in this mode
wim 30:033048611c01 3887 void TextLCD_SPI_N_3_10::_setData(int value) {
wim 30:033048611c01 3888 }
wim 30:033048611c01 3889
wim 30:033048611c01 3890 // Write a byte using SPI3 10 bits mode
wim 30:033048611c01 3891 void TextLCD_SPI_N_3_10::_writeByte(int value) {
wim 30:033048611c01 3892 _cs = 0;
wim 30:033048611c01 3893 wait_us(1);
wim 30:033048611c01 3894 _spi->write( (_controlbyte << 8) | (value & 0xFF));
wim 30:033048611c01 3895 wait_us(1);
wim 30:033048611c01 3896 _cs = 1;
wim 30:033048611c01 3897 }
wim 34:e5a0dcb43ecc 3898 #endif /* Native SPI bus */
wim 30:033048611c01 3899 //------- End TextLCD_SPI_N_3_10 ----------
wim 34:e5a0dcb43ecc 3900
wim 32:59c4b8f648d4 3901
wim 32:59c4b8f648d4 3902 //------- Start TextLCD_SPI_N_3_16 --------
wim 34:e5a0dcb43ecc 3903 #if(LCD_SPI_N_3_16 == 1) /* Native SPI bus */
wim 32:59c4b8f648d4 3904
wim 32:59c4b8f648d4 3905 /** Create a TextLCD interface using a controller with a native SPI3 16 bits interface
wim 32:59c4b8f648d4 3906 *
wim 32:59c4b8f648d4 3907 * @param spi SPI Bus
wim 32:59c4b8f648d4 3908 * @param cs chip select pin (active low)
wim 32:59c4b8f648d4 3909 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 32:59c4b8f648d4 3910 * @param bl Backlight control line (optional, default = NC)
wim 32:59c4b8f648d4 3911 * @param ctrl LCD controller (default = PT6314)
wim 32:59c4b8f648d4 3912 */
wim 32:59c4b8f648d4 3913 TextLCD_SPI_N_3_16::TextLCD_SPI_N_3_16(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 32:59c4b8f648d4 3914 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 3915 _spi(spi),
wim 32:59c4b8f648d4 3916 _cs(cs) {
wim 32:59c4b8f648d4 3917
wim 32:59c4b8f648d4 3918 // Init CS
wim 32:59c4b8f648d4 3919 _cs = 1;
wim 32:59c4b8f648d4 3920
wim 32:59c4b8f648d4 3921 // Setup the spi for 8 bit data, low steady state clock,
wim 32:59c4b8f648d4 3922 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 32:59c4b8f648d4 3923 _spi->format(8,0);
wim 32:59c4b8f648d4 3924 _spi->frequency(1000000);
wim 32:59c4b8f648d4 3925
wim 32:59c4b8f648d4 3926 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 32:59c4b8f648d4 3927 if (bl != NC) {
wim 32:59c4b8f648d4 3928 _bl = new DigitalOut(bl); //Construct new pin
wim 32:59c4b8f648d4 3929 _bl->write(0); //Deactivate
wim 32:59c4b8f648d4 3930 }
wim 32:59c4b8f648d4 3931 else {
wim 32:59c4b8f648d4 3932 // No Hardware Backlight pin
wim 32:59c4b8f648d4 3933 _bl = NULL; //Construct dummy pin
wim 32:59c4b8f648d4 3934 }
wim 32:59c4b8f648d4 3935
wim 32:59c4b8f648d4 3936 //Sanity check
wim 32:59c4b8f648d4 3937 if (_ctrl & LCD_C_SPI3_16) {
wim 36:9f5f86dfd44a 3938 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 32:59c4b8f648d4 3939 }
wim 32:59c4b8f648d4 3940 else {
wim 32:59c4b8f648d4 3941 error("Error: LCD Controller type does not support native SPI3 16 bits interface\n\r");
wim 32:59c4b8f648d4 3942 }
wim 32:59c4b8f648d4 3943 }
wim 32:59c4b8f648d4 3944
wim 32:59c4b8f648d4 3945 TextLCD_SPI_N_3_16::~TextLCD_SPI_N_3_16() {
wim 32:59c4b8f648d4 3946 if (_bl != NULL) {delete _bl;} // BL pin
wim 32:59c4b8f648d4 3947 }
wim 32:59c4b8f648d4 3948
wim 32:59c4b8f648d4 3949 // Not used in this mode
wim 32:59c4b8f648d4 3950 void TextLCD_SPI_N_3_16::_setEnable(bool value) {
wim 32:59c4b8f648d4 3951 }
wim 32:59c4b8f648d4 3952
wim 32:59c4b8f648d4 3953 // Set RS pin
wim 32:59c4b8f648d4 3954 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 32:59c4b8f648d4 3955 void TextLCD_SPI_N_3_16::_setRS(bool value) {
wim 32:59c4b8f648d4 3956 // The 16bit mode is split in 2 bytes. The first byte is for synchronisation and controlbits. The controlbits define the meaning of the next byte.
wim 32:59c4b8f648d4 3957 // The 8 actual bits represent either a data or a command byte.
wim 32:59c4b8f648d4 3958 // b15 b14 b13 b12 b11 b10 b9 b8 - b7 b6 b5 b4 b3 b2 b1 b0
wim 32:59c4b8f648d4 3959 // 1 1 1 1 1 RW RS 0 d7 d6 d5 d4 d3 d2 d1 d0
wim 32:59c4b8f648d4 3960 //
wim 32:59c4b8f648d4 3961 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 32:59c4b8f648d4 3962 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 32:59c4b8f648d4 3963 //
wim 32:59c4b8f648d4 3964
wim 32:59c4b8f648d4 3965 if (value) {
wim 32:59c4b8f648d4 3966 _controlbyte = 0xFA; // Next byte is data
wim 32:59c4b8f648d4 3967 }
wim 32:59c4b8f648d4 3968 else {
wim 32:59c4b8f648d4 3969 _controlbyte = 0xF8; // Next byte is command
wim 32:59c4b8f648d4 3970 }
wim 32:59c4b8f648d4 3971 }
wim 32:59c4b8f648d4 3972
wim 32:59c4b8f648d4 3973 // Set BL pin
wim 32:59c4b8f648d4 3974 void TextLCD_SPI_N_3_16::_setBL(bool value) {
wim 32:59c4b8f648d4 3975 if (_bl) {
wim 32:59c4b8f648d4 3976 _bl->write(value);
wim 32:59c4b8f648d4 3977 }
wim 32:59c4b8f648d4 3978 }
wim 32:59c4b8f648d4 3979
wim 32:59c4b8f648d4 3980 // Not used in this mode
wim 32:59c4b8f648d4 3981 void TextLCD_SPI_N_3_16::_setData(int value) {
wim 32:59c4b8f648d4 3982 }
wim 34:e5a0dcb43ecc 3983
wim 32:59c4b8f648d4 3984 // Write a byte using SPI3 16 bits mode
wim 32:59c4b8f648d4 3985 void TextLCD_SPI_N_3_16::_writeByte(int value) {
wim 32:59c4b8f648d4 3986 _cs = 0;
wim 32:59c4b8f648d4 3987 wait_us(1);
wim 32:59c4b8f648d4 3988
wim 32:59c4b8f648d4 3989 _spi->write(_controlbyte);
wim 32:59c4b8f648d4 3990
wim 32:59c4b8f648d4 3991 _spi->write(value);
wim 32:59c4b8f648d4 3992
wim 32:59c4b8f648d4 3993 wait_us(1);
wim 32:59c4b8f648d4 3994 _cs = 1;
wim 32:59c4b8f648d4 3995 }
wim 34:e5a0dcb43ecc 3996 #endif /* Native SPI bus */
wim 32:59c4b8f648d4 3997 //------- End TextLCD_SPI_N_3_16 ----------
wim 34:e5a0dcb43ecc 3998
wim 34:e5a0dcb43ecc 3999
wim 32:59c4b8f648d4 4000 //------- Start TextLCD_SPI_N_3_24 --------
wim 34:e5a0dcb43ecc 4001 #if(LCD_SPI_N_3_24 == 1) /* Native SPI bus */
wim 32:59c4b8f648d4 4002
wim 32:59c4b8f648d4 4003 /** Create a TextLCD interface using a controller with a native SPI3 24 bits interface
wim 32:59c4b8f648d4 4004 *
wim 32:59c4b8f648d4 4005 * @param spi SPI Bus
wim 32:59c4b8f648d4 4006 * @param cs chip select pin (active low)
wim 32:59c4b8f648d4 4007 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 32:59c4b8f648d4 4008 * @param bl Backlight control line (optional, default = NC)
wim 32:59c4b8f648d4 4009 * @param ctrl LCD controller (default = SSD1803)
wim 32:59c4b8f648d4 4010 */
wim 32:59c4b8f648d4 4011 TextLCD_SPI_N_3_24::TextLCD_SPI_N_3_24(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 32:59c4b8f648d4 4012 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 4013 _spi(spi),
wim 32:59c4b8f648d4 4014 _cs(cs) {
wim 32:59c4b8f648d4 4015
wim 32:59c4b8f648d4 4016 // Init CS
wim 32:59c4b8f648d4 4017 _cs = 1;
wim 32:59c4b8f648d4 4018
wim 34:e5a0dcb43ecc 4019 // Setup the spi for 8 bit data, high steady state clock,
wim 32:59c4b8f648d4 4020 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 34:e5a0dcb43ecc 4021 _spi->format(8,3);
wim 32:59c4b8f648d4 4022 _spi->frequency(1000000);
wim 32:59c4b8f648d4 4023
wim 32:59c4b8f648d4 4024 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 32:59c4b8f648d4 4025 if (bl != NC) {
wim 32:59c4b8f648d4 4026 _bl = new DigitalOut(bl); //Construct new pin
wim 32:59c4b8f648d4 4027 _bl->write(0); //Deactivate
wim 32:59c4b8f648d4 4028 }
wim 32:59c4b8f648d4 4029 else {
wim 32:59c4b8f648d4 4030 // No Hardware Backlight pin
wim 32:59c4b8f648d4 4031 _bl = NULL; //Construct dummy pin
wim 32:59c4b8f648d4 4032 }
wim 32:59c4b8f648d4 4033
wim 32:59c4b8f648d4 4034 //Sanity check
wim 32:59c4b8f648d4 4035 if (_ctrl & LCD_C_SPI3_24) {
wim 36:9f5f86dfd44a 4036 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 32:59c4b8f648d4 4037 }
wim 32:59c4b8f648d4 4038 else {
wim 32:59c4b8f648d4 4039 error("Error: LCD Controller type does not support native SPI3 24 bits interface\n\r");
wim 32:59c4b8f648d4 4040 }
wim 32:59c4b8f648d4 4041 }
wim 32:59c4b8f648d4 4042
wim 32:59c4b8f648d4 4043 TextLCD_SPI_N_3_24::~TextLCD_SPI_N_3_24() {
wim 32:59c4b8f648d4 4044 if (_bl != NULL) {delete _bl;} // BL pin
wim 32:59c4b8f648d4 4045 }
wim 32:59c4b8f648d4 4046
wim 32:59c4b8f648d4 4047 // Not used in this mode
wim 32:59c4b8f648d4 4048 void TextLCD_SPI_N_3_24::_setEnable(bool value) {
wim 32:59c4b8f648d4 4049 }
wim 32:59c4b8f648d4 4050
wim 32:59c4b8f648d4 4051 // Set RS pin
wim 32:59c4b8f648d4 4052 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 32:59c4b8f648d4 4053 void TextLCD_SPI_N_3_24::_setRS(bool value) {
wim 32:59c4b8f648d4 4054 // The 24bit mode is split in 3 bytes. The first byte is for synchronisation and controlbits. The controlbits define the meaning of the next two bytes.
wim 32:59c4b8f648d4 4055 // Each byte encodes 4 actual bits. The 8 actual bits represent either a data or a command byte.
wim 32:59c4b8f648d4 4056 // b23 b22 b21 b20 b19 b18 b17 b16 - b15 b14 b13 b12 b11 b10 b9 b8 - b7 b6 b5 b4 b3 b2 b1 b0
wim 32:59c4b8f648d4 4057 // 1 1 1 1 1 RW RS 0 d0 d1 d2 d3 0 0 0 0 d4 d5 d6 d7 0 0 0 0
wim 32:59c4b8f648d4 4058 //
wim 32:59c4b8f648d4 4059 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 32:59c4b8f648d4 4060 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 32:59c4b8f648d4 4061 //
wim 32:59c4b8f648d4 4062 // Note: SPI3_24 expects LSB first. This is inconsistent with regular SPI convention (and hardware) that sends MSB first.
wim 32:59c4b8f648d4 4063
wim 32:59c4b8f648d4 4064 if (value) {
wim 32:59c4b8f648d4 4065 _controlbyte = 0xFA; // Next byte is data
wim 32:59c4b8f648d4 4066 }
wim 32:59c4b8f648d4 4067 else {
wim 32:59c4b8f648d4 4068 _controlbyte = 0xF8; // Next byte is command
wim 34:e5a0dcb43ecc 4069 }
wim 32:59c4b8f648d4 4070 }
wim 32:59c4b8f648d4 4071
wim 32:59c4b8f648d4 4072 // Set BL pin
wim 32:59c4b8f648d4 4073 void TextLCD_SPI_N_3_24::_setBL(bool value) {
wim 32:59c4b8f648d4 4074 if (_bl) {
wim 32:59c4b8f648d4 4075 _bl->write(value);
wim 32:59c4b8f648d4 4076 }
wim 32:59c4b8f648d4 4077 }
wim 32:59c4b8f648d4 4078
wim 32:59c4b8f648d4 4079 // Not used in this mode
wim 32:59c4b8f648d4 4080 void TextLCD_SPI_N_3_24::_setData(int value) {
wim 32:59c4b8f648d4 4081 }
wim 32:59c4b8f648d4 4082
wim 32:59c4b8f648d4 4083 //Mapping table to flip the bits around cause SPI3_24 expects LSB first.
wim 32:59c4b8f648d4 4084 const uint8_t map3_24[16] = {0x00, 0x80, 0x40, 0xC0, 0x20, 0xA0, 0x60, 0xE0, 0x10, 0x90, 0x50, 0xD0, 0x30, 0xB0, 0x70, 0xF0};
wim 32:59c4b8f648d4 4085
wim 32:59c4b8f648d4 4086 // Write a byte using SPI3 24 bits mode
wim 32:59c4b8f648d4 4087 void TextLCD_SPI_N_3_24::_writeByte(int value) {
wim 32:59c4b8f648d4 4088 _cs = 0;
wim 32:59c4b8f648d4 4089 wait_us(1);
wim 32:59c4b8f648d4 4090 _spi->write(_controlbyte);
wim 32:59c4b8f648d4 4091
wim 32:59c4b8f648d4 4092 //Map and send the LSB nibble
wim 32:59c4b8f648d4 4093 _spi->write( map3_24[value & 0x0F]);
wim 32:59c4b8f648d4 4094
wim 32:59c4b8f648d4 4095 //Map and send the MSB nibble
wim 32:59c4b8f648d4 4096 _spi->write( map3_24[(value >> 4) & 0x0F]);
wim 32:59c4b8f648d4 4097
wim 32:59c4b8f648d4 4098 wait_us(1);
wim 32:59c4b8f648d4 4099 _cs = 1;
wim 32:59c4b8f648d4 4100 }
wim 34:e5a0dcb43ecc 4101 #endif /* Native SPI bus */
wim 32:59c4b8f648d4 4102 //------- End TextLCD_SPI_N_3_24 ----------