ADXL362.cpp

00001 #include "mbed.h"
00002 #include "ADXL362.h"
00003  
00004 // Class
00005  
00006 ADXL362::ADXL362(PinName mosi, PinName miso, PinName sclk, PinName cbs)
00007     : SPI_m(mosi, miso, sclk) 
00008     , CBS_m(cbs) {
00009     CBS_m=1;
00010     }
00011     
00012 // SPI 
00013 
00014 void ADXL362::init_spi(){
00015     // spi 8 bits, mode 0, 1 MHz for adxl362
00016     SPI_m.format(8,0);
00017     // 5 MHz, max for acc - works fine
00018     SPI_m.frequency(5000000);
00019 }
00020 
00021 
00022 
00023 void ADXL362::init_adxl362(){
00024     //uint8_t reg;
00025     // reset the adxl362
00026     wait_ms(200);
00027     ACC_WriteReg(RESET, 0x52);
00028     wait_ms(200);
00029 
00030     // set FIFO
00031     ACC_WriteReg(FIFO_CTL,0x0A);  // stream mode, AH bit
00032     //ACC_WriteReg(FIFO_CTL,0x02);  // stream mode, no AH bit
00033     //reg = ACC_ReadReg(FIFO_CTL);
00034     //pc.printf("FIFO_CTL = 0x%X\r\n", reg);
00035 
00036     // Not used but keep in case it is important to set FIFO parameters.
00037     //ACC_WriteReg(FIFO_SAM,SAMPLE_SET * 3);   // fifo depth
00038     //reg = ACC_ReadReg(FIFO_SAM);
00039     //pc.printf("FIFO_SAM = 0x%X\r\n", reg);
00040 
00041     // set adxl362 to 4g range, 25Hz
00042     //ACC_WriteReg(FILTER_CTL,0x51);
00043     // 2g, 25Hz
00044     ACC_WriteReg(FILTER_CTL,0x11);
00045     //reg = ACC_ReadReg(FILTER_CTL);
00046     //printf("FILTER_CTL = 0x%X\r\n", reg);
00047 
00048     // map adxl362 interrupts
00049     //ACC_WriteReg(INTMAP1,0x01); //data ready
00050     ACC_WriteReg(INTMAP1,0x04); //watermark
00051     //reg = ACC_ReadReg(INTMAP1);
00052     //pc.printf("INTMAP1 = 0x%X\r\n", reg);
00053 
00054     // set adxl362 to measurement mode, ultralow noise
00055     ACC_WriteReg(POWER_CTL,0x22);
00056     //reg = ACC_ReadReg(POWER_CTL);
00057     //pc.printf("POWER_CTL = 0x%X\r\n", reg);
00058 }
00059 
00060 void ADXL362::ACC_GetXYZ8(int8_t* x, int8_t* y, int8_t* z)
00061 {
00062     CBS_m = DOWN;
00063     SPI_m.write(RD_SPI);
00064     SPI_m.write(0x08);
00065 
00066     *x = SPI_m.write(0x00);
00067     *y = SPI_m.write(0x00);
00068     *z = SPI_m.write(0x00);
00069 
00070     CBS_m = UP;
00071 }
00072 
00073 
00074 uint8_t ADXL362::ACC_ReadReg( uint8_t reg )
00075 {
00076     CBS_m = DOWN;
00077     SPI_m.write(RD_SPI);
00078     SPI_m.write(reg);
00079     uint8_t val = SPI_m.write(0x00);
00080     CBS_m = UP;
00081     return (val);
00082 }
00083 
00084 void ADXL362::ACC_WriteReg( uint8_t reg, uint8_t cmd )
00085 {
00086     CBS_m = DOWN;
00087     SPI_m.write(WR_SPI);
00088     SPI_m.write(reg);
00089     SPI_m.write(cmd);
00090     CBS_m = UP;
00091 }