STM32F103C8_Barrido_Display Barrido de un Display de Ánodo Común

Dependencies:   mbed

Revision:
0:9f7581d1af6f
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/SysClockConf.cpp	Wed Jun 26 18:54:11 2019 +0000
@@ -0,0 +1,56 @@
+/*
+  ******************************************************************************
+  * @file    SysClockConf.c
+  * @version 
+  * @date    05-July-2016
+  * @brief   System Clock configuration for STM32F103C8T6
+  *****************************************************************************
+  *
+  * All rights reserved.
+
+ This program is free software: you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation, either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program.  If not, see <http://www.gnu.org/licenses/>.
+  */
+
+#include "SysClockConf.h"
+#include "mbed.h"
+
+void HSE_SystemClock_Config(void) {
+    RCC_OscInitTypeDef        RCC_OscInitStruct;
+    RCC_ClkInitTypeDef        RCC_ClkInitStruct;
+    RCC_PeriphCLKInitTypeDef  PeriphClkInit;
+
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+    RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+    RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
+    HAL_RCC_OscConfig(&RCC_OscInitStruct);
+    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+    HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB;
+    PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
+    PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
+    HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
+}
+
+void confSysClock(void) {
+    HAL_RCC_DeInit();
+    HSE_SystemClock_Config();
+    SystemCoreClockUpdate();
+}
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