spi_api.h

00001 
00002 /** \addtogroup hal */
00003 /** @{*/
00004 /* mbed Microcontroller Library
00005  * Copyright (c) 2006-2013 ARM Limited
00006  *
00007  * Licensed under the Apache License, Version 2.0 (the "License");
00008  * you may not use this file except in compliance with the License.
00009  * You may obtain a copy of the License at
00010  *
00011  *     http://www.apache.org/licenses/LICENSE-2.0
00012  *
00013  * Unless required by applicable law or agreed to in writing, software
00014  * distributed under the License is distributed on an "AS IS" BASIS,
00015  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00016  * See the License for the specific language governing permissions and
00017  * limitations under the License.
00018  */
00019 #ifndef MBED_SPI_API_H
00020 #define MBED_SPI_API_H
00021 
00022 #include "device.h"
00023 #include "hal/dma_api.h"
00024 #include "hal/buffer.h"
00025 
00026 #if DEVICE_SPI
00027 
00028 #define SPI_EVENT_ERROR       (1 << 1)
00029 #define SPI_EVENT_COMPLETE    (1 << 2)
00030 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
00031 #define SPI_EVENT_ALL         (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
00032 
00033 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
00034 
00035 #define SPI_FILL_WORD         (0xFFFF)
00036 #define SPI_FILL_CHAR         (0xFF)
00037 
00038 #if DEVICE_SPI_ASYNCH
00039 /** Asynch SPI HAL structure
00040  */
00041 typedef struct {
00042     struct spi_s spi;        /**< Target specific SPI structure */
00043     struct buffer_s tx_buff; /**< Tx buffer */
00044     struct buffer_s rx_buff; /**< Rx buffer */
00045 } spi_t;
00046 
00047 #else
00048 /** Non-asynch SPI HAL structure
00049  */
00050 typedef struct spi_s spi_t;
00051 
00052 #endif
00053 
00054 #ifdef __cplusplus
00055 extern "C" {
00056 #endif
00057 
00058 /**
00059  * \defgroup hal_GeneralSPI SPI Configuration Functions
00060  * @{
00061  */
00062 
00063 /** Initialize the SPI peripheral
00064  *
00065  * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
00066  * @param[out] obj  The SPI object to initialize
00067  * @param[in]  mosi The pin to use for MOSI
00068  * @param[in]  miso The pin to use for MISO
00069  * @param[in]  sclk The pin to use for SCLK
00070  * @param[in]  ssel The pin to use for SSEL
00071  */
00072 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
00073 
00074 /** Release a SPI object
00075  *
00076  * TODO: spi_free is currently unimplemented
00077  * This will require reference counting at the C++ level to be safe
00078  *
00079  * Return the pins owned by the SPI object to their reset state
00080  * Disable the SPI peripheral
00081  * Disable the SPI clock
00082  * @param[in] obj The SPI object to deinitialize
00083  */
00084 void spi_free(spi_t *obj);
00085 
00086 /** Configure the SPI format
00087  *
00088  * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
00089  * The default bit order is MSB.
00090  * @param[in,out] obj   The SPI object to configure
00091  * @param[in]     bits  The number of bits per frame
00092  * @param[in]     mode  The SPI mode (clock polarity, phase, and shift direction)
00093  * @param[in]     slave Zero for master mode or non-zero for slave mode
00094  */
00095 void spi_format(spi_t *obj, int bits, int mode, int slave);
00096 
00097 /** Set the SPI baud rate
00098  *
00099  * Actual frequency may differ from the desired frequency due to available dividers and bus clock
00100  * Configures the SPI peripheral's baud rate
00101  * @param[in,out] obj The SPI object to configure
00102  * @param[in]     hz  The baud rate in Hz
00103  */
00104 void spi_frequency(spi_t *obj, int hz);
00105 
00106 /**@}*/
00107 /**
00108  * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
00109  * @{
00110  */
00111 
00112 /** Write a byte out in master mode and receive a value
00113  *
00114  * @param[in] obj   The SPI peripheral to use for sending
00115  * @param[in] value The value to send
00116  * @return Returns the value received during send
00117  */
00118 int  spi_master_write(spi_t *obj, int value);
00119 
00120 /** Write a block out in master mode and receive a value
00121  *
00122  *  The total number of bytes sent and received will be the maximum of
00123  *  tx_length and rx_length. The bytes written will be padded with the
00124  *  value 0xff.
00125  *
00126  * @param[in] obj        The SPI peripheral to use for sending
00127  * @param[in] tx_buffer  Pointer to the byte-array of data to write to the device
00128  * @param[in] tx_length  Number of bytes to write, may be zero
00129  * @param[in] rx_buffer  Pointer to the byte-array of data to read from the device
00130  * @param[in] rx_length  Number of bytes to read, may be zero
00131  * @param[in] write_fill Default data transmitted while performing a read
00132  * @returns
00133  *      The number of bytes written and read from the device. This is
00134  *      maximum of tx_length and rx_length.
00135  */
00136 int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length, char write_fill);
00137 
00138 /** Check if a value is available to read
00139  *
00140  * @param[in] obj The SPI peripheral to check
00141  * @return non-zero if a value is available
00142  */
00143 int  spi_slave_receive(spi_t *obj);
00144 
00145 /** Get a received value out of the SPI receive buffer in slave mode
00146  *
00147  * Blocks until a value is available
00148  * @param[in] obj The SPI peripheral to read
00149  * @return The value received
00150  */
00151 int  spi_slave_read(spi_t *obj);
00152 
00153 /** Write a value to the SPI peripheral in slave mode
00154  *
00155  * Blocks until the SPI peripheral can be written to
00156  * @param[in] obj   The SPI peripheral to write
00157  * @param[in] value The value to write
00158  */
00159 void spi_slave_write(spi_t *obj, int value);
00160 
00161 /** Checks if the specified SPI peripheral is in use
00162  *
00163  * @param[in] obj The SPI peripheral to check
00164  * @return non-zero if the peripheral is currently transmitting
00165  */
00166 int  spi_busy(spi_t *obj);
00167 
00168 /** Get the module number
00169  *
00170  * @param[in] obj The SPI peripheral to check
00171  * @return The module number
00172  */
00173 uint8_t spi_get_module(spi_t *obj);
00174 
00175 /**@}*/
00176 
00177 #if DEVICE_SPI_ASYNCH
00178 /**
00179  * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
00180  * @{
00181  */
00182 
00183 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
00184  *
00185  * @param[in] obj       The SPI object that holds the transfer information
00186  * @param[in] tx        The transmit buffer
00187  * @param[in] tx_length The number of bytes to transmit
00188  * @param[in] rx        The receive buffer
00189  * @param[in] rx_length The number of bytes to receive
00190  * @param[in] bit_width The bit width of buffer words
00191  * @param[in] event     The logical OR of events to be registered
00192  * @param[in] handler   SPI interrupt handler
00193  * @param[in] hint      A suggestion for how to use DMA with this transfer
00194  */
00195 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
00196 
00197 /** The asynchronous IRQ handler
00198  *
00199  * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
00200  * conditions, such as buffer overflows or transfer complete.
00201  * @param[in] obj     The SPI object that holds the transfer information
00202  * @return Event flags if a transfer termination condition was met; otherwise 0.
00203  */
00204 uint32_t spi_irq_handler_asynch(spi_t *obj);
00205 
00206 /** Attempts to determine if the SPI peripheral is already in use
00207  *
00208  * If a temporary DMA channel has been allocated, peripheral is in use.
00209  * If a permanent DMA channel has been allocated, check if the DMA channel is in use.  If not, proceed as though no DMA
00210  * channel were allocated.
00211  * If no DMA channel is allocated, check whether tx and rx buffers have been assigned.  For each assigned buffer, check
00212  * if the corresponding buffer position is less than the buffer length.  If buffers do not indicate activity, check if
00213  * there are any bytes in the FIFOs.
00214  * @param[in] obj The SPI object to check for activity
00215  * @return Non-zero if the SPI port is active or zero if it is not.
00216  */
00217 uint8_t spi_active(spi_t *obj);
00218 
00219 /** Abort an SPI transfer
00220  *
00221  * @param obj The SPI peripheral to stop
00222  */
00223 void spi_abort_asynch(spi_t *obj);
00224 
00225 
00226 #endif
00227 
00228 /**@}*/
00229 
00230 #ifdef __cplusplus
00231 }
00232 #endif // __cplusplus
00233 
00234 #endif // SPI_DEVICE
00235 
00236 #endif // MBED_SPI_API_H
00237 
00238 /** @}*/