arm_cmplx_dot_prod_q31.c

00001 /* ----------------------------------------------------------------------    
00002 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
00003 *    
00004 * $Date:        19. March 2015
00005 * $Revision:    V.1.4.5
00006 *    
00007 * Project:      CMSIS DSP Library    
00008 * Title:        arm_cmplx_dot_prod_q31.c    
00009 *    
00010 * Description:  Q31 complex dot product    
00011 *    
00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
00013 *  
00014 * Redistribution and use in source and binary forms, with or without 
00015 * modification, are permitted provided that the following conditions
00016 * are met:
00017 *   - Redistributions of source code must retain the above copyright
00018 *     notice, this list of conditions and the following disclaimer.
00019 *   - Redistributions in binary form must reproduce the above copyright
00020 *     notice, this list of conditions and the following disclaimer in
00021 *     the documentation and/or other materials provided with the 
00022 *     distribution.
00023 *   - Neither the name of ARM LIMITED nor the names of its contributors
00024 *     may be used to endorse or promote products derived from this
00025 *     software without specific prior written permission.
00026 *
00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00038 * POSSIBILITY OF SUCH DAMAGE.   
00039 * -------------------------------------------------------------------- */
00040 
00041 #include "arm_math.h"
00042 
00043 /**    
00044  * @ingroup groupCmplxMath    
00045  */
00046 
00047 /**    
00048  * @addtogroup cmplx_dot_prod    
00049  * @{    
00050  */
00051 
00052 /**    
00053  * @brief  Q31 complex dot product    
00054  * @param  *pSrcA points to the first input vector    
00055  * @param  *pSrcB points to the second input vector    
00056  * @param  numSamples number of complex samples in each vector    
00057  * @param  *realResult real part of the result returned here    
00058  * @param  *imagResult imaginary part of the result returned here    
00059  * @return none.    
00060  *    
00061  * <b>Scaling and Overflow Behavior:</b>    
00062  * \par    
00063  * The function is implemented using an internal 64-bit accumulator.    
00064  * The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format.    
00065  * The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits.    
00066  * Additions are nonsaturating and no overflow will occur as long as <code>numSamples</code> is less than 32768.    
00067  * The return results <code>realResult</code> and <code>imagResult</code> are in 16.48 format.    
00068  * Input down scaling is not required.    
00069  */
00070 
00071 void arm_cmplx_dot_prod_q31(
00072   q31_t * pSrcA,
00073   q31_t * pSrcB,
00074   uint32_t numSamples,
00075   q63_t * realResult,
00076   q63_t * imagResult)
00077 {
00078   q63_t real_sum = 0, imag_sum = 0;              /* Temporary result storage */
00079   q31_t a0,b0,c0,d0;
00080 
00081 #ifndef ARM_MATH_CM0_FAMILY
00082 
00083   /* Run the below code for Cortex-M4 and Cortex-M3 */
00084   uint32_t blkCnt;                               /* loop counter */
00085 
00086 
00087   /*loop Unrolling */
00088   blkCnt = numSamples >> 2u;
00089 
00090   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
00091    ** a second loop below computes the remaining 1 to 3 samples. */
00092   while(blkCnt > 0u)
00093   {
00094       a0 = *pSrcA++;
00095       b0 = *pSrcA++;
00096       c0 = *pSrcB++;
00097       d0 = *pSrcB++;  
00098   
00099       real_sum += ((q63_t)a0 * c0) >> 14;
00100       imag_sum += ((q63_t)a0 * d0) >> 14;
00101       real_sum -= ((q63_t)b0 * d0) >> 14;
00102       imag_sum += ((q63_t)b0 * c0) >> 14;
00103       
00104       a0 = *pSrcA++;
00105       b0 = *pSrcA++;
00106       c0 = *pSrcB++;
00107       d0 = *pSrcB++;  
00108   
00109       real_sum += ((q63_t)a0 * c0) >> 14;
00110       imag_sum += ((q63_t)a0 * d0) >> 14;
00111       real_sum -= ((q63_t)b0 * d0) >> 14;
00112       imag_sum += ((q63_t)b0 * c0) >> 14;
00113       
00114       a0 = *pSrcA++;
00115       b0 = *pSrcA++;
00116       c0 = *pSrcB++;
00117       d0 = *pSrcB++;  
00118   
00119       real_sum += ((q63_t)a0 * c0) >> 14;
00120       imag_sum += ((q63_t)a0 * d0) >> 14;
00121       real_sum -= ((q63_t)b0 * d0) >> 14;
00122       imag_sum += ((q63_t)b0 * c0) >> 14;
00123       
00124       a0 = *pSrcA++;
00125       b0 = *pSrcA++;
00126       c0 = *pSrcB++;
00127       d0 = *pSrcB++;  
00128   
00129       real_sum += ((q63_t)a0 * c0) >> 14;
00130       imag_sum += ((q63_t)a0 * d0) >> 14;
00131       real_sum -= ((q63_t)b0 * d0) >> 14;
00132       imag_sum += ((q63_t)b0 * c0) >> 14;
00133 
00134       /* Decrement the loop counter */
00135       blkCnt--;
00136   }
00137 
00138   /* If the numSamples  is not a multiple of 4, compute any remaining output samples here.    
00139    ** No loop unrolling is used. */
00140   blkCnt = numSamples % 0x4u;
00141 
00142   while(blkCnt > 0u)
00143   {
00144       a0 = *pSrcA++;
00145       b0 = *pSrcA++;
00146       c0 = *pSrcB++;
00147       d0 = *pSrcB++;  
00148   
00149       real_sum += ((q63_t)a0 * c0) >> 14;
00150       imag_sum += ((q63_t)a0 * d0) >> 14;
00151       real_sum -= ((q63_t)b0 * d0) >> 14;
00152       imag_sum += ((q63_t)b0 * c0) >> 14;
00153 
00154       /* Decrement the loop counter */
00155       blkCnt--;
00156   }
00157 
00158 #else
00159 
00160   /* Run the below code for Cortex-M0 */
00161 
00162   while(numSamples > 0u)
00163   {
00164       a0 = *pSrcA++;
00165       b0 = *pSrcA++;
00166       c0 = *pSrcB++;
00167       d0 = *pSrcB++;  
00168   
00169       real_sum += ((q63_t)a0 * c0) >> 14;
00170       imag_sum += ((q63_t)a0 * d0) >> 14;
00171       real_sum -= ((q63_t)b0 * d0) >> 14;
00172       imag_sum += ((q63_t)b0 * c0) >> 14;
00173 
00174       /* Decrement the loop counter */
00175       numSamples--;
00176   }
00177 
00178 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
00179 
00180   /* Store the real and imaginary results in 16.48 format  */
00181   *realResult = real_sum;
00182   *imagResult = imag_sum;
00183 }
00184 
00185 /**    
00186  * @} end of cmplx_dot_prod group    
00187  */