BA / SerialCom

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Fork of OmniWheels by Gustav Atmel

mbed-os/targets/TARGET_Freescale/TARGET_K20XX/serial_api.c@2:798925c9e4a8, 2018-05-01 (annotated)

Committer:
gustavatmel
Date:
Tue May 01 15:55:34 2018 +0000
Revision:
2:798925c9e4a8
Parent:
1:9c5af431a1f1 
bluetooth

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gustavatmel 1:9c5af431a1f1 1 /* mbed Microcontroller Library
gustavatmel 1:9c5af431a1f1 2 * Copyright (c) 2006-2015 ARM Limited
gustavatmel 1:9c5af431a1f1 3 *
gustavatmel 1:9c5af431a1f1 4 * Licensed under the Apache License, Version 2.0 (the "License");
gustavatmel 1:9c5af431a1f1 5 * you may not use this file except in compliance with the License.
gustavatmel 1:9c5af431a1f1 6 * You may obtain a copy of the License at
gustavatmel 1:9c5af431a1f1 7 *
gustavatmel 1:9c5af431a1f1 8 * http://www.apache.org/licenses/LICENSE-2.0
gustavatmel 1:9c5af431a1f1 9 *
gustavatmel 1:9c5af431a1f1 10 * Unless required by applicable law or agreed to in writing, software
gustavatmel 1:9c5af431a1f1 11 * distributed under the License is distributed on an "AS IS" BASIS,
gustavatmel 1:9c5af431a1f1 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
gustavatmel 1:9c5af431a1f1 13 * See the License for the specific language governing permissions and
gustavatmel 1:9c5af431a1f1 14 * limitations under the License.
gustavatmel 1:9c5af431a1f1 15 */
gustavatmel 1:9c5af431a1f1 16 #include "mbed_assert.h"
gustavatmel 1:9c5af431a1f1 17 #include "serial_api.h"
gustavatmel 1:9c5af431a1f1 18
gustavatmel 1:9c5af431a1f1 19 #include <string.h>
gustavatmel 1:9c5af431a1f1 20
gustavatmel 1:9c5af431a1f1 21 #include "cmsis.h"
gustavatmel 1:9c5af431a1f1 22 #include "pinmap.h"
gustavatmel 1:9c5af431a1f1 23 #include "clk_freqs.h"
gustavatmel 1:9c5af431a1f1 24 #include "PeripheralPins.h"
gustavatmel 1:9c5af431a1f1 25
gustavatmel 1:9c5af431a1f1 26 #define UART_NUM 3
gustavatmel 1:9c5af431a1f1 27
gustavatmel 1:9c5af431a1f1 28 static uint32_t serial_irq_ids[UART_NUM] = {0};
gustavatmel 1:9c5af431a1f1 29 static uart_irq_handler irq_handler;
gustavatmel 1:9c5af431a1f1 30
gustavatmel 1:9c5af431a1f1 31 int stdio_uart_inited = 0;
gustavatmel 1:9c5af431a1f1 32 serial_t stdio_uart;
gustavatmel 1:9c5af431a1f1 33
gustavatmel 1:9c5af431a1f1 34 void serial_init(serial_t *obj, PinName tx, PinName rx) {
gustavatmel 1:9c5af431a1f1 35 // determine the UART to use
gustavatmel 1:9c5af431a1f1 36 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
gustavatmel 1:9c5af431a1f1 37 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
gustavatmel 1:9c5af431a1f1 38 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
gustavatmel 1:9c5af431a1f1 39 MBED_ASSERT((int)uart != NC);
gustavatmel 1:9c5af431a1f1 40
gustavatmel 1:9c5af431a1f1 41 obj->uart = (UART_Type *)uart;
gustavatmel 1:9c5af431a1f1 42 // enable clk
gustavatmel 1:9c5af431a1f1 43 switch (uart) {
gustavatmel 1:9c5af431a1f1 44 case UART_0:
gustavatmel 1:9c5af431a1f1 45 mcgpllfll_frequency();
gustavatmel 1:9c5af431a1f1 46 SIM->SCGC4 |= SIM_SCGC4_UART0_MASK;
gustavatmel 1:9c5af431a1f1 47 break;
gustavatmel 1:9c5af431a1f1 48 case UART_1:
gustavatmel 1:9c5af431a1f1 49 mcgpllfll_frequency();
gustavatmel 1:9c5af431a1f1 50 SIM->SCGC4 |= SIM_SCGC4_UART1_MASK;
gustavatmel 1:9c5af431a1f1 51 break;
gustavatmel 1:9c5af431a1f1 52 case UART_2:
gustavatmel 1:9c5af431a1f1 53 SIM->SCGC4 |= SIM_SCGC4_UART2_MASK;
gustavatmel 1:9c5af431a1f1 54 break;
gustavatmel 1:9c5af431a1f1 55 }
gustavatmel 1:9c5af431a1f1 56 // Disable UART before changing registers
gustavatmel 1:9c5af431a1f1 57 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
gustavatmel 1:9c5af431a1f1 58
gustavatmel 1:9c5af431a1f1 59 switch (uart) {
gustavatmel 1:9c5af431a1f1 60 case UART_0:
gustavatmel 1:9c5af431a1f1 61 obj->index = 0;
gustavatmel 1:9c5af431a1f1 62 break;
gustavatmel 1:9c5af431a1f1 63 case UART_1:
gustavatmel 1:9c5af431a1f1 64 obj->index = 1;
gustavatmel 1:9c5af431a1f1 65 break;
gustavatmel 1:9c5af431a1f1 66 case UART_2:
gustavatmel 1:9c5af431a1f1 67 obj->index = 2;
gustavatmel 1:9c5af431a1f1 68 break;
gustavatmel 1:9c5af431a1f1 69 }
gustavatmel 1:9c5af431a1f1 70
gustavatmel 1:9c5af431a1f1 71 // set default baud rate and format
gustavatmel 1:9c5af431a1f1 72 serial_baud (obj, 9600);
gustavatmel 1:9c5af431a1f1 73 serial_format(obj, 8, ParityNone, 1);
gustavatmel 1:9c5af431a1f1 74
gustavatmel 1:9c5af431a1f1 75 // pinout the chosen uart
gustavatmel 1:9c5af431a1f1 76 pinmap_pinout(tx, PinMap_UART_TX);
gustavatmel 1:9c5af431a1f1 77 pinmap_pinout(rx, PinMap_UART_RX);
gustavatmel 1:9c5af431a1f1 78
gustavatmel 1:9c5af431a1f1 79 // set rx/tx pins in PullUp mode
gustavatmel 1:9c5af431a1f1 80 if (tx != NC) {
gustavatmel 1:9c5af431a1f1 81 pin_mode(tx, PullUp);
gustavatmel 1:9c5af431a1f1 82 }
gustavatmel 1:9c5af431a1f1 83 if (rx != NC) {
gustavatmel 1:9c5af431a1f1 84 pin_mode(rx, PullUp);
gustavatmel 1:9c5af431a1f1 85 }
gustavatmel 1:9c5af431a1f1 86
gustavatmel 1:9c5af431a1f1 87 obj->uart->C2 |= (UART_C2_RE_MASK | UART_C2_TE_MASK);
gustavatmel 1:9c5af431a1f1 88
gustavatmel 1:9c5af431a1f1 89 if (uart == STDIO_UART) {
gustavatmel 1:9c5af431a1f1 90 stdio_uart_inited = 1;
gustavatmel 1:9c5af431a1f1 91 memcpy(&stdio_uart, obj, sizeof(serial_t));
gustavatmel 1:9c5af431a1f1 92 }
gustavatmel 1:9c5af431a1f1 93 }
gustavatmel 1:9c5af431a1f1 94
gustavatmel 1:9c5af431a1f1 95 void serial_free(serial_t *obj) {
gustavatmel 1:9c5af431a1f1 96 serial_irq_ids[obj->index] = 0;
gustavatmel 1:9c5af431a1f1 97 }
gustavatmel 1:9c5af431a1f1 98
gustavatmel 1:9c5af431a1f1 99 void serial_baud(serial_t *obj, int baudrate) {
gustavatmel 1:9c5af431a1f1 100 // save C2 state
gustavatmel 1:9c5af431a1f1 101 uint8_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
gustavatmel 1:9c5af431a1f1 102
gustavatmel 1:9c5af431a1f1 103 // Disable UART before changing registers
gustavatmel 1:9c5af431a1f1 104 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
gustavatmel 1:9c5af431a1f1 105
gustavatmel 1:9c5af431a1f1 106 uint32_t PCLK;
gustavatmel 1:9c5af431a1f1 107 if (obj->uart != UART2) {
gustavatmel 1:9c5af431a1f1 108 PCLK = mcgpllfll_frequency();
gustavatmel 1:9c5af431a1f1 109 }
gustavatmel 1:9c5af431a1f1 110 else {
gustavatmel 1:9c5af431a1f1 111 PCLK = bus_frequency();
gustavatmel 1:9c5af431a1f1 112 }
gustavatmel 1:9c5af431a1f1 113
gustavatmel 1:9c5af431a1f1 114 uint16_t DL = PCLK / (16 * baudrate);
gustavatmel 1:9c5af431a1f1 115 uint32_t BRFA = (2 * PCLK) / baudrate - 32 * DL;
gustavatmel 1:9c5af431a1f1 116
gustavatmel 1:9c5af431a1f1 117 // set BDH and BDL
gustavatmel 1:9c5af431a1f1 118 obj->uart->BDH = (obj->uart->BDH & ~(0x1f)) | ((DL >> 8) & 0x1f);
gustavatmel 1:9c5af431a1f1 119 obj->uart->BDL = (obj->uart->BDL & ~(0xff)) | ((DL >> 0) & 0xff);
gustavatmel 1:9c5af431a1f1 120
gustavatmel 1:9c5af431a1f1 121 obj->uart->C4 &= ~0x1F;
gustavatmel 1:9c5af431a1f1 122 obj->uart->C4 |= BRFA & 0x1F;
gustavatmel 1:9c5af431a1f1 123
gustavatmel 1:9c5af431a1f1 124 // restore C2 state
gustavatmel 1:9c5af431a1f1 125 obj->uart->C2 |= c2_state;
gustavatmel 1:9c5af431a1f1 126 }
gustavatmel 1:9c5af431a1f1 127
gustavatmel 1:9c5af431a1f1 128 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
gustavatmel 1:9c5af431a1f1 129 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
gustavatmel 1:9c5af431a1f1 130 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven));
gustavatmel 1:9c5af431a1f1 131 MBED_ASSERT((data_bits == 8) || (data_bits == 9));
gustavatmel 1:9c5af431a1f1 132
gustavatmel 1:9c5af431a1f1 133 // save C2 state
gustavatmel 1:9c5af431a1f1 134 uint32_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK));
gustavatmel 1:9c5af431a1f1 135
gustavatmel 1:9c5af431a1f1 136 // Disable UART before changing registers
gustavatmel 1:9c5af431a1f1 137 obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
gustavatmel 1:9c5af431a1f1 138
gustavatmel 1:9c5af431a1f1 139 // 8 data bits = 0 ... 9 data bits = 1
gustavatmel 1:9c5af431a1f1 140 data_bits -= 8;
gustavatmel 1:9c5af431a1f1 141
gustavatmel 1:9c5af431a1f1 142 uint32_t parity_enable, parity_select;
gustavatmel 1:9c5af431a1f1 143 switch (parity) {
gustavatmel 1:9c5af431a1f1 144 case ParityNone:
gustavatmel 1:9c5af431a1f1 145 parity_enable = 0;
gustavatmel 1:9c5af431a1f1 146 parity_select = 0;
gustavatmel 1:9c5af431a1f1 147 break;
gustavatmel 1:9c5af431a1f1 148 case ParityOdd :
gustavatmel 1:9c5af431a1f1 149 parity_enable = 1;
gustavatmel 1:9c5af431a1f1 150 parity_select = 1;
gustavatmel 1:9c5af431a1f1 151 data_bits++;
gustavatmel 1:9c5af431a1f1 152 break;
gustavatmel 1:9c5af431a1f1 153 case ParityEven:
gustavatmel 1:9c5af431a1f1 154 parity_enable = 1;
gustavatmel 1:9c5af431a1f1 155 parity_select = 0;
gustavatmel 1:9c5af431a1f1 156 data_bits++;
gustavatmel 1:9c5af431a1f1 157 break;
gustavatmel 1:9c5af431a1f1 158 default:
gustavatmel 1:9c5af431a1f1 159 break;
gustavatmel 1:9c5af431a1f1 160 }
gustavatmel 1:9c5af431a1f1 161
gustavatmel 1:9c5af431a1f1 162 stop_bits -= 1;
gustavatmel 1:9c5af431a1f1 163
gustavatmel 1:9c5af431a1f1 164 uint32_t m10 = 0;
gustavatmel 1:9c5af431a1f1 165
gustavatmel 1:9c5af431a1f1 166 // 9 data bits + parity - only uart0 support
gustavatmel 1:9c5af431a1f1 167 if (data_bits == 2) {
gustavatmel 1:9c5af431a1f1 168 MBED_ASSERT(obj->index == 0);
gustavatmel 1:9c5af431a1f1 169 data_bits = 0;
gustavatmel 1:9c5af431a1f1 170 m10 = 1;
gustavatmel 1:9c5af431a1f1 171 }
gustavatmel 1:9c5af431a1f1 172
gustavatmel 1:9c5af431a1f1 173 // data bits, parity and parity mode
gustavatmel 1:9c5af431a1f1 174 obj->uart->C1 = ((data_bits << 4)
gustavatmel 1:9c5af431a1f1 175 | (parity_enable << 1)
gustavatmel 1:9c5af431a1f1 176 | (parity_select << 0));
gustavatmel 1:9c5af431a1f1 177
gustavatmel 1:9c5af431a1f1 178 //enable 10bit mode if needed
gustavatmel 1:9c5af431a1f1 179 if (obj->index == 0) {
gustavatmel 1:9c5af431a1f1 180 obj->uart->C4 &= ~UART_C4_M10_MASK;
gustavatmel 1:9c5af431a1f1 181 obj->uart->C4 |= (m10 << UART_C4_M10_SHIFT);
gustavatmel 1:9c5af431a1f1 182 }
gustavatmel 1:9c5af431a1f1 183
gustavatmel 1:9c5af431a1f1 184 // stop bits
gustavatmel 1:9c5af431a1f1 185 obj->uart->BDH &= ~UART_BDH_SBR_MASK;
gustavatmel 1:9c5af431a1f1 186 obj->uart->BDH |= (stop_bits << UART_BDH_SBR_SHIFT);
gustavatmel 1:9c5af431a1f1 187
gustavatmel 1:9c5af431a1f1 188 // restore C2 state
gustavatmel 1:9c5af431a1f1 189 obj->uart->C2 |= c2_state;
gustavatmel 1:9c5af431a1f1 190 }
gustavatmel 1:9c5af431a1f1 191
gustavatmel 1:9c5af431a1f1 192 /******************************************************************************
gustavatmel 1:9c5af431a1f1 193 * INTERRUPTS HANDLING
gustavatmel 1:9c5af431a1f1 194 ******************************************************************************/
gustavatmel 1:9c5af431a1f1 195 static inline void uart_irq(uint8_t status, uint32_t index) {
gustavatmel 1:9c5af431a1f1 196 if (serial_irq_ids[index] != 0) {
gustavatmel 1:9c5af431a1f1 197 if (status & UART_S1_TDRE_MASK)
gustavatmel 1:9c5af431a1f1 198 irq_handler(serial_irq_ids[index], TxIrq);
gustavatmel 1:9c5af431a1f1 199
gustavatmel 1:9c5af431a1f1 200 if (status & UART_S1_RDRF_MASK)
gustavatmel 1:9c5af431a1f1 201 irq_handler(serial_irq_ids[index], RxIrq);
gustavatmel 1:9c5af431a1f1 202 }
gustavatmel 1:9c5af431a1f1 203 }
gustavatmel 1:9c5af431a1f1 204
gustavatmel 1:9c5af431a1f1 205 void uart0_irq() {uart_irq(UART0->S1, 0);}
gustavatmel 1:9c5af431a1f1 206 void uart1_irq() {uart_irq(UART1->S1, 1);}
gustavatmel 1:9c5af431a1f1 207 void uart2_irq() {uart_irq(UART2->S1, 2);}
gustavatmel 1:9c5af431a1f1 208
gustavatmel 1:9c5af431a1f1 209 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
gustavatmel 1:9c5af431a1f1 210 irq_handler = handler;
gustavatmel 1:9c5af431a1f1 211 serial_irq_ids[obj->index] = id;
gustavatmel 1:9c5af431a1f1 212 }
gustavatmel 1:9c5af431a1f1 213
gustavatmel 1:9c5af431a1f1 214 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
gustavatmel 1:9c5af431a1f1 215 IRQn_Type irq_n = (IRQn_Type)0;
gustavatmel 1:9c5af431a1f1 216 uint32_t vector = 0;
gustavatmel 1:9c5af431a1f1 217 switch ((int)obj->uart) {
gustavatmel 1:9c5af431a1f1 218 case UART_0:
gustavatmel 1:9c5af431a1f1 219 irq_n=UART0_RX_TX_IRQn;
gustavatmel 1:9c5af431a1f1 220 vector = (uint32_t)&uart0_irq;
gustavatmel 1:9c5af431a1f1 221 break;
gustavatmel 1:9c5af431a1f1 222 case UART_1:
gustavatmel 1:9c5af431a1f1 223 irq_n=UART1_RX_TX_IRQn;
gustavatmel 1:9c5af431a1f1 224 vector = (uint32_t)&uart1_irq;
gustavatmel 1:9c5af431a1f1 225 break;
gustavatmel 1:9c5af431a1f1 226 case UART_2:
gustavatmel 1:9c5af431a1f1 227 irq_n=UART2_RX_TX_IRQn;
gustavatmel 1:9c5af431a1f1 228 vector = (uint32_t)&uart2_irq;
gustavatmel 1:9c5af431a1f1 229 break;
gustavatmel 1:9c5af431a1f1 230 }
gustavatmel 1:9c5af431a1f1 231
gustavatmel 1:9c5af431a1f1 232 if (enable) {
gustavatmel 1:9c5af431a1f1 233 switch (irq) {
gustavatmel 1:9c5af431a1f1 234 case RxIrq:
gustavatmel 1:9c5af431a1f1 235 obj->uart->C2 |= (UART_C2_RIE_MASK);
gustavatmel 1:9c5af431a1f1 236 break;
gustavatmel 1:9c5af431a1f1 237 case TxIrq:
gustavatmel 1:9c5af431a1f1 238 obj->uart->C2 |= (UART_C2_TIE_MASK);
gustavatmel 1:9c5af431a1f1 239 break;
gustavatmel 1:9c5af431a1f1 240 }
gustavatmel 1:9c5af431a1f1 241 NVIC_SetVector(irq_n, vector);
gustavatmel 1:9c5af431a1f1 242 NVIC_EnableIRQ(irq_n);
gustavatmel 1:9c5af431a1f1 243
gustavatmel 1:9c5af431a1f1 244 } else { // disable
gustavatmel 1:9c5af431a1f1 245 int all_disabled = 0;
gustavatmel 1:9c5af431a1f1 246 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
gustavatmel 1:9c5af431a1f1 247 switch (irq) {
gustavatmel 1:9c5af431a1f1 248 case RxIrq:
gustavatmel 1:9c5af431a1f1 249 obj->uart->C2 &= ~(UART_C2_RIE_MASK);
gustavatmel 1:9c5af431a1f1 250 break;
gustavatmel 1:9c5af431a1f1 251 case TxIrq:
gustavatmel 1:9c5af431a1f1 252 obj->uart->C2 &= ~(UART_C2_TIE_MASK);
gustavatmel 1:9c5af431a1f1 253 break;
gustavatmel 1:9c5af431a1f1 254 }
gustavatmel 1:9c5af431a1f1 255 switch (other_irq) {
gustavatmel 1:9c5af431a1f1 256 case RxIrq:
gustavatmel 1:9c5af431a1f1 257 all_disabled = (obj->uart->C2 & (UART_C2_RIE_MASK)) == 0;
gustavatmel 1:9c5af431a1f1 258 break;
gustavatmel 1:9c5af431a1f1 259 case TxIrq:
gustavatmel 1:9c5af431a1f1 260 all_disabled = (obj->uart->C2 & (UART_C2_TIE_MASK)) == 0;
gustavatmel 1:9c5af431a1f1 261 break;
gustavatmel 1:9c5af431a1f1 262 }
gustavatmel 1:9c5af431a1f1 263 if (all_disabled)
gustavatmel 1:9c5af431a1f1 264 NVIC_DisableIRQ(irq_n);
gustavatmel 1:9c5af431a1f1 265 }
gustavatmel 1:9c5af431a1f1 266 }
gustavatmel 1:9c5af431a1f1 267
gustavatmel 1:9c5af431a1f1 268 int serial_getc(serial_t *obj) {
gustavatmel 1:9c5af431a1f1 269 while (!serial_readable(obj));
gustavatmel 1:9c5af431a1f1 270 return obj->uart->D;
gustavatmel 1:9c5af431a1f1 271 }
gustavatmel 1:9c5af431a1f1 272
gustavatmel 1:9c5af431a1f1 273 void serial_putc(serial_t *obj, int c) {
gustavatmel 1:9c5af431a1f1 274 while (!serial_writable(obj));
gustavatmel 1:9c5af431a1f1 275 obj->uart->D = c;
gustavatmel 1:9c5af431a1f1 276 }
gustavatmel 1:9c5af431a1f1 277
gustavatmel 1:9c5af431a1f1 278 int serial_readable(serial_t *obj) {
gustavatmel 1:9c5af431a1f1 279
gustavatmel 1:9c5af431a1f1 280 return (obj->uart->S1 & UART_S1_RDRF_MASK);
gustavatmel 1:9c5af431a1f1 281 }
gustavatmel 1:9c5af431a1f1 282
gustavatmel 1:9c5af431a1f1 283 int serial_writable(serial_t *obj) {
gustavatmel 1:9c5af431a1f1 284
gustavatmel 1:9c5af431a1f1 285 return (obj->uart->S1 & UART_S1_TDRE_MASK);
gustavatmel 1:9c5af431a1f1 286 }
gustavatmel 1:9c5af431a1f1 287
gustavatmel 1:9c5af431a1f1 288 void serial_clear(serial_t *obj) {
gustavatmel 1:9c5af431a1f1 289 }
gustavatmel 1:9c5af431a1f1 290
gustavatmel 1:9c5af431a1f1 291 void serial_pinout_tx(PinName tx) {
gustavatmel 1:9c5af431a1f1 292 pinmap_pinout(tx, PinMap_UART_TX);
gustavatmel 1:9c5af431a1f1 293 }
gustavatmel 1:9c5af431a1f1 294
gustavatmel 1:9c5af431a1f1 295 void serial_break_set(serial_t *obj) {
gustavatmel 1:9c5af431a1f1 296 obj->uart->C2 |= UART_C2_SBK_MASK;
gustavatmel 1:9c5af431a1f1 297 }
gustavatmel 1:9c5af431a1f1 298
gustavatmel 1:9c5af431a1f1 299 void serial_break_clear(serial_t *obj) {
gustavatmel 1:9c5af431a1f1 300 obj->uart->C2 &= ~UART_C2_SBK_MASK;
gustavatmel 1:9c5af431a1f1 301 }