usbd_SAM3U2C.c

00001 /*----------------------------------------------------------------------------
00002  *      RL-ARM - USB
00003  *----------------------------------------------------------------------------
00004  *      Name:    usbd_SAM3U.c
00005  *      Purpose: Hardware Layer module for Atmel SAM3U
00006  *      Rev.:    V4.70
00007  *----------------------------------------------------------------------------
00008  *      This code is part of the RealView Run-Time Library.
00009  *      Copyright (c) 2004-2013 KEIL - An ARM Company. All rights reserved.
00010  *---------------------------------------------------------------------------*/
00011 
00012 #include "RTL.h"
00013 #include "rl_usb.h"
00014 #include "sam3u.h"
00015 
00016 #define __NO_USB_LIB_C
00017 #include "usb_config.c"
00018 
00019 #define UDPHS_EPTFIFO_BASE (0x20180000) /* (UDPHS_EPTFIFO) Base Address       */
00020 
00021 
00022 /*
00023  *  Calculate EP size code Function
00024  *   Called during EndPoint configuration
00025  *    Return Value:    EP size code for given EP size
00026  */
00027 
00028 static int USBD_CalcSizeEP (uint32_t size) {
00029 
00030   if      (size <=    8) {
00031     return (0);
00032   } 
00033   else if (size <=   16) {
00034     return (1);
00035   }
00036   else if (size <=   32) {
00037     return (2);
00038   }
00039   else if (size <=   64) {
00040     return (3);
00041   }
00042   else if (size <=  128) {
00043     return (4);
00044   }
00045   else if (size <=  256) {
00046     return (5);
00047   }
00048   else if (size <=  512)  {
00049     return (6);
00050   }
00051   else if (size <= 1024) {
00052     return (7);
00053   }
00054   return (0);
00055 }
00056 
00057 
00058 /*
00059  *  Retrieve bank number Function
00060  *   Called during EndPoint configuration
00061  *    Return Value:    Bank number for given EP
00062  */
00063 
00064 static int USBD_GetBankEP (uint32_t EPNum) {
00065 
00066   EPNum &= 0x0F;                        /* Set EP number                      */
00067   switch (EPNum) {
00068     case 0:
00069       return (1);                       /* One bank (Bank0)                   */
00070     case 1:
00071     case 2:
00072       return (2);                       /* Double bank (Ping-Pong: Bnk0/Bnk1) */
00073     case 3:
00074     case 4:
00075     case 5:
00076     case 6:
00077       return (3);                       /* Triple bank (Bank0 / Bank1 / Bank2)*/
00078     default:
00079       return (0);                       /* Zero bank, the EP not mapped in mem*/
00080   }
00081 }
00082 
00083 
00084 /*
00085  *  Retrieve maximum EP size Function
00086  *   Called during EndPoint configuration
00087  *    Return Value:    maximum size for given EP
00088  */
00089 
00090 static int USBD_GetSizeEP (uint32_t EPNum) {
00091   switch (EPNum & 0x0F) {
00092     case 0:
00093       return (64);                      /* Maximum size is 64 bytes           */
00094     case 1:
00095     case 2:
00096       return (512);                     /* Maximum size is 512 bytes          */
00097     case 3:
00098     case 4:
00099       return (64);                      /* Maximum size is 64 bytes           */
00100     case 5:
00101     case 6:
00102       return (1024);                    /* Maximum size is 1024 bytes         */
00103     default:
00104       return (0);                       /* Non existant endpoint              */
00105   }
00106 }
00107 
00108 
00109 /*
00110  *  USB Device Interrupt enable
00111  *   Called by USBD_Init to enable the USB Interrupt
00112  *    Return Value:    None
00113  */
00114 
00115 void          USBD_IntrEna (void) {
00116   NVIC_EnableIRQ(UDPHS_IRQn);           /* Enable USB interrupt               */
00117 }
00118 
00119 
00120 /*
00121  *  USB Device Initialize Function
00122  *   Called by the User to initialize USB Device
00123  *    Return Value:    None
00124  */
00125 
00126 void USBD_Init (void) {
00127   uint32_t n;
00128 
00129   /* Enables the 48MHz USB Clock UDPCK and System Peripheral USB Clock        */
00130   PMC->PMC_WPMR = 0x504D4300;                              /* Disable write protect  */
00131   PMC->PMC_PCER0  = (1 << ID_UDPHS);                       /* enable clock for UPDHS */
00132   PMC->CKGR_UCKR  = (CKGR_UCKR_UPLLCOUNT(15) | CKGR_UCKR_UPLLEN);
00133   while (!(PMC->PMC_SR & PMC_SR_LOCKU));                   /* wait until PLL is locked */
00134   PMC->PMC_WPMR = 0x504D4301;                              /* Enable write protect */
00135 
00136   /* Configure the pull-up on D+ and disconnect it                            */
00137   UDPHS->UDPHS_CTRL |= UDPHS_CTRL_DETACH;         /* Detach                   */
00138   UDPHS->UDPHS_CTRL |= UDPHS_CTRL_PULLD_DIS;      /* Disable Pull Down        */
00139 
00140   /* Reset IP UDPHS                                                           */
00141   UDPHS->UDPHS_CTRL &= ~UDPHS_CTRL_EN_UDPHS;
00142   UDPHS->UDPHS_CTRL |=  UDPHS_CTRL_EN_UDPHS;
00143 
00144 #if (!USBD_HS_ENABLE)                             /* If HS disabled           */
00145   UDPHS->UDPHS_TST  |=  (3 & UDPHS_TST_SPEED_CFG_Msk);
00146 #endif
00147 
00148   /* Disable DMA for UDPHS                                                    */
00149   for (n = 1; n < (UDPHSDMA_NUMBER); n++) {
00150     /* RESET endpoint canal DMA:                                              */
00151     UDPHS->UDPHS_DMA[n].UDPHS_DMACONTROL = 0;     /* STOP command             */
00152     /* Disable endpoint                                                       */
00153     UDPHS->UDPHS_EPT[n].UDPHS_EPTCTLDIS  = 0xFFFFFFFF;
00154     /* Clear status endpoint                                                  */
00155     UDPHS->UDPHS_EPT[n].UDPHS_EPTCLRSTA  = 0xFFFFFFFF;
00156     /* Reset endpoint config                                                  */
00157     UDPHS->UDPHS_EPT[n].UDPHS_EPTCTLENB  = 0;
00158     /* Reset DMA channel (Buff count and Control field)                       */
00159     UDPHS->UDPHS_DMA[n].UDPHS_DMACONTROL = (0x1 << 1);    /* NON STOP command */
00160     /* Reset DMA channel 0 (STOP)                                             */
00161     UDPHS->UDPHS_DMA[n].UDPHS_DMACONTROL = 0;             /* STOP command     */
00162     /* Clear DMA channel status (read the register for clear it)              */
00163     UDPHS->UDPHS_DMA[n].UDPHS_DMASTATUS =  UDPHS->UDPHS_DMA[n].UDPHS_DMASTATUS;
00164   }
00165 
00166   UDPHS->UDPHS_IEN     = 0;
00167   UDPHS->UDPHS_CLRINT  = UDPHS_CLRINT_UPSTR_RES |
00168                          UDPHS_CLRINT_ENDOFRSM  |
00169                          UDPHS_CLRINT_WAKE_UP   |
00170                          UDPHS_CLRINT_ENDRESET  |
00171                          UDPHS_CLRINT_INT_SOF   |
00172                          UDPHS_CLRINT_MICRO_SOF |
00173                          UDPHS_CLRINT_DET_SUSPD;
00174 
00175   USBD_IntrEna();                       /* Enable USB interrupt               */
00176 }
00177 
00178 
00179 /*
00180  *  USB Device Connect Function
00181  *   Called by the User to Connect/Disconnect USB Device
00182  *    Parameters:      con:   Connect/Disconnect
00183  *    Return Value:    None
00184  */
00185 
00186 void USBD_Connect (BOOL con) {
00187   if (con) {
00188     UDPHS->UDPHS_CTRL &= ~UDPHS_CTRL_DETACH;          /* Pull Up on DP        */
00189     UDPHS->UDPHS_CTRL |=  UDPHS_CTRL_PULLD_DIS;       /* Disable Pull Down    */
00190   } else {
00191     UDPHS->UDPHS_CTRL |=  UDPHS_CTRL_DETACH;          /* Detach               */
00192     UDPHS->UDPHS_CTRL &= ~UDPHS_CTRL_PULLD_DIS;       /* Enable Pull Down     */
00193   }
00194 }
00195 
00196 
00197 /*
00198  *  USB Device Reset Function
00199  *   Called automatically on USB Device Reset
00200  *    Return Value:    None
00201  */
00202 
00203 void USBD_Reset (void) {
00204   uint32_t ep, EPMask;
00205 
00206   EPMask = ((1 << (USBD_EP_NUM+1)) - 1);
00207 
00208   /* Reset & Disable USB Endpoints                                            */
00209   for (ep = 0; ep <= USBD_EP_NUM; ep++) {
00210     UDPHS->UDPHS_EPT[ep].UDPHS_EPTCFG    =  0;
00211     UDPHS->UDPHS_EPT[ep].UDPHS_EPTCTLDIS = (0x1 <<  0);     /* Disable EP     */
00212   }
00213   UDPHS->UDPHS_EPTRST = EPMask;                             /* Reset   EPs    */
00214   UDPHS->UDPHS_EPTRST = 0;
00215 
00216   /* Setup USB Interrupts */               /* note: Micro_SOF not yet handled */
00217 #ifdef __RTX
00218   UDPHS->UDPHS_IEN = ((USBD_RTX_DevTask     != 0) ? UDPHS_IEN_DET_SUSPD : 0) |
00219                      ((USBD_RTX_DevTask     != 0) ? UDPHS_IEN_MICRO_SOF : 0) |
00220                      ((USBD_RTX_DevTask     != 0) ? UDPHS_IEN_INT_SOF   : 0) |
00221                      ((USBD_RTX_DevTask     != 0) ? UDPHS_IEN_ENDRESET  : 0) |
00222 //                   ((USBD_RTX_DevTask     != 0) ? UDPHS_IEN_WAKE_UP   : 0) |
00223 //                   ((USBD_RTX_DevTask     != 0) ? UDPHS_IEN_UPSTR_RES : 0) |
00224 #else
00225   UDPHS->UDPHS_IEN = ((USBD_P_Suspend_Event != 0) ? UDPHS_IEN_DET_SUSPD : 0) |
00226                      ((USBD_P_SOF_Event     != 0) ? UDPHS_IEN_MICRO_SOF : 0) |
00227                      ((USBD_P_SOF_Event     != 0) ? UDPHS_IEN_INT_SOF   : 0) |
00228                      ((USBD_P_Reset_Event   != 0) ? UDPHS_IEN_ENDRESET  : 0) |
00229 //                   ((USBD_P_WakeUp_Event  != 0) ? UDPHS_IEN_WAKE_UP   : 0) |
00230 //                   ((USBD_P_Resume_Event  != 0) ? UDPHS_IEN_UPSTR_RES : 0) |
00231 #endif
00232                      (EPMask << 8);
00233 
00234   /* Setup Control Endpoint 0                                                 */
00235   UDPHS->UDPHS_EPT[0].UDPHS_EPTCFG     = UDPHS_EPTCFG_BK_NUMBER_1            | 
00236                                          UDPHS_EPTCFG_EPT_TYPE_CTRL8         |
00237                                          USBD_CalcSizeEP(USBD_MAX_PACKET0)   ;
00238   UDPHS->UDPHS_EPT[0].UDPHS_EPTCTLENB  = UDPHS_EPTCTLENB_RXRDY_TXKL          |
00239                                          UDPHS_EPTCTLENB_TX_COMPLT           |
00240                                          UDPHS_EPTCTLENB_RX_SETUP            |
00241                                          UDPHS_EPTCTLENB_STALL_SNT           |
00242                                          UDPHS_EPTCTLENB_NYET_DIS            |
00243                                          UDPHS_EPTCTLENB_EPT_ENABL;
00244 }
00245 
00246 
00247 /*
00248  *  USB Device Suspend Function
00249  *   Called automatically on USB Device Suspend
00250  *    Return Value:    None
00251  */
00252 
00253 void USBD_Suspend (void) {
00254   UDPHS->UDPHS_IEN  &= ~UDPHS_IEN_DET_SUSPD;
00255   UDPHS->UDPHS_IEN  |=  UDPHS_IEN_WAKE_UP;
00256 }
00257 
00258 
00259 /*
00260  *  USB Device Resume Function
00261  *   Called automatically on USB Device Resume
00262  *    Return Value:    None
00263  */
00264 
00265 void USBD_Resume (void) {
00266   UDPHS->UDPHS_IEN  &= ~UDPHS_IEN_WAKE_UP;
00267   UDPHS->UDPHS_IEN  |=  UDPHS_IEN_DET_SUSPD;
00268 }
00269 
00270 
00271 /*
00272  *  USB Device Remote Wakeup Function
00273  *   Called automatically on USB Device Remote Wakeup
00274  *    Return Value:    None
00275  */
00276 
00277 void USBD_WakeUp (void) {
00278   UDPHS->UDPHS_IEN  |=  UDPHS_IEN_UPSTR_RES;
00279   UDPHS->UDPHS_CTRL |=  UDPHS_CTRL_REWAKEUP;
00280 }
00281 
00282 
00283 /*
00284  *  USB Device Remote Wakeup Configuration Function
00285  *    Parameters:      cfg:   Device Enable/Disable
00286  *    Return Value:    None
00287  */
00288 
00289 void USBD_WakeUpCfg (BOOL cfg) {
00290   if (cfg) {
00291     /* Enable wakeup mechanism */
00292   } else {
00293     UDPHS->UDPHS_CTRL &= ~UDPHS_CTRL_REWAKEUP;
00294     UDPHS->UDPHS_IEN  &= ~UDPHS_IEN_UPSTR_RES;
00295   }
00296 }
00297 
00298 
00299 /*
00300  *  USB Device Set Address Function
00301  *    Parameters:      adr:   USB Device Address
00302  *                     setup: Called in setup stage (!=0), else after status stage
00303  *    Return Value:    None
00304  */
00305 
00306 void USBD_SetAddress (uint32_t adr, uint32_t setup) {
00307   if (setup) return;
00308   if (adr) {
00309     UDPHS->UDPHS_CTRL |=  (UDPHS_CTRL_FADDR_EN | adr);
00310   } else {
00311     UDPHS->UDPHS_CTRL &= ~(UDPHS_CTRL_FADDR_EN | UDPHS_CTRL_DEV_ADDR_Msk);
00312   }
00313 }
00314 
00315 
00316 /*
00317  *  USB Device Configure Function
00318  *    Parameters:      cfg:   Device Configure/Deconfigure
00319  *    Return Value:    None
00320  */
00321 
00322 void USBD_Configure (BOOL cfg) {
00323   /* Performed by Hardware */
00324 }
00325 
00326 
00327 /*
00328  *  Configure USB Device Endpoint according to Descriptor
00329  *    Parameters:      pEPD:  Pointer to Device Endpoint Descriptor
00330  *    Return Value:    None
00331  */
00332 
00333 void USBD_ConfigEP (USB_ENDPOINT_DESCRIPTOR *pEPD) {
00334   uint32_t num, type, dir, size, bank, interval;
00335 
00336   num      = pEPD->bEndpointAddress & 0x0F;
00337   type     = pEPD->bmAttributes & USB_ENDPOINT_TYPE_MASK;
00338   dir      = pEPD->bEndpointAddress >> 7;
00339   interval = pEPD->bInterval;
00340   size     = USBD_CalcSizeEP(pEPD->wMaxPacketSize);
00341   bank     = USBD_GetBankEP(num);
00342 
00343   /* Check if MaxPacketSize fits for EndPoint                                 */
00344   if (pEPD->wMaxPacketSize <= USBD_GetSizeEP(num)) {
00345     UDPHS->UDPHS_EPT[num].UDPHS_EPTCFG    = (interval << 8) |
00346                                             (bank     << 6) |
00347                                             (type     << 4) |
00348                                             (dir      << 3) |
00349                                             (size     << 0) ;
00350 
00351     UDPHS->UDPHS_EPT[num].UDPHS_EPTCTLENB = 
00352       (0x1 <<  9) |  /* Received OUT Data Interrupt Enable                    */
00353       (0x1 << 10) |  /* Transmitted IN Data Complete Interrupt Enable         */
00354       (0x1 <<  4) |  /* NYET Disable (Only for High Speed Bulk OUT endpoints) */
00355       (0x1 << 13) ;  /* Stall Sent /ISO CRC Error/Number of Transaction Error */
00356   }
00357 }
00358 
00359 
00360 /*
00361  *  Set Direction for USB Device Control Endpoint
00362  *    Parameters:      dir:   Out (dir == 0), In (dir <> 0)
00363  *    Return Value:    None
00364  */
00365 
00366 void USBD_DirCtrlEP (uint32_t dir) {
00367   /* Performed by Hardware */
00368 }
00369 
00370 
00371 /*
00372  *  Enable USB Device Endpoint
00373  *    Parameters:      EPNum: Device Endpoint Number
00374  *                       EPNum.0..3: Address
00375  *                       EPNum.7:    Dir
00376  *    Return Value:    None
00377  */
00378 
00379 void USBD_EnableEP (uint32_t EPNum) {
00380   UDPHS->UDPHS_EPT[EPNum & 0x0F].UDPHS_EPTCTLENB = (0x1 << 0);  /* EP Enable  */
00381 }
00382 
00383 
00384 /*
00385  *  Disable USB Device Endpoint
00386  *    Parameters:      EPNum: Device Endpoint Number
00387  *                       EPNum.0..3: Address
00388  *                       EPNum.7:    Dir
00389  *    Return Value:    None
00390  */
00391 
00392 void USBD_DisableEP (uint32_t EPNum) {
00393   UDPHS->UDPHS_EPT[EPNum & 0x0F].UDPHS_EPTCTLDIS = (0x1 << 0);  /* EP Disable */
00394 }
00395 
00396 
00397 /*
00398  *  Reset USB Device Endpoint
00399  *    Parameters:      EPNum: Device Endpoint Number
00400  *                       EPNum.0..3: Address
00401  *                       EPNum.7:    Dir
00402  *    Return Value:    None
00403  */
00404 
00405 void USBD_ResetEP (uint32_t EPNum) {
00406   EPNum &= 0x0F;
00407   UDPHS->UDPHS_EPT[EPNum].UDPHS_EPTCLRSTA = (0x1 << 6) |  /* Data Toggle Clear*/
00408                                             (0x1 << 5);   /* Stall Req Set    */
00409 
00410   UDPHS->UDPHS_EPTRST |=  (1 << EPNum);                   /* Reset endpoint   */
00411   UDPHS->UDPHS_EPTRST &= ~(1 << EPNum);
00412 }
00413 
00414 
00415 /*
00416  *  Set Stall for USB Device Endpoint
00417  *    Parameters:      EPNum: Device Endpoint Number
00418  *                       EPNum.0..3: Address
00419  *                       EPNum.7:    Dir
00420  *    Return Value:    None
00421  */
00422 
00423 void USBD_SetStallEP (uint32_t EPNum) {
00424   UDPHS->UDPHS_EPT[EPNum & 0x0F].UDPHS_EPTSETSTA = (0x1 << 5);  /* Stall Set  */
00425 }
00426 
00427 
00428 /*
00429  *  Clear Stall for USB Device Endpoint
00430  *    Parameters:      EPNum: Device Endpoint Number
00431  *                       EPNum.0..3: Address
00432  *                       EPNum.7:    Dir
00433  *    Return Value:    None
00434  */
00435 
00436 void USBD_ClrStallEP (uint32_t EPNum) {
00437   UDPHS->UDPHS_EPT[EPNum & 0x0F].UDPHS_EPTCLRSTA = (0x1 << 6) | /* Clr Toggle */
00438                                                    (0x1 << 5);  /* Stall Clear*/
00439 }
00440 
00441 
00442 /*
00443  *  Read USB Device Endpoint Data
00444  *    Parameters:      EPNum: Device Endpoint Number
00445  *                       EPNum.0..3: Address
00446  *                       EPNum.7:    Dir
00447  *                     pData: Pointer to Data Buffer
00448  *    Return Value:    Number of bytes read
00449  */
00450 
00451 uint32_t USBD_ReadEP (uint32_t EPNum, uint8_t *pData) {
00452   uint32_t cnt, n;
00453   uint8_t *pEPFIFO;                                /* Pointer to EP FIFO           */
00454 
00455   EPNum  &= 0x0F;
00456   pEPFIFO = (uint8_t *)((uint32_t *)UDPHS_EPTFIFO_BASE + (16384*EPNum));
00457   cnt     = (UDPHS->UDPHS_EPT[EPNum].UDPHS_EPTSTA >> 20) & 0x07FF;  /* Get by */
00458   for (n = 0; n < cnt; n++) {
00459     *pData++ = *pEPFIFO++;
00460   }
00461   UDPHS->UDPHS_EPT[EPNum].UDPHS_EPTCLRSTA = (0x1 << 9);   /* Rece OUT Clear   */
00462 
00463   /* RX_Setup must be cleared after Setup packet is read                      */
00464   UDPHS->UDPHS_EPT[EPNum].UDPHS_EPTCLRSTA = (0x1 << 12);  /* Rece SETUP Clear */
00465 
00466   UDPHS->UDPHS_IEN |= (1 << (EPNum + 8));     /* Enable EP int after data read*/
00467 
00468   return (cnt);
00469 }
00470 
00471 
00472 /*
00473  *  Write USB Device Endpoint Data
00474  *    Parameters:      EPNum: Device Endpoint Number
00475  *                       EPNum.0..3: Address
00476  *                       EPNum.7:    Dir
00477  *                     pData: Pointer to Data Buffer
00478  *                     cnt:   Number of bytes to write
00479  *    Return Value:    Number of bytes written
00480  */
00481 
00482 uint32_t USBD_WriteEP (uint32_t EPNum, uint8_t *pData, uint32_t cnt) {
00483   uint32_t n;
00484   uint8_t *pEPFIFO;                          /* Pointer to the endpoint FIFO       */
00485 
00486   EPNum &= 0x0F;
00487   if (UDPHS->UDPHS_EPT[EPNum].UDPHS_EPTSTA & (0x1 << 5)) {  /* If EP is stall */
00488     return (cnt);
00489   }
00490 
00491   if (UDPHS->UDPHS_EPT[EPNum].UDPHS_EPTSTA & (0x1 << 11)) { /* Bank not ready */
00492     return (0);
00493   }
00494 
00495   pEPFIFO = (uint8_t *)((uint32_t *)UDPHS_EPTFIFO_BASE + (16384*EPNum));
00496   for (n = 0; n < cnt; n++) {
00497     *pEPFIFO++ = *pData++;              /* Write data to FIFO                 */
00498   }
00499 
00500   UDPHS->UDPHS_EPT[EPNum].UDPHS_EPTSETSTA = (0x1 << 11);  /* Set packet ready */
00501 
00502   return (cnt);
00503 }
00504 
00505 
00506 /*
00507  *  Get USB Device Last Frame Number
00508  *    Parameters:      None
00509  *    Return Value:    Frame Number
00510  */
00511 
00512 uint32_t USBD_GetFrame (void) {
00513   uint32_t val;
00514 
00515   if ((UDPHS->UDPHS_FNUM & (1UL << 31)) == 0) {
00516     if (USBD_HighSpeed) val = UDPHS->UDPHS_FNUM & 0x7FFFFFFF;
00517     else val = (UDPHS->UDPHS_FNUM & UDPHS_FNUM_FRAME_NUMBER_Msk) >> 3;
00518   } else {
00519     val = 0xFFFFFFFF;
00520   }
00521 
00522   return (val);
00523 }
00524 
00525 
00526 #ifdef __RTX
00527 uint32_t LastError;                          /* Last Error                         */
00528 
00529 /*
00530  *  Get USB Device Last Error Code
00531  *    Parameters:      None
00532  *    Return Value:    Error Code
00533  */
00534 
00535 uint32_t USBD_GetError (void) {
00536   return (LastError);
00537 }
00538 #endif
00539 
00540 
00541 /*
00542  *  USB Device Interrupt Service Routine
00543  */
00544 
00545 void UDPHS_IRQHandler (void) {
00546   uint32_t intsta, eptsta, n;
00547 
00548   intsta = UDPHS->UDPHS_INTSTA & UDPHS->UDPHS_IEN;
00549 
00550   /* End of Bus Reset Interrupt                                               */
00551   if (intsta & UDPHS_INTSTA_ENDRESET) {
00552     /* Get used speed (HighSpeed or FullSpeed)                                */
00553     USBD_HighSpeed = (UDPHS->UDPHS_INTSTA & UDPHS_INTSTA_SPEED) ? 1 : 0;
00554 
00555     USBD_Reset();
00556     usbd_reset_core();
00557 #ifdef __RTX
00558     UDPHS->UDPHS_CLRINT = UDPHS_CLRINT_ENDRESET;
00559     if (USBD_RTX_DevTask) {
00560       isr_evt_set(USBD_EVT_RESET, USBD_RTX_DevTask);
00561     }
00562 #else
00563     if (USBD_P_Reset_Event) {
00564       USBD_P_Reset_Event();
00565     }
00566     UDPHS->UDPHS_CLRINT = UDPHS_CLRINT_ENDRESET;
00567 #endif
00568   }
00569 
00570   /* USB Suspend Interrupt                                                    */
00571   if (intsta & UDPHS_INTSTA_DET_SUSPD) {
00572     USBD_Suspend();
00573 #ifdef __RTX
00574     UDPHS->UDPHS_CLRINT = UDPHS_CLRINT_DET_SUSPD;
00575     if (USBD_RTX_DevTask) {
00576       isr_evt_set(USBD_EVT_SUSPEND, USBD_RTX_DevTask);
00577     }
00578 #else
00579     if (USBD_P_Suspend_Event) {
00580       USBD_P_Suspend_Event();
00581     }
00582     UDPHS->UDPHS_CLRINT = UDPHS_CLRINT_DET_SUSPD;
00583 #endif
00584   }
00585 
00586   /* USB Resume Interrupt                                                     */
00587   if (intsta & UDPHS_INTSTA_WAKE_UP) {
00588     USBD_Resume();
00589 #ifdef __RTX
00590     UDPHS->UDPHS_CLRINT = UDPHS_INTSTA_WAKE_UP;
00591     if (USBD_RTX_DevTask) {
00592       isr_evt_set(USBD_EVT_RESUME,  USBD_RTX_DevTask);
00593     }
00594 #else
00595     if (USBD_P_Resume_Event) {
00596       USBD_P_Resume_Event();
00597     }
00598     UDPHS->UDPHS_CLRINT = UDPHS_INTSTA_WAKE_UP;
00599 #endif
00600   }
00601 
00602   /* USB Remote Wakeup Interrupt                                              */
00603   if (intsta & UDPHS_INTSTA_UPSTR_RES) {
00604     UDPHS->UDPHS_CLRINT = UDPHS_INTSTA_UPSTR_RES;
00605   }
00606 
00607   /* Start of Frame Interrupt                                                 */
00608   if (intsta & UDPHS_INTSTA_INT_SOF) {
00609     if (USBD_HighSpeed == 0) {
00610 #ifdef __RTX                          
00611       UDPHS->UDPHS_CLRINT = UDPHS_CLRINT_INT_SOF;
00612       if (USBD_RTX_DevTask) {
00613         isr_evt_set(USBD_EVT_SOF, USBD_RTX_DevTask);
00614       }                       
00615 #else
00616       if (USBD_P_SOF_Event) {
00617         USBD_P_SOF_Event();
00618       }                                          
00619       UDPHS->UDPHS_CLRINT = UDPHS_CLRINT_INT_SOF;
00620 #endif
00621     }
00622     else UDPHS->UDPHS_CLRINT = UDPHS_CLRINT_INT_SOF;
00623   }
00624   
00625   /* Micro Frame Interrupt                                                    */
00626   if (intsta & UDPHS_INTSTA_MICRO_SOF) {
00627     if (USBD_HighSpeed == 1) {
00628 #ifdef __RTX
00629       UDPHS->UDPHS_CLRINT = UDPHS_CLRINT_MICRO_SOF;
00630       if (USBD_RTX_DevTask) {
00631         isr_evt_set(USBD_EVT_SOF, USBD_RTX_DevTask);
00632       }
00633 #else
00634       if (USBD_P_SOF_Event) {
00635         USBD_P_SOF_Event();
00636       }
00637       UDPHS->UDPHS_CLRINT = UDPHS_CLRINT_MICRO_SOF;
00638 #endif
00639     }
00640     else UDPHS->UDPHS_CLRINT = UDPHS_CLRINT_MICRO_SOF;
00641   }
00642 
00643   /* Endpoint Interrupts                                                      */
00644   for (n = 0; n <= USBD_EP_NUM; n++) {
00645     if (intsta & (1 << (n + 8))) {
00646       eptsta = UDPHS->UDPHS_EPT[n].UDPHS_EPTSTA;  /* Read EP status           */
00647 
00648       /* Data Packet Sent Interrupt                                           */
00649       if (eptsta & (1 << 10)) {         /* Transmitted IN Data Complete Int   */
00650         UDPHS->UDPHS_EPT[n].UDPHS_EPTCLRSTA = (1 << 10);    /* Tx IN Clear    */
00651 #ifdef __RTX
00652         if (USBD_RTX_EPTask[n]) {       /* IN Packet                          */
00653           isr_evt_set(USBD_EVT_IN,  USBD_RTX_EPTask[n]);
00654         }
00655 #else
00656         if (USBD_P_EP[n]) {
00657           USBD_P_EP[n](USBD_EVT_IN);
00658         }
00659 #endif
00660       }
00661 
00662       /* Data Packet Received Interrupt                                       */
00663       if (eptsta & (1 << 9)) {          /* Received OUT Data Interrupt        */
00664         UDPHS->UDPHS_IEN &= ~(1 << (n + 8));      /* Disable EP int until read*/
00665 #ifdef __RTX
00666         if (USBD_RTX_EPTask[n]) {       /* OUT Packet                         */
00667           isr_evt_set(USBD_EVT_OUT, USBD_RTX_EPTask[n]);
00668         }
00669 #else
00670         if (USBD_P_EP[n]) {
00671           USBD_P_EP[n](USBD_EVT_OUT);
00672         }
00673 #endif
00674       }
00675 
00676       /* STALL Packet Sent Interrupt                                          */
00677       if (eptsta & (0x1 << 13)) {       /* Stall Sent                         */
00678         if ((UDPHS->UDPHS_EPT[n].UDPHS_EPTCFG & UDPHS_EPTCFG_EPT_TYPE_Msk) == UDPHS_EPTCFG_EPT_TYPE_CTRL8) {
00679 #ifdef __RTX
00680           if (USBD_RTX_EPTask[n]) {
00681             isr_evt_set(USBD_EVT_IN_STALL, USBD_RTX_EPTask[n]);
00682           }
00683 #else
00684           if (USBD_P_EP[n]) {
00685             USBD_P_EP[n](USBD_EVT_IN_STALL);
00686           }
00687 #endif
00688         }
00689         UDPHS->UDPHS_EPT[n].UDPHS_EPTCLRSTA = UDPHS_EPTCLRSTA_STALL_SNT;
00690       }
00691 
00692       /* Setup Packet Received Interrupt                                      */
00693       if (eptsta & (0x1 << 12)) {       /* Received SETUP Interrupt           */
00694         UDPHS->UDPHS_IEN &= ~(1 << (n + 8));      /* Disable EP int until read*/
00695 #ifdef __RTX
00696         if (USBD_RTX_EPTask[n]) {       /* SETUP Packet                       */
00697           isr_evt_set(USBD_EVT_SETUP, USBD_RTX_EPTask[n]);
00698         }
00699 #else
00700         if (USBD_P_EP[n]) {
00701           USBD_P_EP[n](USBD_EVT_SETUP);
00702         }
00703 #endif
00704       }
00705     }
00706   }
00707 }