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Show/hide line numbers target_reset_ti.c Source File

target_reset_ti.c

00001 /**
00002  * @file    target_reset.c
00003  * @brief   Target reset for the cc3220sf
00004  *
00005  * DAPLink Interface Firmware
00006  * Copyright (c) 2009-2019, ARM Limited, All Rights Reserved
00007  * SPDX-License-Identifier: Apache-2.0
00008  *
00009  * Licensed under the Apache License, Version 2.0 (the "License"); you may
00010  * not use this file except in compliance with the License.
00011  * You may obtain a copy of the License at
00012  *
00013  * http://www.apache.org/licenses/LICENSE-2.0
00014  *
00015  * Unless required by applicable law or agreed to in writing, software
00016  * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
00017  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00018  * See the License for the specific language governing permissions and
00019  * limitations under the License.
00020  */
00021 
00022 #include "swd_host.h"
00023 #include "target_family.h"
00024 
00025 #define GPRCM_0_APPS_SOFT_RESET_ADDR   0x4402D000
00026 #define GPRCM_0_RESET_MCU_VALUE        0x1
00027 #define GPRCM_0_RESET_MCU_PERIPH_VALUE 0x2
00028 
00029 static uint8_t target_set_state_ti(target_state_t state)
00030 {
00031     swd_set_soft_reset(VECTRESET);
00032     if (state == POST_FLASH_RESET)
00033     {
00034         // TI recommends reset via writing to PRCM register instead of AIRCR.
00035         // Reset apps processor and associated peripheral.
00036         uint32_t write_value = GPRCM_0_RESET_MCU_PERIPH_VALUE;
00037         swd_write_memory(GPRCM_0_APPS_SOFT_RESET_ADDR, (uint8_t *)&write_value, sizeof(write_value));
00038         return 1;
00039     }
00040     return swd_set_target_state_sw(state);
00041 }
00042 
00043 const uint32_t cookieList[]=
00044 {
00045     0x5AA5A55A,
00046     0x000FF800,
00047     0xEFA3247D
00048 };
00049 
00050 // Override the weak validate_bin_nvic function. The weak function expects NVIC at the beginning of the flash.
00051 // On CC3220SF, the beginning of the flash is the cookie list, which allows the boot ROM code to jump into onchip flash directly bypassing external flash.
00052 static uint8_t validate_bin_nvic_ti(const uint8_t *buf)
00053 {
00054     return (memcmp(buf, cookieList, sizeof(cookieList)) == 0);
00055 }
00056 
00057 const target_family_descriptor_t g_ti_family = {
00058     .family_id  = kTI_Cc3220sf_FamilyID,
00059     .target_set_state = target_set_state_ti,
00060     .validate_bin_nvic = validate_bin_nvic_ti,
00061 };
00062