system_M480.h

00001 /**************************************************************************//**
00002  * @file     system_M480.h
00003  * @version  V1.00
00004  * @brief    CMSIS Cortex-M4 Core Peripheral Access Layer Header File for M480
00005  *
00006  * @copyright (C) 2016 Nuvoton Technology Corp. All rights reserved.
00007  *
00008  * Redistribution and use in source and binary forms, with or without modification,
00009  * are permitted provided that the following conditions are met:
00010  *   1. Redistributions of source code must retain the above copyright notice,
00011  *      this list of conditions and the following disclaimer.
00012  *   2. Redistributions in binary form must reproduce the above copyright notice,
00013  *      this list of conditions and the following disclaimer in the documentation
00014  *      and/or other materials provided with the distribution.
00015  *   3. Neither the name of Nuvoton Technology Corp. nor the names of its contributors
00016  *      may be used to endorse or promote products derived from this software
00017  *      without specific prior written permission.
00018  * 
00019  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00020  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00021  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00022  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00023  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00024  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00025  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00026  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00027  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00028  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00029 *****************************************************************************/
00030 
00031 #ifndef __SYSTEM_M480_H__
00032 #define __SYSTEM_M480_H__
00033 
00034 #ifdef __cplusplus
00035 extern "C" {
00036 #endif
00037 
00038 #include <stdint.h>
00039 
00040 
00041 /*----------------------------------------------------------------------------
00042   Define clocks
00043  *----------------------------------------------------------------------------*/
00044 
00045 #define __HSI       (12000000UL)    /*!< PLL default output is 50MHz */
00046 #define __HXT       (12000000UL)    /*!< External Crystal Clock Frequency     */
00047 #define __LXT       (32768UL)       /*!< External Crystal Clock Frequency 32.768KHz */
00048 #define __HIRC      (12000000UL)    /*!< Internal 12M RC Oscillator Frequency */
00049 #define __LIRC      (10000UL)       /*!< Internal 10K RC Oscillator Frequency */
00050 #define __SYS_OSC_CLK     (    ___HSI)    /* Main oscillator frequency        */
00051 
00052 
00053 #define __SYSTEM_CLOCK    (1UL*__HXT)
00054 
00055 extern uint32_t SystemCoreClock;     /*!< System Clock Frequency (Core Clock)  */
00056 extern uint32_t CyclesPerUs ;         /*!< Cycles per micro second              */
00057 extern uint32_t PllClock ;            /*!< PLL Output Clock Frequency           */
00058 
00059 
00060 /**
00061  * Initialize the system
00062  *
00063  * @param  none
00064  * @return none
00065  *
00066  * @brief  Setup the micro controller system.
00067  *         Initialize the System and update the SystemCoreClock variable.
00068  */
00069 extern void SystemInit(void);
00070 
00071 /**
00072  * Update SystemCoreClock variable
00073  *
00074  * @param  none
00075  * @return none
00076  *
00077  * @brief  Updates the SystemCoreClock with current core Clock
00078  *         retrieved from cpu registers.
00079  */
00080 extern void SystemCoreClockUpdate(void);
00081 
00082 #ifdef __cplusplus
00083 }
00084 #endif
00085 
00086 #endif /* __SYSTEM_M480_H__ */
00087 
00088 /*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/