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Show/hide line numbers system_LPC43xx.c Source File

system_LPC43xx.c

00001 /**********************************************************************
00002 * $Id$        system_lpc43xx.c            2012-05-21
00003 *//**
00004 * @file        system_lpc43xx.c
00005 * @brief    Cortex-M3 Device System Source File for NXP lpc43xx Series.
00006 * @version    1.0
00007 * @date        21. May. 2011
00008 * @author    NXP MCU SW Application Team
00009 *
00010 * Copyright(C) 2011, NXP Semiconductor
00011 * All rights reserved.
00012 *
00013 ***********************************************************************
00014 * Software that is described herein is for illustrative purposes only
00015 * which provides customers with programming information regarding the
00016 * products. This software is supplied "AS IS" without any warranties.
00017 * NXP Semiconductors assumes no responsibility or liability for the
00018 * use of the software, conveys no license or title under any patent,
00019 * copyright, or mask work right to the product. NXP Semiconductors
00020 * reserves the right to make changes in the software without
00021 * notification. NXP Semiconductors also make no representation or
00022 * warranty that such application will be suitable for the specified
00023 * use without further testing or modification.
00024 * Permission to use, copy, modify, and distribute this software and its
00025 * documentation is hereby granted, under NXP Semiconductors'
00026 * relevant copyright in the software, without fee, provided that it
00027 * is used in conjunction with NXP Semiconductors microcontrollers.  This
00028 * copyright, permission, and disclaimer notice must appear in all copies of
00029 * this code.
00030 **********************************************************************/
00031 
00032 #include "LPC43xx.h"
00033 #include "fpu_enable.h"
00034 
00035 /*----------------------------------------------------------------------------
00036   Define clocks
00037  *----------------------------------------------------------------------------*/
00038 #define __IRC            (12000000UL)    /* IRC Oscillator frequency          */
00039 
00040 /*----------------------------------------------------------------------------
00041   Clock Variable definitions
00042  *----------------------------------------------------------------------------*/
00043 uint32_t SystemCoreClock = 96000000;    /* System Clock Frequency (Core Clock)*/
00044 
00045 extern uint32_t __Vectors;
00046 
00047 /**
00048  * Initialize the system
00049  *
00050  * @param  none
00051  * @return none
00052  *
00053  * @brief  Setup the microcontroller system.
00054  *         Initialize the System.
00055  */
00056 void SystemInit(void)
00057 {
00058     // Set up Cortex_M3 or M4 VTOR register to point to vector table
00059     SCB->VTOR = (unsigned int)&__Vectors;
00060 
00061     fpuEnable();
00062 
00063     // In case we are running from internal flash, we configure the flash
00064     // accelerator.
00065 #define FLASH_ACCELERATOR_SPEED 6
00066     {
00067         uint32_t *MAM, t;
00068         // Set up flash controller for both banks
00069         // Bank A
00070         MAM = (uint32_t *)(LPC_CREG_BASE + 0x120);
00071         t = *MAM;
00072         t &= ~(0xF << 12);
00073         *MAM = t | (FLASH_ACCELERATOR_SPEED << 12);
00074         // Bank B
00075         MAM = (uint32_t *)(LPC_CREG_BASE + 0x124);
00076         t = *MAM;
00077         t &= ~(0xF << 12);
00078         *MAM = t | (FLASH_ACCELERATOR_SPEED << 12);
00079     }
00080 }
00081 
00082 void SystemReset(void)
00083 {
00084     /* Ensure all outstanding memory accesses included buffered write are completed before reset */
00085     __DSB();
00086 
00087     LPC_WWDT->MOD |= (1 << 1);
00088     LPC_WWDT->MOD |= (1 << 0);
00089     LPC_WWDT->FEED = 0xAA;
00090     LPC_WWDT->FEED = 0x55;
00091 
00092     /* Ensure completion of memory access */
00093     __DSB();
00094 
00095     /* wait until reset */
00096     while(1);
00097 }