Important changes to repositories hosted on mbed.com
Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.
To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.
It is also possible to export all your personal repositories from the account settings page.
stm32f1xx_hal_flash_ex.h
00001 /** 00002 ****************************************************************************** 00003 * @file stm32f1xx_hal_flash_ex.h 00004 * @author MCD Application Team 00005 * @version V1.0.4 00006 * @date 29-April-2016 00007 * @brief Header file of Flash HAL Extended module. 00008 ****************************************************************************** 00009 * @attention 00010 * 00011 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> 00012 * 00013 * Redistribution and use in source and binary forms, with or without modification, 00014 * are permitted provided that the following conditions are met: 00015 * 1. Redistributions of source code must retain the above copyright notice, 00016 * this list of conditions and the following disclaimer. 00017 * 2. Redistributions in binary form must reproduce the above copyright notice, 00018 * this list of conditions and the following disclaimer in the documentation 00019 * and/or other materials provided with the distribution. 00020 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00021 * may be used to endorse or promote products derived from this software 00022 * without specific prior written permission. 00023 * 00024 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00025 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00026 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00027 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00028 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00029 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00030 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00031 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00032 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00033 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00034 * 00035 ****************************************************************************** 00036 */ 00037 00038 /* Define to prevent recursive inclusion -------------------------------------*/ 00039 #ifndef __STM32F1xx_HAL_FLASH_EX_H 00040 #define __STM32F1xx_HAL_FLASH_EX_H 00041 00042 #ifdef __cplusplus 00043 extern "C" { 00044 #endif 00045 00046 /* Includes ------------------------------------------------------------------*/ 00047 #include "stm32f1xx_hal_def.h" 00048 00049 /** @addtogroup STM32F1xx_HAL_Driver 00050 * @{ 00051 */ 00052 00053 /** @addtogroup FLASHEx 00054 * @{ 00055 */ 00056 00057 /** @addtogroup FLASHEx_Private_Constants 00058 * @{ 00059 */ 00060 00061 #define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFFF7E0) 00062 #define OBR_REG_INDEX ((uint32_t)1) 00063 #define SR_FLAG_MASK ((uint32_t)(FLASH_SR_BSY | FLASH_SR_PGERR | FLASH_SR_WRPRTERR | FLASH_SR_EOP)) 00064 00065 /** 00066 * @} 00067 */ 00068 00069 /** @addtogroup FLASHEx_Private_Macros 00070 * @{ 00071 */ 00072 00073 #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || ((VALUE) == FLASH_TYPEERASE_MASSERASE)) 00074 00075 #define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_DATA))) 00076 00077 #define IS_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || ((VALUE) == OB_WRPSTATE_ENABLE)) 00078 00079 #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) || ((LEVEL) == OB_RDP_LEVEL_1)) 00080 00081 #define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == OB_DATA_ADDRESS_DATA0) || ((ADDRESS) == OB_DATA_ADDRESS_DATA1)) 00082 00083 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) 00084 00085 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) 00086 00087 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) 00088 00089 #if defined(FLASH_BANK2_END) 00090 #define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) || ((BOOT1) == OB_BOOT1_SET)) 00091 #endif /* FLASH_BANK2_END */ 00092 00093 /* Low Density */ 00094 #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)) 00095 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFF) : \ 00096 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFF)) 00097 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 00098 00099 /* Medium Density */ 00100 #if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) 00101 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFF) : \ 00102 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFF) : \ 00103 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08007FFF) : \ 00104 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x08003FFF)))) 00105 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ 00106 00107 /* High Density */ 00108 #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)) 00109 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0807FFFF) : \ 00110 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0805FFFF) : \ 00111 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFF))) 00112 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ 00113 00114 /* XL Density */ 00115 #if defined(FLASH_BANK2_END) 00116 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080FFFFF) : \ 00117 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x080BFFFF)) 00118 #endif /* FLASH_BANK2_END */ 00119 00120 /* Connectivity Line */ 00121 #if (defined(STM32F105xC) || defined(STM32F107xC)) 00122 #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0803FFFF) : \ 00123 (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0801FFFF) : \ 00124 ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= 0x0800FFFF))) 00125 #endif /* STM32F105xC || STM32F107xC */ 00126 00127 #define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000)) 00128 00129 #if defined(FLASH_BANK2_END) 00130 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ 00131 ((BANK) == FLASH_BANK_2) || \ 00132 ((BANK) == FLASH_BANK_BOTH)) 00133 #else 00134 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1)) 00135 #endif /* FLASH_BANK2_END */ 00136 00137 /* Low Density */ 00138 #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6)) 00139 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? \ 00140 ((ADDRESS) <= FLASH_BANK1_END) : ((ADDRESS) <= 0x08003FFF))) 00141 00142 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 00143 00144 /* Medium Density */ 00145 #if (defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) 00146 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? \ 00147 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x40) ? \ 00148 ((ADDRESS) <= 0x0800FFFF) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x20) ? \ 00149 ((ADDRESS) <= 0x08007FFF) : ((ADDRESS) <= 0x08003FFF))))) 00150 00151 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ 00152 00153 /* High Density */ 00154 #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE)) 00155 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x200) ? \ 00156 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x180) ? \ 00157 ((ADDRESS) <= 0x0805FFFF) : ((ADDRESS) <= 0x0803FFFF)))) 00158 00159 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ 00160 00161 /* XL Density */ 00162 #if defined(FLASH_BANK2_END) 00163 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x400) ? \ 00164 ((ADDRESS) <= FLASH_BANK2_END) : ((ADDRESS) <= 0x080BFFFF))) 00165 00166 #endif /* FLASH_BANK2_END */ 00167 00168 /* Connectivity Line */ 00169 #if (defined(STM32F105xC) || defined(STM32F107xC)) 00170 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x100) ? \ 00171 ((ADDRESS) <= FLASH_BANK1_END) : (((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0x80) ? \ 00172 ((ADDRESS) <= 0x0801FFFF) : ((ADDRESS) <= 0x0800FFFF)))) 00173 00174 #endif /* STM32F105xC || STM32F107xC */ 00175 00176 /** 00177 * @} 00178 */ 00179 00180 /* Exported types ------------------------------------------------------------*/ 00181 /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types 00182 * @{ 00183 */ 00184 00185 /** 00186 * @brief FLASH Erase structure definition 00187 */ 00188 typedef struct 00189 { 00190 uint32_t TypeErase; /*!< TypeErase: Mass erase or page erase. 00191 This parameter can be a value of @ref FLASHEx_Type_Erase */ 00192 00193 uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled. 00194 This parameter must be a value of @ref FLASHEx_Banks */ 00195 00196 uint32_t PageAddress; /*!< PageAdress: Initial FLASH page address to erase when mass erase is disabled 00197 This parameter must be a number between Min_Data = 0x08000000 and Max_Data = FLASH_BANKx_END 00198 (x = 1 or 2 depending on devices)*/ 00199 00200 uint32_t NbPages; /*!< NbPages: Number of pagess to be erased. 00201 This parameter must be a value between Min_Data = 1 and Max_Data = (max number of pages - value of initial page)*/ 00202 00203 } FLASH_EraseInitTypeDef; 00204 00205 /** 00206 * @brief FLASH Options bytes program structure definition 00207 */ 00208 typedef struct 00209 { 00210 uint32_t OptionType; /*!< OptionType: Option byte to be configured. 00211 This parameter can be a value of @ref FLASHEx_OB_Type */ 00212 00213 uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation. 00214 This parameter can be a value of @ref FLASHEx_OB_WRP_State */ 00215 00216 uint32_t WRPPage; /*!< WRPPage: specifies the page(s) to be write protected 00217 This parameter can be a value of @ref FLASHEx_OB_Write_Protection */ 00218 00219 uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors. 00220 This parameter must be a value of @ref FLASHEx_Banks */ 00221 00222 uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level.. 00223 This parameter can be a value of @ref FLASHEx_OB_Read_Protection */ 00224 00225 #if defined(FLASH_BANK2_END) 00226 uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: 00227 IWDG / STOP / STDBY / BOOT1 00228 This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP, 00229 @ref FLASHEx_OB_nRST_STDBY, @ref FLASHEx_OB_BOOT1 */ 00230 #else 00231 uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: 00232 IWDG / STOP / STDBY 00233 This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP, 00234 @ref FLASHEx_OB_nRST_STDBY */ 00235 #endif /* FLASH_BANK2_END */ 00236 00237 uint32_t DATAAddress; /*!< DATAAddress: Address of the option byte DATA to be programmed 00238 This parameter can be a value of @ref FLASHEx_OB_Data_Address */ 00239 00240 uint8_t DATAData; /*!< DATAData: Data to be stored in the option byte DATA 00241 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */ 00242 } FLASH_OBProgramInitTypeDef; 00243 00244 /** 00245 * @} 00246 */ 00247 00248 /* Exported constants --------------------------------------------------------*/ 00249 /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants 00250 * @{ 00251 */ 00252 00253 /** @defgroup FLASHEx_Constants FLASH Constants 00254 * @{ 00255 */ 00256 00257 /** @defgroup FLASHEx_Page_Size Page Size 00258 * @{ 00259 */ 00260 #if (defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB)) 00261 #define FLASH_PAGE_SIZE ((uint32_t)0x400) 00262 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 00263 /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 00264 00265 #if (defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC)) 00266 #define FLASH_PAGE_SIZE ((uint32_t)0x800) 00267 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 00268 /* STM32F101xG || STM32F103xG */ 00269 /* STM32F105xC || STM32F107xC */ 00270 00271 /** 00272 * @} 00273 */ 00274 00275 /** @defgroup FLASHEx_Type_Erase Type Erase 00276 * @{ 00277 */ 00278 #define FLASH_TYPEERASE_PAGES ((uint32_t)0x00) /*!<Pages erase only*/ 00279 #define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x02) /*!<Flash mass erase activation*/ 00280 00281 /** 00282 * @} 00283 */ 00284 00285 /** @defgroup FLASHEx_Banks Banks 00286 * @{ 00287 */ 00288 #if defined(FLASH_BANK2_END) 00289 #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */ 00290 #define FLASH_BANK_2 ((uint32_t)2) /*!< Bank 2 */ 00291 #define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */ 00292 00293 #else 00294 #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */ 00295 #endif 00296 /** 00297 * @} 00298 */ 00299 00300 /** 00301 * @} 00302 */ 00303 00304 /** @defgroup FLASHEx_OptionByte_Constants Option Byte Constants 00305 * @{ 00306 */ 00307 00308 /** @defgroup FLASHEx_OB_Type Option Bytes Type 00309 * @{ 00310 */ 00311 #define OPTIONBYTE_WRP ((uint32_t)0x01) /*!<WRP option byte configuration*/ 00312 #define OPTIONBYTE_RDP ((uint32_t)0x02) /*!<RDP option byte configuration*/ 00313 #define OPTIONBYTE_USER ((uint32_t)0x04) /*!<USER option byte configuration*/ 00314 #define OPTIONBYTE_DATA ((uint32_t)0x08) /*!<DATA option byte configuration*/ 00315 00316 /** 00317 * @} 00318 */ 00319 00320 /** @defgroup FLASHEx_OB_WRP_State Option Byte WRP State 00321 * @{ 00322 */ 00323 #define OB_WRPSTATE_DISABLE ((uint32_t)0x00) /*!<Disable the write protection of the desired pages*/ 00324 #define OB_WRPSTATE_ENABLE ((uint32_t)0x01) /*!<Enable the write protection of the desired pagess*/ 00325 00326 /** 00327 * @} 00328 */ 00329 00330 /** @defgroup FLASHEx_OB_Write_Protection Option Bytes Write Protection 00331 * @{ 00332 */ 00333 /* STM32 Low and Medium density devices */ 00334 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) \ 00335 || defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) \ 00336 || defined(STM32F103xB) 00337 #define OB_WRP_PAGES0TO3 ((uint32_t)0x00000001) /*!< Write protection of page 0 to 3 */ 00338 #define OB_WRP_PAGES4TO7 ((uint32_t)0x00000002) /*!< Write protection of page 4 to 7 */ 00339 #define OB_WRP_PAGES8TO11 ((uint32_t)0x00000004) /*!< Write protection of page 8 to 11 */ 00340 #define OB_WRP_PAGES12TO15 ((uint32_t)0x00000008) /*!< Write protection of page 12 to 15 */ 00341 #define OB_WRP_PAGES16TO19 ((uint32_t)0x00000010) /*!< Write protection of page 16 to 19 */ 00342 #define OB_WRP_PAGES20TO23 ((uint32_t)0x00000020) /*!< Write protection of page 20 to 23 */ 00343 #define OB_WRP_PAGES24TO27 ((uint32_t)0x00000040) /*!< Write protection of page 24 to 27 */ 00344 #define OB_WRP_PAGES28TO31 ((uint32_t)0x00000080) /*!< Write protection of page 28 to 31 */ 00345 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 00346 /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 00347 00348 /* STM32 Medium-density devices */ 00349 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) 00350 #define OB_WRP_PAGES32TO35 ((uint32_t)0x00000100) /*!< Write protection of page 32 to 35 */ 00351 #define OB_WRP_PAGES36TO39 ((uint32_t)0x00000200) /*!< Write protection of page 36 to 39 */ 00352 #define OB_WRP_PAGES40TO43 ((uint32_t)0x00000400) /*!< Write protection of page 40 to 43 */ 00353 #define OB_WRP_PAGES44TO47 ((uint32_t)0x00000800) /*!< Write protection of page 44 to 47 */ 00354 #define OB_WRP_PAGES48TO51 ((uint32_t)0x00001000) /*!< Write protection of page 48 to 51 */ 00355 #define OB_WRP_PAGES52TO55 ((uint32_t)0x00002000) /*!< Write protection of page 52 to 55 */ 00356 #define OB_WRP_PAGES56TO59 ((uint32_t)0x00004000) /*!< Write protection of page 56 to 59 */ 00357 #define OB_WRP_PAGES60TO63 ((uint32_t)0x00008000) /*!< Write protection of page 60 to 63 */ 00358 #define OB_WRP_PAGES64TO67 ((uint32_t)0x00010000) /*!< Write protection of page 64 to 67 */ 00359 #define OB_WRP_PAGES68TO71 ((uint32_t)0x00020000) /*!< Write protection of page 68 to 71 */ 00360 #define OB_WRP_PAGES72TO75 ((uint32_t)0x00040000) /*!< Write protection of page 72 to 75 */ 00361 #define OB_WRP_PAGES76TO79 ((uint32_t)0x00080000) /*!< Write protection of page 76 to 79 */ 00362 #define OB_WRP_PAGES80TO83 ((uint32_t)0x00100000) /*!< Write protection of page 80 to 83 */ 00363 #define OB_WRP_PAGES84TO87 ((uint32_t)0x00200000) /*!< Write protection of page 84 to 87 */ 00364 #define OB_WRP_PAGES88TO91 ((uint32_t)0x00400000) /*!< Write protection of page 88 to 91 */ 00365 #define OB_WRP_PAGES92TO95 ((uint32_t)0x00800000) /*!< Write protection of page 92 to 95 */ 00366 #define OB_WRP_PAGES96TO99 ((uint32_t)0x01000000) /*!< Write protection of page 96 to 99 */ 00367 #define OB_WRP_PAGES100TO103 ((uint32_t)0x02000000) /*!< Write protection of page 100 to 103 */ 00368 #define OB_WRP_PAGES104TO107 ((uint32_t)0x04000000) /*!< Write protection of page 104 to 107 */ 00369 #define OB_WRP_PAGES108TO111 ((uint32_t)0x08000000) /*!< Write protection of page 108 to 111 */ 00370 #define OB_WRP_PAGES112TO115 ((uint32_t)0x10000000) /*!< Write protection of page 112 to 115 */ 00371 #define OB_WRP_PAGES116TO119 ((uint32_t)0x20000000) /*!< Write protection of page 115 to 119 */ 00372 #define OB_WRP_PAGES120TO123 ((uint32_t)0x40000000) /*!< Write protection of page 120 to 123 */ 00373 #define OB_WRP_PAGES124TO127 ((uint32_t)0x80000000) /*!< Write protection of page 124 to 127 */ 00374 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 00375 00376 00377 /* STM32 High-density, XL-density and Connectivity line devices */ 00378 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) \ 00379 || defined(STM32F101xG) || defined(STM32F103xG) \ 00380 || defined(STM32F105xC) || defined(STM32F107xC) 00381 #define OB_WRP_PAGES0TO1 ((uint32_t)0x00000001) /*!< Write protection of page 0 TO 1 */ 00382 #define OB_WRP_PAGES2TO3 ((uint32_t)0x00000002) /*!< Write protection of page 2 TO 3 */ 00383 #define OB_WRP_PAGES4TO5 ((uint32_t)0x00000004) /*!< Write protection of page 4 TO 5 */ 00384 #define OB_WRP_PAGES6TO7 ((uint32_t)0x00000008) /*!< Write protection of page 6 TO 7 */ 00385 #define OB_WRP_PAGES8TO9 ((uint32_t)0x00000010) /*!< Write protection of page 8 TO 9 */ 00386 #define OB_WRP_PAGES10TO11 ((uint32_t)0x00000020) /*!< Write protection of page 10 TO 11 */ 00387 #define OB_WRP_PAGES12TO13 ((uint32_t)0x00000040) /*!< Write protection of page 12 TO 13 */ 00388 #define OB_WRP_PAGES14TO15 ((uint32_t)0x00000080) /*!< Write protection of page 14 TO 15 */ 00389 #define OB_WRP_PAGES16TO17 ((uint32_t)0x00000100) /*!< Write protection of page 16 TO 17 */ 00390 #define OB_WRP_PAGES18TO19 ((uint32_t)0x00000200) /*!< Write protection of page 18 TO 19 */ 00391 #define OB_WRP_PAGES20TO21 ((uint32_t)0x00000400) /*!< Write protection of page 20 TO 21 */ 00392 #define OB_WRP_PAGES22TO23 ((uint32_t)0x00000800) /*!< Write protection of page 22 TO 23 */ 00393 #define OB_WRP_PAGES24TO25 ((uint32_t)0x00001000) /*!< Write protection of page 24 TO 25 */ 00394 #define OB_WRP_PAGES26TO27 ((uint32_t)0x00002000) /*!< Write protection of page 26 TO 27 */ 00395 #define OB_WRP_PAGES28TO29 ((uint32_t)0x00004000) /*!< Write protection of page 28 TO 29 */ 00396 #define OB_WRP_PAGES30TO31 ((uint32_t)0x00008000) /*!< Write protection of page 30 TO 31 */ 00397 #define OB_WRP_PAGES32TO33 ((uint32_t)0x00010000) /*!< Write protection of page 32 TO 33 */ 00398 #define OB_WRP_PAGES34TO35 ((uint32_t)0x00020000) /*!< Write protection of page 34 TO 35 */ 00399 #define OB_WRP_PAGES36TO37 ((uint32_t)0x00040000) /*!< Write protection of page 36 TO 37 */ 00400 #define OB_WRP_PAGES38TO39 ((uint32_t)0x00080000) /*!< Write protection of page 38 TO 39 */ 00401 #define OB_WRP_PAGES40TO41 ((uint32_t)0x00100000) /*!< Write protection of page 40 TO 41 */ 00402 #define OB_WRP_PAGES42TO43 ((uint32_t)0x00200000) /*!< Write protection of page 42 TO 43 */ 00403 #define OB_WRP_PAGES44TO45 ((uint32_t)0x00400000) /*!< Write protection of page 44 TO 45 */ 00404 #define OB_WRP_PAGES46TO47 ((uint32_t)0x00800000) /*!< Write protection of page 46 TO 47 */ 00405 #define OB_WRP_PAGES48TO49 ((uint32_t)0x01000000) /*!< Write protection of page 48 TO 49 */ 00406 #define OB_WRP_PAGES50TO51 ((uint32_t)0x02000000) /*!< Write protection of page 50 TO 51 */ 00407 #define OB_WRP_PAGES52TO53 ((uint32_t)0x04000000) /*!< Write protection of page 52 TO 53 */ 00408 #define OB_WRP_PAGES54TO55 ((uint32_t)0x08000000) /*!< Write protection of page 54 TO 55 */ 00409 #define OB_WRP_PAGES56TO57 ((uint32_t)0x10000000) /*!< Write protection of page 56 TO 57 */ 00410 #define OB_WRP_PAGES58TO59 ((uint32_t)0x20000000) /*!< Write protection of page 58 TO 59 */ 00411 #define OB_WRP_PAGES60TO61 ((uint32_t)0x40000000) /*!< Write protection of page 60 TO 61 */ 00412 #define OB_WRP_PAGES62TO127 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 127 */ 00413 #define OB_WRP_PAGES62TO255 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 255 */ 00414 #define OB_WRP_PAGES62TO511 ((uint32_t)0x80000000) /*!< Write protection of page 62 TO 511 */ 00415 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB */ 00416 /* STM32F101xG || STM32F103xG */ 00417 /* STM32F105xC || STM32F107xC */ 00418 00419 #define OB_WRP_ALLPAGES ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Pages */ 00420 00421 /* Low Density */ 00422 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F103x6) 00423 #define OB_WRP_PAGES0TO31MASK ((uint32_t)0x000000FF) 00424 #endif /* STM32F101x6 || STM32F102x6 || STM32F103x6 */ 00425 00426 /* Medium Density */ 00427 #if defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F102xB) || defined(STM32F103xB) 00428 #define OB_WRP_PAGES0TO31MASK ((uint32_t)0x000000FF) 00429 #define OB_WRP_PAGES32TO63MASK ((uint32_t)0x0000FF00) 00430 #define OB_WRP_PAGES64TO95MASK ((uint32_t)0x00FF0000) 00431 #define OB_WRP_PAGES96TO127MASK ((uint32_t)0xFF000000) 00432 #endif /* STM32F100xB || STM32F101xB || STM32F102xB || STM32F103xB*/ 00433 00434 /* High Density */ 00435 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F103xE) 00436 #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF) 00437 #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00) 00438 #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000) 00439 #define OB_WRP_PAGES48TO255MASK ((uint32_t)0xFF000000) 00440 #endif /* STM32F100xE || STM32F101xE || STM32F103xE */ 00441 00442 /* XL Density */ 00443 #if defined(STM32F101xG) || defined(STM32F103xG) 00444 #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF) 00445 #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00) 00446 #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000) 00447 #define OB_WRP_PAGES48TO511MASK ((uint32_t)0xFF000000) 00448 #endif /* STM32F101xG || STM32F103xG */ 00449 00450 /* Connectivity line devices */ 00451 #if defined(STM32F105xC) || defined(STM32F107xC) 00452 #define OB_WRP_PAGES0TO15MASK ((uint32_t)0x000000FF) 00453 #define OB_WRP_PAGES16TO31MASK ((uint32_t)0x0000FF00) 00454 #define OB_WRP_PAGES32TO47MASK ((uint32_t)0x00FF0000) 00455 #define OB_WRP_PAGES48TO127MASK ((uint32_t)0xFF000000) 00456 #endif /* STM32F105xC || STM32F107xC */ 00457 00458 /** 00459 * @} 00460 */ 00461 00462 /** @defgroup FLASHEx_OB_Read_Protection Option Byte Read Protection 00463 * @{ 00464 */ 00465 #define OB_RDP_LEVEL_0 ((uint8_t)0xA5) 00466 #define OB_RDP_LEVEL_1 ((uint8_t)0x00) 00467 /** 00468 * @} 00469 */ 00470 00471 /** @defgroup FLASHEx_OB_IWatchdog Option Byte IWatchdog 00472 * @{ 00473 */ 00474 #define OB_IWDG_SW ((uint16_t)0x0001) /*!< Software IWDG selected */ 00475 #define OB_IWDG_HW ((uint16_t)0x0000) /*!< Hardware IWDG selected */ 00476 /** 00477 * @} 00478 */ 00479 00480 /** @defgroup FLASHEx_OB_nRST_STOP Option Byte nRST STOP 00481 * @{ 00482 */ 00483 #define OB_STOP_NO_RST ((uint16_t)0x0002) /*!< No reset generated when entering in STOP */ 00484 #define OB_STOP_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STOP */ 00485 /** 00486 * @} 00487 */ 00488 00489 /** @defgroup FLASHEx_OB_nRST_STDBY Option Byte nRST STDBY 00490 * @{ 00491 */ 00492 #define OB_STDBY_NO_RST ((uint16_t)0x0004) /*!< No reset generated when entering in STANDBY */ 00493 #define OB_STDBY_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STANDBY */ 00494 /** 00495 * @} 00496 */ 00497 00498 #if defined(FLASH_BANK2_END) 00499 /** @defgroup FLASHEx_OB_BOOT1 Option Byte BOOT1 00500 * @{ 00501 */ 00502 #define OB_BOOT1_RESET ((uint16_t)0x0000) /*!< BOOT1 Reset */ 00503 #define OB_BOOT1_SET ((uint16_t)0x0008) /*!< BOOT1 Set */ 00504 /** 00505 * @} 00506 */ 00507 #endif /* FLASH_BANK2_END */ 00508 00509 /** @defgroup FLASHEx_OB_Data_Address Option Byte Data Address 00510 * @{ 00511 */ 00512 #define OB_DATA_ADDRESS_DATA0 ((uint32_t)0x1FFFF804) 00513 #define OB_DATA_ADDRESS_DATA1 ((uint32_t)0x1FFFF806) 00514 /** 00515 * @} 00516 */ 00517 00518 /** 00519 * @} 00520 */ 00521 00522 /** @addtogroup FLASHEx_Constants 00523 * @{ 00524 */ 00525 00526 /** @defgroup FLASH_Flag_definition Flag definition 00527 * @brief Flag definition 00528 * @{ 00529 */ 00530 #if defined(FLASH_BANK2_END) 00531 #define FLASH_FLAG_BSY FLASH_FLAG_BSY_BANK1 /*!< FLASH Bank1 Busy flag */ 00532 #define FLASH_FLAG_PGERR FLASH_FLAG_PGERR_BANK1 /*!< FLASH Bank1 Programming error flag */ 00533 #define FLASH_FLAG_WRPERR FLASH_FLAG_WRPERR_BANK1 /*!< FLASH Bank1 Write protected error flag */ 00534 #define FLASH_FLAG_EOP FLASH_FLAG_EOP_BANK1 /*!< FLASH Bank1 End of Operation flag */ 00535 00536 #define FLASH_FLAG_BSY_BANK1 FLASH_SR_BSY /*!< FLASH Bank1 Busy flag */ 00537 #define FLASH_FLAG_PGERR_BANK1 FLASH_SR_PGERR /*!< FLASH Bank1 Programming error flag */ 00538 #define FLASH_FLAG_WRPERR_BANK1 FLASH_SR_WRPRTERR /*!< FLASH Bank1 Write protected error flag */ 00539 #define FLASH_FLAG_EOP_BANK1 FLASH_SR_EOP /*!< FLASH Bank1 End of Operation flag */ 00540 00541 #define FLASH_FLAG_BSY_BANK2 (FLASH_SR2_BSY << 16) /*!< FLASH Bank2 Busy flag */ 00542 #define FLASH_FLAG_PGERR_BANK2 (FLASH_SR2_PGERR << 16) /*!< FLASH Bank2 Programming error flag */ 00543 #define FLASH_FLAG_WRPERR_BANK2 (FLASH_SR2_WRPRTERR << 16) /*!< FLASH Bank2 Write protected error flag */ 00544 #define FLASH_FLAG_EOP_BANK2 (FLASH_SR2_EOP << 16) /*!< FLASH Bank2 End of Operation flag */ 00545 00546 #else 00547 00548 #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */ 00549 #define FLASH_FLAG_PGERR FLASH_SR_PGERR /*!< FLASH Programming error flag */ 00550 #define FLASH_FLAG_WRPERR FLASH_SR_WRPRTERR /*!< FLASH Write protected error flag */ 00551 #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Operation flag */ 00552 00553 #endif 00554 #define FLASH_FLAG_OPTVERR ((OBR_REG_INDEX << 8 | FLASH_OBR_OPTERR)) /*!< Option Byte Error */ 00555 /** 00556 * @} 00557 */ 00558 00559 /** @defgroup FLASH_Interrupt_definition Interrupt definition 00560 * @brief FLASH Interrupt definition 00561 * @{ 00562 */ 00563 #if defined(FLASH_BANK2_END) 00564 #define FLASH_IT_EOP FLASH_IT_EOP_BANK1 /*!< End of FLASH Operation Interrupt source Bank1 */ 00565 #define FLASH_IT_ERR FLASH_IT_ERR_BANK1 /*!< Error Interrupt source Bank1 */ 00566 00567 #define FLASH_IT_EOP_BANK1 FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source Bank1 */ 00568 #define FLASH_IT_ERR_BANK1 FLASH_CR_ERRIE /*!< Error Interrupt source Bank1 */ 00569 00570 #define FLASH_IT_EOP_BANK2 (FLASH_CR2_EOPIE << 16) /*!< End of FLASH Operation Interrupt source Bank2 */ 00571 #define FLASH_IT_ERR_BANK2 (FLASH_CR2_ERRIE << 16) /*!< Error Interrupt source Bank2 */ 00572 00573 #else 00574 00575 #define FLASH_IT_EOP FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source */ 00576 #define FLASH_IT_ERR FLASH_CR_ERRIE /*!< Error Interrupt source */ 00577 00578 #endif 00579 /** 00580 * @} 00581 */ 00582 00583 /** 00584 * @} 00585 */ 00586 00587 00588 /** 00589 * @} 00590 */ 00591 00592 /* Exported macro ------------------------------------------------------------*/ 00593 /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros 00594 * @{ 00595 */ 00596 00597 /** @defgroup FLASH_Interrupt Interrupt 00598 * @brief macros to handle FLASH interrupts 00599 * @{ 00600 */ 00601 00602 #if defined(FLASH_BANK2_END) 00603 /** 00604 * @brief Enable the specified FLASH interrupt. 00605 * @param __INTERRUPT__ FLASH interrupt 00606 * This parameter can be any combination of the following values: 00607 * @arg @ref FLASH_IT_EOP_BANK1 End of FLASH Operation Interrupt on bank1 00608 * @arg @ref FLASH_IT_ERR_BANK1 Error Interrupt on bank1 00609 * @arg @ref FLASH_IT_EOP_BANK2 End of FLASH Operation Interrupt on bank2 00610 * @arg @ref FLASH_IT_ERR_BANK2 Error Interrupt on bank2 00611 * @retval none 00612 */ 00613 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { \ 00614 /* Enable Bank1 IT */ \ 00615 SET_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFF)); \ 00616 /* Enable Bank2 IT */ \ 00617 SET_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16)); \ 00618 } while(0) 00619 00620 /** 00621 * @brief Disable the specified FLASH interrupt. 00622 * @param __INTERRUPT__ FLASH interrupt 00623 * This parameter can be any combination of the following values: 00624 * @arg @ref FLASH_IT_EOP_BANK1 End of FLASH Operation Interrupt on bank1 00625 * @arg @ref FLASH_IT_ERR_BANK1 Error Interrupt on bank1 00626 * @arg @ref FLASH_IT_EOP_BANK2 End of FLASH Operation Interrupt on bank2 00627 * @arg @ref FLASH_IT_ERR_BANK2 Error Interrupt on bank2 00628 * @retval none 00629 */ 00630 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { \ 00631 /* Disable Bank1 IT */ \ 00632 CLEAR_BIT(FLASH->CR, ((__INTERRUPT__) & 0x0000FFFF)); \ 00633 /* Disable Bank2 IT */ \ 00634 CLEAR_BIT(FLASH->CR2, ((__INTERRUPT__) >> 16)); \ 00635 } while(0) 00636 00637 /** 00638 * @brief Get the specified FLASH flag status. 00639 * @param __FLAG__ specifies the FLASH flag to check. 00640 * This parameter can be one of the following values: 00641 * @arg @ref FLASH_FLAG_EOP_BANK1 FLASH End of Operation flag on bank1 00642 * @arg @ref FLASH_FLAG_WRPERR_BANK1 FLASH Write protected error flag on bank1 00643 * @arg @ref FLASH_FLAG_PGERR_BANK1 FLASH Programming error flag on bank1 00644 * @arg @ref FLASH_FLAG_BSY_BANK1 FLASH Busy flag on bank1 00645 * @arg @ref FLASH_FLAG_EOP_BANK2 FLASH End of Operation flag on bank2 00646 * @arg @ref FLASH_FLAG_WRPERR_BANK2 FLASH Write protected error flag on bank2 00647 * @arg @ref FLASH_FLAG_PGERR_BANK2 FLASH Programming error flag on bank2 00648 * @arg @ref FLASH_FLAG_BSY_BANK2 FLASH Busy flag on bank2 00649 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match 00650 * @retval The new state of __FLAG__ (SET or RESET). 00651 */ 00652 #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \ 00653 (FLASH->OBR & FLASH_OBR_OPTERR) : \ 00654 ((((__FLAG__) & SR_FLAG_MASK) != RESET)? \ 00655 (FLASH->SR & ((__FLAG__) & SR_FLAG_MASK)) : \ 00656 (FLASH->SR2 & ((__FLAG__) >> 16)))) 00657 00658 /** 00659 * @brief Clear the specified FLASH flag. 00660 * @param __FLAG__ specifies the FLASH flags to clear. 00661 * This parameter can be any combination of the following values: 00662 * @arg @ref FLASH_FLAG_EOP_BANK1 FLASH End of Operation flag on bank1 00663 * @arg @ref FLASH_FLAG_WRPERR_BANK1 FLASH Write protected error flag on bank1 00664 * @arg @ref FLASH_FLAG_PGERR_BANK1 FLASH Programming error flag on bank1 00665 * @arg @ref FLASH_FLAG_BSY_BANK1 FLASH Busy flag on bank1 00666 * @arg @ref FLASH_FLAG_EOP_BANK2 FLASH End of Operation flag on bank2 00667 * @arg @ref FLASH_FLAG_WRPERR_BANK2 FLASH Write protected error flag on bank2 00668 * @arg @ref FLASH_FLAG_PGERR_BANK2 FLASH Programming error flag on bank2 00669 * @arg @ref FLASH_FLAG_BSY_BANK2 FLASH Busy flag on bank2 00670 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match 00671 * @retval none 00672 */ 00673 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \ 00674 /* Clear FLASH_FLAG_OPTVERR flag */ \ 00675 if ((__FLAG__) == FLASH_FLAG_OPTVERR) \ 00676 { \ 00677 CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \ 00678 } \ 00679 else { \ 00680 /* Clear Flag in Bank1 */ \ 00681 if (((__FLAG__) & SR_FLAG_MASK) != RESET) \ 00682 { \ 00683 FLASH->SR = ((__FLAG__) & SR_FLAG_MASK); \ 00684 } \ 00685 /* Clear Flag in Bank2 */ \ 00686 if (((__FLAG__) >> 16) != RESET) \ 00687 { \ 00688 FLASH->SR2 = ((__FLAG__) >> 16); \ 00689 } \ 00690 } \ 00691 } while(0) 00692 #else 00693 /** 00694 * @brief Enable the specified FLASH interrupt. 00695 * @param __INTERRUPT__ FLASH interrupt 00696 * This parameter can be any combination of the following values: 00697 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt 00698 * @arg @ref FLASH_IT_ERR Error Interrupt 00699 * @retval none 00700 */ 00701 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) (FLASH->CR |= (__INTERRUPT__)) 00702 00703 /** 00704 * @brief Disable the specified FLASH interrupt. 00705 * @param __INTERRUPT__ FLASH interrupt 00706 * This parameter can be any combination of the following values: 00707 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt 00708 * @arg @ref FLASH_IT_ERR Error Interrupt 00709 * @retval none 00710 */ 00711 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) (FLASH->CR &= ~(__INTERRUPT__)) 00712 00713 /** 00714 * @brief Get the specified FLASH flag status. 00715 * @param __FLAG__ specifies the FLASH flag to check. 00716 * This parameter can be one of the following values: 00717 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag 00718 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protected error flag 00719 * @arg @ref FLASH_FLAG_PGERR FLASH Programming error flag 00720 * @arg @ref FLASH_FLAG_BSY FLASH Busy flag 00721 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match 00722 * @retval The new state of __FLAG__ (SET or RESET). 00723 */ 00724 #define __HAL_FLASH_GET_FLAG(__FLAG__) (((__FLAG__) == FLASH_FLAG_OPTVERR) ? \ 00725 (FLASH->OBR & FLASH_OBR_OPTERR) : \ 00726 (FLASH->SR & (__FLAG__))) 00727 /** 00728 * @brief Clear the specified FLASH flag. 00729 * @param __FLAG__ specifies the FLASH flags to clear. 00730 * This parameter can be any combination of the following values: 00731 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag 00732 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protected error flag 00733 * @arg @ref FLASH_FLAG_PGERR FLASH Programming error flag 00734 * @arg @ref FLASH_FLAG_OPTVERR Loaded OB and its complement do not match 00735 * @retval none 00736 */ 00737 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { \ 00738 /* Clear FLASH_FLAG_OPTVERR flag */ \ 00739 if ((__FLAG__) == FLASH_FLAG_OPTVERR) \ 00740 { \ 00741 CLEAR_BIT(FLASH->OBR, FLASH_OBR_OPTERR); \ 00742 } \ 00743 else { \ 00744 /* Clear Flag in Bank1 */ \ 00745 FLASH->SR = (__FLAG__); \ 00746 } \ 00747 } while(0) 00748 00749 #endif 00750 00751 /** 00752 * @} 00753 */ 00754 00755 /** 00756 * @} 00757 */ 00758 00759 /* Exported functions --------------------------------------------------------*/ 00760 /** @addtogroup FLASHEx_Exported_Functions 00761 * @{ 00762 */ 00763 00764 /** @addtogroup FLASHEx_Exported_Functions_Group1 00765 * @{ 00766 */ 00767 /* IO operation functions *****************************************************/ 00768 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); 00769 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); 00770 00771 /** 00772 * @} 00773 */ 00774 00775 /** @addtogroup FLASHEx_Exported_Functions_Group2 00776 * @{ 00777 */ 00778 /* Peripheral Control functions ***********************************************/ 00779 HAL_StatusTypeDef HAL_FLASHEx_OBErase(void); 00780 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); 00781 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); 00782 uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress); 00783 /** 00784 * @} 00785 */ 00786 00787 /** 00788 * @} 00789 */ 00790 00791 /** 00792 * @} 00793 */ 00794 00795 /** 00796 * @} 00797 */ 00798 #ifdef __cplusplus 00799 } 00800 #endif 00801 00802 #endif /* __STM32F1xx_HAL_FLASH_EX_H */ 00803 00804 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Generated on Tue Jul 12 2022 15:37:23 by
1.7.2