stm32f1xx_hal_dma_ex.h

00001 /**
00002   ******************************************************************************
00003   * @file    stm32f1xx_hal_dma_ex.h
00004   * @author  MCD Application Team
00005   * @version V1.0.4
00006   * @date    29-April-2016
00007   * @brief   Header file of DMA HAL extension module.
00008   ******************************************************************************
00009   * @attention
00010   *
00011   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
00012   *
00013   * Redistribution and use in source and binary forms, with or without modification,
00014   * are permitted provided that the following conditions are met:
00015   *   1. Redistributions of source code must retain the above copyright notice,
00016   *      this list of conditions and the following disclaimer.
00017   *   2. Redistributions in binary form must reproduce the above copyright notice,
00018   *      this list of conditions and the following disclaimer in the documentation
00019   *      and/or other materials provided with the distribution.
00020   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00021   *      may be used to endorse or promote products derived from this software
00022   *      without specific prior written permission.
00023   *
00024   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00025   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00026   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00027   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00028   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00029   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00030   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00031   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00032   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00033   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00034   *
00035   ******************************************************************************
00036   */
00037 
00038 /* Define to prevent recursive inclusion -------------------------------------*/
00039 #ifndef __STM32F1xx_HAL_DMA_EX_H
00040 #define __STM32F1xx_HAL_DMA_EX_H
00041 
00042 #ifdef __cplusplus
00043  extern "C" {
00044 #endif
00045 
00046 /* Includes ------------------------------------------------------------------*/
00047 #include "stm32f1xx_hal_def.h"
00048 
00049 /** @addtogroup STM32F1xx_HAL_Driver
00050   * @{
00051   */
00052 
00053 /** @defgroup DMAEx DMAEx
00054   * @{
00055   */ 
00056 
00057 /* Exported types ------------------------------------------------------------*/ 
00058 /* Exported constants --------------------------------------------------------*/
00059 /* Exported macro ------------------------------------------------------------*/
00060 /** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros
00061   * @{
00062   */
00063 /* Interrupt & Flag management */
00064 #if defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || \
00065     defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
00066 /** @defgroup DMAEx_High_density_XL_density_Product_devices DMAEx High density and XL density product devices
00067   * @{
00068   */
00069 
00070 /**
00071   * @brief  Returns the current DMA Channel transfer complete flag.
00072   * @param  __HANDLE__: DMA handle
00073   * @retval The specified transfer complete flag index.
00074   */
00075 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
00076 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
00077  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
00078  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
00079  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
00080  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
00081  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
00082  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\
00083  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
00084  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
00085  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
00086  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
00087    DMA_FLAG_TC5)
00088 
00089 /**
00090   * @brief  Returns the current DMA Channel half transfer complete flag.
00091   * @param  __HANDLE__: DMA handle
00092   * @retval The specified half transfer complete flag index.
00093   */      
00094 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
00095 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
00096  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
00097  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
00098  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
00099  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
00100  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
00101  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\
00102  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
00103  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
00104  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
00105  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
00106    DMA_FLAG_HT5)
00107 
00108 /**
00109   * @brief  Returns the current DMA Channel transfer error flag.
00110   * @param  __HANDLE__: DMA handle
00111   * @retval The specified transfer error flag index.
00112   */
00113 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
00114 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
00115  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
00116  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
00117  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
00118  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
00119  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
00120  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\
00121  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
00122  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
00123  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
00124  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
00125    DMA_FLAG_TE5)
00126 
00127 /**
00128   * @brief  Get the DMA Channel pending flags.
00129   * @param  __HANDLE__: DMA handle
00130   * @param  __FLAG__: Get the specified flag.
00131   *          This parameter can be any combination of the following values:
00132   *            @arg DMA_FLAG_TCx:  Transfer complete flag
00133   *            @arg DMA_FLAG_HTx:  Half transfer complete flag
00134   *            @arg DMA_FLAG_TEx:  Transfer error flag
00135   *         Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.   
00136   * @retval The state of FLAG (SET or RESET).
00137   */
00138 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\
00139 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\
00140   (DMA1->ISR & (__FLAG__)))
00141 
00142 /**
00143   * @brief  Clears the DMA Channel pending flags.
00144   * @param  __HANDLE__: DMA handle
00145   * @param  __FLAG__: specifies the flag to clear.
00146   *          This parameter can be any combination of the following values:
00147   *            @arg DMA_FLAG_TCx:  Transfer complete flag
00148   *            @arg DMA_FLAG_HTx:  Half transfer complete flag
00149   *            @arg DMA_FLAG_TEx:  Transfer error flag
00150   *         Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag.   
00151   * @retval None
00152   */
00153 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \
00154 (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\
00155   (DMA1->IFCR = (__FLAG__)))
00156 
00157 /**
00158   * @}
00159   */
00160 
00161 #else
00162 /** @defgroup DMA_Low_density_Medium_density_Product_devices DMA Low density and Medium density product devices
00163   * @{
00164   */
00165 
00166 /**
00167   * @brief  Returns the current DMA Channel transfer complete flag.
00168   * @param  __HANDLE__: DMA handle
00169   * @retval The specified transfer complete flag index.
00170   */
00171 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
00172 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
00173  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
00174  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
00175  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
00176  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
00177  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
00178    DMA_FLAG_TC7)
00179 
00180 /**
00181   * @brief  Returns the current DMA Channel half transfer complete flag.
00182   * @param  __HANDLE__: DMA handle
00183   * @retval The specified half transfer complete flag index.
00184   */      
00185 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
00186 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
00187  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
00188  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
00189  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
00190  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
00191  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
00192    DMA_FLAG_HT7)
00193 
00194 /**
00195   * @brief  Returns the current DMA Channel transfer error flag.
00196   * @param  __HANDLE__: DMA handle
00197   * @retval The specified transfer error flag index.
00198   */
00199 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
00200 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
00201  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
00202  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
00203  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
00204  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
00205  ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
00206    DMA_FLAG_TE7)
00207 
00208 /**
00209   * @brief  Get the DMA Channel pending flags.
00210   * @param  __HANDLE__: DMA handle
00211   * @param  __FLAG__: Get the specified flag.
00212   *          This parameter can be any combination of the following values:
00213   *            @arg DMA_FLAG_TCx:  Transfer complete flag
00214   *            @arg DMA_FLAG_HTx:  Half transfer complete flag
00215   *            @arg DMA_FLAG_TEx:  Transfer error flag
00216   *         Where x can be 1_7 to select the DMA Channel flag.   
00217   * @retval The state of FLAG (SET or RESET).
00218   */
00219 
00220 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)   (DMA1->ISR & (__FLAG__))
00221 
00222 /**
00223   * @brief  Clears the DMA Channel pending flags.
00224   * @param  __HANDLE__: DMA handle
00225   * @param  __FLAG__: specifies the flag to clear.
00226   *          This parameter can be any combination of the following values:
00227   *            @arg DMA_FLAG_TCx:  Transfer complete flag
00228   *            @arg DMA_FLAG_HTx:  Half transfer complete flag
00229   *            @arg DMA_FLAG_TEx:  Transfer error flag
00230   *         Where x can be 1_7 to select the DMA Channel flag.   
00231   * @retval None
00232   */
00233 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
00234 
00235 /**
00236   * @}
00237   */
00238 
00239 #endif
00240   
00241 /**
00242   * @}
00243   */
00244 
00245 /**
00246   * @}
00247   */
00248 
00249 /**
00250   * @}
00251   */
00252 
00253 #ifdef __cplusplus
00254 }
00255 #endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || */
00256        /* STM32F103xG || STM32F105xC || STM32F107xC */
00257 
00258 #endif /* __STM32F1xx_HAL_DMA_H */
00259 
00260 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/