stm32f1xx_hal_cortex.c

00001 /**
00002   ******************************************************************************
00003   * @file    stm32f1xx_hal_cortex.c
00004   * @author  MCD Application Team
00005   * @version V1.0.4
00006   * @date    29-April-2016
00007   * @brief   CORTEX HAL module driver.
00008   *
00009   *          This file provides firmware functions to manage the following
00010   *          functionalities of the CORTEX:
00011   *           + Initialization and de-initialization functions
00012   *           + Peripheral Control functions
00013   *          
00014   *  @verbatim    
00015   ==============================================================================
00016                         ##### How to use this driver #####
00017   ==============================================================================
00018 
00019     [..]  
00020     *** How to configure Interrupts using Cortex HAL driver ***
00021     ===========================================================
00022     [..]     
00023     This section provide functions allowing to configure the NVIC interrupts (IRQ).
00024     The Cortex-M3 exceptions are managed by CMSIS functions.
00025    
00026     (#) Configure the NVIC Priority Grouping using HAL_NVIC_SetPriorityGrouping()
00027         function according to the following table.
00028 
00029      The table below gives the allowed values of the pre-emption priority and subpriority according
00030      to the Priority Grouping configuration performed by HAL_NVIC_SetPriorityGrouping() function.
00031        ==========================================================================================================================
00032          NVIC_PriorityGroup   | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority  |       Description
00033        ==========================================================================================================================
00034         NVIC_PRIORITYGROUP_0  |                0                  |            0-15             | 0 bits for pre-emption priority
00035                               |                                   |                             | 4 bits for subpriority
00036        --------------------------------------------------------------------------------------------------------------------------
00037         NVIC_PRIORITYGROUP_1  |                0-1                |            0-7              | 1 bits for pre-emption priority
00038                               |                                   |                             | 3 bits for subpriority
00039        --------------------------------------------------------------------------------------------------------------------------    
00040         NVIC_PRIORITYGROUP_2  |                0-3                |            0-3              | 2 bits for pre-emption priority
00041                               |                                   |                             | 2 bits for subpriority
00042        --------------------------------------------------------------------------------------------------------------------------    
00043         NVIC_PRIORITYGROUP_3  |                0-7                |            0-1              | 3 bits for pre-emption priority
00044                               |                                   |                             | 1 bits for subpriority
00045        --------------------------------------------------------------------------------------------------------------------------    
00046         NVIC_PRIORITYGROUP_4  |                0-15               |            0                | 4 bits for pre-emption priority
00047                               |                                   |                             | 0 bits for subpriority                       
00048        ==========================================================================================================================
00049      (#)  Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority() 
00050 
00051      (#)  Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ() 
00052       
00053 
00054      -@- When the NVIC_PRIORITYGROUP_0 is selected, IRQ pre-emption is no more possible. 
00055          The pending IRQ priority will be managed only by the sub priority.
00056    
00057      -@- IRQ priority order (sorted by highest to lowest priority):
00058         (+@) Lowest pre-emption priority
00059         (+@) Lowest sub priority
00060         (+@) Lowest hardware priority (IRQ number)
00061  
00062     [..]  
00063     *** How to configure Systick using Cortex HAL driver ***
00064     ========================================================
00065     [..]
00066     Setup SysTick Timer for 1 msec interrupts.
00067            
00068    (+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which
00069        is a CMSIS function that:
00070         (++) Configures the SysTick Reload register with value passed as function parameter.
00071         (++) Configures the SysTick IRQ priority to the lowest value (0x0F).
00072         (++) Resets the SysTick Counter register.
00073         (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK).
00074         (++) Enables the SysTick Interrupt.
00075         (++) Starts the SysTick Counter.
00076     
00077    (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the function
00078        HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the
00079        HAL_SYSTICK_Config() function call.
00080 
00081    (+) You can change the SysTick IRQ priority by calling the
00082        HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function 
00083        call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function.
00084 
00085    (+) To adjust the SysTick time base, use the following formula:
00086                             
00087        Reload Value = SysTick Counter Clock (Hz) x  Desired Time base (s)
00088        (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function
00089        (++) Reload Value should not exceed 0xFFFFFF
00090    
00091   @endverbatim
00092   ******************************************************************************
00093   * @attention
00094   *
00095   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
00096   *
00097   * Redistribution and use in source and binary forms, with or without modification,
00098   * are permitted provided that the following conditions are met:
00099   *   1. Redistributions of source code must retain the above copyright notice,
00100   *      this list of conditions and the following disclaimer.
00101   *   2. Redistributions in binary form must reproduce the above copyright notice,
00102   *      this list of conditions and the following disclaimer in the documentation
00103   *      and/or other materials provided with the distribution.
00104   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00105   *      may be used to endorse or promote products derived from this software
00106   *      without specific prior written permission.
00107   *
00108   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00109   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00110   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00111   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00112   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00113   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00114   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00115   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00116   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00117   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00118   *
00119   ******************************************************************************
00120   */
00121 
00122 /* Includes ------------------------------------------------------------------*/
00123 #include "stm32f1xx_hal.h"
00124 
00125 /** @addtogroup STM32F1xx_HAL_Driver
00126   * @{
00127   */
00128 
00129 /** @defgroup CORTEX CORTEX
00130   * @brief CORTEX HAL module driver
00131   * @{
00132   */
00133 
00134 #ifdef HAL_CORTEX_MODULE_ENABLED
00135 
00136 /* Private typedef -----------------------------------------------------------*/
00137 /* Private define ------------------------------------------------------------*/
00138 /* Private macro -------------------------------------------------------------*/
00139 /* Private variables ---------------------------------------------------------*/
00140 /* Private function prototypes -----------------------------------------------*/
00141 /* Private functions ---------------------------------------------------------*/
00142 
00143 /** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions
00144   * @{
00145   */
00146 
00147 
00148 /** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions
00149  *  @brief    Initialization and Configuration functions 
00150  *
00151 @verbatim    
00152   ==============================================================================
00153               ##### Initialization and de-initialization functions #####
00154   ==============================================================================
00155     [..]
00156       This section provide the Cortex HAL driver functions allowing to configure Interrupts
00157       Systick functionalities 
00158 
00159 @endverbatim
00160   * @{
00161   */
00162 
00163 
00164 /**
00165   * @brief  Sets the priority grouping field (pre-emption priority and subpriority)
00166   *         using the required unlock sequence.
00167   * @param  PriorityGroup: The priority grouping bits length. 
00168   *         This parameter can be one of the following values:
00169   *         @arg NVIC_PRIORITYGROUP_0: 0 bits for pre-emption priority
00170   *                                    4 bits for subpriority
00171   *         @arg NVIC_PRIORITYGROUP_1: 1 bits for pre-emption priority
00172   *                                    3 bits for subpriority
00173   *         @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority
00174   *                                    2 bits for subpriority
00175   *         @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority
00176   *                                    1 bits for subpriority
00177   *         @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority
00178   *                                    0 bits for subpriority
00179   * @note   When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible. 
00180   *         The pending IRQ priority will be managed only by the subpriority. 
00181   * @retval None
00182   */
00183 void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
00184 {
00185   /* Check the parameters */
00186   assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
00187   
00188   /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
00189   NVIC_SetPriorityGrouping(PriorityGroup);
00190 }
00191 
00192 /**
00193   * @brief  Sets the priority of an interrupt.
00194   * @param  IRQn: External interrupt number
00195   *         This parameter can be an enumerator of IRQn_Type enumeration
00196   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
00197   * @param  PreemptPriority: The pre-emption priority for the IRQn channel.
00198   *         This parameter can be a value between 0 and 15
00199   *         A lower priority value indicates a higher priority 
00200   * @param  SubPriority: the subpriority level for the IRQ channel.
00201   *         This parameter can be a value between 0 and 15
00202   *         A lower priority value indicates a higher priority.          
00203   * @retval None
00204   */
00205 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
00206 {
00207   uint32_t prioritygroup = 0x00;
00208   
00209   /* Check the parameters */
00210   assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
00211   assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
00212   
00213   prioritygroup = NVIC_GetPriorityGrouping();
00214   
00215   NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
00216 }
00217 
00218 /**
00219   * @brief  Enables a device specific interrupt in the NVIC interrupt controller.
00220   * @note   To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
00221   *         function should be called before. 
00222   * @param  IRQn External interrupt number
00223   *         This parameter can be an enumerator of IRQn_Type enumeration
00224   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
00225   * @retval None
00226   */
00227 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
00228 {
00229   /* Check the parameters */
00230   assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
00231 
00232   /* Enable interrupt */
00233   NVIC_EnableIRQ(IRQn);
00234 }
00235 
00236 /**
00237   * @brief  Disables a device specific interrupt in the NVIC interrupt controller.
00238   * @param  IRQn External interrupt number
00239   *         This parameter can be an enumerator of IRQn_Type enumeration
00240   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))  
00241   * @retval None
00242   */
00243 void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
00244 {
00245   /* Check the parameters */
00246   assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
00247 
00248 
00249   /* Disable interrupt */
00250   NVIC_DisableIRQ(IRQn);
00251 }
00252 
00253 /**
00254   * @brief  Initiates a system reset request to reset the MCU.
00255   * @retval None
00256   */
00257 void HAL_NVIC_SystemReset(void)
00258 {
00259   /* System Reset */
00260   NVIC_SystemReset();
00261 }
00262 
00263 /**
00264   * @brief  Initializes the System Timer and its interrupt, and starts the System Tick Timer.
00265   *         Counter is in free running mode to generate periodic interrupts.
00266   * @param  TicksNumb: Specifies the ticks Number of ticks between two interrupts.
00267   * @retval status:  - 0  Function succeeded.
00268   *                  - 1  Function failed.
00269   */
00270 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
00271 {
00272    return SysTick_Config(TicksNumb);
00273 }
00274 /**
00275   * @}
00276   */
00277 
00278 /** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions
00279  *  @brief    Cortex control functions 
00280  *
00281 @verbatim   
00282   ==============================================================================
00283                       ##### Peripheral Control functions #####
00284   ==============================================================================
00285     [..]
00286       This subsection provides a set of functions allowing to control the CORTEX
00287       (NVIC, SYSTICK, MPU) functionalities. 
00288  
00289       
00290 @endverbatim
00291   * @{
00292   */
00293 
00294 #if (__MPU_PRESENT == 1)
00295 /**
00296   * @brief  Initializes and configures the Region and the memory to be protected.
00297   * @param  MPU_Init: Pointer to a MPU_Region_InitTypeDef structure that contains
00298   *                the initialization and configuration information.
00299   * @retval None
00300   */
00301 void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
00302 {
00303   /* Check the parameters */
00304   assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number));
00305   assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable));
00306 
00307   /* Set the Region number */
00308   MPU->RNR = MPU_Init->Number;
00309 
00310   if ((MPU_Init->Enable) != RESET)
00311   {
00312     /* Check the parameters */
00313     assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec));
00314     assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission));
00315     assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField));
00316     assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable));
00317     assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable));
00318     assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
00319     assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
00320     assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));
00321     
00322     MPU->RBAR = MPU_Init->BaseAddress;
00323     MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
00324                 ((uint32_t)MPU_Init->AccessPermission        << MPU_RASR_AP_Pos)   |
00325                 ((uint32_t)MPU_Init->TypeExtField            << MPU_RASR_TEX_Pos)  |
00326                 ((uint32_t)MPU_Init->IsShareable             << MPU_RASR_S_Pos)    |
00327                 ((uint32_t)MPU_Init->IsCacheable             << MPU_RASR_C_Pos)    |
00328                 ((uint32_t)MPU_Init->IsBufferable            << MPU_RASR_B_Pos)    |
00329                 ((uint32_t)MPU_Init->SubRegionDisable        << MPU_RASR_SRD_Pos)  |
00330                 ((uint32_t)MPU_Init->Size                    << MPU_RASR_SIZE_Pos) |
00331                 ((uint32_t)MPU_Init->Enable                  << MPU_RASR_ENABLE_Pos);
00332   }
00333   else
00334   {
00335     MPU->RBAR = 0x00;
00336     MPU->RASR = 0x00;
00337   }
00338 }
00339 #endif /* __MPU_PRESENT */
00340 
00341 /**
00342   * @brief  Gets the priority grouping field from the NVIC Interrupt Controller.
00343   * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field)
00344   */
00345 uint32_t HAL_NVIC_GetPriorityGrouping(void)
00346 {
00347   /* Get the PRIGROUP[10:8] field value */
00348   return NVIC_GetPriorityGrouping();
00349 }
00350 
00351 /**
00352   * @brief  Gets the priority of an interrupt.
00353   * @param  IRQn: External interrupt number
00354   *         This parameter can be an enumerator of IRQn_Type enumeration
00355   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
00356   * @param   PriorityGroup: the priority grouping bits length.
00357   *         This parameter can be one of the following values:
00358   *           @arg NVIC_PRIORITYGROUP_0: 0 bits for pre-emption priority
00359   *                                      4 bits for subpriority
00360   *           @arg NVIC_PRIORITYGROUP_1: 1 bits for pre-emption priority
00361   *                                      3 bits for subpriority
00362   *           @arg NVIC_PRIORITYGROUP_2: 2 bits for pre-emption priority
00363   *                                      2 bits for subpriority
00364   *           @arg NVIC_PRIORITYGROUP_3: 3 bits for pre-emption priority
00365   *                                      1 bits for subpriority
00366   *           @arg NVIC_PRIORITYGROUP_4: 4 bits for pre-emption priority
00367   *                                      0 bits for subpriority
00368   * @param  pPreemptPriority: Pointer on the Preemptive priority value (starting from 0).
00369   * @param  pSubPriority: Pointer on the Subpriority value (starting from 0).
00370   * @retval None
00371   */
00372 void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
00373 {
00374   /* Check the parameters */
00375   assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
00376  /* Get priority for Cortex-M system or device specific interrupts */
00377   NVIC_DecodePriority(NVIC_GetPriority(IRQn), PriorityGroup, pPreemptPriority, pSubPriority);
00378 }
00379 
00380 /**
00381   * @brief  Sets Pending bit of an external interrupt.
00382   * @param  IRQn External interrupt number
00383   *         This parameter can be an enumerator of IRQn_Type enumeration
00384   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))  
00385   * @retval None
00386   */
00387 void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
00388 { 
00389   /* Set interrupt pending */
00390   NVIC_SetPendingIRQ(IRQn);
00391 }
00392 
00393 /**
00394   * @brief Gets Pending Interrupt (reads the pending register in the NVIC 
00395   *         and returns the pending bit for the specified interrupt).
00396   * @param IRQn External interrupt number
00397   *         This parameter can be an enumerator of IRQn_Type enumeration
00398   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))  
00399   * @retval status: - 0  Interrupt status is not pending.
00400   *                 - 1  Interrupt status is pending.
00401   */
00402 uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
00403 { 
00404   /* Return 1 if pending else 0 */
00405   return NVIC_GetPendingIRQ(IRQn);
00406 }
00407 
00408 /**
00409   * @brief Clears the pending bit of an external interrupt.
00410   * @param IRQn External interrupt number
00411   *         This parameter can be an enumerator of IRQn_Type enumeration
00412   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))  
00413   * @retval None
00414   */
00415 void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
00416 { 
00417   /* Clear pending interrupt */
00418   NVIC_ClearPendingIRQ(IRQn);
00419 }
00420 
00421 /**
00422   * @brief Gets active interrupt ( reads the active register in NVIC and returns the active bit).
00423   * @param IRQn External interrupt number
00424   *         This parameter can be an enumerator of IRQn_Type enumeration
00425   *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))  
00426   * @retval status: - 0  Interrupt status is not pending.
00427   *                 - 1  Interrupt status is pending.
00428   */
00429 uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn)
00430 { 
00431   /* Return 1 if active else 0 */
00432   return NVIC_GetActive(IRQn);
00433 }
00434 
00435 /**
00436   * @brief  Configures the SysTick clock source.
00437   * @param  CLKSource: specifies the SysTick clock source.
00438   *         This parameter can be one of the following values:
00439   *             @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
00440   *             @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
00441   * @retval None
00442   */
00443 void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
00444 {
00445   /* Check the parameters */
00446   assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
00447   if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
00448   {
00449     SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
00450   }
00451   else
00452   {
00453     SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
00454   }
00455 }
00456 
00457 /**
00458   * @brief  This function handles SYSTICK interrupt request.
00459   * @retval None
00460   */
00461 void HAL_SYSTICK_IRQHandler(void)
00462 {
00463   HAL_SYSTICK_Callback();
00464 }
00465 
00466 /**
00467   * @brief  SYSTICK callback.
00468   * @retval None
00469   */
00470 __weak void HAL_SYSTICK_Callback(void)
00471 {
00472   /* NOTE : This function Should not be modified, when the callback is needed,
00473             the HAL_SYSTICK_Callback could be implemented in the user file
00474    */
00475 }
00476 
00477 /**
00478   * @}
00479   */
00480 
00481 /**
00482   * @}
00483   */
00484 
00485 #endif /* HAL_CORTEX_MODULE_ENABLED */
00486 /**
00487   * @}
00488   */
00489 
00490 /**
00491   * @}
00492   */
00493 
00494 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/