owm_regs.h

00001 /* ****************************************************************************
00002  * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
00003  *
00004  * Permission is hereby granted, free of charge, to any person obtaining a
00005  * copy of this software and associated documentation files (the "Software"),
00006  * to deal in the Software without restriction, including without limitation
00007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
00008  * and/or sell copies of the Software, and to permit persons to whom the
00009  * Software is furnished to do so, subject to the following conditions:
00010  *
00011  * The above copyright notice and this permission notice shall be included
00012  * in all copies or substantial portions of the Software.
00013  *
00014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
00015  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
00016  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
00017  * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
00018  * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
00019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
00020  * OTHER DEALINGS IN THE SOFTWARE.
00021  *
00022  * Except as contained in this notice, the name of Maxim Integrated
00023  * Products, Inc. shall not be used except as stated in the Maxim Integrated
00024  * Products, Inc. Branding Policy.
00025  *
00026  * The mere transfer of this software does not imply any licenses
00027  * of trade secrets, proprietary technology, copyrights, patents,
00028  * trademarks, maskwork rights, or any other form of intellectual
00029  * property whatsoever. Maxim Integrated Products, Inc. retains all
00030  * ownership rights.
00031  *
00032  **************************************************************************** */
00033 
00034 /* Define to prevent redundant inclusion */
00035 #ifndef _MXC_OWM_REGS_H_
00036 #define _MXC_OWM_REGS_H_
00037 
00038 #include <stdint.h>
00039 
00040 #ifdef __cplusplus
00041 extern "C" {
00042 #endif
00043 
00044 /*
00045     If types are not defined elsewhere (CMSIS) define them here
00046 */
00047 ///@cond
00048 #ifndef __IO
00049 #define __IO volatile
00050 #endif
00051 #ifndef __I
00052 #define __I  volatile const
00053 #endif
00054 #ifndef __O
00055 #define __O  volatile
00056 #endif
00057 #ifndef __R
00058 #define __R  volatile const
00059 #endif
00060 ///@endcond
00061 
00062 
00063 /**
00064  * @defgroup    owm_registers Registers
00065  * @brief       Registers, Bit Masks and Bit Positions
00066  * @ingroup     owm
00067  * @{
00068  */
00069 /**
00070  * Structure type for the 1-Wire Master module registers allowing direct 32-bit access to each register.
00071  */
00072 typedef struct {
00073     __IO uint32_t cfg;                                  /**< <tt>\b 0x0000:</tt> OWM_CFG Register - 1-Wire Master Configuration           */
00074     __IO uint32_t clk_div_1us;                          /**< <tt>\b 0x0004:</tt> OWM_CLK_DIV_1US Register - 1-Wire Master Clock Divisor   */
00075     __IO uint32_t ctrl_stat;                            /**< <tt>\b 0x0008:</tt> OWM_CTRL_STAT Register - 1-Wire Master Control/Status    */
00076     __IO uint32_t data;                                 /**< <tt>\b 0x000C:</tt> OWM_DATA Register - 1-Wire Master Data Buffer            */
00077     __IO uint32_t intfl;                                /**< <tt>\b 0x0010:</tt> OWM_INTFL Register - 1-Wire Master Interrupt Flags       */
00078     __IO uint32_t inten;                                /**< <tt>\b 0x0014:</tt> OWM_INTEN Register - 1-Wire Master Interrupt Enables     */
00079 } mxc_owm_regs_t;
00080 /**@} end of group owm_registers */
00081 
00082 /**
00083  * @defgroup   OWM_Register_Offsets Register Offsets
00084  * @ingroup    owm_registers
00085  * @brief      1-Wire Master register offsets from the 1-Wire Master Base Peripheral Address.
00086  * @{
00087  */
00088 #define MXC_R_OWM_OFFS_CFG                                  ((uint32_t)0x00000000UL)        /**< Offset from the OWM Base Peripheral Address:<tt>\b 0x0000:</tt>*/
00089 #define MXC_R_OWM_OFFS_CLK_DIV_1US                          ((uint32_t)0x00000004UL)        /**< Offset from the OWM Base Peripheral Address:<tt>\b 0x0004:</tt>*/
00090 #define MXC_R_OWM_OFFS_CTRL_STAT                            ((uint32_t)0x00000008UL)        /**< Offset from the OWM Base Peripheral Address:<tt>\b 0x0008:</tt>*/
00091 #define MXC_R_OWM_OFFS_DATA                                 ((uint32_t)0x0000000CUL)        /**< Offset from the OWM Base Peripheral Address:<tt>\b 0x000C:</tt>*/
00092 #define MXC_R_OWM_OFFS_INTFL                                ((uint32_t)0x00000010UL)        /**< Offset from the OWM Base Peripheral Address:<tt>\b 0x0010:</tt>*/
00093 #define MXC_R_OWM_OFFS_INTEN                                ((uint32_t)0x00000014UL)        /**< Offset from the OWM Base Peripheral Address:<tt>\b 0x0014:</tt>*/
00094 /**@} end of group OWM_Register_Offsets */
00095 
00096 /*
00097    Field positions and masks for module OWM.
00098 */
00099 /**
00100  * @defgroup    owm_cfg OWM_CFG
00101  * @ingroup     owm_registers
00102  * @brief       Field Positions and Masks
00103  */
00104 #define MXC_F_OWM_CFG_LONG_LINE_MODE_POS                    0                                                                     /**< LONG_LINE_MODE Position  */
00105 #define MXC_F_OWM_CFG_LONG_LINE_MODE                        ((uint32_t)(0x00000001UL << MXC_F_OWM_CFG_LONG_LINE_MODE_POS))        /**< LONG_LINE_MODE Mask  */
00106 #define MXC_F_OWM_CFG_FORCE_PRES_DET_POS                    1                                                                     /**< FORCE_PRES_DET Position  */
00107 #define MXC_F_OWM_CFG_FORCE_PRES_DET                        ((uint32_t)(0x00000001UL << MXC_F_OWM_CFG_FORCE_PRES_DET_POS))        /**< FORCE_PRES_DET Mask  */
00108 #define MXC_F_OWM_CFG_BIT_BANG_EN_POS                       2                                                                     /**< BIT_BANG_EN Position  */
00109 #define MXC_F_OWM_CFG_BIT_BANG_EN                           ((uint32_t)(0x00000001UL << MXC_F_OWM_CFG_BIT_BANG_EN_POS))           /**< BIT_BANG_EN Mask  */
00110 #define MXC_F_OWM_CFG_EXT_PULLUP_MODE_POS                   3                                                                     /**< EXT_PULLUP_MODE Position  */
00111 #define MXC_F_OWM_CFG_EXT_PULLUP_MODE                       ((uint32_t)(0x00000001UL << MXC_F_OWM_CFG_EXT_PULLUP_MODE_POS))       /**< EXT_PULLUP_MODE Mask  */
00112 #define MXC_F_OWM_CFG_EXT_PULLUP_ENABLE_POS                 4                                                                     /**< EXT_PULLUP_ENABLE Position  */
00113 #define MXC_F_OWM_CFG_EXT_PULLUP_ENABLE                     ((uint32_t)(0x00000001UL << MXC_F_OWM_CFG_EXT_PULLUP_ENABLE_POS))     /**< EXT_PULLUP_ENABLE Mask  */
00114 #define MXC_F_OWM_CFG_SINGLE_BIT_MODE_POS                   5                                                                     /**< SINGLE_BIT_MODE Position  */
00115 #define MXC_F_OWM_CFG_SINGLE_BIT_MODE                       ((uint32_t)(0x00000001UL << MXC_F_OWM_CFG_SINGLE_BIT_MODE_POS))       /**< SINGLE_BIT_MODE Mask  */
00116 #define MXC_F_OWM_CFG_OVERDRIVE_POS                         6                                                                     /**< OVERDRIVE Position  */
00117 #define MXC_F_OWM_CFG_OVERDRIVE                             ((uint32_t)(0x00000001UL << MXC_F_OWM_CFG_OVERDRIVE_POS))             /**< OVERDRIVE Mask  */
00118 #define MXC_F_OWM_CFG_INT_PULLUP_ENABLE_POS                 7                                                                     /**< INT_PULLUP_ENABLE Position  */
00119 #define MXC_F_OWM_CFG_INT_PULLUP_ENABLE                     ((uint32_t)(0x00000001UL << MXC_F_OWM_CFG_INT_PULLUP_ENABLE_POS))     /**< INT_PULLUP_ENABLE Mask  */
00120 /**@} end of group owm_cfg*/
00121 /**
00122  * @defgroup    owm_clk_div OWM_CLK_DIV
00123  * @ingroup     owm_registers
00124  * @brief       Field Positions and Masks
00125  */
00126 #define MXC_F_OWM_CLK_DIV_1US_DIVISOR_POS                   0                                                                     /**< 1US_DIVISOR Position  */
00127 #define MXC_F_OWM_CLK_DIV_1US_DIVISOR                       ((uint32_t)(0x000000FFUL << MXC_F_OWM_CLK_DIV_1US_DIVISOR_POS))       /**< 1US_DIVISOR Mask  */
00128 /**@} end of group owm_clk_cfg*/
00129 /**
00130  * @defgroup    owm_ctrl_stat OWM_CTRL_STAT
00131  * @ingroup     owm_registers
00132  * @brief       Field Positions and Masks
00133  */
00134 #define MXC_F_OWM_CTRL_STAT_START_OW_RESET_POS              0                                                                     /**< START_OW_RESET Position  */
00135 #define MXC_F_OWM_CTRL_STAT_START_OW_RESET                  ((uint32_t)(0x00000001UL << MXC_F_OWM_CTRL_STAT_START_OW_RESET_POS))  /**< START_OW_RESET Mask  */
00136 #define MXC_F_OWM_CTRL_STAT_SRA_MODE_POS                    1                                                                     /**< SRA_MODE Position  */
00137 #define MXC_F_OWM_CTRL_STAT_SRA_MODE                        ((uint32_t)(0x00000001UL << MXC_F_OWM_CTRL_STAT_SRA_MODE_POS))        /**< SRA_MODE Mask  */
00138 #define MXC_F_OWM_CTRL_STAT_BIT_BANG_OE_POS                 2                                                                     /**< BIT_BANG_OE Position  */
00139 #define MXC_F_OWM_CTRL_STAT_BIT_BANG_OE                     ((uint32_t)(0x00000001UL << MXC_F_OWM_CTRL_STAT_BIT_BANG_OE_POS))     /**< BIT_BANG_OE Mask  */
00140 #define MXC_F_OWM_CTRL_STAT_OW_INPUT_POS                    3                                                                     /**< OW_INPUT Position  */
00141 #define MXC_F_OWM_CTRL_STAT_OW_INPUT                        ((uint32_t)(0x00000001UL << MXC_F_OWM_CTRL_STAT_OW_INPUT_POS))        /**< OW_INPUT Mask  */
00142 #define MXC_F_OWM_CTRL_STAT_OD_SPEC_MODE_POS                4                                                                     /**< OD_SPEC_MODE Position  */
00143 #define MXC_F_OWM_CTRL_STAT_OD_SPEC_MODE                    ((uint32_t)(0x00000001UL << MXC_F_OWM_CTRL_STAT_OD_SPEC_MODE_POS))    /**< OD_SPEC_MODE Mask  */
00144 #define MXC_F_OWM_CTRL_STAT_EXT_PULLUP_POL_POS              5                                                                     /**< EXT_PULLUP_POL Position  */
00145 #define MXC_F_OWM_CTRL_STAT_EXT_PULLUP_POL                  ((uint32_t)(0x00000001UL << MXC_F_OWM_CTRL_STAT_EXT_PULLUP_POL_POS))  /**< EXT_PULLUP_POL Mask  */
00146 #define MXC_F_OWM_CTRL_STAT_PRESENCE_DETECT_POS             7                                                                     /**< PRESENCE_DETECT Position  */
00147 #define MXC_F_OWM_CTRL_STAT_PRESENCE_DETECT                 ((uint32_t)(0x00000001UL << MXC_F_OWM_CTRL_STAT_PRESENCE_DETECT_POS)) /**< PRESENCE_DETECT Mask  */
00148 /**@} end of group owm_ctrl*/
00149 /**
00150  * @defgroup    owm_data OWM_DATA
00151  * @ingroup     owm_registers
00152  * @brief       Field Positions and Masks
00153  */
00154 #define MXC_F_OWM_DATA_TX_RX_POS                            0                                                                     /**< TX_RX Position  */
00155 #define MXC_F_OWM_DATA_TX_RX                                ((uint32_t)(0x000000FFUL << MXC_F_OWM_DATA_TX_RX_POS))                /**< TX_RX Mask  */
00156 /**@} end of group owm_data*/
00157 /**
00158  * @defgroup    owm_intfl OWM_INTFL
00159  * @ingroup     owm_registers
00160  * @brief       Field Positions and Masks
00161  */
00162 #define MXC_F_OWM_INTFL_OW_RESET_DONE_POS                   0                                                                     /**< OW_RESET_DONE Position  */
00163 #define MXC_F_OWM_INTFL_OW_RESET_DONE                       ((uint32_t)(0x00000001UL << MXC_F_OWM_INTFL_OW_RESET_DONE_POS))       /**< OW_RESET_DONE Mask  */
00164 #define MXC_F_OWM_INTFL_TX_DATA_EMPTY_POS                   1                                                                     /**< TX_DATA_EMPTY Position  */
00165 #define MXC_F_OWM_INTFL_TX_DATA_EMPTY                       ((uint32_t)(0x00000001UL << MXC_F_OWM_INTFL_TX_DATA_EMPTY_POS))       /**< TX_DATA_EMPTY Mask  */
00166 #define MXC_F_OWM_INTFL_RX_DATA_READY_POS                   2                                                                     /**< RX_DATA_READY Position  */
00167 #define MXC_F_OWM_INTFL_RX_DATA_READY                       ((uint32_t)(0x00000001UL << MXC_F_OWM_INTFL_RX_DATA_READY_POS))       /**< RX_DATA_READY Mask  */
00168 #define MXC_F_OWM_INTFL_LINE_SHORT_POS                      3                                                                     /**< LINE_SHORT Position  */
00169 #define MXC_F_OWM_INTFL_LINE_SHORT                          ((uint32_t)(0x00000001UL << MXC_F_OWM_INTFL_LINE_SHORT_POS))          /**< LINE_SHORT Mask  */
00170 #define MXC_F_OWM_INTFL_LINE_LOW_POS                        4                                                                     /**< LINE_LOW Position  */
00171 #define MXC_F_OWM_INTFL_LINE_LOW                            ((uint32_t)(0x00000001UL << MXC_F_OWM_INTFL_LINE_LOW_POS))            /**< LINE_LOW Mask  */
00172 /**@} end of group owm_intfl*/
00173 /**
00174  * @defgroup    owm_inten OWM_INTEN
00175  * @ingroup     owm_registers
00176  * @brief       Field Positions and Masks
00177  */
00178 #define MXC_F_OWM_INTEN_OW_RESET_DONE_POS                   0                                                                     /**< OW_RESET_DONE Position  */
00179 #define MXC_F_OWM_INTEN_OW_RESET_DONE                       ((uint32_t)(0x00000001UL << MXC_F_OWM_INTEN_OW_RESET_DONE_POS))       /**< OW_RESET_DONE Mask  */
00180 #define MXC_F_OWM_INTEN_TX_DATA_EMPTY_POS                   1                                                                     /**< TX_DATA_EMPTY Position  */
00181 #define MXC_F_OWM_INTEN_TX_DATA_EMPTY                       ((uint32_t)(0x00000001UL << MXC_F_OWM_INTEN_TX_DATA_EMPTY_POS))       /**< TX_DATA_EMPTY Mask  */
00182 #define MXC_F_OWM_INTEN_RX_DATA_READY_POS                   2                                                                     /**< RX_DATA_READY Position  */
00183 #define MXC_F_OWM_INTEN_RX_DATA_READY                       ((uint32_t)(0x00000001UL << MXC_F_OWM_INTEN_RX_DATA_READY_POS))       /**< RX_DATA_READY Mask  */
00184 #define MXC_F_OWM_INTEN_LINE_SHORT_POS                      3                                                                     /**< LINE_SHORT Position  */
00185 #define MXC_F_OWM_INTEN_LINE_SHORT                          ((uint32_t)(0x00000001UL << MXC_F_OWM_INTEN_LINE_SHORT_POS))          /**< LINE_SHORT Mask  */
00186 #define MXC_F_OWM_INTEN_LINE_LOW_POS                        4                                                                     /**< LINE_LOW Position  */
00187 #define MXC_F_OWM_INTEN_LINE_LOW                            ((uint32_t)(0x00000001UL << MXC_F_OWM_INTEN_LINE_LOW_POS))            /**< LINE_LOW Mask  */
00188 /**@} end of group owm_inten*/
00189 /**
00190  * @ingroup     owm_cfg
00191  * @{
00192  */
00193 #define MXC_V_OWM_CFG_EXT_PULLUP_MODE_UNUSED                ((uint32_t)(0x00000000UL))        /**< External Pullup Mode Value: Unused */
00194 #define MXC_V_OWM_CFG_EXT_PULLUP_MODE_USED                  ((uint32_t)(0x00000001UL))        /**< External Pullup Mode Value: Used */
00195 /**@}*/
00196 /**
00197  * @ingroup    owm_ctrl_stat
00198  * @{
00199  */
00200 #define MXC_V_OWM_CTRL_STAT_OD_SPEC_MODE_12US               ((uint32_t)(0x00000000UL))        /**< Overdrive speed setting 12us. */
00201 #define MXC_V_OWM_CTRL_STAT_OD_SPEC_MODE_10US               ((uint32_t)(0x00000001UL))        /**< Overdrive speed setting 10us. */
00202 
00203 #define MXC_V_OWM_CTRL_STAT_EXT_PULLUP_POL_ACT_HIGH         ((uint32_t)(0x00000000UL))        /**< External Pullup Pin Polarity Active High */
00204 #define MXC_V_OWM_CTRL_STAT_EXT_PULLUP_POL_ACT_LOW          ((uint32_t)(0x00000001UL))        /**< External Pullup Pin Polarity Active Low */
00205 /**@}*/
00206 
00207 #ifdef __cplusplus
00208 }
00209 #endif
00210 
00211 #endif   /* _MXC_OWM_REGS_H_ */