uart_regs.h

00001 /* ****************************************************************************
00002  * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
00003  *
00004  * Permission is hereby granted, free of charge, to any person obtaining a
00005  * copy of this software and associated documentation files (the "Software"),
00006  * to deal in the Software without restriction, including without limitation
00007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
00008  * and/or sell copies of the Software, and to permit persons to whom the
00009  * Software is furnished to do so, subject to the following conditions:
00010  *
00011  * The above copyright notice and this permission notice shall be included
00012  * in all copies or substantial portions of the Software.
00013  *
00014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
00015  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
00016  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
00017  * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
00018  * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
00019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
00020  * OTHER DEALINGS IN THE SOFTWARE.
00021  *
00022  * Except as contained in this notice, the name of Maxim Integrated
00023  * Products, Inc. shall not be used except as stated in the Maxim Integrated
00024  * Products, Inc. Branding Policy.
00025  *
00026  * The mere transfer of this software does not imply any licenses
00027  * of trade secrets, proprietary technology, copyrights, patents,
00028  * trademarks, maskwork rights, or any other form of intellectual
00029  * property whatsoever. Maxim Integrated Products, Inc. retains all
00030  * ownership rights.
00031  *
00032  *************************************************************************** */
00033 
00034 /* Define to prevent redundant inclusion */
00035 #ifndef _MXC_UART_REGS_H_
00036 #define _MXC_UART_REGS_H_
00037 
00038 /* **** Includes **** */
00039 #include <stdint.h>
00040 
00041 #ifdef __cplusplus
00042 extern "C" {
00043 #endif
00044 
00045 ///@cond
00046 /*
00047     If types are not defined elsewhere (CMSIS) define them here
00048 */
00049 #ifndef __IO
00050 #define __IO volatile
00051 #endif
00052 #ifndef __I
00053 #define __I  volatile const
00054 #endif
00055 #ifndef __O
00056 #define __O  volatile
00057 #endif
00058 #ifndef __R
00059 #define __R  volatile const
00060 #endif
00061 ///@endcond
00062 
00063 /**
00064  * @defgroup    uart_registers UART Registers
00065  * @brief       Registers, Bit Masks and Bit Positions
00066  * @ingroup     uart_comm
00067  * @{
00068  */
00069 
00070 /**
00071  * Structure type for the UART peripheral registers allowing direct 32-bit access to each register.
00072  */
00073 typedef struct {
00074     __IO uint32_t ctrl;                                 /**< <tt>\b 0x0000:</tt> UART_CTRL Register - UART Control Register.                    */
00075     __IO uint32_t baud;                                 /**< <tt>\b 0x0004:</tt> UART_BAUD Register - UART Baud Control Register.               */
00076     __IO uint32_t tx_fifo_ctrl;                         /**< <tt>\b 0x0008:</tt> UART_TX_FIFO_CTRL Register - UART TX FIFO Control Register.    */
00077     __IO uint32_t rx_fifo_ctrl;                         /**< <tt>\b 0x000C:</tt> UART_RX_FIFO_CTRL Register - UART RX FIFO Control Register.    */
00078     __IO uint32_t md_ctrl;                              /**< <tt>\b 0x0010:</tt> UART_MD_CTRL Register - UART Multidrop Control Register.       */
00079     __IO uint32_t intfl;                                /**< <tt>\b 0x0014:</tt> UART_INTFL Register - UART Interrupt Flags.                    */
00080     __IO uint32_t inten;                                /**< <tt>\b 0x0018:</tt> UART_INTEN Register - UART Interrupt Enable/Disable Control.   */
00081 #if (MXC_UART_REV > 0)
00082     __R  uint32_t idle;                                 /**< <tt>\b 0x001C:</tt> UART_IDLE Register - UART Idle Status                          */
00083 #endif
00084 } mxc_uart_regs_t;
00085 /**@} end of group uart_registers */
00086 
00087 /**
00088  * @defgroup uart_fifos UART TX and RX FIFOs
00089  * @brief TX and RX FIFO access for reads and writes using 8-bit, 16-bit and 32-bit data types.
00090  * @ingroup uart_registers
00091  * @{
00092  */
00093 /**
00094  * Structure type for accessing the UART Transmit and Receive FIFOs.
00095  */
00096 typedef struct {
00097     union {
00098         __IO uint8_t  tx;                               /**< TX FIFO write point for data to transmit.                                          */
00099         __IO uint8_t  tx_8[2048];                       /**< 8-bit access to TX FIFO.                                                           */
00100         __IO uint16_t tx_16[1024];                      /**< 16-bit access to TX FIFO.                                                          */
00101         __IO uint32_t tx_32[512];                       /**< 32-bit access to TX FIFO.                                                          */
00102     };
00103     union {
00104         __IO uint8_t  rx;                               /**< RX FIFO read point for received data.                                              */
00105         __IO uint8_t  rx_8[2048];                       /**< 8-bit access to RX FIFO.                                                           */
00106         __IO uint16_t rx_16[1024];                      /**< 16-bit access to RX FIFO.                                                          */
00107         __IO uint32_t rx_32[512];                       /**< 32-bit access to RX FIFO.                                                          */
00108     };
00109 } mxc_uart_fifo_regs_t;
00110 /**@} end of group uart_fifos */
00111 
00112 /*
00113    Register offsets for module UART.
00114 */
00115 
00116 #define MXC_R_UART_OFFS_CTRL                                ((uint32_t)0x00000000UL)
00117 #define MXC_R_UART_OFFS_BAUD                                ((uint32_t)0x00000004UL)
00118 #define MXC_R_UART_OFFS_TX_FIFO_CTRL                        ((uint32_t)0x00000008UL)
00119 #define MXC_R_UART_OFFS_RX_FIFO_CTRL                        ((uint32_t)0x0000000CUL)
00120 #define MXC_R_UART_OFFS_MD_CTRL                             ((uint32_t)0x00000010UL)
00121 #define MXC_R_UART_OFFS_INTFL                               ((uint32_t)0x00000014UL)
00122 #define MXC_R_UART_OFFS_INTEN                               ((uint32_t)0x00000018UL)
00123 #define MXC_R_UART_FIFO_OFFS_TX                             ((uint32_t)0x00000000UL)
00124 #define MXC_R_UART_FIFO_OFFS_RX                             ((uint32_t)0x00000800UL)
00125 
00126 
00127 /*
00128    Field positions and masks for module UART.
00129 */
00130 
00131 #define MXC_F_UART_CTRL_UART_EN_POS                         0
00132 #define MXC_F_UART_CTRL_UART_EN                             ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_UART_EN_POS))
00133 #define MXC_F_UART_CTRL_RX_FIFO_EN_POS                      1
00134 #define MXC_F_UART_CTRL_RX_FIFO_EN                          ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_RX_FIFO_EN_POS))
00135 #define MXC_F_UART_CTRL_TX_FIFO_EN_POS                      2
00136 #define MXC_F_UART_CTRL_TX_FIFO_EN                          ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_TX_FIFO_EN_POS))
00137 #define MXC_F_UART_CTRL_DATA_SIZE_POS                       4
00138 #define MXC_F_UART_CTRL_DATA_SIZE                           ((uint32_t)(0x00000003UL << MXC_F_UART_CTRL_DATA_SIZE_POS))
00139 #define MXC_F_UART_CTRL_EXTRA_STOP_POS                      8
00140 #define MXC_F_UART_CTRL_EXTRA_STOP                          ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_EXTRA_STOP_POS))
00141 #define MXC_F_UART_CTRL_PARITY_POS                          12
00142 #define MXC_F_UART_CTRL_PARITY                              ((uint32_t)(0x00000003UL << MXC_F_UART_CTRL_PARITY_POS))
00143 #define MXC_F_UART_CTRL_CTS_EN_POS                          16
00144 #define MXC_F_UART_CTRL_CTS_EN                              ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_CTS_EN_POS))
00145 #define MXC_F_UART_CTRL_CTS_POLARITY_POS                    17
00146 #define MXC_F_UART_CTRL_CTS_POLARITY                        ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_CTS_POLARITY_POS))
00147 #define MXC_F_UART_CTRL_RTS_EN_POS                          18
00148 #define MXC_F_UART_CTRL_RTS_EN                              ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_RTS_EN_POS))
00149 #define MXC_F_UART_CTRL_RTS_POLARITY_POS                    19
00150 #define MXC_F_UART_CTRL_RTS_POLARITY                        ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_RTS_POLARITY_POS))
00151 #define MXC_F_UART_CTRL_RTS_LEVEL_POS                       20
00152 #define MXC_F_UART_CTRL_RTS_LEVEL                           ((uint32_t)(0x0000003FUL << MXC_F_UART_CTRL_RTS_LEVEL_POS))
00153 
00154 #define MXC_F_UART_BAUD_BAUD_DIVISOR_POS                    0
00155 #define MXC_F_UART_BAUD_BAUD_DIVISOR                        ((uint32_t)(0x000000FFUL << MXC_F_UART_BAUD_BAUD_DIVISOR_POS))
00156 #define MXC_F_UART_BAUD_BAUD_MODE_POS                       8
00157 #define MXC_F_UART_BAUD_BAUD_MODE                           ((uint32_t)(0x00000003UL << MXC_F_UART_BAUD_BAUD_MODE_POS))
00158 
00159 #define MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY_POS              0
00160 #define MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY                  ((uint32_t)(0x0000001FUL << MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY_POS))
00161 #define MXC_F_UART_TX_FIFO_CTRL_FIFO_AE_LVL_POS             16
00162 #define MXC_F_UART_TX_FIFO_CTRL_FIFO_AE_LVL                 ((uint32_t)(0x0000001FUL << MXC_F_UART_TX_FIFO_CTRL_FIFO_AE_LVL_POS))
00163 
00164 #define MXC_F_UART_RX_FIFO_CTRL_FIFO_ENTRY_POS              0
00165 #define MXC_F_UART_RX_FIFO_CTRL_FIFO_ENTRY                  ((uint32_t)(0x0000001FUL << MXC_F_UART_RX_FIFO_CTRL_FIFO_ENTRY_POS))
00166 #define MXC_F_UART_RX_FIFO_CTRL_FIFO_AF_LVL_POS             16
00167 #define MXC_F_UART_RX_FIFO_CTRL_FIFO_AF_LVL                 ((uint32_t)(0x0000001FUL << MXC_F_UART_RX_FIFO_CTRL_FIFO_AF_LVL_POS))
00168 
00169 #define MXC_F_UART_MD_CTRL_SLAVE_ADDR_POS                   0
00170 #define MXC_F_UART_MD_CTRL_SLAVE_ADDR                       ((uint32_t)(0x000000FFUL << MXC_F_UART_MD_CTRL_SLAVE_ADDR_POS))
00171 #define MXC_F_UART_MD_CTRL_SLAVE_ADDR_MSK_POS               8
00172 #define MXC_F_UART_MD_CTRL_SLAVE_ADDR_MSK                   ((uint32_t)(0x000000FFUL << MXC_F_UART_MD_CTRL_SLAVE_ADDR_MSK_POS))
00173 #define MXC_F_UART_MD_CTRL_MD_MSTR_POS                      16
00174 #define MXC_F_UART_MD_CTRL_MD_MSTR                          ((uint32_t)(0x00000001UL << MXC_F_UART_MD_CTRL_MD_MSTR_POS))
00175 #define MXC_F_UART_MD_CTRL_TX_ADDR_MARK_POS                 17
00176 #define MXC_F_UART_MD_CTRL_TX_ADDR_MARK                     ((uint32_t)(0x00000001UL << MXC_F_UART_MD_CTRL_TX_ADDR_MARK_POS))
00177 
00178 /**
00179  * @defgroup UART_INTFL_Register UART_INTFL
00180  * @ingroup uart_registers
00181  * @{
00182  */
00183 #define MXC_F_UART_INTFL_TX_DONE_POS                        0
00184 #define MXC_F_UART_INTFL_TX_DONE                            ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_TX_DONE_POS))
00185 #define MXC_F_UART_INTFL_TX_UNSTALLED_POS                   1
00186 #define MXC_F_UART_INTFL_TX_UNSTALLED                       ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_TX_UNSTALLED_POS))
00187 #define MXC_F_UART_INTFL_TX_FIFO_AE_POS                     2
00188 #define MXC_F_UART_INTFL_TX_FIFO_AE                         ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_TX_FIFO_AE_POS))
00189 #define MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY_POS              3
00190 #define MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY                  ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY_POS))
00191 #define MXC_F_UART_INTFL_RX_STALLED_POS                     4
00192 #define MXC_F_UART_INTFL_RX_STALLED                         ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_STALLED_POS))
00193 #define MXC_F_UART_INTFL_RX_FIFO_AF_POS                     5
00194 #define MXC_F_UART_INTFL_RX_FIFO_AF                         ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FIFO_AF_POS))
00195 #define MXC_F_UART_INTFL_RX_FIFO_OVERFLOW_POS               6
00196 #define MXC_F_UART_INTFL_RX_FIFO_OVERFLOW                   ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FIFO_OVERFLOW_POS))
00197 #define MXC_F_UART_INTFL_RX_FRAMING_ERR_POS                 7
00198 #define MXC_F_UART_INTFL_RX_FRAMING_ERR                     ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FRAMING_ERR_POS))
00199 #define MXC_F_UART_INTFL_RX_PARITY_ERR_POS                  8
00200 #define MXC_F_UART_INTFL_RX_PARITY_ERR                      ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_PARITY_ERR_POS))
00201 /**@} end of group UART_INTFL_Register */
00202 
00203 #define MXC_F_UART_INTEN_TX_DONE_POS                        0
00204 #define MXC_F_UART_INTEN_TX_DONE                            ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_TX_DONE_POS))
00205 #define MXC_F_UART_INTEN_TX_UNSTALLED_POS                   1
00206 #define MXC_F_UART_INTEN_TX_UNSTALLED                       ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_TX_UNSTALLED_POS))
00207 #define MXC_F_UART_INTEN_TX_FIFO_AE_POS                     2
00208 #define MXC_F_UART_INTEN_TX_FIFO_AE                         ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_TX_FIFO_AE_POS))
00209 #define MXC_F_UART_INTEN_RX_FIFO_NOT_EMPTY_POS              3
00210 #define MXC_F_UART_INTEN_RX_FIFO_NOT_EMPTY                  ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FIFO_NOT_EMPTY_POS))
00211 #define MXC_F_UART_INTEN_RX_STALLED_POS                     4
00212 #define MXC_F_UART_INTEN_RX_STALLED                         ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_STALLED_POS))
00213 #define MXC_F_UART_INTEN_RX_FIFO_AF_POS                     5
00214 #define MXC_F_UART_INTEN_RX_FIFO_AF                         ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FIFO_AF_POS))
00215 #define MXC_F_UART_INTEN_RX_FIFO_OVERFLOW_POS               6
00216 #define MXC_F_UART_INTEN_RX_FIFO_OVERFLOW                   ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FIFO_OVERFLOW_POS))
00217 #define MXC_F_UART_INTEN_RX_FRAMING_ERR_POS                 7
00218 #define MXC_F_UART_INTEN_RX_FRAMING_ERR                     ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FRAMING_ERR_POS))
00219 #define MXC_F_UART_INTEN_RX_PARITY_ERR_POS                  8
00220 #define MXC_F_UART_INTEN_RX_PARITY_ERR                      ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_PARITY_ERR_POS))
00221 
00222 #if (MXC_UART_REV > 0)
00223 #define MXC_F_UART_IDLE_TX_RX_IDLE_POS                      0
00224 #define MXC_F_UART_IDLE_TX_RX_IDLE                          ((uint32_t)(0x00000001UL << MXC_F_UART_IDLE_TX_RX_IDLE_POS))
00225 #define MXC_F_UART_IDLE_TX_IDLE_POS                         1
00226 #define MXC_F_UART_IDLE_TX_IDLE                             ((uint32_t)(0x00000001UL << MXC_F_UART_IDLE_TX_IDLE_POS))
00227 #define MXC_F_UART_IDLE_RX_IDLE_POS                         2
00228 #define MXC_F_UART_IDLE_RX_IDLE                             ((uint32_t)(0x00000001UL << MXC_F_UART_IDLE_RX_IDLE_POS))
00229 #endif
00230 
00231 /*
00232    Field values and shifted values for module UART.
00233 */
00234 
00235 #define MXC_V_UART_CTRL_DATA_SIZE_5_BITS                                        ((uint32_t)(0x00000000UL))
00236 #define MXC_V_UART_CTRL_DATA_SIZE_6_BITS                                        ((uint32_t)(0x00000001UL))
00237 #define MXC_V_UART_CTRL_DATA_SIZE_7_BITS                                        ((uint32_t)(0x00000002UL))
00238 #define MXC_V_UART_CTRL_DATA_SIZE_8_BITS                                        ((uint32_t)(0x00000003UL))
00239 
00240 #define MXC_S_UART_CTRL_DATA_SIZE_5_BITS                                        ((uint32_t)(MXC_V_UART_CTRL_DATA_SIZE_5_BITS   << MXC_F_UART_CTRL_DATA_SIZE_POS))
00241 #define MXC_S_UART_CTRL_DATA_SIZE_6_BITS                                        ((uint32_t)(MXC_V_UART_CTRL_DATA_SIZE_6_BITS   << MXC_F_UART_CTRL_DATA_SIZE_POS))
00242 #define MXC_S_UART_CTRL_DATA_SIZE_7_BITS                                        ((uint32_t)(MXC_V_UART_CTRL_DATA_SIZE_7_BITS   << MXC_F_UART_CTRL_DATA_SIZE_POS))
00243 #define MXC_S_UART_CTRL_DATA_SIZE_8_BITS                                        ((uint32_t)(MXC_V_UART_CTRL_DATA_SIZE_8_BITS   << MXC_F_UART_CTRL_DATA_SIZE_POS))
00244 
00245 #define MXC_V_UART_CTRL_PARITY_DISABLE                                          ((uint32_t)(0x00000000UL))
00246 #define MXC_V_UART_CTRL_PARITY_ODD                                              ((uint32_t)(0x00000001UL))
00247 #define MXC_V_UART_CTRL_PARITY_EVEN                                             ((uint32_t)(0x00000002UL))
00248 #define MXC_V_UART_CTRL_PARITY_MARK                                             ((uint32_t)(0x00000003UL))
00249 
00250 #define MXC_S_UART_CTRL_PARITY_DISABLE                                          ((uint32_t)(MXC_V_UART_CTRL_PARITY_DISABLE  << MXC_F_UART_CTRL_PARITY_POS))
00251 #define MXC_S_UART_CTRL_PARITY_ODD                                              ((uint32_t)(MXC_V_UART_CTRL_PARITY_ODD      << MXC_F_UART_CTRL_PARITY_POS))
00252 #define MXC_S_UART_CTRL_PARITY_EVEN                                             ((uint32_t)(MXC_V_UART_CTRL_PARITY_EVEN     << MXC_F_UART_CTRL_PARITY_POS))
00253 #define MXC_S_UART_CTRL_PARITY_MARK                                             ((uint32_t)(MXC_V_UART_CTRL_PARITY_MARK     << MXC_F_UART_CTRL_PARITY_POS))
00254 
00255 #ifdef __cplusplus
00256 }
00257 #endif
00258 
00259 #endif   /* _MXC_UART_REGS_H_ */