tmr_regs.h

00001 /*******************************************************************************
00002  * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
00003  *
00004  * Permission is hereby granted, free of charge, to any person obtaining a
00005  * copy of this software and associated documentation files (the "Software"),
00006  * to deal in the Software without restriction, including without limitation
00007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
00008  * and/or sell copies of the Software, and to permit persons to whom the
00009  * Software is furnished to do so, subject to the following conditions:
00010  *
00011  * The above copyright notice and this permission notice shall be included
00012  * in all copies or substantial portions of the Software.
00013  *
00014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
00015  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
00016  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
00017  * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
00018  * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
00019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
00020  * OTHER DEALINGS IN THE SOFTWARE.
00021  *
00022  * Except as contained in this notice, the name of Maxim Integrated
00023  * Products, Inc. shall not be used except as stated in the Maxim Integrated
00024  * Products, Inc. Branding Policy.
00025  *
00026  * The mere transfer of this software does not imply any licenses
00027  * of trade secrets, proprietary technology, copyrights, patents,
00028  * trademarks, maskwork rights, or any other form of intellectual
00029  * property whatsoever. Maxim Integrated Products, Inc. retains all
00030  * ownership rights.
00031  *
00032  ******************************************************************************/
00033 
00034 #ifndef _MXC_TMR_REGS_H_
00035 #define _MXC_TMR_REGS_H_
00036 
00037 #ifdef __cplusplus
00038 extern "C" {
00039 #endif
00040 
00041 #include <stdint.h>
00042 
00043 /*
00044     If types are not defined elsewhere (CMSIS) define them here
00045 */
00046 #ifndef __IO
00047 #define __IO volatile
00048 #endif
00049 #ifndef __I
00050 #define __I  volatile const
00051 #endif
00052 #ifndef __O
00053 #define __O  volatile
00054 #endif
00055 #ifndef __R
00056 #define __R  volatile const
00057 #endif
00058 
00059 
00060 /*
00061    Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
00062    access to each register in module.
00063 */
00064 
00065 /*                                                          Offset          Register Description
00066                                                             =============   ============================================================================ */
00067 typedef struct {
00068     __IO uint32_t ctrl;                                 /*  0x0000          Timer Control Register                                                       */
00069     __IO uint32_t count32;                              /*  0x0004          Timer [32 bit] Current Count Value                                           */
00070     __IO uint32_t term_cnt32;                           /*  0x0008          Timer [32 bit] Terminal Count Setting                                        */
00071     __IO uint32_t pwm_cap32;                            /*  0x000C          Timer [32 bit] PWM Compare Setting or Capture/Measure Value                  */
00072     __IO uint32_t count16_0;                            /*  0x0010          Timer [16 bit] Current Count Value, 16-bit Timer 0                           */
00073     __IO uint32_t term_cnt16_0;                         /*  0x0014          Timer [16 bit] Terminal Count Setting, 16-bit Timer 0                        */
00074     __IO uint32_t count16_1;                            /*  0x0018          Timer [16 bit] Current Count Value, 16-bit Timer 1                           */
00075     __IO uint32_t term_cnt16_1;                         /*  0x001C          Timer [16 bit] Terminal Count Setting, 16-bit Timer 1                        */
00076     __IO uint32_t intfl;                                /*  0x0020          Timer Interrupt Flags                                                        */
00077     __IO uint32_t inten;                                /*  0x0024          Timer Interrupt Enable/Disable Settings                                      */
00078 } mxc_tmr_regs_t;
00079 
00080 
00081 /*
00082    Register offsets for module TMR.
00083 */
00084 
00085 #define MXC_R_TMR_OFFS_CTRL                                 ((uint32_t)0x00000000UL)
00086 #define MXC_R_TMR_OFFS_COUNT32                              ((uint32_t)0x00000004UL)
00087 #define MXC_R_TMR_OFFS_TERM_CNT32                           ((uint32_t)0x00000008UL)
00088 #define MXC_R_TMR_OFFS_PWM_CAP32                            ((uint32_t)0x0000000CUL)
00089 #define MXC_R_TMR_OFFS_COUNT16_0                            ((uint32_t)0x00000010UL)
00090 #define MXC_R_TMR_OFFS_TERM_CNT16_0                         ((uint32_t)0x00000014UL)
00091 #define MXC_R_TMR_OFFS_COUNT16_1                            ((uint32_t)0x00000018UL)
00092 #define MXC_R_TMR_OFFS_TERM_CNT16_1                         ((uint32_t)0x0000001CUL)
00093 #define MXC_R_TMR_OFFS_INTFL                                ((uint32_t)0x00000020UL)
00094 #define MXC_R_TMR_OFFS_INTEN                                ((uint32_t)0x00000024UL)
00095 
00096 
00097 /*
00098    Field positions and masks for module TMR.
00099 */
00100 
00101 #define MXC_F_TMR_CTRL_MODE_POS                             0
00102 #define MXC_F_TMR_CTRL_MODE                                 ((uint32_t)(0x00000007UL << MXC_F_TMR_CTRL_MODE_POS))
00103 #define MXC_F_TMR_CTRL_TMR2X16_POS                          3
00104 #define MXC_F_TMR_CTRL_TMR2X16                              ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_TMR2X16_POS))
00105 #define MXC_F_TMR_CTRL_PRESCALE_POS                         4
00106 #define MXC_F_TMR_CTRL_PRESCALE                             ((uint32_t)(0x0000000FUL << MXC_F_TMR_CTRL_PRESCALE_POS))
00107 #define MXC_F_TMR_CTRL_POLARITY_POS                         8
00108 #define MXC_F_TMR_CTRL_POLARITY                             ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_POLARITY_POS))
00109 #define MXC_F_TMR_CTRL_ENABLE0_POS                          12
00110 #define MXC_F_TMR_CTRL_ENABLE0                              ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_ENABLE0_POS))
00111 #define MXC_F_TMR_CTRL_ENABLE1_POS                          13
00112 #define MXC_F_TMR_CTRL_ENABLE1                              ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_ENABLE1_POS))
00113 
00114 #define MXC_F_TMR_COUNT16_0_VALUE_POS                       0
00115 #define MXC_F_TMR_COUNT16_0_VALUE                           ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_COUNT16_0_VALUE_POS))
00116 
00117 #define MXC_F_TMR_TERM_CNT16_0_TERM_COUNT_POS               0
00118 #define MXC_F_TMR_TERM_CNT16_0_TERM_COUNT                   ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_TERM_CNT16_0_TERM_COUNT_POS))
00119 
00120 #define MXC_F_TMR_COUNT16_1_VALUE_POS                       0
00121 #define MXC_F_TMR_COUNT16_1_VALUE                           ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_COUNT16_1_VALUE_POS))
00122 
00123 #define MXC_F_TMR_TERM_CNT16_1_TERM_COUNT_POS               0
00124 #define MXC_F_TMR_TERM_CNT16_1_TERM_COUNT                   ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_TERM_CNT16_1_TERM_COUNT_POS))
00125 
00126 #define MXC_F_TMR_INTFL_TIMER0_POS                          0
00127 #define MXC_F_TMR_INTFL_TIMER0                              ((uint32_t)(0x00000001UL << MXC_F_TMR_INTFL_TIMER0_POS))
00128 #define MXC_F_TMR_INTFL_TIMER1_POS                          1
00129 #define MXC_F_TMR_INTFL_TIMER1                              ((uint32_t)(0x00000001UL << MXC_F_TMR_INTFL_TIMER1_POS))
00130 
00131 #define MXC_F_TMR_INTEN_TIMER0_POS                          0
00132 #define MXC_F_TMR_INTEN_TIMER0                              ((uint32_t)(0x00000001UL << MXC_F_TMR_INTEN_TIMER0_POS))
00133 #define MXC_F_TMR_INTEN_TIMER1_POS                          1
00134 #define MXC_F_TMR_INTEN_TIMER1                              ((uint32_t)(0x00000001UL << MXC_F_TMR_INTEN_TIMER1_POS))
00135 
00136 
00137 
00138 /*
00139    Field values and shifted values for module TMR.
00140 */
00141 
00142 #define MXC_V_TMR_CTRL_MODE_ONE_SHOT                                            ((uint32_t)(0x00000000UL))
00143 #define MXC_V_TMR_CTRL_MODE_CONTINUOUS                                          ((uint32_t)(0x00000001UL))
00144 #define MXC_V_TMR_CTRL_MODE_COUNTER                                             ((uint32_t)(0x00000002UL))
00145 #define MXC_V_TMR_CTRL_MODE_PWM                                                 ((uint32_t)(0x00000003UL))
00146 #define MXC_V_TMR_CTRL_MODE_CAPTURE                                             ((uint32_t)(0x00000004UL))
00147 #define MXC_V_TMR_CTRL_MODE_COMPARE                                             ((uint32_t)(0x00000005UL))
00148 #define MXC_V_TMR_CTRL_MODE_GATED                                               ((uint32_t)(0x00000006UL))
00149 #define MXC_V_TMR_CTRL_MODE_MEASURE                                             ((uint32_t)(0x00000007UL))
00150 
00151 #define MXC_S_TMR_CTRL_MODE_ONE_SHOT                                            ((uint32_t)(MXC_V_TMR_CTRL_MODE_ONE_SHOT    << MXC_F_TMR_CTRL_MODE_POS))
00152 #define MXC_S_TMR_CTRL_MODE_CONTINUOUS                                          ((uint32_t)(MXC_V_TMR_CTRL_MODE_CONTINUOUS  << MXC_F_TMR_CTRL_MODE_POS))
00153 #define MXC_S_TMR_CTRL_MODE_COUNTER                                             ((uint32_t)(MXC_V_TMR_CTRL_MODE_COUNTER     << MXC_F_TMR_CTRL_MODE_POS))
00154 #define MXC_S_TMR_CTRL_MODE_PWM                                                 ((uint32_t)(MXC_V_TMR_CTRL_MODE_PWM         << MXC_F_TMR_CTRL_MODE_POS))
00155 #define MXC_S_TMR_CTRL_MODE_CAPTURE                                             ((uint32_t)(MXC_V_TMR_CTRL_MODE_CAPTURE     << MXC_F_TMR_CTRL_MODE_POS))
00156 #define MXC_S_TMR_CTRL_MODE_COMPARE                                             ((uint32_t)(MXC_V_TMR_CTRL_MODE_COMPARE     << MXC_F_TMR_CTRL_MODE_POS))
00157 #define MXC_S_TMR_CTRL_MODE_GATED                                               ((uint32_t)(MXC_V_TMR_CTRL_MODE_GATED       << MXC_F_TMR_CTRL_MODE_POS))
00158 #define MXC_S_TMR_CTRL_MODE_MEASURE                                             ((uint32_t)(MXC_V_TMR_CTRL_MODE_MEASURE     << MXC_F_TMR_CTRL_MODE_POS))
00159 
00160 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_1                                     ((uint32_t)(0x00000000UL))
00161 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_2                                     ((uint32_t)(0x00000001UL))
00162 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_4                                     ((uint32_t)(0x00000002UL))
00163 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_8                                     ((uint32_t)(0x00000003UL))
00164 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_16                                    ((uint32_t)(0x00000004UL))
00165 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_32                                    ((uint32_t)(0x00000005UL))
00166 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_64                                    ((uint32_t)(0x00000006UL))
00167 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_128                                   ((uint32_t)(0x00000007UL))
00168 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_256                                   ((uint32_t)(0x00000008UL))
00169 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_512                                   ((uint32_t)(0x00000009UL))
00170 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_1024                                  ((uint32_t)(0x0000000AUL))
00171 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_2048                                  ((uint32_t)(0x0000000BUL))
00172 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_4096                                  ((uint32_t)(0x0000000CUL))
00173 
00174 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_1                                     ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_1      << MXC_F_TMR_CTRL_PRESCALE_POS))
00175 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_2                                     ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_2      << MXC_F_TMR_CTRL_PRESCALE_POS))
00176 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_4                                     ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_4      << MXC_F_TMR_CTRL_PRESCALE_POS))
00177 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_8                                     ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_8      << MXC_F_TMR_CTRL_PRESCALE_POS))
00178 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_16                                    ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_16     << MXC_F_TMR_CTRL_PRESCALE_POS))
00179 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_32                                    ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_32     << MXC_F_TMR_CTRL_PRESCALE_POS))
00180 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_64                                    ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_64     << MXC_F_TMR_CTRL_PRESCALE_POS))
00181 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_128                                   ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_128    << MXC_F_TMR_CTRL_PRESCALE_POS))
00182 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_256                                   ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_256    << MXC_F_TMR_CTRL_PRESCALE_POS))
00183 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_512                                   ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_512    << MXC_F_TMR_CTRL_PRESCALE_POS))
00184 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_1024                                  ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_1024   << MXC_F_TMR_CTRL_PRESCALE_POS))
00185 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_2048                                  ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_2048   << MXC_F_TMR_CTRL_PRESCALE_POS))
00186 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_4096                                  ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_4096   << MXC_F_TMR_CTRL_PRESCALE_POS))
00187 
00188 
00189 /*
00190  *  These two 1-bit fields replace the standard 3-bit mode field when the associated TMR module
00191  *  is in dual 16-bit timer mode.
00192  */
00193 
00194 #define MXC_F_TMR_CTRL_MODE_16_0_POS     0
00195 #define MXC_F_TMR_CTRL_MODE_16_0         ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_MODE_16_0_POS))
00196 
00197 #define MXC_F_TMR_CTRL_MODE_16_1_POS     1
00198 #define MXC_F_TMR_CTRL_MODE_16_1         ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_MODE_16_1_POS))
00199 
00200 
00201 #ifdef __cplusplus
00202 }
00203 #endif
00204 
00205 #endif   /* _MXC_TMR_REGS_H_ */