rtc_regs.h

00001 /*******************************************************************************
00002  * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
00003  *
00004  * Permission is hereby granted, free of charge, to any person obtaining a
00005  * copy of this software and associated documentation files (the "Software"),
00006  * to deal in the Software without restriction, including without limitation
00007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
00008  * and/or sell copies of the Software, and to permit persons to whom the
00009  * Software is furnished to do so, subject to the following conditions:
00010  *
00011  * The above copyright notice and this permission notice shall be included
00012  * in all copies or substantial portions of the Software.
00013  *
00014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
00015  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
00016  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
00017  * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
00018  * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
00019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
00020  * OTHER DEALINGS IN THE SOFTWARE.
00021  *
00022  * Except as contained in this notice, the name of Maxim Integrated
00023  * Products, Inc. shall not be used except as stated in the Maxim Integrated
00024  * Products, Inc. Branding Policy.
00025  *
00026  * The mere transfer of this software does not imply any licenses
00027  * of trade secrets, proprietary technology, copyrights, patents,
00028  * trademarks, maskwork rights, or any other form of intellectual
00029  * property whatsoever. Maxim Integrated Products, Inc. retains all
00030  * ownership rights.
00031  *
00032  ******************************************************************************/
00033 
00034 #ifndef _MXC_RTC_REGS_H_
00035 #define _MXC_RTC_REGS_H_
00036 
00037 #ifdef __cplusplus
00038 extern "C" {
00039 #endif
00040 
00041 #include <stdint.h>
00042 
00043 /*
00044     If types are not defined elsewhere (CMSIS) define them here
00045 */
00046 #ifndef __IO
00047 #define __IO volatile
00048 #endif
00049 #ifndef __I
00050 #define __I  volatile const
00051 #endif
00052 #ifndef __O
00053 #define __O  volatile
00054 #endif
00055 #ifndef __R
00056 #define __R  volatile const
00057 #endif
00058 
00059 
00060 /*
00061    Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
00062    access to each register in module.
00063 */
00064 
00065 /*                                                          Offset          Register Description
00066                                                             =============   ============================================================================ */
00067 typedef struct {
00068     __IO uint32_t ctrl;                                 /*  0x0000          RTC Timer Control                                                            */
00069     __IO uint32_t timer;                                /*  0x0004          RTC Timer Count Value                                                        */
00070     __IO uint32_t comp[2];                              /*  0x0008-0x000C   RTC Time of Day Alarm [0..1] Compare Register                                */
00071     __IO uint32_t flags;                                /*  0x0010          CPU Interrupt and RTC Domain Flags                                           */
00072     __IO uint32_t snz_val;                              /*  0x0014          RTC Timer Alarm Snooze Value                                                 */
00073     __IO uint32_t inten;                                /*  0x0018          Interrupt Enable Controls                                                    */
00074     __IO uint32_t prescale;                             /*  0x001C          RTC Timer Prescale Setting                                                   */
00075     __R  uint32_t rsv020;                               /*  0x0020                                                                                       */
00076     __IO uint32_t prescale_mask;                        /*  0x0024          RTC Timer Prescale Compare Mask                                              */
00077     __IO uint32_t trim_ctrl;                            /*  0x0028          RTC Timer Trim Controls                                                      */
00078     __IO uint32_t trim_value;                           /*  0x002C          RTC Timer Trim Adjustment Interval                                           */
00079 } mxc_rtctmr_regs_t;
00080 
00081 
00082 /*                                                          Offset          Register Description
00083                                                             =============   ============================================================================ */
00084 typedef struct {
00085     __IO uint32_t nano_cntr;                            /*  0x0000          Nano Oscillator Counter Read Register                                        */
00086     __IO uint32_t clk_ctrl;                             /*  0x0004          RTC Clock Control Settings                                                   */
00087     __R  uint32_t rsv008;                               /*  0x0008                                                                                       */
00088     __IO uint32_t osc_ctrl;                             /*  0x000C          RTC Oscillator Control                                                       */
00089 } mxc_rtccfg_regs_t;
00090 
00091 
00092 /*
00093    Register offsets for module RTC.
00094 */
00095 
00096 #define MXC_R_RTCTMR_OFFS_CTRL                              ((uint32_t)0x00000000UL)
00097 #define MXC_R_RTCTMR_OFFS_TIMER                             ((uint32_t)0x00000004UL)
00098 #define MXC_R_RTCTMR_OFFS_COMP0                             ((uint32_t)0x00000008UL)
00099 #define MXC_R_RTCTMR_OFFS_COMP1                             ((uint32_t)0x0000000CUL)
00100 #define MXC_R_RTCTMR_OFFS_FLAGS                             ((uint32_t)0x00000010UL)
00101 #define MXC_R_RTCTMR_OFFS_SNZ_VAL                           ((uint32_t)0x00000014UL)
00102 #define MXC_R_RTCTMR_OFFS_INTEN                             ((uint32_t)0x00000018UL)
00103 #define MXC_R_RTCTMR_OFFS_PRESCALE                          ((uint32_t)0x0000001CUL)
00104 #define MXC_R_RTCTMR_OFFS_PRESCALE_MASK                     ((uint32_t)0x00000024UL)
00105 #define MXC_R_RTCTMR_OFFS_TRIM_CTRL                         ((uint32_t)0x00000028UL)
00106 #define MXC_R_RTCTMR_OFFS_TRIM_VALUE                        ((uint32_t)0x0000002CUL)
00107 #define MXC_R_RTCCFG_OFFS_NANO_CNTR                         ((uint32_t)0x00000000UL)
00108 #define MXC_R_RTCCFG_OFFS_CLK_CTRL                          ((uint32_t)0x00000004UL)
00109 #define MXC_R_RTCCFG_OFFS_OSC_CTRL                          ((uint32_t)0x0000000CUL)
00110 
00111 
00112 /*
00113    Field positions and masks for module RTC.
00114 */
00115 
00116 #define MXC_F_RTC_CTRL_ENABLE_POS                           0
00117 #define MXC_F_RTC_CTRL_ENABLE                               ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_ENABLE_POS))
00118 #define MXC_F_RTC_CTRL_CLEAR_POS                            1
00119 #define MXC_F_RTC_CTRL_CLEAR                                ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_CLEAR_POS))
00120 #define MXC_F_RTC_CTRL_PENDING_POS                          2
00121 #define MXC_F_RTC_CTRL_PENDING                              ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_PENDING_POS))
00122 #define MXC_F_RTC_CTRL_USE_ASYNC_FLAGS_POS                  3
00123 #define MXC_F_RTC_CTRL_USE_ASYNC_FLAGS                      ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_USE_ASYNC_FLAGS_POS))
00124 #define MXC_F_RTC_CTRL_AGGRESSIVE_RST_POS                   4
00125 #define MXC_F_RTC_CTRL_AGGRESSIVE_RST                       ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_AGGRESSIVE_RST_POS))
00126 #define MXC_F_RTC_CTRL_AUTO_UPDATE_DISABLE_POS              5
00127 #define MXC_F_RTC_CTRL_AUTO_UPDATE_DISABLE                  ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_AUTO_UPDATE_DISABLE_POS))
00128 #define MXC_F_RTC_CTRL_SNOOZE_ENABLE_POS                    6
00129 #define MXC_F_RTC_CTRL_SNOOZE_ENABLE                        ((uint32_t)(0x00000003UL << MXC_F_RTC_CTRL_SNOOZE_ENABLE_POS))
00130 #define MXC_F_RTC_CTRL_RTC_ENABLE_ACTIVE_POS                16
00131 #define MXC_F_RTC_CTRL_RTC_ENABLE_ACTIVE                    ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_RTC_ENABLE_ACTIVE_POS))
00132 #define MXC_F_RTC_CTRL_OSC_GOTO_LOW_ACTIVE_POS              17
00133 #define MXC_F_RTC_CTRL_OSC_GOTO_LOW_ACTIVE                  ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_OSC_GOTO_LOW_ACTIVE_POS))
00134 #define MXC_F_RTC_CTRL_OSC_FRCE_SM_EN_ACTIVE_POS            18
00135 #define MXC_F_RTC_CTRL_OSC_FRCE_SM_EN_ACTIVE                ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_OSC_FRCE_SM_EN_ACTIVE_POS))
00136 #define MXC_F_RTC_CTRL_OSC_FRCE_ST_ACTIVE_POS               19
00137 #define MXC_F_RTC_CTRL_OSC_FRCE_ST_ACTIVE                   ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_OSC_FRCE_ST_ACTIVE_POS))
00138 #define MXC_F_RTC_CTRL_RTC_SET_ACTIVE_POS                   20
00139 #define MXC_F_RTC_CTRL_RTC_SET_ACTIVE                       ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_RTC_SET_ACTIVE_POS))
00140 #define MXC_F_RTC_CTRL_RTC_CLR_ACTIVE_POS                   21
00141 #define MXC_F_RTC_CTRL_RTC_CLR_ACTIVE                       ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_RTC_CLR_ACTIVE_POS))
00142 #define MXC_F_RTC_CTRL_ROLLOVER_CLR_ACTIVE_POS              22
00143 #define MXC_F_RTC_CTRL_ROLLOVER_CLR_ACTIVE                  ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_ROLLOVER_CLR_ACTIVE_POS))
00144 #define MXC_F_RTC_CTRL_PRESCALE_CMPR0_ACTIVE_POS            23
00145 #define MXC_F_RTC_CTRL_PRESCALE_CMPR0_ACTIVE                ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_PRESCALE_CMPR0_ACTIVE_POS))
00146 #define MXC_F_RTC_CTRL_PRESCALE_UPDATE_ACTIVE_POS           24
00147 #define MXC_F_RTC_CTRL_PRESCALE_UPDATE_ACTIVE               ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_PRESCALE_UPDATE_ACTIVE_POS))
00148 #define MXC_F_RTC_CTRL_CMPR1_CLR_ACTIVE_POS                 25
00149 #define MXC_F_RTC_CTRL_CMPR1_CLR_ACTIVE                     ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_CMPR1_CLR_ACTIVE_POS))
00150 #define MXC_F_RTC_CTRL_CMPR0_CLR_ACTIVE_POS                 26
00151 #define MXC_F_RTC_CTRL_CMPR0_CLR_ACTIVE                     ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_CMPR0_CLR_ACTIVE_POS))
00152 #define MXC_F_RTC_CTRL_TRIM_ENABLE_ACTIVE_POS               27
00153 #define MXC_F_RTC_CTRL_TRIM_ENABLE_ACTIVE                   ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_TRIM_ENABLE_ACTIVE_POS))
00154 #define MXC_F_RTC_CTRL_TRIM_SLOWER_ACTIVE_POS               28
00155 #define MXC_F_RTC_CTRL_TRIM_SLOWER_ACTIVE                   ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_TRIM_SLOWER_ACTIVE_POS))
00156 #define MXC_F_RTC_CTRL_TRIM_CLR_ACTIVE_POS                  29
00157 #define MXC_F_RTC_CTRL_TRIM_CLR_ACTIVE                      ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_TRIM_CLR_ACTIVE_POS))
00158 #define MXC_F_RTC_CTRL_ACTIVE_TRANS_0_POS                   30
00159 #define MXC_F_RTC_CTRL_ACTIVE_TRANS_0                       ((uint32_t)(0x00000001UL << MXC_F_RTC_CTRL_ACTIVE_TRANS_0_POS))
00160 
00161 #define MXC_F_RTC_FLAGS_COMP0_POS                           0
00162 #define MXC_F_RTC_FLAGS_COMP0                               ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP0_POS))
00163 #define MXC_F_RTC_FLAGS_COMP1_POS                           1
00164 #define MXC_F_RTC_FLAGS_COMP1                               ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP1_POS))
00165 #define MXC_F_RTC_FLAGS_PRESCALE_COMP_POS                   2
00166 #define MXC_F_RTC_FLAGS_PRESCALE_COMP                       ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_PRESCALE_COMP_POS))
00167 #define MXC_F_RTC_FLAGS_OVERFLOW_POS                        3
00168 #define MXC_F_RTC_FLAGS_OVERFLOW                            ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_OVERFLOW_POS))
00169 #define MXC_F_RTC_FLAGS_TRIM_POS                            4
00170 #define MXC_F_RTC_FLAGS_TRIM                                ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_TRIM_POS))
00171 #define MXC_F_RTC_FLAGS_SNOOZE_POS                          5
00172 #define MXC_F_RTC_FLAGS_SNOOZE                              ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_SNOOZE_POS))
00173 #define MXC_F_RTC_FLAGS_COMP0_FLAG_A_POS                    8
00174 #define MXC_F_RTC_FLAGS_COMP0_FLAG_A                        ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP0_FLAG_A_POS))
00175 #define MXC_F_RTC_FLAGS_COMP1_FLAG_A_POS                    9
00176 #define MXC_F_RTC_FLAGS_COMP1_FLAG_A                        ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_COMP1_FLAG_A_POS))
00177 #define MXC_F_RTC_FLAGS_PRESCL_FLAG_A_POS                   10
00178 #define MXC_F_RTC_FLAGS_PRESCL_FLAG_A                       ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_PRESCL_FLAG_A_POS))
00179 #define MXC_F_RTC_FLAGS_OVERFLOW_FLAG_A_POS                 11
00180 #define MXC_F_RTC_FLAGS_OVERFLOW_FLAG_A                     ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_OVERFLOW_FLAG_A_POS))
00181 #define MXC_F_RTC_FLAGS_TRIM_FLAG_A_POS                     12
00182 #define MXC_F_RTC_FLAGS_TRIM_FLAG_A                         ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_TRIM_FLAG_A_POS))
00183 #define MXC_F_RTC_FLAGS_SNOOZE_A_POS                        28
00184 #define MXC_F_RTC_FLAGS_SNOOZE_A                            ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_SNOOZE_A_POS))
00185 #define MXC_F_RTC_FLAGS_SNOOZE_B_POS                        29
00186 #define MXC_F_RTC_FLAGS_SNOOZE_B                            ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_SNOOZE_B_POS))
00187 #define MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS_POS                 31
00188 #define MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS                     ((uint32_t)(0x00000001UL << MXC_F_RTC_FLAGS_ASYNC_CLR_FLAGS_POS))
00189 
00190 #define MXC_F_RTC_SNZ_VAL_VALUE_POS                         0
00191 #define MXC_F_RTC_SNZ_VAL_VALUE                             ((uint32_t)(0x000003FFUL << MXC_F_RTC_SNZ_VAL_VALUE_POS))
00192 
00193 #define MXC_F_RTC_INTEN_COMP0_POS                           0
00194 #define MXC_F_RTC_INTEN_COMP0                               ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_COMP0_POS))
00195 #define MXC_F_RTC_INTEN_COMP1_POS                           1
00196 #define MXC_F_RTC_INTEN_COMP1                               ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_COMP1_POS))
00197 #define MXC_F_RTC_INTEN_PRESCALE_COMP_POS                   2
00198 #define MXC_F_RTC_INTEN_PRESCALE_COMP                       ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_PRESCALE_COMP_POS))
00199 #define MXC_F_RTC_INTEN_OVERFLOW_POS                        3
00200 #define MXC_F_RTC_INTEN_OVERFLOW                            ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_OVERFLOW_POS))
00201 #define MXC_F_RTC_INTEN_TRIM_POS                            4
00202 #define MXC_F_RTC_INTEN_TRIM                                ((uint32_t)(0x00000001UL << MXC_F_RTC_INTEN_TRIM_POS))
00203 
00204 #define MXC_F_RTC_PRESCALE_PRESCALE_POS                     0
00205 #define MXC_F_RTC_PRESCALE_PRESCALE                         ((uint32_t)(0x0000000FUL << MXC_F_RTC_PRESCALE_PRESCALE_POS))
00206 
00207 #define MXC_F_RTC_PRESCALE_MASK_PRESCALE_MASK_POS           0
00208 #define MXC_F_RTC_PRESCALE_MASK_PRESCALE_MASK               ((uint32_t)(0x0000000FUL << MXC_F_RTC_PRESCALE_MASK_PRESCALE_MASK_POS))
00209 
00210 #define MXC_F_RTC_TRIM_CTRL_TRIM_ENABLE_R_POS               0
00211 #define MXC_F_RTC_TRIM_CTRL_TRIM_ENABLE_R                   ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_CTRL_TRIM_ENABLE_R_POS))
00212 #define MXC_F_RTC_TRIM_CTRL_TRIM_FASTER_OVR_R_POS           1
00213 #define MXC_F_RTC_TRIM_CTRL_TRIM_FASTER_OVR_R               ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_CTRL_TRIM_FASTER_OVR_R_POS))
00214 #define MXC_F_RTC_TRIM_CTRL_TRIM_SLOWER_R_POS               2
00215 #define MXC_F_RTC_TRIM_CTRL_TRIM_SLOWER_R                   ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_CTRL_TRIM_SLOWER_R_POS))
00216 
00217 #define MXC_F_RTC_TRIM_VALUE_TRIM_VALUE_POS                 0
00218 #define MXC_F_RTC_TRIM_VALUE_TRIM_VALUE                     ((uint32_t)(0x0003FFFFUL << MXC_F_RTC_TRIM_VALUE_TRIM_VALUE_POS))
00219 #define MXC_F_RTC_TRIM_VALUE_TRIM_SLOWER_CONTROL_POS        18
00220 #define MXC_F_RTC_TRIM_VALUE_TRIM_SLOWER_CONTROL            ((uint32_t)(0x00000001UL << MXC_F_RTC_TRIM_VALUE_TRIM_SLOWER_CONTROL_POS))
00221 
00222 #define MXC_F_RTC_NANO_CNTR_NANORING_COUNTER_POS            0
00223 #define MXC_F_RTC_NANO_CNTR_NANORING_COUNTER                ((uint32_t)(0x0000FFFFUL << MXC_F_RTC_NANO_CNTR_NANORING_COUNTER_POS))
00224 
00225 #define MXC_F_RTC_CLK_CTRL_OSC1_EN_POS                      0
00226 #define MXC_F_RTC_CLK_CTRL_OSC1_EN                          ((uint32_t)(0x00000001UL << MXC_F_RTC_CLK_CTRL_OSC1_EN_POS))
00227 #define MXC_F_RTC_CLK_CTRL_OSC2_EN_POS                      1
00228 #define MXC_F_RTC_CLK_CTRL_OSC2_EN                          ((uint32_t)(0x00000001UL << MXC_F_RTC_CLK_CTRL_OSC2_EN_POS))
00229 #define MXC_F_RTC_CLK_CTRL_NANO_EN_POS                      2
00230 #define MXC_F_RTC_CLK_CTRL_NANO_EN                          ((uint32_t)(0x00000001UL << MXC_F_RTC_CLK_CTRL_NANO_EN_POS))
00231 
00232 #define MXC_F_RTC_OSC_CTRL_OSC_BYPASS_POS                   0
00233 #define MXC_F_RTC_OSC_CTRL_OSC_BYPASS                       ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_BYPASS_POS))
00234 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_R_POS                1
00235 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_R                    ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_DISABLE_R_POS))
00236 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_SEL_POS              2
00237 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_SEL                  ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_DISABLE_SEL_POS))
00238 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_O_POS                3
00239 #define MXC_F_RTC_OSC_CTRL_OSC_DISABLE_O                    ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_DISABLE_O_POS))
00240 #define MXC_F_RTC_OSC_CTRL_OSC_WARMUP_ENABLE_POS            14
00241 #define MXC_F_RTC_OSC_CTRL_OSC_WARMUP_ENABLE                ((uint32_t)(0x00000001UL << MXC_F_RTC_OSC_CTRL_OSC_WARMUP_ENABLE_POS))
00242 
00243 /*
00244    Field values
00245 */
00246 
00247 #define MXC_V_RTC_CTRL_SNOOZE_DISABLE                       ((uint32_t)(0x00000000UL))
00248 #define MXC_V_RTC_CTRL_SNOOZE_MODE_A                        ((uint32_t)(0x00000001UL))
00249 #define MXC_V_RTC_CTRL_SNOOZE_MODE_B                        ((uint32_t)(0x00000002UL))
00250 
00251 #define MXC_V_RTC_PRESCALE_DIV_2_0                          ((uint32_t)(0x00000000UL))
00252 #define MXC_V_RTC_PRESCALE_DIV_2_1                          ((uint32_t)(0x00000001UL))
00253 #define MXC_V_RTC_PRESCALE_DIV_2_2                          ((uint32_t)(0x00000002UL))
00254 #define MXC_V_RTC_PRESCALE_DIV_2_3                          ((uint32_t)(0x00000003UL))
00255 #define MXC_V_RTC_PRESCALE_DIV_2_4                          ((uint32_t)(0x00000004UL))
00256 #define MXC_V_RTC_PRESCALE_DIV_2_5                          ((uint32_t)(0x00000005UL))
00257 #define MXC_V_RTC_PRESCALE_DIV_2_6                          ((uint32_t)(0x00000006UL))
00258 #define MXC_V_RTC_PRESCALE_DIV_2_7                          ((uint32_t)(0x00000007UL))
00259 #define MXC_V_RTC_PRESCALE_DIV_2_8                          ((uint32_t)(0x00000008UL))
00260 #define MXC_V_RTC_PRESCALE_DIV_2_9                          ((uint32_t)(0x00000009UL))
00261 #define MXC_V_RTC_PRESCALE_DIV_2_10                         ((uint32_t)(0x0000000AUL))
00262 #define MXC_V_RTC_PRESCALE_DIV_2_11                         ((uint32_t)(0x0000000BUL))
00263 #define MXC_V_RTC_PRESCALE_DIV_2_12                         ((uint32_t)(0x0000000CUL))
00264 
00265 
00266 #ifdef __cplusplus
00267 }
00268 #endif
00269 
00270 #endif   /* _MXC_RTC_REGS_H_ */