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m480_uart.h
00001 /**************************************************************************//** 00002 * @file uart.h 00003 * @version V3.00 00004 * @brief M480 series UART driver header file 00005 * 00006 * @copyright (C) 2016 Nuvoton Technology Corp. All rights reserved. 00007 * 00008 * Redistribution and use in source and binary forms, with or without modification, 00009 * are permitted provided that the following conditions are met: 00010 * 1. Redistributions of source code must retain the above copyright notice, 00011 * this list of conditions and the following disclaimer. 00012 * 2. Redistributions in binary form must reproduce the above copyright notice, 00013 * this list of conditions and the following disclaimer in the documentation 00014 * and/or other materials provided with the distribution. 00015 * 3. Neither the name of Nuvoton Technology Corp. nor the names of its contributors 00016 * may be used to endorse or promote products derived from this software 00017 * without specific prior written permission. 00018 * 00019 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00020 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00021 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00022 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00023 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00024 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00025 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00026 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00027 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00028 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00029 *****************************************************************************/ 00030 #ifndef __UART_H__ 00031 #define __UART_H__ 00032 00033 00034 #ifdef __cplusplus 00035 extern "C" 00036 { 00037 #endif 00038 00039 00040 /** @addtogroup Standard_Driver Standard Driver 00041 @{ 00042 */ 00043 00044 /** @addtogroup UART_Driver UART Driver 00045 @{ 00046 */ 00047 00048 /** @addtogroup UART_EXPORTED_CONSTANTS UART Exported Constants 00049 @{ 00050 */ 00051 00052 /*---------------------------------------------------------------------------------------------------------*/ 00053 /* UART FIFO size constants definitions */ 00054 /*---------------------------------------------------------------------------------------------------------*/ 00055 00056 #define UART0_FIFO_SIZE 16ul /*!< UART0 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */ 00057 #define UART1_FIFO_SIZE 16ul /*!< UART1 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */ 00058 #define UART2_FIFO_SIZE 16ul /*!< UART2 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */ 00059 #define UART3_FIFO_SIZE 16ul /*!< UART3 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */ 00060 #define UART4_FIFO_SIZE 16ul /*!< UART3 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */ 00061 #define UART5_FIFO_SIZE 16ul /*!< UART3 supports separated receive/transmit 16/16 bytes entry FIFO \hideinitializer */ 00062 00063 /*---------------------------------------------------------------------------------------------------------*/ 00064 /* UART_FIFO constants definitions */ 00065 /*---------------------------------------------------------------------------------------------------------*/ 00066 00067 #define UART_FIFO_RFITL_1BYTE (0x0ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 1 byte \hideinitializer */ 00068 #define UART_FIFO_RFITL_4BYTES (0x1ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 4 bytes \hideinitializer */ 00069 #define UART_FIFO_RFITL_8BYTES (0x2ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 8 bytes \hideinitializer */ 00070 #define UART_FIFO_RFITL_14BYTES (0x3ul << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 14 bytes \hideinitializer */ 00071 00072 #define UART_FIFO_RTSTRGLV_1BYTE (0x0ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 1 byte \hideinitializer */ 00073 #define UART_FIFO_RTSTRGLV_4BYTES (0x1ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 4 bytes \hideinitializer */ 00074 #define UART_FIFO_RTSTRGLV_8BYTES (0x2ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 8 bytes \hideinitializer */ 00075 #define UART_FIFO_RTSTRGLV_14BYTES (0x3ul << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 14 bytes \hideinitializer */ 00076 00077 /*---------------------------------------------------------------------------------------------------------*/ 00078 /* UART_LINE constants definitions */ 00079 /*---------------------------------------------------------------------------------------------------------*/ 00080 #define UART_WORD_LEN_5 (0ul) /*!< UART_LINE setting to set UART word length to 5 bits \hideinitializer */ 00081 #define UART_WORD_LEN_6 (1ul) /*!< UART_LINE setting to set UART word length to 6 bits \hideinitializer */ 00082 #define UART_WORD_LEN_7 (2ul) /*!< UART_LINE setting to set UART word length to 7 bits \hideinitializer */ 00083 #define UART_WORD_LEN_8 (3ul) /*!< UART_LINE setting to set UART word length to 8 bits \hideinitializer */ 00084 00085 #define _UART_PARITY_NONE (0x0ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as no parity \hideinitializer */ 00086 #define _UART_PARITY_ODD (0x1ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as odd parity \hideinitializer */ 00087 #define _UART_PARITY_EVEN (0x3ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as even parity \hideinitializer */ 00088 #define _UART_PARITY_MARK (0x5ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '1' \hideinitializer */ 00089 #define _UART_PARITY_SPACE (0x7ul << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '0' \hideinitializer */ 00090 00091 #define UART_STOP_BIT_1 (0x0ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for one stop bit \hideinitializer */ 00092 #define UART_STOP_BIT_1_5 (0x1ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for 1.5 stop bit when 5-bit word length \hideinitializer */ 00093 #define UART_STOP_BIT_2 (0x1ul << UART_LINE_NSB_Pos) /*!< UART_LINE setting for two stop bit when 6, 7, 8-bit word length \hideinitializer */ 00094 00095 00096 /*---------------------------------------------------------------------------------------------------------*/ 00097 /* UART RTS ACTIVE LEVEL constants definitions */ 00098 /*---------------------------------------------------------------------------------------------------------*/ 00099 #define UART_RTS_IS_LOW_LEV_ACTIVE (0x1ul << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is Low Level Active \hideinitializer */ 00100 #define UART_RTS_IS_HIGH_LEV_ACTIVE (0x0ul << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is High Level Active \hideinitializer */ 00101 00102 00103 /*---------------------------------------------------------------------------------------------------------*/ 00104 /* UART_IRDA constants definitions */ 00105 /*---------------------------------------------------------------------------------------------------------*/ 00106 #define UART_IRDA_TXEN (0x1ul << UART_IRDA_TXEN_Pos) /*!< Set IrDA function Tx mode \hideinitializer */ 00107 #define UART_IRDA_RXEN (0x0ul << UART_IRDA_TXEN_Pos) /*!< Set IrDA function Rx mode \hideinitializer */ 00108 00109 00110 /*---------------------------------------------------------------------------------------------------------*/ 00111 /* UART_FUNCSEL constants definitions */ 00112 /*---------------------------------------------------------------------------------------------------------*/ 00113 #define UART_FUNCSEL_UART (0x0ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set UART Function (Default) \hideinitializer */ 00114 #define UART_FUNCSEL_LIN (0x1ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set LIN Function \hideinitializer */ 00115 #define UART_FUNCSEL_IrDA (0x2ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set IrDA Function \hideinitializer */ 00116 #define UART_FUNCSEL_RS485 (0x3ul << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set RS485 Function \hideinitializer */ 00117 00118 00119 /*---------------------------------------------------------------------------------------------------------*/ 00120 /* UART_LINCTL constants definitions */ 00121 /*---------------------------------------------------------------------------------------------------------*/ 00122 #define UART_LINCTL_BRKFL(x) (((x)-1) << UART_LINCTL_BRKFL_Pos) /*!< UART_LINCTL setting to set LIN Break Field Length, x = 10 ~ 15, default value is 12 \hideinitializer */ 00123 #define UART_LINCTL_BSL(x) (((x)-1) << UART_LINCTL_BSL_Pos) /*!< UART_LINCTL setting to set LIN Break/Sync Delimiter Length, x = 1 ~ 4 \hideinitializer */ 00124 #define UART_LINCTL_HSEL_BREAK (0x0UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field \hideinitializer */ 00125 #define UART_LINCTL_HSEL_BREAK_SYNC (0x1UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field and sync field \hideinitializer */ 00126 #define UART_LINCTL_HSEL_BREAK_SYNC_ID (0x2UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field, sync field and ID field \hideinitializer */ 00127 #define UART_LINCTL_PID(x) ((x) << UART_LINCTL_PID_Pos) /*!< UART_LINCTL setting to set LIN PID value \hideinitializer */ 00128 00129 00130 /*---------------------------------------------------------------------------------------------------------*/ 00131 /* UART BAUDRATE MODE constants definitions */ 00132 /*---------------------------------------------------------------------------------------------------------*/ 00133 #define UART_BAUD_MODE0 (0ul) /*!< Set UART Baudrate Mode is Mode0 \hideinitializer */ 00134 #define UART_BAUD_MODE2 (UART_BAUD_BAUDM1_Msk | UART_BAUD_BAUDM0_Msk) /*!< Set UART Baudrate Mode is Mode2 \hideinitializer */ 00135 00136 00137 /*@}*/ /* end of group UART_EXPORTED_CONSTANTS */ 00138 00139 00140 /** @addtogroup UART_EXPORTED_FUNCTIONS UART Exported Functions 00141 @{ 00142 */ 00143 00144 00145 /** 00146 * @brief Calculate UART baudrate mode0 divider 00147 * 00148 * @param[in] u32SrcFreq UART clock frequency 00149 * @param[in] u32BaudRate Baudrate of UART module 00150 * 00151 * @return UART baudrate mode0 divider 00152 * 00153 * @details This macro calculate UART baudrate mode0 divider. 00154 * \hideinitializer 00155 */ 00156 #define UART_BAUD_MODE0_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)*8ul)) / (u32BaudRate) >> 4ul)-2ul) 00157 00158 00159 /** 00160 * @brief Calculate UART baudrate mode2 divider 00161 * 00162 * @param[in] u32SrcFreq UART clock frequency 00163 * @param[in] u32BaudRate Baudrate of UART module 00164 * 00165 * @return UART baudrate mode2 divider 00166 * 00167 * @details This macro calculate UART baudrate mode2 divider. 00168 * \hideinitializer 00169 */ 00170 #define UART_BAUD_MODE2_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)/2ul)) / (u32BaudRate))-2ul) 00171 00172 00173 /** 00174 * @brief Write UART data 00175 * 00176 * @param[in] uart The pointer of the specified UART module 00177 * @param[in] u8Data Data byte to transmit. 00178 * 00179 * @return None 00180 * 00181 * @details This macro write Data to Tx data register. 00182 * \hideinitializer 00183 */ 00184 #define UART_WRITE(uart, u8Data) ((uart)->DAT = (u8Data)) 00185 00186 00187 /** 00188 * @brief Read UART data 00189 * 00190 * @param[in] uart The pointer of the specified UART module 00191 * 00192 * @return The oldest data byte in RX FIFO. 00193 * 00194 * @details This macro read Rx data register. 00195 * \hideinitializer 00196 */ 00197 #define UART_READ(uart) ((uart)->DAT) 00198 00199 00200 /** 00201 * @brief Get Tx empty 00202 * 00203 * @param[in] uart The pointer of the specified UART module 00204 * 00205 * @retval 0 Tx FIFO is not empty 00206 * @retval >=1 Tx FIFO is empty 00207 * 00208 * @details This macro get Transmitter FIFO empty register value. 00209 * \hideinitializer 00210 */ 00211 #define UART_GET_TX_EMPTY(uart) ((uart)->FIFOSTS & UART_FIFOSTS_TXEMPTY_Msk) 00212 00213 00214 /** 00215 * @brief Get Rx empty 00216 * 00217 * @param[in] uart The pointer of the specified UART module 00218 * 00219 * @retval 0 Rx FIFO is not empty 00220 * @retval >=1 Rx FIFO is empty 00221 * 00222 * @details This macro get Receiver FIFO empty register value. 00223 * \hideinitializer 00224 */ 00225 #define UART_GET_RX_EMPTY(uart) ((uart)->FIFOSTS & UART_FIFOSTS_RXEMPTY_Msk) 00226 00227 00228 /** 00229 * @brief Check specified UART port transmission is over. 00230 * 00231 * @param[in] uart The pointer of the specified UART module 00232 * 00233 * @retval 0 Tx transmission is not over 00234 * @retval 1 Tx transmission is over 00235 * 00236 * @details This macro return Transmitter Empty Flag register bit value. 00237 * It indicates if specified UART port transmission is over nor not. 00238 * \hideinitializer 00239 */ 00240 #define UART_IS_TX_EMPTY(uart) (((uart)->FIFOSTS & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos) 00241 00242 00243 /** 00244 * @brief Wait specified UART port transmission is over 00245 * 00246 * @param[in] uart The pointer of the specified UART module 00247 * 00248 * @return None 00249 * 00250 * @details This macro wait specified UART port transmission is over. 00251 * \hideinitializer 00252 */ 00253 #define UART_WAIT_TX_EMPTY(uart) while(!((((uart)->FIFOSTS) & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos)) 00254 00255 00256 /** 00257 * @brief Check RX is ready or not 00258 * 00259 * @param[in] uart The pointer of the specified UART module 00260 * 00261 * @retval 0 The number of bytes in the RX FIFO is less than the RFITL 00262 * @retval 1 The number of bytes in the RX FIFO equals or larger than RFITL 00263 * 00264 * @details This macro check receive data available interrupt flag is set or not. 00265 * \hideinitializer 00266 */ 00267 #define UART_IS_RX_READY(uart) (((uart)->INTSTS & UART_INTSTS_RDAIF_Msk)>>UART_INTSTS_RDAIF_Pos) 00268 00269 00270 /** 00271 * @brief Check TX FIFO is full or not 00272 * 00273 * @param[in] uart The pointer of the specified UART module 00274 * 00275 * @retval 1 TX FIFO is full 00276 * @retval 0 TX FIFO is not full 00277 * 00278 * @details This macro check TX FIFO is full or not. 00279 * \hideinitializer 00280 */ 00281 #define UART_IS_TX_FULL(uart) (((uart)->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)>>UART_FIFOSTS_TXFULL_Pos) 00282 00283 00284 /** 00285 * @brief Check RX FIFO is full or not 00286 * 00287 * @param[in] uart The pointer of the specified UART module 00288 * 00289 * @retval 1 RX FIFO is full 00290 * @retval 0 RX FIFO is not full 00291 * 00292 * @details This macro check RX FIFO is full or not. 00293 * \hideinitializer 00294 */ 00295 #define UART_IS_RX_FULL(uart) (((uart)->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)>>UART_FIFOSTS_RXFULL_Pos) 00296 00297 00298 /** 00299 * @brief Get Tx full register value 00300 * 00301 * @param[in] uart The pointer of the specified UART module 00302 * 00303 * @retval 0 Tx FIFO is not full. 00304 * @retval >=1 Tx FIFO is full. 00305 * 00306 * @details This macro get Tx full register value. 00307 * \hideinitializer 00308 */ 00309 #define UART_GET_TX_FULL(uart) ((uart)->FIFOSTS & UART_FIFOSTS_TXFULL_Msk) 00310 00311 00312 /** 00313 * @brief Get Rx full register value 00314 * 00315 * @param[in] uart The pointer of the specified UART module 00316 * 00317 * @retval 0 Rx FIFO is not full. 00318 * @retval >=1 Rx FIFO is full. 00319 * 00320 * @details This macro get Rx full register value. 00321 * \hideinitializer 00322 */ 00323 #define UART_GET_RX_FULL(uart) ((uart)->FIFOSTS & UART_FIFOSTS_RXFULL_Msk) 00324 00325 00326 /** 00327 * @brief Enable specified UART interrupt 00328 * 00329 * @param[in] uart The pointer of the specified UART module 00330 * @param[in] u32eIntSel Interrupt type select 00331 * - \ref UART_INTEN_ABRIEN_Msk : Auto baud rate interrupt 00332 * - \ref UART_INTEN_WKIEN_Msk : Wakeup interrupt 00333 * - \ref UART_INTEN_LINIEN_Msk : Lin bus interrupt 00334 * - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error interrupt 00335 * - \ref UART_INTEN_RXTOIEN_Msk : Rx time-out interrupt 00336 * - \ref UART_INTEN_MODEMIEN_Msk : Modem interrupt 00337 * - \ref UART_INTEN_RLSIEN_Msk : Rx Line status interrupt 00338 * - \ref UART_INTEN_THREIEN_Msk : Tx empty interrupt 00339 * - \ref UART_INTEN_RDAIEN_Msk : Rx ready interrupt 00340 * 00341 * @return None 00342 * 00343 * @details This macro enable specified UART interrupt. 00344 * \hideinitializer 00345 */ 00346 #define UART_ENABLE_INT(uart, u32eIntSel) ((uart)->INTEN |= (u32eIntSel)) 00347 00348 00349 /** 00350 * @brief Disable specified UART interrupt 00351 * 00352 * @param[in] uart The pointer of the specified UART module 00353 * @param[in] u32eIntSel Interrupt type select 00354 * - \ref UART_INTEN_ABRIEN_Msk : Auto baud rate interrupt 00355 * - \ref UART_INTEN_WKIEN_Msk : Wakeup interrupt 00356 * - \ref UART_INTEN_LINIEN_Msk : Lin bus interrupt 00357 * - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error interrupt 00358 * - \ref UART_INTEN_RXTOIEN_Msk : Rx time-out interrupt 00359 * - \ref UART_INTEN_MODEMIEN_Msk : Modem status interrupt 00360 * - \ref UART_INTEN_RLSIEN_Msk : Receive Line status interrupt 00361 * - \ref UART_INTEN_THREIEN_Msk : Tx empty interrupt 00362 * - \ref UART_INTEN_RDAIEN_Msk : Rx ready interrupt 00363 * 00364 * @return None 00365 * 00366 * @details This macro enable specified UART interrupt. 00367 * \hideinitializer 00368 */ 00369 #define UART_DISABLE_INT(uart, u32eIntSel) ((uart)->INTEN &= ~ (u32eIntSel)) 00370 00371 00372 /** 00373 * @brief Get specified interrupt flag/status 00374 * 00375 * @param[in] uart The pointer of the specified UART module 00376 * @param[in] u32eIntTypeFlag Interrupt Type Flag, should be 00377 * - \ref UART_INTSTS_HWBUFEINT_Msk : In DMA Mode, Buffer Error Interrupt Indicator 00378 * - \ref UART_INTSTS_HWTOINT_Msk : In DMA Mode, Time-out Interrupt Indicator 00379 * - \ref UART_INTSTS_HWMODINT_Msk : In DMA Mode, MODEM Status Interrupt Indicator 00380 * - \ref UART_INTSTS_HWRLSINT_Msk : In DMA Mode, Receive Line Status Interrupt Indicator 00381 * - \ref UART_INTSTS_HWBUFEIF_Msk : In DMA Mode, Buffer Error Interrupt Flag 00382 * - \ref UART_INTSTS_HWTOIF_Msk : In DMA Mode, Time-out Interrupt Flag 00383 * - \ref UART_INTSTS_HWMODIF_Msk : In DMA Mode, MODEM Interrupt Flag 00384 * - \ref UART_INTSTS_HWRLSIF_Msk : In DMA Mode, Receive Line Status Flag 00385 * - \ref UART_INTSTS_LININT_Msk : LIN Bus Interrupt Indicator 00386 * - \ref UART_INTSTS_BUFERRINT_Msk : Buffer Error Interrupt Indicator 00387 * - \ref UART_INTSTS_RXTOINT_Msk : Time-out Interrupt Indicator 00388 * - \ref UART_INTSTS_MODEMINT_Msk : Modem Status Interrupt Indicator 00389 * - \ref UART_INTSTS_RLSINT_Msk : Receive Line Status Interrupt Indicator 00390 * - \ref UART_INTSTS_THREINT_Msk : Transmit Holding Register Empty Interrupt Indicator 00391 * - \ref UART_INTSTS_RDAINT_Msk : Receive Data Available Interrupt Indicator 00392 * - \ref UART_INTSTS_LINIF_Msk : LIN Bus Flag 00393 * - \ref UART_INTSTS_BUFERRIF_Msk : Buffer Error Interrupt Flag 00394 * - \ref UART_INTSTS_RXTOIF_Msk : Rx Time-out Interrupt Flag 00395 * - \ref UART_INTSTS_MODEMIF_Msk : Modem Interrupt Flag 00396 * - \ref UART_INTSTS_RLSIF_Msk : Receive Line Status Interrupt Flag 00397 * - \ref UART_INTSTS_THREIF_Msk : Tx Empty Interrupt Flag 00398 * - \ref UART_INTSTS_RDAIF_Msk : Rx Ready Interrupt Flag 00399 * 00400 * @retval 0 The specified interrupt is not happened. 00401 * 1 The specified interrupt is happened. 00402 * 00403 * @details This macro get specified interrupt flag or interrupt indicator status. 00404 * \hideinitializer 00405 */ 00406 #define UART_GET_INT_FLAG(uart,u32eIntTypeFlag) (((uart)->INTSTS & (u32eIntTypeFlag))?1:0) 00407 00408 00409 /** 00410 * @brief Clear RS-485 Address Byte Detection Flag 00411 * 00412 * @param[in] uart The pointer of the specified UART module 00413 * 00414 * @return None 00415 * 00416 * @details This macro clear RS-485 address byte detection flag. 00417 * \hideinitializer 00418 */ 00419 #define UART_RS485_CLEAR_ADDR_FLAG(uart) ((uart)->FIFOSTS = UART_FIFOSTS_ADDRDETF_Msk) 00420 00421 00422 /** 00423 * @brief Get RS-485 Address Byte Detection Flag 00424 * 00425 * @param[in] uart The pointer of the specified UART module 00426 * 00427 * @retval 0 Receiver detects a data that is not an address bit. 00428 * @retval 1 Receiver detects a data that is an address bit. 00429 * 00430 * @details This macro get RS-485 address byte detection flag. 00431 * \hideinitializer 00432 */ 00433 #define UART_RS485_GET_ADDR_FLAG(uart) (((uart)->FIFOSTS & UART_FIFOSTS_ADDRDETF_Msk) >> UART_FIFOSTS_ADDRDETF_Pos) 00434 00435 /* Declare these inline functions here to avoid MISRA C 2004 rule 8.1 error */ 00436 __STATIC_INLINE void UART_CLEAR_RTS(UART_T *uart); 00437 __STATIC_INLINE void UART_SET_RTS(UART_T *uart); 00438 00439 00440 /** 00441 * @brief Set RTS pin to low 00442 * 00443 * @param[in] uart The pointer of the specified UART module 00444 * 00445 * @return None 00446 * 00447 * @details This macro set RTS pin to low. 00448 */ 00449 __STATIC_INLINE void UART_CLEAR_RTS(UART_T *uart) 00450 { 00451 uart->MODEM |= UART_MODEM_RTSACTLV_Msk; 00452 uart->MODEM &= ~UART_MODEM_RTS_Msk; 00453 } 00454 00455 00456 /** 00457 * @brief Set RTS pin to high 00458 * 00459 * @param[in] uart The pointer of the specified UART module 00460 * 00461 * @return None 00462 * 00463 * @details This macro set RTS pin to high. 00464 */ 00465 __STATIC_INLINE void UART_SET_RTS(UART_T *uart) 00466 { 00467 uart->MODEM |= UART_MODEM_RTSACTLV_Msk | UART_MODEM_RTS_Msk; 00468 } 00469 00470 00471 void UART_ClearIntFlag(UART_T *uart, uint32_t u32InterruptFlag); 00472 void UART_Close(UART_T *uart); 00473 void UART_DisableFlowCtrl(UART_T *uart); 00474 void UART_DisableInt(UART_T *uart, uint32_t u32InterruptFlag); 00475 void UART_EnableFlowCtrl(UART_T *uart); 00476 void UART_EnableInt(UART_T *uart, uint32_t u32InterruptFlag); 00477 void UART_Open(UART_T *uart, uint32_t u32baudrate); 00478 uint32_t UART_Read(UART_T *uart, uint8_t pu8RxBuf[], uint32_t u32ReadBytes); 00479 void UART_SetLineConfig(UART_T *uart, uint32_t u32baudrate, uint32_t u32data_width, uint32_t u32parity, uint32_t u32stop_bits); 00480 void UART_SetTimeoutCnt(UART_T *uart, uint32_t u32TOC); 00481 void UART_SelectIrDAMode(UART_T *uart, uint32_t u32Buadrate, uint32_t u32Direction); 00482 void UART_SelectRS485Mode(UART_T *uart, uint32_t u32Mode, uint32_t u32Addr); 00483 void UART_SelectLINMode(UART_T *uart, uint32_t u32Mode, uint32_t u32BreakLength); 00484 uint32_t UART_Write(UART_T *uart, uint8_t pu8TxBuf[], uint32_t u32WriteBytes); 00485 00486 00487 00488 00489 /*@}*/ /* end of group UART_EXPORTED_FUNCTIONS */ 00490 00491 /*@}*/ /* end of group UART_Driver */ 00492 00493 /*@}*/ /* end of group Standard_Driver */ 00494 00495 #ifdef __cplusplus 00496 } 00497 #endif 00498 00499 #endif /*__UART_H__*/ 00500 00501 /*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/
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