m480_sys.h

00001 /**************************************************************************//**
00002  * @file     SYS.h
00003  * @version  V3.0
00004  * @brief    M480 Series SYS Driver Header File
00005  *
00006  * @copyright (C) 2016 Nuvoton Technology Corp. All rights reserved.
00007  *
00008  * Redistribution and use in source and binary forms, with or without modification,
00009  * are permitted provided that the following conditions are met:
00010  *   1. Redistributions of source code must retain the above copyright notice,
00011  *      this list of conditions and the following disclaimer.
00012  *   2. Redistributions in binary form must reproduce the above copyright notice,
00013  *      this list of conditions and the following disclaimer in the documentation
00014  *      and/or other materials provided with the distribution.
00015  *   3. Neither the name of Nuvoton Technology Corp. nor the names of its contributors
00016  *      may be used to endorse or promote products derived from this software
00017  *      without specific prior written permission.
00018  * 
00019  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00020  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00021  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00022  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00023  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00024  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00025  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00026  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00027  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00028  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00029  ******************************************************************************/
00030 
00031 #ifndef __SYS_H__
00032 #define __SYS_H__
00033 
00034 #ifdef __cplusplus
00035 extern "C"
00036 {
00037 #endif
00038 
00039 
00040 /** @addtogroup Standard_Driver Standard Driver
00041   @{
00042 */
00043 
00044 /** @addtogroup SYS_Driver SYS Driver
00045   @{
00046 */
00047 
00048 /** @addtogroup SYS_EXPORTED_CONSTANTS SYS Exported Constants
00049   @{
00050 */
00051 
00052 
00053 /*---------------------------------------------------------------------------------------------------------*/
00054 /*  Module Reset Control Resister constant definitions.                                                    */
00055 /*---------------------------------------------------------------------------------------------------------*/
00056 #define PDMA_RST            ((0UL<<24) | SYS_IPRST0_PDMARST_Pos)        /*!< Reset PDMA \hideinitializer*/
00057 #define EBI_RST             ((0UL<<24) | SYS_IPRST0_EBIRST_Pos)         /*!< Reset EBI \hideinitializer*/
00058 #define EMAC_RST            ((0UL<<24) | SYS_IPRST0_EMACRST_Pos)        /*!< Reset EMAC \hideinitializer */
00059 #define SDH0_RST            ((0UL<<24) | SYS_IPRST0_SDH0RST_Pos)        /*!< Reset SDH0 \hideinitializer */
00060 #define CRC_RST             ((0UL<<24) | SYS_IPRST0_CRCRST_Pos)         /*!< Reset CRC \hideinitializer */
00061 #define HSUSBD_RST          ((0UL<<24) | SYS_IPRST0_HSUSBDRST_Pos)      /*!< Reset HSUSBD \hideinitializer */
00062 #define CRPT_RST            ((0UL<<24) | SYS_IPRST0_CRPTRST_Pos)        /*!< Reset CRPT \hideinitializer */
00063 #define SPIM_RST            ((0UL<<24) | SYS_IPRST0_SPIMRST_Pos)        /*!< Reset SPIM \hideinitializer */
00064 #define USBH_RST            ((0UL<<24) | SYS_IPRST0_USBHRST_Pos)        /*!< Reset USBH \hideinitializer */
00065 #define SDH1_RST            ((0UL<<24) | SYS_IPRST0_SDH1RST_Pos)        /*!< Reset SDH1 \hideinitializer */
00066 
00067 #define GPIO_RST            ((4UL<<24) | SYS_IPRST1_GPIORST_Pos)        /*!< Reset GPIO \hideinitializer */
00068 #define TMR0_RST            ((4UL<<24) | SYS_IPRST1_TMR0RST_Pos)        /*!< Reset TMR0 \hideinitializer */
00069 #define TMR1_RST            ((4UL<<24) | SYS_IPRST1_TMR1RST_Pos)        /*!< Reset TMR1 \hideinitializer */
00070 #define TMR2_RST            ((4UL<<24) | SYS_IPRST1_TMR2RST_Pos)        /*!< Reset TMR2 \hideinitializer */
00071 #define TMR3_RST            ((4UL<<24) | SYS_IPRST1_TMR3RST_Pos)        /*!< Reset TMR3 \hideinitializer */
00072 #define ACMP01_RST          ((4UL<<24) | SYS_IPRST1_ACMP01RST_Pos)      /*!< Reset ACMP01 \hideinitializer */
00073 #define I2C0_RST            ((4UL<<24) | SYS_IPRST1_I2C0RST_Pos)        /*!< Reset I2C0 \hideinitializer */
00074 #define I2C1_RST            ((4UL<<24) | SYS_IPRST1_I2C1RST_Pos)        /*!< Reset I2C1 \hideinitializer */
00075 #define I2C2_RST            ((4UL<<24) | SYS_IPRST1_I2C2RST_Pos)        /*!< Reset I2C2 \hideinitializer */
00076 #define QSPI0_RST           ((4UL<<24) | SYS_IPRST1_QSPI0RST_Pos)       /*!< Reset QSPI0 \hideinitializer */
00077 #define SPI0_RST            ((4UL<<24) | SYS_IPRST1_SPI0RST_Pos)        /*!< Reset SPI0 \hideinitializer */
00078 #define SPI1_RST            ((4UL<<24) | SYS_IPRST1_SPI1RST_Pos)        /*!< Reset SPI1 \hideinitializer */
00079 #define SPI2_RST            ((4UL<<24) | SYS_IPRST1_SPI2RST_Pos)        /*!< Reset SPI2 \hideinitializer */
00080 #define UART0_RST           ((4UL<<24) | SYS_IPRST1_UART0RST_Pos)       /*!< Reset UART0 \hideinitializer */
00081 #define UART1_RST           ((4UL<<24) | SYS_IPRST1_UART1RST_Pos)       /*!< Reset UART1 \hideinitializer */
00082 #define UART2_RST           ((4UL<<24) | SYS_IPRST1_UART2RST_Pos)       /*!< Reset UART2 \hideinitializer */
00083 #define UART3_RST           ((4UL<<24) | SYS_IPRST1_UART3RST_Pos)       /*!< Reset UART3 \hideinitializer */
00084 #define UART4_RST           ((4UL<<24) | SYS_IPRST1_UART4RST_Pos)       /*!< Reset UART4 \hideinitializer */
00085 #define UART5_RST           ((4UL<<24) | SYS_IPRST1_UART5RST_Pos)       /*!< Reset UART5 \hideinitializer */
00086 #define CAN0_RST            ((4UL<<24) | SYS_IPRST1_CAN0RST_Pos)        /*!< Reset CAN0 \hideinitializer */
00087 #define CAN1_RST            ((4UL<<24) | SYS_IPRST1_CAN1RST_Pos)        /*!< Reset CAN1 \hideinitializer */
00088 #define USBD_RST            ((4UL<<24) | SYS_IPRST1_USBDRST_Pos)        /*!< Reset USBD \hideinitializer */
00089 #define EADC_RST            ((4UL<<24) | SYS_IPRST1_EADCRST_Pos)        /*!< Reset EADC \hideinitializer */
00090 #define I2S0_RST            ((4UL<<24) | SYS_IPRST1_I2S0RST_Pos)        /*!< Reset I2S0 \hideinitializer */
00091 
00092 #define SC0_RST             ((8UL<<24) | SYS_IPRST2_SC0RST_Pos)         /*!< Reset SC0 \hideinitializer */
00093 #define SC1_RST             ((8UL<<24) | SYS_IPRST2_SC1RST_Pos)         /*!< Reset SC1 \hideinitializer */
00094 #define SC2_RST             ((8UL<<24) | SYS_IPRST2_SC2RST_Pos)         /*!< Reset SC2 \hideinitializer */
00095 #define SPI3_RST            ((8UL<<24) | SYS_IPRST2_SPI3RST_Pos)        /*!< Reset SPI3 \hideinitializer */
00096 #define USCI0_RST           ((8UL<<24) | SYS_IPRST2_USCI0RST_Pos)       /*!< Reset USCI0 \hideinitializer */
00097 #define USCI1_RST           ((8UL<<24) | SYS_IPRST2_USCI1RST_Pos)       /*!< Reset USCI1 \hideinitializer */
00098 #define DAC_RST             ((8UL<<24) | SYS_IPRST2_DACRST_Pos)         /*!< Reset DAC \hideinitializer */
00099 #define EPWM0_RST           ((8UL<<24) | SYS_IPRST2_EPWM0RST_Pos)       /*!< Reset EPWM0 \hideinitializer */
00100 #define EPWM1_RST           ((8UL<<24) | SYS_IPRST2_EPWM1RST_Pos)       /*!< Reset EPWM1 \hideinitializer */
00101 #define BPWM0_RST           ((8UL<<24) | SYS_IPRST2_BPWM0RST_Pos)       /*!< Reset BPWM0 \hideinitializer */
00102 #define BPWM1_RST           ((8UL<<24) | SYS_IPRST2_BPWM1RST_Pos)       /*!< Reset BPWM1 \hideinitializer */
00103 #define QEI0_RST            ((8UL<<24) | SYS_IPRST2_QEI0RST_Pos)        /*!< Reset QEI0 \hideinitializer */
00104 #define QEI1_RST            ((8UL<<24) | SYS_IPRST2_QEI1RST_Pos)        /*!< Reset QEI1 \hideinitializer */
00105 #define ECAP0_RST           ((8UL<<24) | SYS_IPRST2_ECAP0RST_Pos)       /*!< Reset ECAP0 \hideinitializer */
00106 #define ECAP1_RST           ((8UL<<24) | SYS_IPRST2_ECAP1RST_Pos)       /*!< Reset ECAP1 \hideinitializer */
00107 #define OPA_RST             ((8UL<<24) | SYS_IPRST2_OPARST_Pos)         /*!< Reset OPA \hideinitializer */
00108 
00109 /*---------------------------------------------------------------------------------------------------------*/
00110 /*  Brown Out Detector Threshold Voltage Selection constant definitions.                                   */
00111 /*---------------------------------------------------------------------------------------------------------*/
00112 #define SYS_BODCTL_BOD_RST_EN           (1UL << SYS_BODCTL_BODRSTEN_Pos)    /*!< Brown-out Reset Enable \hideinitializer */
00113 #define SYS_BODCTL_BOD_INTERRUPT_EN     (0UL << SYS_BODCTL_BODRSTEN_Pos)    /*!< Brown-out Interrupt Enable \hideinitializer */
00114 #define SYS_BODCTL_BODVL_3_0V           (7UL << SYS_BODCTL_BODVL_Pos)       /*!< Setting Brown Out Detector Threshold Voltage as 3.0V \hideinitializer */
00115 #define SYS_BODCTL_BODVL_2_8V           (6UL << SYS_BODCTL_BODVL_Pos)       /*!< Setting Brown Out Detector Threshold Voltage as 2.8V \hideinitializer */
00116 #define SYS_BODCTL_BODVL_2_6V           (5UL << SYS_BODCTL_BODVL_Pos)       /*!< Setting Brown Out Detector Threshold Voltage as 2.6V \hideinitializer */
00117 #define SYS_BODCTL_BODVL_2_4V           (4UL << SYS_BODCTL_BODVL_Pos)       /*!< Setting Brown Out Detector Threshold Voltage as 2.4V \hideinitializer */
00118 #define SYS_BODCTL_BODVL_2_2V           (3UL << SYS_BODCTL_BODVL_Pos)       /*!< Setting Brown Out Detector Threshold Voltage as 2.2V \hideinitializer */
00119 #define SYS_BODCTL_BODVL_2_0V           (2UL << SYS_BODCTL_BODVL_Pos)       /*!< Setting Brown Out Detector Threshold Voltage as 2.0V \hideinitializer */
00120 #define SYS_BODCTL_BODVL_1_8V           (1UL << SYS_BODCTL_BODVL_Pos)       /*!< Setting Brown Out Detector Threshold Voltage as 1.8V \hideinitializer */
00121 #define SYS_BODCTL_BODVL_1_6V           (0UL << SYS_BODCTL_BODVL_Pos)       /*!< Setting Brown Out Detector Threshold Voltage as 1.6V \hideinitializer */
00122 
00123 
00124 /*---------------------------------------------------------------------------------------------------------*/
00125 /*  VREFCTL constant definitions. (Write-Protection Register)                                              */
00126 /*---------------------------------------------------------------------------------------------------------*/
00127 #define SYS_VREFCTL_VREF_PIN        (0x0UL << SYS_VREFCTL_VREFCTL_Pos)    /*!< Vref = Vref pin \hideinitializer */
00128 #define SYS_VREFCTL_VREF_1_6V       (0x3UL << SYS_VREFCTL_VREFCTL_Pos)    /*!< Vref = 1.6V \hideinitializer */
00129 #define SYS_VREFCTL_VREF_2_0V       (0x7UL << SYS_VREFCTL_VREFCTL_Pos)    /*!< Vref = 2.0V \hideinitializer */
00130 #define SYS_VREFCTL_VREF_2_5V       (0xBUL << SYS_VREFCTL_VREFCTL_Pos)    /*!< Vref = 2.5V \hideinitializer */
00131 #define SYS_VREFCTL_VREF_3_0V       (0xFUL << SYS_VREFCTL_VREFCTL_Pos)    /*!< Vref = 3.0V \hideinitializer */
00132 #define SYS_VREFCTL_VREF_AVDD       (0x10UL << SYS_VREFCTL_VREFCTL_Pos)   /*!< Vref = AVDD \hideinitializer */
00133 
00134 
00135 /*---------------------------------------------------------------------------------------------------------*/
00136 /*  USBPHY constant definitions. (Write-Protection Register)                                               */
00137 /*---------------------------------------------------------------------------------------------------------*/
00138 #define SYS_USBPHY_USBROLE_STD_USBD     (0x0UL << SYS_USBPHY_USBROLE_Pos)   /*!<  Standard USB device \hideinitializer */
00139 #define SYS_USBPHY_USBROLE_STD_USBH     (0x1UL << SYS_USBPHY_USBROLE_Pos)   /*!<  Standard USB host \hideinitializer */
00140 #define SYS_USBPHY_USBROLE_ID_DEPH      (0x2UL << SYS_USBPHY_USBROLE_Pos)   /*!<  ID dependent device \hideinitializer */
00141 #define SYS_USBPHY_USBROLE_ON_THE_GO    (0x3UL << SYS_USBPHY_USBROLE_Pos)   /*!<  On-The-Go device \hideinitializer */
00142 #define SYS_USBPHY_HSUSBROLE_STD_USBD   (0x0UL << SYS_USBPHY_HSUSBROLE_Pos)   /*!<  Standard HSUSB device \hideinitializer */
00143 #define SYS_USBPHY_HSUSBROLE_STD_USBH   (0x1UL << SYS_USBPHY_HSUSBROLE_Pos)   /*!<  Standard HSUSB host \hideinitializer */
00144 #define SYS_USBPHY_HSUSBROLE_ID_DEPH    (0x2UL << SYS_USBPHY_HSUSBROLE_Pos)   /*!<  ID dependent device \hideinitializer */
00145 
00146 /*---------------------------------------------------------------------------------------------------------*/
00147 /*  PLCTL constant definitions. (Write-Protection Register)                                                */
00148 /*---------------------------------------------------------------------------------------------------------*/
00149 #define SYS_PLCTL_PLSEL_PL0     (0x0UL<<SYS_PLCTL_PLSEL_Pos)   /*!< Set power level to power level 0 */
00150 #define SYS_PLCTL_PLSEL_PL1     (0x1UL<<SYS_PLCTL_PLSEL_Pos)   /*!< Set power level to power level 1 */
00151 
00152 
00153 /*---------------------------------------------------------------------------------------------------------*/
00154 /*  Multi-Function constant definitions.                                                                   */
00155 /*---------------------------------------------------------------------------------------------------------*/
00156 /* How to use below #define?
00157 Example 1: If user want to set PA.0 as SC0_CLK in initial function,
00158            user can issue following command to achieve it.
00159 
00160            SYS->GPA_MFPL  = (SYS->GPA_MFPL & (~SYS_GPA_MFPL_PA0MFP_Msk) ) | SYS_GPA_MFPL_PA0_MFP_SC0_CLK  ;
00161 
00162 */
00163 /********************* Bit definition of GPA_MFPL register **********************/
00164 #define SYS_GPA_MFPL_PA0MFP_GPIO              (0x00UL<<SYS_GPA_MFPL_PA0MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00165 #define SYS_GPA_MFPL_PA0MFP_SPIM_MOSI         (0x02UL<<SYS_GPA_MFPL_PA0MFP_Pos)  /*!< 1st SPIM MOSI (Master Out, Slave In) pin. \hideinitializer */
00166 #define SYS_GPA_MFPL_PA0MFP_QSPI0_MOSI0        (0x03UL<<SYS_GPA_MFPL_PA0MFP_Pos)  /*!< 1st QSPI0 MOSI (Master Out, Slave In) pin. \hideinitializer */
00167 #define SYS_GPA_MFPL_PA0MFP_SPI0_MOSI         (0x04UL<<SYS_GPA_MFPL_PA0MFP_Pos)  /*!< 1st SPI0 MOSI (Master Out, Slave In) pin. \hideinitializer */
00168 #define SYS_GPA_MFPL_PA0MFP_SD1_DAT0          (0x05UL<<SYS_GPA_MFPL_PA0MFP_Pos)  /*!< SD/SDIO 1 data line bit 0. \hideinitializer */
00169 #define SYS_GPA_MFPL_PA0MFP_SC0_CLK           (0x06UL<<SYS_GPA_MFPL_PA0MFP_Pos)  /*!< SmartCard0 clock pin. \hideinitializer */
00170 #define SYS_GPA_MFPL_PA0MFP_UART0_RXD         (0x07UL<<SYS_GPA_MFPL_PA0MFP_Pos)  /*!< Data receiver input pin for UART0. \hideinitializer */
00171 #define SYS_GPA_MFPL_PA0MFP_UART1_nRTS        (0x08UL<<SYS_GPA_MFPL_PA0MFP_Pos)  /*!< Request to Send output pin for UART1. \hideinitializer */
00172 #define SYS_GPA_MFPL_PA0MFP_I2C2_SDA          (0x09UL<<SYS_GPA_MFPL_PA0MFP_Pos)  /*!< I2C2 data input/output pin. \hideinitializer */
00173 #define SYS_GPA_MFPL_PA0MFP_BPWM0_CH0         (0x0CUL<<SYS_GPA_MFPL_PA0MFP_Pos)  /*!< BPWM0 channel0 output/capture input. \hideinitializer */
00174 #define SYS_GPA_MFPL_PA0MFP_EPWM0_CH5         (0x0DUL<<SYS_GPA_MFPL_PA0MFP_Pos)  /*!< EPWM0 channel5 output/capture input. \hideinitializer */
00175 #define SYS_GPA_MFPL_PA0MFP_DAC0_ST           (0x0FUL<<SYS_GPA_MFPL_PA0MFP_Pos)  /*!< DAC0 external trigger input. \hideinitializer */
00176 #define SYS_GPA_MFPL_PA1MFP_GPIO              (0x00UL<<SYS_GPA_MFPL_PA1MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00177 #define SYS_GPA_MFPL_PA1MFP_SPIM_MISO         (0x02UL<<SYS_GPA_MFPL_PA1MFP_Pos)  /*!< 1st SPIM MISO (Master In, Slave Out) pin. \hideinitializer */
00178 #define SYS_GPA_MFPL_PA1MFP_QSPI0_MISO0        (0x03UL<<SYS_GPA_MFPL_PA1MFP_Pos)  /*!< 1st QSPI0 MISO (Master In, Slave Out) pin. \hideinitializer */
00179 #define SYS_GPA_MFPL_PA1MFP_SPI0_MISO         (0x04UL<<SYS_GPA_MFPL_PA1MFP_Pos)  /*!< 1st SPI0 MISO (Master In, Slave Out) pin. \hideinitializer */
00180 #define SYS_GPA_MFPL_PA1MFP_SD1_DAT1          (0x05UL<<SYS_GPA_MFPL_PA1MFP_Pos)  /*!< SD/SDIO 1 data line bit 1. \hideinitializer */
00181 #define SYS_GPA_MFPL_PA1MFP_SC0_DAT           (0x06UL<<SYS_GPA_MFPL_PA1MFP_Pos)  /*!< SmartCard0 data pin. \hideinitializer */
00182 #define SYS_GPA_MFPL_PA1MFP_UART0_TXD         (0x07UL<<SYS_GPA_MFPL_PA1MFP_Pos)  /*!< Data transmitter output pin for UART0. \hideinitializer */
00183 #define SYS_GPA_MFPL_PA1MFP_UART1_nCTS        (0x08UL<<SYS_GPA_MFPL_PA1MFP_Pos)  /*!< Clear to Send input pin for UART1. \hideinitializer */
00184 #define SYS_GPA_MFPL_PA1MFP_I2C2_SCL          (0x09UL<<SYS_GPA_MFPL_PA1MFP_Pos)  /*!< I2C2 clock pin. \hideinitializer */
00185 #define SYS_GPA_MFPL_PA1MFP_BPWM0_CH1         (0x0CUL<<SYS_GPA_MFPL_PA1MFP_Pos)  /*!< BPWM0 channel1 output/capture input. \hideinitializer */
00186 #define SYS_GPA_MFPL_PA1MFP_EPWM0_CH4         (0x0DUL<<SYS_GPA_MFPL_PA1MFP_Pos)  /*!< EPWM0 channel4 output/capture input. \hideinitializer */
00187 #define SYS_GPA_MFPL_PA1MFP_DAC1_ST           (0x0FUL<<SYS_GPA_MFPL_PA1MFP_Pos)  /*!< DAC1 external trigger input. \hideinitializer */
00188 #define SYS_GPA_MFPL_PA2MFP_GPIO              (0x00UL<<SYS_GPA_MFPL_PA2MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00189 #define SYS_GPA_MFPL_PA2MFP_SPIM_CLK          (0x02UL<<SYS_GPA_MFPL_PA2MFP_Pos)  /*!< SPIM serial clock pin. \hideinitializer */
00190 #define SYS_GPA_MFPL_PA2MFP_QSPI0_CLK          (0x03UL<<SYS_GPA_MFPL_PA2MFP_Pos)  /*!< QSPI0 serial clock pin. \hideinitializer */
00191 #define SYS_GPA_MFPL_PA2MFP_SPI0_CLK          (0x04UL<<SYS_GPA_MFPL_PA2MFP_Pos)  /*!< SPI0 serial clock pin. \hideinitializer */
00192 #define SYS_GPA_MFPL_PA2MFP_SD1_DAT2          (0x05UL<<SYS_GPA_MFPL_PA2MFP_Pos)  /*!< SD/SDIO 1 data line bit 2. \hideinitializer */
00193 #define SYS_GPA_MFPL_PA2MFP_SC0_RST           (0x06UL<<SYS_GPA_MFPL_PA2MFP_Pos)  /*!< SmartCard0 reset pin. \hideinitializer */
00194 #define SYS_GPA_MFPL_PA2MFP_UART4_RXD         (0x07UL<<SYS_GPA_MFPL_PA2MFP_Pos)  /*!< Data receiver input pin for UART4. \hideinitializer */
00195 #define SYS_GPA_MFPL_PA2MFP_UART1_RXD         (0x08UL<<SYS_GPA_MFPL_PA2MFP_Pos)  /*!< Data receiver input pin for UART1. \hideinitializer */
00196 #define SYS_GPA_MFPL_PA2MFP_I2C1_SDA          (0x09UL<<SYS_GPA_MFPL_PA2MFP_Pos)  /*!< I2C1 data input/output pin. \hideinitializer */
00197 #define SYS_GPA_MFPL_PA2MFP_BPWM0_CH2         (0x0CUL<<SYS_GPA_MFPL_PA2MFP_Pos)  /*!< BPWM0 channel2 output/capture input. \hideinitializer */
00198 #define SYS_GPA_MFPL_PA2MFP_EPWM0_CH3         (0x0DUL<<SYS_GPA_MFPL_PA2MFP_Pos)  /*!< EPWM0 channel3 output/capture input. \hideinitializer */
00199 #define SYS_GPA_MFPL_PA3MFP_GPIO              (0x00UL<<SYS_GPA_MFPL_PA3MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00200 #define SYS_GPA_MFPL_PA3MFP_SPIM_SS           (0x02UL<<SYS_GPA_MFPL_PA3MFP_Pos)  /*!< 1st SPIM slave select pin. \hideinitializer */
00201 #define SYS_GPA_MFPL_PA3MFP_QSPI0_SS           (0x03UL<<SYS_GPA_MFPL_PA3MFP_Pos)  /*!< 1st QSPI0 slave select pin. \hideinitializer */
00202 #define SYS_GPA_MFPL_PA3MFP_SPI0_SS           (0x04UL<<SYS_GPA_MFPL_PA3MFP_Pos)  /*!< 1st SPI0 slave select pin. \hideinitializer */
00203 #define SYS_GPA_MFPL_PA3MFP_SD1_DAT3          (0x05UL<<SYS_GPA_MFPL_PA3MFP_Pos)  /*!< SD/SDIO 1 data line bit 3. \hideinitializer */
00204 #define SYS_GPA_MFPL_PA3MFP_SC0_PWR           (0x06UL<<SYS_GPA_MFPL_PA3MFP_Pos)  /*!< SmartCard0 power pin. \hideinitializer */
00205 #define SYS_GPA_MFPL_PA3MFP_UART4_TXD         (0x07UL<<SYS_GPA_MFPL_PA3MFP_Pos)  /*!< Data transmitter output pin for UART4. \hideinitializer */
00206 #define SYS_GPA_MFPL_PA3MFP_UART1_TXD         (0x08UL<<SYS_GPA_MFPL_PA3MFP_Pos)  /*!< Data transmitter output pin for UART1. \hideinitializer */
00207 #define SYS_GPA_MFPL_PA3MFP_I2C1_SCL          (0x09UL<<SYS_GPA_MFPL_PA3MFP_Pos)  /*!< I2C1 clock pin. \hideinitializer */
00208 #define SYS_GPA_MFPL_PA3MFP_BPWM0_CH3         (0x0CUL<<SYS_GPA_MFPL_PA3MFP_Pos)  /*!< BPWM0 channel3 output/capture input. \hideinitializer */
00209 #define SYS_GPA_MFPL_PA3MFP_EPWM0_CH2         (0x0DUL<<SYS_GPA_MFPL_PA3MFP_Pos)  /*!< EPWM0 channel2 output/capture input. \hideinitializer */
00210 #define SYS_GPA_MFPL_PA3MFP_QEI0_B            (0x0EUL<<SYS_GPA_MFPL_PA3MFP_Pos)  /*!< Quadrature encoder phase B input of QEI Unit 0. \hideinitializer */
00211 #define SYS_GPA_MFPL_PA4MFP_GPIO              (0x00UL<<SYS_GPA_MFPL_PA4MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00212 #define SYS_GPA_MFPL_PA4MFP_SPIM_D3           (0x02UL<<SYS_GPA_MFPL_PA4MFP_Pos)  /*!< SPIM data 3 pin for Quad Mode I/O. \hideinitializer */
00213 #define SYS_GPA_MFPL_PA4MFP_QSPI0_MOSI1        (0x03UL<<SYS_GPA_MFPL_PA4MFP_Pos)  /*!< 2nd QSPI0 MOSI (Master Out, Slave In) pin. \hideinitializer */
00214 #define SYS_GPA_MFPL_PA4MFP_SPI0_I2SMCLK      (0x04UL<<SYS_GPA_MFPL_PA4MFP_Pos)  /*!< SPI0 I2S master clock output pin. \hideinitializer */
00215 #define SYS_GPA_MFPL_PA4MFP_SD1_CLK           (0x05UL<<SYS_GPA_MFPL_PA4MFP_Pos)  /*!< SD/SDIO 1 clock. \hideinitializer */
00216 #define SYS_GPA_MFPL_PA4MFP_SC0_nCD           (0x06UL<<SYS_GPA_MFPL_PA4MFP_Pos)  /*!< SmartCard0 card detect pin. \hideinitializer */
00217 #define SYS_GPA_MFPL_PA4MFP_UART0_nRTS        (0x07UL<<SYS_GPA_MFPL_PA4MFP_Pos)  /*!< Request to Send output pin for UART0. \hideinitializer */
00218 #define SYS_GPA_MFPL_PA4MFP_UART5_RXD         (0x08UL<<SYS_GPA_MFPL_PA4MFP_Pos)  /*!< Data receiver input pin for UART5. \hideinitializer */
00219 #define SYS_GPA_MFPL_PA4MFP_I2C0_SDA          (0x09UL<<SYS_GPA_MFPL_PA4MFP_Pos)  /*!< I2C0 data input/output pin. \hideinitializer */
00220 #define SYS_GPA_MFPL_PA4MFP_CAN0_RXD          (0x0AUL<<SYS_GPA_MFPL_PA4MFP_Pos)  /*!< CAN0 bus receiver input. \hideinitializer */
00221 #define SYS_GPA_MFPL_PA4MFP_BPWM0_CH4         (0x0CUL<<SYS_GPA_MFPL_PA4MFP_Pos)  /*!< BPWM0 channel4 output/capture input. \hideinitializer */
00222 #define SYS_GPA_MFPL_PA4MFP_EPWM0_CH1         (0x0DUL<<SYS_GPA_MFPL_PA4MFP_Pos)  /*!< EPWM0 channel1 output/capture input. \hideinitializer */
00223 #define SYS_GPA_MFPL_PA4MFP_QEI0_A            (0x0EUL<<SYS_GPA_MFPL_PA4MFP_Pos)  /*!< Quadrature encoder phase A input of QEI Unit 0. \hideinitializer */
00224 #define SYS_GPA_MFPL_PA5MFP_GPIO              (0x00UL<<SYS_GPA_MFPL_PA5MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00225 #define SYS_GPA_MFPL_PA5MFP_SPIM_D2           (0x02UL<<SYS_GPA_MFPL_PA5MFP_Pos)  /*!< SPIM data 2 pin for Quad Mode I/O. \hideinitializer */
00226 #define SYS_GPA_MFPL_PA5MFP_QSPI0_MISO1        (0x03UL<<SYS_GPA_MFPL_PA5MFP_Pos)  /*!< 2nd QSPI0 MISO (Master In, Slave Out) pin. \hideinitializer */
00227 #define SYS_GPA_MFPL_PA5MFP_SPI1_I2SMCLK      (0x04UL<<SYS_GPA_MFPL_PA5MFP_Pos)  /*!< SPI1 I2S master clock output pin. \hideinitializer */
00228 #define SYS_GPA_MFPL_PA5MFP_SD1_CMD           (0x05UL<<SYS_GPA_MFPL_PA5MFP_Pos)  /*!< SD/SDIO 1 command/response. \hideinitializer */
00229 #define SYS_GPA_MFPL_PA5MFP_SC2_nCD           (0x06UL<<SYS_GPA_MFPL_PA5MFP_Pos)  /*!< SmartCard2 card detect pin. \hideinitializer */
00230 #define SYS_GPA_MFPL_PA5MFP_UART0_nCTS        (0x07UL<<SYS_GPA_MFPL_PA5MFP_Pos)  /*!< Clear to Send input pin for UART0. \hideinitializer */
00231 #define SYS_GPA_MFPL_PA5MFP_UART5_TXD         (0x08UL<<SYS_GPA_MFPL_PA5MFP_Pos)  /*!< Data transmitter output pin for UART5. \hideinitializer */
00232 #define SYS_GPA_MFPL_PA5MFP_I2C0_SCL          (0x09UL<<SYS_GPA_MFPL_PA5MFP_Pos)  /*!< I2C0 clock pin. \hideinitializer */
00233 #define SYS_GPA_MFPL_PA5MFP_CAN0_TXD          (0x0AUL<<SYS_GPA_MFPL_PA5MFP_Pos)  /*!< CAN0 bus transmitter output. \hideinitializer */
00234 #define SYS_GPA_MFPL_PA5MFP_BPWM0_CH5         (0x0CUL<<SYS_GPA_MFPL_PA5MFP_Pos)  /*!< BPWM0 channel5 output/capture input. \hideinitializer */
00235 #define SYS_GPA_MFPL_PA5MFP_EPWM0_CH0         (0x0DUL<<SYS_GPA_MFPL_PA5MFP_Pos)  /*!< EPWM0 channel0 output/capture input. \hideinitializer */
00236 #define SYS_GPA_MFPL_PA5MFP_QEI0_INDEX        (0x0EUL<<SYS_GPA_MFPL_PA5MFP_Pos)  /*!< Quadrature encoder index input of QEI Unit 0. \hideinitializer */
00237 #define SYS_GPA_MFPL_PA6MFP_GPIO              (0x00UL<<SYS_GPA_MFPL_PA6MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00238 #define SYS_GPA_MFPL_PA6MFP_EBI_AD6           (0x02UL<<SYS_GPA_MFPL_PA6MFP_Pos)  /*!< EBI address/data bus bit6. \hideinitializer */
00239 #define SYS_GPA_MFPL_PA6MFP_EMAC_RMII_RXERR    (0x03UL<<SYS_GPA_MFPL_PA6MFP_Pos)  /*!< RMII Receive Data error. \hideinitializer */
00240 #define SYS_GPA_MFPL_PA6MFP_SPI1_SS           (0x04UL<<SYS_GPA_MFPL_PA6MFP_Pos)  /*!< 1st SPI1 slave select pin. \hideinitializer */
00241 #define SYS_GPA_MFPL_PA6MFP_SD1_nCD           (0x05UL<<SYS_GPA_MFPL_PA6MFP_Pos)  /*!< SD/SDIO 1 card detect  \hideinitializer */
00242 #define SYS_GPA_MFPL_PA6MFP_SC2_CLK           (0x06UL<<SYS_GPA_MFPL_PA6MFP_Pos)  /*!< SmartCard2 clock pin. \hideinitializer */
00243 #define SYS_GPA_MFPL_PA6MFP_UART0_RXD         (0x07UL<<SYS_GPA_MFPL_PA6MFP_Pos)  /*!< Data receiver input pin for UART0. \hideinitializer */
00244 #define SYS_GPA_MFPL_PA6MFP_I2C1_SDA          (0x08UL<<SYS_GPA_MFPL_PA6MFP_Pos)  /*!< I2C1 data input/output pin. \hideinitializer */
00245 #define SYS_GPA_MFPL_PA6MFP_EPWM1_CH5         (0x0BUL<<SYS_GPA_MFPL_PA6MFP_Pos)  /*!< EPWM1 channel5 output/capture input. \hideinitializer */
00246 #define SYS_GPA_MFPL_PA6MFP_BPWM1_CH3         (0x0CUL<<SYS_GPA_MFPL_PA6MFP_Pos)  /*!< BPWM1 channel3 output/capture input. \hideinitializer */
00247 #define SYS_GPA_MFPL_PA6MFP_ACMP1_WLAT        (0x0DUL<<SYS_GPA_MFPL_PA6MFP_Pos)  /*!< Analog comparator1 window latch input pin. \hideinitializer */
00248 #define SYS_GPA_MFPL_PA6MFP_TM3               (0x0EUL<<SYS_GPA_MFPL_PA6MFP_Pos)  /*!< Timer3 event counter input / toggle output  \hideinitializer */
00249 #define SYS_GPA_MFPL_PA6MFP_INT0              (0x0FUL<<SYS_GPA_MFPL_PA6MFP_Pos)  /*!< External interrupt0 input pin. \hideinitializer */
00250 #define SYS_GPA_MFPL_PA7MFP_GPIO              (0x00UL<<SYS_GPA_MFPL_PA7MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00251 #define SYS_GPA_MFPL_PA7MFP_EBI_AD7           (0x02UL<<SYS_GPA_MFPL_PA7MFP_Pos)  /*!< EBI address/data bus bit7. \hideinitializer */
00252 #define SYS_GPA_MFPL_PA7MFP_EMAC_RMII_CRSDV     (0x03UL<<SYS_GPA_MFPL_PA7MFP_Pos)  /*!< MII Receive Data Valid / RMII CRS_DV input. \hideinitializer */
00253 #define SYS_GPA_MFPL_PA7MFP_SPI1_CLK          (0x04UL<<SYS_GPA_MFPL_PA7MFP_Pos)  /*!< SPI1 serial clock pin. \hideinitializer */
00254 #define SYS_GPA_MFPL_PA7MFP_SC2_DAT           (0x06UL<<SYS_GPA_MFPL_PA7MFP_Pos)  /*!< SmartCard2 data pin. \hideinitializer */
00255 #define SYS_GPA_MFPL_PA7MFP_UART0_TXD         (0x07UL<<SYS_GPA_MFPL_PA7MFP_Pos)  /*!< Data transmitter output pin for UART0. \hideinitializer */
00256 #define SYS_GPA_MFPL_PA7MFP_I2C1_SCL          (0x08UL<<SYS_GPA_MFPL_PA7MFP_Pos)  /*!< I2C1 clock pin. \hideinitializer */
00257 #define SYS_GPA_MFPL_PA7MFP_EPWM1_CH4         (0x0BUL<<SYS_GPA_MFPL_PA7MFP_Pos)  /*!< EPWM1 channel4 output/capture input. \hideinitializer */
00258 #define SYS_GPA_MFPL_PA7MFP_BPWM1_CH2         (0x0CUL<<SYS_GPA_MFPL_PA7MFP_Pos)  /*!< BPWM1 channel2 output/capture input. \hideinitializer */
00259 #define SYS_GPA_MFPL_PA7MFP_ACMP0_WLAT        (0x0DUL<<SYS_GPA_MFPL_PA7MFP_Pos)  /*!< Analog comparator0 window latch input pin. \hideinitializer */
00260 #define SYS_GPA_MFPL_PA7MFP_TM2               (0x0EUL<<SYS_GPA_MFPL_PA7MFP_Pos)  /*!< Timer2 event counter input / toggle output  \hideinitializer */
00261 #define SYS_GPA_MFPL_PA7MFP_INT1              (0x0FUL<<SYS_GPA_MFPL_PA7MFP_Pos)  /*!< External interrupt1 input pin. \hideinitializer */
00262 /********************* Bit definition of GPA_MFPH register **********************/
00263 #define SYS_GPA_MFPH_PA8MFP_GPIO              (0x00UL<<SYS_GPA_MFPH_PA8MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00264 #define SYS_GPA_MFPH_PA8MFP_OPA1_P            (0x01UL<<SYS_GPA_MFPH_PA8MFP_Pos)  /*!< Operational amplifier positive input pin. \hideinitializer */
00265 #define SYS_GPA_MFPH_PA8MFP_EBI_ALE           (0x02UL<<SYS_GPA_MFPH_PA8MFP_Pos)  /*!< EBI address latch enable output pin. \hideinitializer */
00266 #define SYS_GPA_MFPH_PA8MFP_SC2_CLK           (0x03UL<<SYS_GPA_MFPH_PA8MFP_Pos)  /*!< SmartCard2 clock pin. \hideinitializer */
00267 #define SYS_GPA_MFPH_PA8MFP_SPI2_MOSI         (0x04UL<<SYS_GPA_MFPH_PA8MFP_Pos)  /*!< 1st SPI2 MOSI (Master Out, Slave In) pin. \hideinitializer */
00268 #define SYS_GPA_MFPH_PA8MFP_SD1_DAT0          (0x05UL<<SYS_GPA_MFPH_PA8MFP_Pos)  /*!< SD/SDIO 1 data line bit 0. \hideinitializer */
00269 #define SYS_GPA_MFPH_PA8MFP_USCI0_CTL1        (0x06UL<<SYS_GPA_MFPH_PA8MFP_Pos)  /*!< USCI0 control1 pin. \hideinitializer */
00270 #define SYS_GPA_MFPH_PA8MFP_UART1_RXD         (0x07UL<<SYS_GPA_MFPH_PA8MFP_Pos)  /*!< Data receiver input pin for UART1. \hideinitializer */
00271 #define SYS_GPA_MFPH_PA8MFP_BPWM0_CH3         (0x09UL<<SYS_GPA_MFPH_PA8MFP_Pos)  /*!< BPWM0 channel3 output/capture input. \hideinitializer */
00272 #define SYS_GPA_MFPH_PA8MFP_QEI1_B            (0x0AUL<<SYS_GPA_MFPH_PA8MFP_Pos)  /*!< Quadrature encoder phase B input of QEI Unit 1. \hideinitializer */
00273 #define SYS_GPA_MFPH_PA8MFP_ECAP0_IC2         (0x0BUL<<SYS_GPA_MFPH_PA8MFP_Pos)  /*!< Input 0 of enhanced capture unit 2. \hideinitializer */
00274 #define SYS_GPA_MFPH_PA8MFP_TM3_EXT           (0x0DUL<<SYS_GPA_MFPH_PA8MFP_Pos)  /*!< Timer3 event counter input / toggle output  \hideinitializer */
00275 #define SYS_GPA_MFPH_PA8MFP_INT4              (0x0FUL<<SYS_GPA_MFPH_PA8MFP_Pos)  /*!< External interrupt4 input pin. \hideinitializer */
00276 #define SYS_GPA_MFPH_PA9MFP_GPIO              (0x00UL<<SYS_GPA_MFPH_PA9MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00277 #define SYS_GPA_MFPH_PA9MFP_OPA1_N            (0x01UL<<SYS_GPA_MFPH_PA9MFP_Pos)  /*!< Operational amplifier negative input pin. \hideinitializer */
00278 #define SYS_GPA_MFPH_PA9MFP_EBI_MCLK          (0x02UL<<SYS_GPA_MFPH_PA9MFP_Pos)  /*!< EBI external clock output pin. \hideinitializer */
00279 #define SYS_GPA_MFPH_PA9MFP_SC2_DAT           (0x03UL<<SYS_GPA_MFPH_PA9MFP_Pos)  /*!< SmartCard2 data pin. \hideinitializer */
00280 #define SYS_GPA_MFPH_PA9MFP_SPI2_MISO         (0x04UL<<SYS_GPA_MFPH_PA9MFP_Pos)  /*!< 1st SPI2 MISO (Master In, Slave Out) pin. \hideinitializer */
00281 #define SYS_GPA_MFPH_PA9MFP_SD1_DAT1          (0x05UL<<SYS_GPA_MFPH_PA9MFP_Pos)  /*!< SD/SDIO 1 data line bit 1. \hideinitializer */
00282 #define SYS_GPA_MFPH_PA9MFP_USCI0_DAT1        (0x06UL<<SYS_GPA_MFPH_PA9MFP_Pos)  /*!< USCI0 data1 pin. \hideinitializer */
00283 #define SYS_GPA_MFPH_PA9MFP_UART1_TXD         (0x07UL<<SYS_GPA_MFPH_PA9MFP_Pos)  /*!< Data transmitter output pin for UART1. \hideinitializer */
00284 #define SYS_GPA_MFPH_PA9MFP_BPWM0_CH2         (0x09UL<<SYS_GPA_MFPH_PA9MFP_Pos)  /*!< BPWM0 channel2 output/capture input. \hideinitializer */
00285 #define SYS_GPA_MFPH_PA9MFP_QEI1_A            (0x0AUL<<SYS_GPA_MFPH_PA9MFP_Pos)  /*!< Quadrature encoder phase A input of QEI Unit 1. \hideinitializer */
00286 #define SYS_GPA_MFPH_PA9MFP_ECAP0_IC1         (0x0BUL<<SYS_GPA_MFPH_PA9MFP_Pos)  /*!< Input 1 of enhanced capture unit 0. \hideinitializer */
00287 #define SYS_GPA_MFPH_PA9MFP_TM2_EXT           (0x0DUL<<SYS_GPA_MFPH_PA9MFP_Pos)  /*!< Timer2 event counter input / toggle output  \hideinitializer */
00288 #define SYS_GPA_MFPH_PA9MFP_SWDH_DAT          (0x0FUL<<SYS_GPA_MFPH_PA9MFP_Pos)  /*!< SWD Host interface input/output bus bit. \hideinitializer */
00289 #define SYS_GPA_MFPH_PA10MFP_GPIO             (0x00UL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00290 #define SYS_GPA_MFPH_PA10MFP_ACMP1_P0         (0x01UL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< Analog comparator1 positive input pin. \hideinitializer */
00291 #define SYS_GPA_MFPH_PA10MFP_OPA1_O           (0x01UL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< Operational amplifier output pin. \hideinitializer */
00292 #define SYS_GPA_MFPH_PA10MFP_EBI_nWR          (0x02UL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< EBI write enable output pin. \hideinitializer */
00293 #define SYS_GPA_MFPH_PA10MFP_SC2_RST          (0x03UL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< SmartCard2 reset pin. \hideinitializer */
00294 #define SYS_GPA_MFPH_PA10MFP_SPI2_CLK         (0x04UL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< SPI2 serial clock pin. \hideinitializer */
00295 #define SYS_GPA_MFPH_PA10MFP_SD1_DAT2         (0x05UL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< SD/SDIO 1 data line bit 2. \hideinitializer */
00296 #define SYS_GPA_MFPH_PA10MFP_USCI0_DAT0       (0x06UL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< USCI0 data0 pin. \hideinitializer */
00297 #define SYS_GPA_MFPH_PA10MFP_I2C2_SDA         (0x07UL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< I2C2 data input/output pin. \hideinitializer */
00298 #define SYS_GPA_MFPH_PA10MFP_BPWM0_CH1        (0x09UL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< BPWM0 channel1 output/capture input. \hideinitializer */
00299 #define SYS_GPA_MFPH_PA10MFP_QEI1_INDEX       (0x0AUL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< Quadrature encoder index input of QEI Unit 1. \hideinitializer */
00300 #define SYS_GPA_MFPH_PA10MFP_ECAP0_IC0        (0x0BUL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< Input 0 of enhanced capture unit 0. \hideinitializer */
00301 #define SYS_GPA_MFPH_PA10MFP_TM1_EXT          (0x0DUL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< Timer1 event counter input / toggle output  \hideinitializer */
00302 #define SYS_GPA_MFPH_PA10MFP_DAC0_ST          (0x0EUL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< DAC0 external trigger input. \hideinitializer */
00303 #define SYS_GPA_MFPH_PA10MFP_SWDH_CLK         (0x0FUL<<SYS_GPA_MFPH_PA10MFP_Pos) /*!< SWD Host interface clock output pin. \hideinitializer */
00304 #define SYS_GPA_MFPH_PA11MFP_GPIO             (0x00UL<<SYS_GPA_MFPH_PA11MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00305 #define SYS_GPA_MFPH_PA11MFP_ACMP0_P0         (0x01UL<<SYS_GPA_MFPH_PA11MFP_Pos) /*!< Analog comparator0 positive input pin. \hideinitializer */
00306 #define SYS_GPA_MFPH_PA11MFP_EBI_nRD          (0x02UL<<SYS_GPA_MFPH_PA11MFP_Pos) /*!< EBI read enable output pin. \hideinitializer */
00307 #define SYS_GPA_MFPH_PA11MFP_SC2_PWR          (0x03UL<<SYS_GPA_MFPH_PA11MFP_Pos) /*!< SmartCard2 power pin. \hideinitializer */
00308 #define SYS_GPA_MFPH_PA11MFP_SPI2_SS          (0x04UL<<SYS_GPA_MFPH_PA11MFP_Pos) /*!< 1st SPI2 slave select pin. \hideinitializer */
00309 #define SYS_GPA_MFPH_PA11MFP_SD1_DAT3         (0x05UL<<SYS_GPA_MFPH_PA11MFP_Pos) /*!< SD/SDIO 1 data line bit 3. \hideinitializer */
00310 #define SYS_GPA_MFPH_PA11MFP_USCI0_CLK        (0x06UL<<SYS_GPA_MFPH_PA11MFP_Pos) /*!< USCI0 clock pin. \hideinitializer */
00311 #define SYS_GPA_MFPH_PA11MFP_I2C2_SCL         (0x07UL<<SYS_GPA_MFPH_PA11MFP_Pos) /*!< I2C2 clock pin. \hideinitializer */
00312 #define SYS_GPA_MFPH_PA11MFP_BPWM0_CH0        (0x09UL<<SYS_GPA_MFPH_PA11MFP_Pos) /*!< BPWM0 channel0 output/capture input. \hideinitializer */
00313 #define SYS_GPA_MFPH_PA11MFP_EPWM0_SYNC_OUT   (0x0AUL<<SYS_GPA_MFPH_PA11MFP_Pos) /*!< EPWM0 counter synchronous trigger output pin. \hideinitializer */
00314 #define SYS_GPA_MFPH_PA11MFP_TM0_EXT          (0x0DUL<<SYS_GPA_MFPH_PA11MFP_Pos) /*!< Timer0 event counter input / toggle output \hideinitializer */
00315 #define SYS_GPA_MFPH_PA11MFP_DAC1_ST          (0x0EUL<<SYS_GPA_MFPH_PA11MFP_Pos) /*!< DAC1 external trigger input. \hideinitializer */
00316 #define SYS_GPA_MFPH_PA12MFP_GPIO             (0x00UL<<SYS_GPA_MFPH_PA12MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00317 #define SYS_GPA_MFPH_PA12MFP_I2S0_BCLK        (0x02UL<<SYS_GPA_MFPH_PA12MFP_Pos) /*!< I2S0 bit clock pin. \hideinitializer */
00318 #define SYS_GPA_MFPH_PA12MFP_UART4_TXD        (0x03UL<<SYS_GPA_MFPH_PA12MFP_Pos) /*!< Data transmitter output pin for UART4. \hideinitializer */
00319 #define SYS_GPA_MFPH_PA12MFP_I2C1_SCL         (0x04UL<<SYS_GPA_MFPH_PA12MFP_Pos) /*!< I2C1 clock pin. \hideinitializer */
00320 #define SYS_GPA_MFPH_PA12MFP_SPI2_SS          (0x05UL<<SYS_GPA_MFPH_PA12MFP_Pos) /*!< 1st SPI2 slave select pin. \hideinitializer */
00321 #define SYS_GPA_MFPH_PA12MFP_CAN0_TXD         (0x06UL<<SYS_GPA_MFPH_PA12MFP_Pos) /*!< CAN0 bus transmitter output. \hideinitializer */
00322 #define SYS_GPA_MFPH_PA12MFP_SC2_PWR          (0x07UL<<SYS_GPA_MFPH_PA12MFP_Pos) /*!< SmartCard2 power pin. \hideinitializer */
00323 #define SYS_GPA_MFPH_PA12MFP_BPWM1_CH2        (0x0BUL<<SYS_GPA_MFPH_PA12MFP_Pos) /*!< BPWM1 channel2 output/capture input. \hideinitializer */
00324 #define SYS_GPA_MFPH_PA12MFP_QEI1_INDEX       (0x0CUL<<SYS_GPA_MFPH_PA12MFP_Pos) /*!< Quadrature encoder index input of QEI Unit 1. \hideinitializer */
00325 #define SYS_GPA_MFPH_PA12MFP_USB_VBUS         (0x0EUL<<SYS_GPA_MFPH_PA12MFP_Pos) /*!< Power supply from USB Full speed host or HUB. \hideinitializer */
00326 #define SYS_GPA_MFPH_PA13MFP_GPIO             (0x00UL<<SYS_GPA_MFPH_PA13MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00327 #define SYS_GPA_MFPH_PA13MFP_I2S0_MCLK        (0x02UL<<SYS_GPA_MFPH_PA13MFP_Pos) /*!< I2S0 master clock output pin. \hideinitializer */
00328 #define SYS_GPA_MFPH_PA13MFP_UART4_RXD        (0x03UL<<SYS_GPA_MFPH_PA13MFP_Pos) /*!< Data receiver input pin for UART4. \hideinitializer */
00329 #define SYS_GPA_MFPH_PA13MFP_I2C1_SDA         (0x04UL<<SYS_GPA_MFPH_PA13MFP_Pos) /*!< I2C1 data input/output pin. \hideinitializer */
00330 #define SYS_GPA_MFPH_PA13MFP_SPI2_CLK         (0x05UL<<SYS_GPA_MFPH_PA13MFP_Pos) /*!< SPI2 serial clock pin. \hideinitializer */
00331 #define SYS_GPA_MFPH_PA13MFP_CAN0_RXD         (0x06UL<<SYS_GPA_MFPH_PA13MFP_Pos) /*!< CAN0 bus receiver input. \hideinitializer */
00332 #define SYS_GPA_MFPH_PA13MFP_SC2_RST          (0x07UL<<SYS_GPA_MFPH_PA13MFP_Pos) /*!< SmartCard2 reset pin. \hideinitializer */
00333 #define SYS_GPA_MFPH_PA13MFP_BPWM1_CH3        (0x0BUL<<SYS_GPA_MFPH_PA13MFP_Pos) /*!< BPWM1 channel3 output/capture input. \hideinitializer */
00334 #define SYS_GPA_MFPH_PA13MFP_QEI1_A           (0x0CUL<<SYS_GPA_MFPH_PA13MFP_Pos) /*!< Quadrature encoder phase A input of QEI Unit 1. \hideinitializer */
00335 #define SYS_GPA_MFPH_PA13MFP_USB_D_N          (0x0EUL<<SYS_GPA_MFPH_PA13MFP_Pos) /*!< USB Full speed differential signal D-. \hideinitializer */
00336 #define SYS_GPA_MFPH_PA14MFP_GPIO             (0x00UL<<SYS_GPA_MFPH_PA14MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00337 #define SYS_GPA_MFPH_PA14MFP_I2S0_DI          (0x02UL<<SYS_GPA_MFPH_PA14MFP_Pos) /*!< I2S0 data input. \hideinitializer */
00338 #define SYS_GPA_MFPH_PA14MFP_UART0_TXD        (0x03UL<<SYS_GPA_MFPH_PA14MFP_Pos) /*!< Data transmitter output pin for UART0. \hideinitializer */
00339 #define SYS_GPA_MFPH_PA14MFP_SPI2_MISO        (0x05UL<<SYS_GPA_MFPH_PA14MFP_Pos) /*!< 1st SPI2 MISO (Master In, Slave Out) pin. \hideinitializer */
00340 #define SYS_GPA_MFPH_PA14MFP_I2C2_SCL         (0x06UL<<SYS_GPA_MFPH_PA14MFP_Pos) /*!< I2C2 clock pin. \hideinitializer */
00341 #define SYS_GPA_MFPH_PA14MFP_SC2_DAT          (0x07UL<<SYS_GPA_MFPH_PA14MFP_Pos) /*!< SmartCard2 data pin. \hideinitializer */
00342 #define SYS_GPA_MFPH_PA14MFP_BPWM1_CH4        (0x0BUL<<SYS_GPA_MFPH_PA14MFP_Pos) /*!< BPWM1 channel4 output/capture input. \hideinitializer */
00343 #define SYS_GPA_MFPH_PA14MFP_QEI1_B           (0x0CUL<<SYS_GPA_MFPH_PA14MFP_Pos) /*!< Quadrature encoder phase B input of QEI Unit 1. \hideinitializer */
00344 #define SYS_GPA_MFPH_PA14MFP_USB_D_P          (0x0EUL<<SYS_GPA_MFPH_PA14MFP_Pos) /*!< USB Full speed differential signal D+. \hideinitializer */
00345 #define SYS_GPA_MFPH_PA15MFP_GPIO             (0x00UL<<SYS_GPA_MFPH_PA15MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00346 #define SYS_GPA_MFPH_PA15MFP_I2S0_DO          (0x02UL<<SYS_GPA_MFPH_PA15MFP_Pos) /*!< I2S0 data output. \hideinitializer */
00347 #define SYS_GPA_MFPH_PA15MFP_UART0_RXD        (0x03UL<<SYS_GPA_MFPH_PA15MFP_Pos) /*!< Data receiver input pin for UART0. \hideinitializer */
00348 #define SYS_GPA_MFPH_PA15MFP_SPI2_MOSI        (0x05UL<<SYS_GPA_MFPH_PA15MFP_Pos) /*!< 1st SPI2 MOSI (Master Out, Slave In) pin. \hideinitializer */
00349 #define SYS_GPA_MFPH_PA15MFP_I2C2_SDA         (0x06UL<<SYS_GPA_MFPH_PA15MFP_Pos) /*!< I2C2 data input/output pin. \hideinitializer */
00350 #define SYS_GPA_MFPH_PA15MFP_SC2_CLK          (0x07UL<<SYS_GPA_MFPH_PA15MFP_Pos) /*!< SmartCard2 clock pin. \hideinitializer */
00351 #define SYS_GPA_MFPH_PA15MFP_BPWM1_CH5        (0x0BUL<<SYS_GPA_MFPH_PA15MFP_Pos) /*!< BPWM1 channel5 output/capture input. \hideinitializer */
00352 #define SYS_GPA_MFPH_PA15MFP_EPWM0_SYNC_IN    (0x0CUL<<SYS_GPA_MFPH_PA15MFP_Pos) /*!< EPWM0 counter synchronous trigger input pin. \hideinitializer */
00353 #define SYS_GPA_MFPH_PA15MFP_USB_OTG_ID       (0x0EUL<<SYS_GPA_MFPH_PA15MFP_Pos) /*!< USB Full speed identification. \hideinitializer */
00354 /********************* Bit definition of GPB_MFPL register **********************/
00355 #define SYS_GPB_MFPL_PB0MFP_GPIO              (0x00UL<<SYS_GPB_MFPL_PB0MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00356 #define SYS_GPB_MFPL_PB0MFP_EADC0_CH0         (0x01UL<<SYS_GPB_MFPL_PB0MFP_Pos)  /*!< EADC0 channel0 analog input. \hideinitializer */
00357 #define SYS_GPB_MFPL_PB0MFP_OPA0_P            (0x01UL<<SYS_GPB_MFPL_PB0MFP_Pos)  /*!< Operational amplifier positive input pin. \hideinitializer */
00358 #define SYS_GPB_MFPL_PB0MFP_EBI_ADR9          (0x02UL<<SYS_GPB_MFPL_PB0MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
00359 #define SYS_GPB_MFPL_PB0MFP_SD0_CMD           (0x03UL<<SYS_GPB_MFPL_PB0MFP_Pos)  /*!< SD/SDIO 0 command/response. \hideinitializer */
00360 #define SYS_GPB_MFPL_PB0MFP_UART2_RXD         (0x07UL<<SYS_GPB_MFPL_PB0MFP_Pos)  /*!< Data receiver input pin for UART2. \hideinitializer */
00361 #define SYS_GPB_MFPL_PB0MFP_SPI0_I2SMCLK      (0x08UL<<SYS_GPB_MFPL_PB0MFP_Pos)  /*!< SPI0 I2S master clock output pin. \hideinitializer */
00362 #define SYS_GPB_MFPL_PB0MFP_I2C1_SDA          (0x09UL<<SYS_GPB_MFPL_PB0MFP_Pos)  /*!< I2C1 data input/output pin. \hideinitializer */
00363 #define SYS_GPB_MFPL_PB0MFP_EPWM0_CH5         (0x0BUL<<SYS_GPB_MFPL_PB0MFP_Pos)  /*!< EPWM0 channel5 output/capture input. \hideinitializer */
00364 #define SYS_GPB_MFPL_PB0MFP_EPWM1_CH5         (0x0CUL<<SYS_GPB_MFPL_PB0MFP_Pos)  /*!< EPWM1 channel5 output/capture input. \hideinitializer */
00365 #define SYS_GPB_MFPL_PB0MFP_EPWM0_BRAKE1      (0x0DUL<<SYS_GPB_MFPL_PB0MFP_Pos)  /*!< Brake input pin 1 of EPWM0. \hideinitializer */
00366 #define SYS_GPB_MFPL_PB1MFP_GPIO              (0x00UL<<SYS_GPB_MFPL_PB1MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00367 #define SYS_GPB_MFPL_PB1MFP_EADC0_CH1         (0x01UL<<SYS_GPB_MFPL_PB1MFP_Pos)  /*!< EADC0 channel1 analog input. \hideinitializer */
00368 #define SYS_GPB_MFPL_PB1MFP_OPA0_N            (0x01UL<<SYS_GPB_MFPL_PB1MFP_Pos)  /*!< Operational amplifier negative input pin. \hideinitializer */
00369 #define SYS_GPB_MFPL_PB1MFP_EBI_ADR8          (0x02UL<<SYS_GPB_MFPL_PB1MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
00370 #define SYS_GPB_MFPL_PB1MFP_SD0_CLK           (0x03UL<<SYS_GPB_MFPL_PB1MFP_Pos)  /*!< SD/SDIO 0 clock. \hideinitializer */
00371 #define SYS_GPB_MFPL_PB1MFP_EMAC_RMII_RXERR    (0x04UL<<SYS_GPB_MFPL_PB1MFP_Pos)  /*!< RMII Receive Data error. \hideinitializer */
00372 #define SYS_GPB_MFPL_PB1MFP_SPI1_I2SMCLK      (0x05UL<<SYS_GPB_MFPL_PB1MFP_Pos)  /*!< SPI1 I2S master clock output pin. \hideinitializer */
00373 #define SYS_GPB_MFPL_PB1MFP_SPI3_I2SMCLK      (0x06UL<<SYS_GPB_MFPL_PB1MFP_Pos)  /*!< SPI3 I2S master clock output pin. \hideinitializer */
00374 #define SYS_GPB_MFPL_PB1MFP_UART2_TXD         (0x07UL<<SYS_GPB_MFPL_PB1MFP_Pos)  /*!< Data transmitter output pin for UART2. \hideinitializer */
00375 #define SYS_GPB_MFPL_PB1MFP_USCI1_CLK         (0x08UL<<SYS_GPB_MFPL_PB1MFP_Pos)  /*!< USCI1 clock pin. \hideinitializer */
00376 #define SYS_GPB_MFPL_PB1MFP_I2C1_SCL          (0x09UL<<SYS_GPB_MFPL_PB1MFP_Pos)  /*!< I2C1 clock pin. \hideinitializer */
00377 #define SYS_GPB_MFPL_PB1MFP_I2S0_LRCK         (0x0AUL<<SYS_GPB_MFPL_PB1MFP_Pos)  /*!< I2S0 left right channel clock. \hideinitializer */
00378 #define SYS_GPB_MFPL_PB1MFP_EPWM0_CH4         (0x0BUL<<SYS_GPB_MFPL_PB1MFP_Pos)  /*!< EPWM0 channel4 output/capture input. \hideinitializer */
00379 #define SYS_GPB_MFPL_PB1MFP_EPWM1_CH4         (0x0CUL<<SYS_GPB_MFPL_PB1MFP_Pos)  /*!< EPWM1 channel4 output/capture input. \hideinitializer */
00380 #define SYS_GPB_MFPL_PB1MFP_EPWM0_BRAKE0      (0x0DUL<<SYS_GPB_MFPL_PB1MFP_Pos)  /*!< Brake input pin 0 of EPWM0. \hideinitializer */
00381 #define SYS_GPB_MFPL_PB2MFP_GPIO              (0x00UL<<SYS_GPB_MFPL_PB2MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00382 #define SYS_GPB_MFPL_PB2MFP_ACMP0_P1          (0x01UL<<SYS_GPB_MFPL_PB2MFP_Pos)  /*!< Analog comparator0 positive input pin. \hideinitializer */
00383 #define SYS_GPB_MFPL_PB2MFP_EADC0_CH2         (0x01UL<<SYS_GPB_MFPL_PB2MFP_Pos)  /*!< EADC0 channel2 analog input. \hideinitializer */
00384 #define SYS_GPB_MFPL_PB2MFP_OPA0_O            (0x01UL<<SYS_GPB_MFPL_PB2MFP_Pos)  /*!< Operational amplifier output pin. \hideinitializer */
00385 #define SYS_GPB_MFPL_PB2MFP_EBI_ADR3          (0x02UL<<SYS_GPB_MFPL_PB2MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
00386 #define SYS_GPB_MFPL_PB2MFP_SD0_DAT0          (0x03UL<<SYS_GPB_MFPL_PB2MFP_Pos)  /*!< SD/SDIO 0 data line bit 0. \hideinitializer */
00387 #define SYS_GPB_MFPL_PB2MFP_EMAC_RMII_CRSDV     (0x04UL<<SYS_GPB_MFPL_PB2MFP_Pos)  /*!< MII Receive Data Valid / RMII CRS_DV input. \hideinitializer */
00388 #define SYS_GPB_MFPL_PB2MFP_SPI1_SS           (0x05UL<<SYS_GPB_MFPL_PB2MFP_Pos)  /*!< 1st SPI1 slave select pin. \hideinitializer */
00389 #define SYS_GPB_MFPL_PB2MFP_UART1_RXD         (0x06UL<<SYS_GPB_MFPL_PB2MFP_Pos)  /*!< Data receiver input pin for UART1. \hideinitializer */
00390 #define SYS_GPB_MFPL_PB2MFP_UART5_nCTS        (0x07UL<<SYS_GPB_MFPL_PB2MFP_Pos)  /*!< Clear to Send input pin for UART5. \hideinitializer */
00391 #define SYS_GPB_MFPL_PB2MFP_USCI1_DAT0        (0x08UL<<SYS_GPB_MFPL_PB2MFP_Pos)  /*!< USCI1 data0 pin. \hideinitializer */
00392 #define SYS_GPB_MFPL_PB2MFP_SC0_PWR           (0x09UL<<SYS_GPB_MFPL_PB2MFP_Pos)  /*!< SmartCard0 power pin. \hideinitializer */
00393 #define SYS_GPB_MFPL_PB2MFP_I2S0_DO           (0x0AUL<<SYS_GPB_MFPL_PB2MFP_Pos)  /*!< I2S0 data output. \hideinitializer */
00394 #define SYS_GPB_MFPL_PB2MFP_EPWM0_CH3         (0x0BUL<<SYS_GPB_MFPL_PB2MFP_Pos)  /*!< EPWM0 channel3 output/capture input. \hideinitializer */
00395 #define SYS_GPB_MFPL_PB2MFP_TM3               (0x0EUL<<SYS_GPB_MFPL_PB2MFP_Pos)  /*!< Timer3 event counter input / toggle output  \hideinitializer */
00396 #define SYS_GPB_MFPL_PB2MFP_INT3              (0x0FUL<<SYS_GPB_MFPL_PB2MFP_Pos)  /*!< External interrupt3 input pin. \hideinitializer */
00397 #define SYS_GPB_MFPL_PB3MFP_GPIO              (0x00UL<<SYS_GPB_MFPL_PB3MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00398 #define SYS_GPB_MFPL_PB3MFP_ACMP0_N           (0x01UL<<SYS_GPB_MFPL_PB3MFP_Pos)  /*!< Analog comparator0 negative input pin. \hideinitializer */
00399 #define SYS_GPB_MFPL_PB3MFP_EADC0_CH3         (0x01UL<<SYS_GPB_MFPL_PB3MFP_Pos)  /*!< EADC0 channel3 analog input. \hideinitializer */
00400 #define SYS_GPB_MFPL_PB3MFP_EBI_ADR2          (0x02UL<<SYS_GPB_MFPL_PB3MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
00401 #define SYS_GPB_MFPL_PB3MFP_SD0_DAT1          (0x03UL<<SYS_GPB_MFPL_PB3MFP_Pos)  /*!< SD/SDIO 0 data line bit 1. \hideinitializer */
00402 #define SYS_GPB_MFPL_PB3MFP_EMAC_RMII_RXD1     (0x04UL<<SYS_GPB_MFPL_PB3MFP_Pos)  /*!< RMII Receive Data bus bit 1. \hideinitializer */
00403 #define SYS_GPB_MFPL_PB3MFP_SPI1_CLK          (0x05UL<<SYS_GPB_MFPL_PB3MFP_Pos)  /*!< SPI1 serial clock pin. \hideinitializer */
00404 #define SYS_GPB_MFPL_PB3MFP_UART1_TXD         (0x06UL<<SYS_GPB_MFPL_PB3MFP_Pos)  /*!< Data transmitter output pin for UART1. \hideinitializer */
00405 #define SYS_GPB_MFPL_PB3MFP_UART5_nRTS        (0x07UL<<SYS_GPB_MFPL_PB3MFP_Pos)  /*!< Request to Send output pin for UART5. \hideinitializer */
00406 #define SYS_GPB_MFPL_PB3MFP_USCI1_DAT1        (0x08UL<<SYS_GPB_MFPL_PB3MFP_Pos)  /*!< USCI1 data1 pin. \hideinitializer */
00407 #define SYS_GPB_MFPL_PB3MFP_SC0_RST           (0x09UL<<SYS_GPB_MFPL_PB3MFP_Pos)  /*!< SmartCard0 reset pin. \hideinitializer */
00408 #define SYS_GPB_MFPL_PB3MFP_I2S0_DI           (0x0AUL<<SYS_GPB_MFPL_PB3MFP_Pos)  /*!< I2S0 data input. \hideinitializer */
00409 #define SYS_GPB_MFPL_PB3MFP_EPWM0_CH2         (0x0BUL<<SYS_GPB_MFPL_PB3MFP_Pos)  /*!< EPWM0 channel2 output/capture input. \hideinitializer */
00410 #define SYS_GPB_MFPL_PB3MFP_TM2               (0x0EUL<<SYS_GPB_MFPL_PB3MFP_Pos)  /*!< Timer2 event counter input / toggle output  \hideinitializer */
00411 #define SYS_GPB_MFPL_PB3MFP_INT2              (0x0FUL<<SYS_GPB_MFPL_PB3MFP_Pos)  /*!< External interrupt2 input pin. \hideinitializer */
00412 #define SYS_GPB_MFPL_PB4MFP_GPIO              (0x00UL<<SYS_GPB_MFPL_PB4MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00413 #define SYS_GPB_MFPL_PB4MFP_ACMP1_P1          (0x01UL<<SYS_GPB_MFPL_PB4MFP_Pos)  /*!< Analog comparator1 positive input pin. \hideinitializer */
00414 #define SYS_GPB_MFPL_PB4MFP_EADC0_CH4         (0x01UL<<SYS_GPB_MFPL_PB4MFP_Pos)  /*!< EADC0 channel4 analog input. \hideinitializer */
00415 #define SYS_GPB_MFPL_PB4MFP_EBI_ADR1          (0x02UL<<SYS_GPB_MFPL_PB4MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
00416 #define SYS_GPB_MFPL_PB4MFP_SD0_DAT2          (0x03UL<<SYS_GPB_MFPL_PB4MFP_Pos)  /*!< SD/SDIO 0 data line bit 2. \hideinitializer */
00417 #define SYS_GPB_MFPL_PB4MFP_EMAC_RMII_RXD0     (0x04UL<<SYS_GPB_MFPL_PB4MFP_Pos)  /*!< RMII Receive Data bus bit 0. \hideinitializer */
00418 #define SYS_GPB_MFPL_PB4MFP_SPI1_MOSI         (0x05UL<<SYS_GPB_MFPL_PB4MFP_Pos)  /*!< 1st SPI1 MOSI (Master Out, Slave In) pin. \hideinitializer */
00419 #define SYS_GPB_MFPL_PB4MFP_I2C0_SDA          (0x06UL<<SYS_GPB_MFPL_PB4MFP_Pos)  /*!< I2C0 data input/output pin. \hideinitializer */
00420 #define SYS_GPB_MFPL_PB4MFP_UART5_RXD         (0x07UL<<SYS_GPB_MFPL_PB4MFP_Pos)  /*!< Data receiver input pin for UART5. \hideinitializer */
00421 #define SYS_GPB_MFPL_PB4MFP_USCI1_CTL1        (0x08UL<<SYS_GPB_MFPL_PB4MFP_Pos)  /*!< USCI1 control1 pin. \hideinitializer */
00422 #define SYS_GPB_MFPL_PB4MFP_SC0_DAT           (0x09UL<<SYS_GPB_MFPL_PB4MFP_Pos)  /*!< SmartCard0 data pin. \hideinitializer */
00423 #define SYS_GPB_MFPL_PB4MFP_I2S0_MCLK         (0x0AUL<<SYS_GPB_MFPL_PB4MFP_Pos)  /*!< I2S0 master clock output pin. \hideinitializer */
00424 #define SYS_GPB_MFPL_PB4MFP_EPWM0_CH1         (0x0BUL<<SYS_GPB_MFPL_PB4MFP_Pos)  /*!< EPWM0 channel1 output/capture input. \hideinitializer */
00425 #define SYS_GPB_MFPL_PB4MFP_TM1               (0x0EUL<<SYS_GPB_MFPL_PB4MFP_Pos)  /*!< Timer1 event counter input / toggle output  \hideinitializer */
00426 #define SYS_GPB_MFPL_PB4MFP_INT1              (0x0FUL<<SYS_GPB_MFPL_PB4MFP_Pos)  /*!< External interrupt1 input pin. \hideinitializer */
00427 #define SYS_GPB_MFPL_PB5MFP_GPIO              (0x00UL<<SYS_GPB_MFPL_PB5MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00428 #define SYS_GPB_MFPL_PB5MFP_ACMP1_N           (0x01UL<<SYS_GPB_MFPL_PB5MFP_Pos)  /*!< Analog comparator1 negative input pin. \hideinitializer */
00429 #define SYS_GPB_MFPL_PB5MFP_EADC0_CH5         (0x01UL<<SYS_GPB_MFPL_PB5MFP_Pos)  /*!< EADC0 channel5 analog input. \hideinitializer */
00430 #define SYS_GPB_MFPL_PB5MFP_EBI_ADR0          (0x02UL<<SYS_GPB_MFPL_PB5MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
00431 #define SYS_GPB_MFPL_PB5MFP_SD0_DAT3          (0x03UL<<SYS_GPB_MFPL_PB5MFP_Pos)  /*!< SD/SDIO 0 data line bit 3. \hideinitializer */
00432 #define SYS_GPB_MFPL_PB5MFP_EMAC_RMII_REFCLK       (0x04UL<<SYS_GPB_MFPL_PB5MFP_Pos)  /*!< EMAC mode clock input. \hideinitializer */
00433 #define SYS_GPB_MFPL_PB5MFP_SPI1_MISO         (0x05UL<<SYS_GPB_MFPL_PB5MFP_Pos)  /*!< 1st SPI1 MISO (Master In, Slave Out) pin. \hideinitializer */
00434 #define SYS_GPB_MFPL_PB5MFP_I2C0_SCL          (0x06UL<<SYS_GPB_MFPL_PB5MFP_Pos)  /*!< I2C0 clock pin. \hideinitializer */
00435 #define SYS_GPB_MFPL_PB5MFP_UART5_TXD         (0x07UL<<SYS_GPB_MFPL_PB5MFP_Pos)  /*!< Data transmitter output pin for UART5. \hideinitializer */
00436 #define SYS_GPB_MFPL_PB5MFP_USCI1_CTL0        (0x08UL<<SYS_GPB_MFPL_PB5MFP_Pos)  /*!< USCI1 control0 pin. \hideinitializer */
00437 #define SYS_GPB_MFPL_PB5MFP_SC0_CLK           (0x09UL<<SYS_GPB_MFPL_PB5MFP_Pos)  /*!< SmartCard0 clock pin. \hideinitializer */
00438 #define SYS_GPB_MFPL_PB5MFP_I2S0_BCLK         (0x0AUL<<SYS_GPB_MFPL_PB5MFP_Pos)  /*!< I2S0 bit clock pin. \hideinitializer */
00439 #define SYS_GPB_MFPL_PB5MFP_EPWM0_CH0         (0x0BUL<<SYS_GPB_MFPL_PB5MFP_Pos)  /*!< EPWM0 channel0 output/capture input. \hideinitializer */
00440 #define SYS_GPB_MFPL_PB5MFP_TM0               (0x0EUL<<SYS_GPB_MFPL_PB5MFP_Pos)  /*!< Timer0 event counter input / toggle output  \hideinitializer */
00441 #define SYS_GPB_MFPL_PB5MFP_INT0              (0x0FUL<<SYS_GPB_MFPL_PB5MFP_Pos)  /*!< External interrupt0 input pin. \hideinitializer */
00442 #define SYS_GPB_MFPL_PB6MFP_GPIO              (0x00UL<<SYS_GPB_MFPL_PB6MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00443 #define SYS_GPB_MFPL_PB6MFP_EADC0_CH6         (0x01UL<<SYS_GPB_MFPL_PB6MFP_Pos)  /*!< EADC0 channel6 analog input. \hideinitializer */
00444 #define SYS_GPB_MFPL_PB6MFP_EBI_nWRH          (0x02UL<<SYS_GPB_MFPL_PB6MFP_Pos)  /*!< EBI write enable output pin. \hideinitializer */
00445 #define SYS_GPB_MFPL_PB6MFP_EMAC_PPS          (0x03UL<<SYS_GPB_MFPL_PB6MFP_Pos)  /*!< EMAC Pulse Per Second output  \hideinitializer */
00446 #define SYS_GPB_MFPL_PB6MFP_USCI1_DAT1        (0x04UL<<SYS_GPB_MFPL_PB6MFP_Pos)  /*!< USCI1 data1 pin. \hideinitializer */
00447 #define SYS_GPB_MFPL_PB6MFP_CAN1_RXD          (0x05UL<<SYS_GPB_MFPL_PB6MFP_Pos)  /*!< CAN1 bus receiver input. \hideinitializer */
00448 #define SYS_GPB_MFPL_PB6MFP_UART1_RXD         (0x06UL<<SYS_GPB_MFPL_PB6MFP_Pos)  /*!< Data receiver input pin for UART1. \hideinitializer */
00449 #define SYS_GPB_MFPL_PB6MFP_SD1_CLK           (0x07UL<<SYS_GPB_MFPL_PB6MFP_Pos)  /*!< SD/SDIO 1 clock. \hideinitializer */
00450 #define SYS_GPB_MFPL_PB6MFP_EBI_nCS1          (0x08UL<<SYS_GPB_MFPL_PB6MFP_Pos)  /*!< EBI chip select enable output pin. \hideinitializer */
00451 #define SYS_GPB_MFPL_PB6MFP_BPWM1_CH5         (0x0AUL<<SYS_GPB_MFPL_PB6MFP_Pos)  /*!< BPWM1 channel5 output/capture input. \hideinitializer */
00452 #define SYS_GPB_MFPL_PB6MFP_EPWM1_BRAKE1      (0x0BUL<<SYS_GPB_MFPL_PB6MFP_Pos)  /*!< Brake input pin 1 of EPWM1. \hideinitializer */
00453 #define SYS_GPB_MFPL_PB6MFP_EPWM1_CH5         (0x0CUL<<SYS_GPB_MFPL_PB6MFP_Pos)  /*!< EPWM1 channel5 output/capture input. \hideinitializer */
00454 #define SYS_GPB_MFPL_PB6MFP_INT4              (0x0DUL<<SYS_GPB_MFPL_PB6MFP_Pos)  /*!< External interrupt4 input pin. \hideinitializer */
00455 #define SYS_GPB_MFPL_PB6MFP_USB_VBUS_EN       (0x0EUL<<SYS_GPB_MFPL_PB6MFP_Pos)  /*!< Power supply from USB Full speed host or HUB. \hideinitializer */
00456 #define SYS_GPB_MFPL_PB6MFP_ACMP1_O           (0x0FUL<<SYS_GPB_MFPL_PB6MFP_Pos)  /*!< Analog comparator1 output. \hideinitializer */
00457 #define SYS_GPB_MFPL_PB7MFP_GPIO              (0x00UL<<SYS_GPB_MFPL_PB7MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00458 #define SYS_GPB_MFPL_PB7MFP_EADC0_CH7         (0x01UL<<SYS_GPB_MFPL_PB7MFP_Pos)  /*!< EADC0 channel7 analog input. \hideinitializer */
00459 #define SYS_GPB_MFPL_PB7MFP_EBI_nWRL          (0x02UL<<SYS_GPB_MFPL_PB7MFP_Pos)  /*!< EBI write enable output pin. \hideinitializer */
00460 #define SYS_GPB_MFPL_PB7MFP_EMAC_RMII_TXEN     (0x03UL<<SYS_GPB_MFPL_PB7MFP_Pos)  /*!< RMII? Transmit Enable. \hideinitializer */
00461 #define SYS_GPB_MFPL_PB7MFP_USCI1_DAT0        (0x04UL<<SYS_GPB_MFPL_PB7MFP_Pos)  /*!< USCI1 data0 pin. \hideinitializer */
00462 #define SYS_GPB_MFPL_PB7MFP_CAN1_TXD          (0x05UL<<SYS_GPB_MFPL_PB7MFP_Pos)  /*!< CAN1 bus transmitter output. \hideinitializer */
00463 #define SYS_GPB_MFPL_PB7MFP_UART1_TXD         (0x06UL<<SYS_GPB_MFPL_PB7MFP_Pos)  /*!< Data transmitter output pin for UART1. \hideinitializer */
00464 #define SYS_GPB_MFPL_PB7MFP_SD1_CMD           (0x07UL<<SYS_GPB_MFPL_PB7MFP_Pos)  /*!< SD/SDIO 1 command/response. \hideinitializer */
00465 #define SYS_GPB_MFPL_PB7MFP_EBI_nCS0          (0x08UL<<SYS_GPB_MFPL_PB7MFP_Pos)  /*!< EBI chip select enable output pin. \hideinitializer */
00466 #define SYS_GPB_MFPL_PB7MFP_BPWM1_CH4         (0x0AUL<<SYS_GPB_MFPL_PB7MFP_Pos)  /*!< BPWM1 channel4 output/capture input. \hideinitializer */
00467 #define SYS_GPB_MFPL_PB7MFP_EPWM1_BRAKE0      (0x0BUL<<SYS_GPB_MFPL_PB7MFP_Pos)  /*!< Brake input pin 0 of EPWM1. \hideinitializer */
00468 #define SYS_GPB_MFPL_PB7MFP_EPWM1_CH4         (0x0CUL<<SYS_GPB_MFPL_PB7MFP_Pos)  /*!< EPWM1 channel4 output/capture input. \hideinitializer */
00469 #define SYS_GPB_MFPL_PB7MFP_INT5              (0x0DUL<<SYS_GPB_MFPL_PB7MFP_Pos)  /*!< External interrupt5 input pin. \hideinitializer */
00470 #define SYS_GPB_MFPL_PB7MFP_USB_VBUS_ST       (0x0EUL<<SYS_GPB_MFPL_PB7MFP_Pos)  /*!< Power supply from USB Full speed host or HUB. \hideinitializer */
00471 #define SYS_GPB_MFPL_PB7MFP_ACMP0_O           (0x0FUL<<SYS_GPB_MFPL_PB7MFP_Pos)  /*!< Analog comparator0 output. \hideinitializer */
00472 /********************* Bit definition of GPB_MFPH register **********************/
00473 #define SYS_GPB_MFPH_PB8MFP_GPIO              (0x00UL<<SYS_GPB_MFPH_PB8MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00474 #define SYS_GPB_MFPH_PB8MFP_EADC0_CH8         (0x01UL<<SYS_GPB_MFPH_PB8MFP_Pos)  /*!< EADC0 channel8 analog input. \hideinitializer */
00475 #define SYS_GPB_MFPH_PB8MFP_EBI_ADR19         (0x02UL<<SYS_GPB_MFPH_PB8MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
00476 #define SYS_GPB_MFPH_PB8MFP_EMAC_RMII_TXD1     (0x03UL<<SYS_GPB_MFPH_PB8MFP_Pos)  /*!< RMII Transmit Data bus bit 1. \hideinitializer */
00477 #define SYS_GPB_MFPH_PB8MFP_USCI1_CLK         (0x04UL<<SYS_GPB_MFPH_PB8MFP_Pos)  /*!< USCI1 clock pin. \hideinitializer */
00478 #define SYS_GPB_MFPH_PB8MFP_UART0_RXD         (0x05UL<<SYS_GPB_MFPH_PB8MFP_Pos)  /*!< Data receiver input pin for UART0. \hideinitializer */
00479 #define SYS_GPB_MFPH_PB8MFP_UART1_nRTS        (0x06UL<<SYS_GPB_MFPH_PB8MFP_Pos)  /*!< Request to Send output pin for UART1. \hideinitializer */
00480 #define SYS_GPB_MFPH_PB8MFP_I2C1_SMBSUS       (0x07UL<<SYS_GPB_MFPH_PB8MFP_Pos)  /*!< I2C1 SMBus SMBSUS# pin (PMBus CONTROL pin)  \hideinitializer */
00481 #define SYS_GPB_MFPH_PB8MFP_BPWM1_CH3         (0x0AUL<<SYS_GPB_MFPH_PB8MFP_Pos)  /*!< BPWM1 channel3 output/capture input. \hideinitializer */
00482 #define SYS_GPB_MFPH_PB8MFP_SPI3_MOSI         (0x0BUL<<SYS_GPB_MFPH_PB8MFP_Pos)  /*!< 1st SPI3 MOSI (Master Out, Slave In) pin. \hideinitializer */
00483 #define SYS_GPB_MFPH_PB8MFP_INT6              (0x0DUL<<SYS_GPB_MFPH_PB8MFP_Pos)  /*!< External interrupt6 input pin. \hideinitializer */
00484 #define SYS_GPB_MFPH_PB9MFP_GPIO              (0x00UL<<SYS_GPB_MFPH_PB9MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00485 #define SYS_GPB_MFPH_PB9MFP_EADC0_CH9         (0x01UL<<SYS_GPB_MFPH_PB9MFP_Pos)  /*!< EADC0 channel9 analog input. \hideinitializer */
00486 #define SYS_GPB_MFPH_PB9MFP_EBI_ADR18         (0x02UL<<SYS_GPB_MFPH_PB9MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
00487 #define SYS_GPB_MFPH_PB9MFP_EMAC_RMII_TXD0     (0x03UL<<SYS_GPB_MFPH_PB9MFP_Pos)  /*!< RMII Transmit Data bus bit 0. \hideinitializer */
00488 #define SYS_GPB_MFPH_PB9MFP_USCI1_CTL1        (0x04UL<<SYS_GPB_MFPH_PB9MFP_Pos)  /*!< USCI1 control1 pin. \hideinitializer */
00489 #define SYS_GPB_MFPH_PB9MFP_UART0_TXD         (0x05UL<<SYS_GPB_MFPH_PB9MFP_Pos)  /*!< Data transmitter output pin for UART0. \hideinitializer */
00490 #define SYS_GPB_MFPH_PB9MFP_UART1_nCTS        (0x06UL<<SYS_GPB_MFPH_PB9MFP_Pos)  /*!< Clear to Send input pin for UART1. \hideinitializer */
00491 #define SYS_GPB_MFPH_PB9MFP_I2C1_SMBAL        (0x07UL<<SYS_GPB_MFPH_PB9MFP_Pos)  /*!< I2C1 SMBus SMBALTER# pin   \hideinitializer */
00492 #define SYS_GPB_MFPH_PB9MFP_BPWM1_CH2         (0x0AUL<<SYS_GPB_MFPH_PB9MFP_Pos)  /*!< BPWM1 channel2 output/capture input. \hideinitializer */
00493 #define SYS_GPB_MFPH_PB9MFP_SPI3_MISO         (0x0BUL<<SYS_GPB_MFPH_PB9MFP_Pos)  /*!< 1st SPI3 MISO (Master In, Slave Out) pin. \hideinitializer */
00494 #define SYS_GPB_MFPH_PB9MFP_INT7              (0x0DUL<<SYS_GPB_MFPH_PB9MFP_Pos)  /*!< External interrupt7 input pin. \hideinitializer */
00495 #define SYS_GPB_MFPH_PB10MFP_GPIO             (0x00UL<<SYS_GPB_MFPH_PB10MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00496 #define SYS_GPB_MFPH_PB10MFP_EADC0_CH10       (0x01UL<<SYS_GPB_MFPH_PB10MFP_Pos) /*!< EADC0 channel1 analog input. \hideinitializer */
00497 #define SYS_GPB_MFPH_PB10MFP_EBI_ADR17        (0x02UL<<SYS_GPB_MFPH_PB10MFP_Pos) /*!< EBI address/data bus bit*. \hideinitializer */
00498 #define SYS_GPB_MFPH_PB10MFP_EMAC_RMII_MDIO    (0x03UL<<SYS_GPB_MFPH_PB10MFP_Pos) /*!< RMII Management Data I/O. \hideinitializer */
00499 #define SYS_GPB_MFPH_PB10MFP_USCI1_CTL0       (0x04UL<<SYS_GPB_MFPH_PB10MFP_Pos) /*!< USCI1 control0 pin. \hideinitializer */
00500 #define SYS_GPB_MFPH_PB10MFP_UART0_nRTS       (0x05UL<<SYS_GPB_MFPH_PB10MFP_Pos) /*!< Request to Send output pin for UART0. \hideinitializer */
00501 #define SYS_GPB_MFPH_PB10MFP_UART4_RXD        (0x06UL<<SYS_GPB_MFPH_PB10MFP_Pos) /*!< Data receiver input pin for UART4. \hideinitializer */
00502 #define SYS_GPB_MFPH_PB10MFP_I2C1_SDA         (0x07UL<<SYS_GPB_MFPH_PB10MFP_Pos) /*!< I2C1 data input/output pin. \hideinitializer */
00503 #define SYS_GPB_MFPH_PB10MFP_CAN0_RXD         (0x08UL<<SYS_GPB_MFPH_PB10MFP_Pos) /*!< CAN0 bus receiver input. \hideinitializer */
00504 #define SYS_GPB_MFPH_PB10MFP_BPWM1_CH1        (0x0AUL<<SYS_GPB_MFPH_PB10MFP_Pos) /*!< BPWM1 channel1 output/capture input. \hideinitializer */
00505 #define SYS_GPB_MFPH_PB10MFP_SPI3_SS          (0x0BUL<<SYS_GPB_MFPH_PB10MFP_Pos) /*!< 1st SPI3 slave select pin. \hideinitializer */
00506 #define SYS_GPB_MFPH_PB10MFP_HSUSB_VBUS_EN    (0x0EUL<<SYS_GPB_MFPH_PB10MFP_Pos) /*!< Power supply from USB High speed host or HUB. \hideinitializer */
00507 #define SYS_GPB_MFPH_PB11MFP_GPIO             (0x00UL<<SYS_GPB_MFPH_PB11MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00508 #define SYS_GPB_MFPH_PB11MFP_EADC0_CH11       (0x01UL<<SYS_GPB_MFPH_PB11MFP_Pos) /*!< EADC0 channel1 analog input. \hideinitializer */
00509 #define SYS_GPB_MFPH_PB11MFP_EBI_ADR16        (0x02UL<<SYS_GPB_MFPH_PB11MFP_Pos) /*!< EBI address/data bus bit*. \hideinitializer */
00510 #define SYS_GPB_MFPH_PB11MFP_EMAC_RMII_MDC     (0x03UL<<SYS_GPB_MFPH_PB11MFP_Pos) /*!< RMII Management Data Clock. \hideinitializer */
00511 #define SYS_GPB_MFPH_PB11MFP_UART0_nCTS       (0x05UL<<SYS_GPB_MFPH_PB11MFP_Pos) /*!< Clear to Send input pin for UART0. \hideinitializer */
00512 #define SYS_GPB_MFPH_PB11MFP_UART4_TXD        (0x06UL<<SYS_GPB_MFPH_PB11MFP_Pos) /*!< Data transmitter output pin for UART4. \hideinitializer */
00513 #define SYS_GPB_MFPH_PB11MFP_I2C1_SCL         (0x07UL<<SYS_GPB_MFPH_PB11MFP_Pos) /*!< I2C1 clock pin. \hideinitializer */
00514 #define SYS_GPB_MFPH_PB11MFP_CAN0_TXD         (0x08UL<<SYS_GPB_MFPH_PB11MFP_Pos) /*!< CAN0 bus transmitter output. \hideinitializer */
00515 #define SYS_GPB_MFPH_PB11MFP_SPI0_I2SMCLK     (0x09UL<<SYS_GPB_MFPH_PB11MFP_Pos) /*!< SPI0 I2S master clock output pin. \hideinitializer */
00516 #define SYS_GPB_MFPH_PB11MFP_BPWM1_CH0        (0x0AUL<<SYS_GPB_MFPH_PB11MFP_Pos) /*!< BPWM1 channel0 output/capture input. \hideinitializer */
00517 #define SYS_GPB_MFPH_PB11MFP_SPI3_CLK         (0x0BUL<<SYS_GPB_MFPH_PB11MFP_Pos) /*!< SPI3 serial clock pin. \hideinitializer */
00518 #define SYS_GPB_MFPH_PB11MFP_HSUSB_VBUS_ST    (0x0EUL<<SYS_GPB_MFPH_PB11MFP_Pos) /*!< Power supply from USB High speed host or HUB. \hideinitializer */
00519 #define SYS_GPB_MFPH_PB12MFP_GPIO             (0x00UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00520 #define SYS_GPB_MFPH_PB12MFP_ACMP0_P2         (0x01UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< Analog comparator0 positive input pin. \hideinitializer */
00521 #define SYS_GPB_MFPH_PB12MFP_ACMP1_P2         (0x01UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< Analog comparator1 positive input pin. \hideinitializer */
00522 #define SYS_GPB_MFPH_PB12MFP_DAC0_OUT         (0x01UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< DAC0 channel analog output. \hideinitializer */
00523 #define SYS_GPB_MFPH_PB12MFP_EADC0_CH12       (0x01UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< EADC0 channel1 analog input. \hideinitializer */
00524 #define SYS_GPB_MFPH_PB12MFP_EBI_AD15         (0x02UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< EBI address/data bus bit1. \hideinitializer */
00525 #define SYS_GPB_MFPH_PB12MFP_SC1_CLK          (0x03UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< SmartCard1 clock pin. \hideinitializer */
00526 #define SYS_GPB_MFPH_PB12MFP_SPI0_MOSI        (0x04UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< 1st SPI0 MOSI (Master Out, Slave In) pin. \hideinitializer */
00527 #define SYS_GPB_MFPH_PB12MFP_USCI0_CLK        (0x05UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< USCI0 clock pin. \hideinitializer */
00528 #define SYS_GPB_MFPH_PB12MFP_UART0_RXD        (0x06UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< Data receiver input pin for UART0. \hideinitializer */
00529 #define SYS_GPB_MFPH_PB12MFP_UART3_nCTS       (0x07UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< Clear to Send input pin for UART3. \hideinitializer */
00530 #define SYS_GPB_MFPH_PB12MFP_I2C2_SDA         (0x08UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< I2C2 data input/output pin. \hideinitializer */
00531 #define SYS_GPB_MFPH_PB12MFP_SD0_nCD          (0x09UL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< SD/SDIO 0 card detect  \hideinitializer */
00532 #define SYS_GPB_MFPH_PB12MFP_EPWM1_CH3        (0x0BUL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< EPWM1 channel3 output/capture input. \hideinitializer */
00533 #define SYS_GPB_MFPH_PB12MFP_ETM_TRACE_DATA3  (0x0CUL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< ETM Rx input bus bit3. \hideinitializer */
00534 #define SYS_GPB_MFPH_PB12MFP_TM3_EXT          (0x0DUL<<SYS_GPB_MFPH_PB12MFP_Pos) /*!< Timer3 event counter input / toggle output  \hideinitializer */
00535 #define SYS_GPB_MFPH_PB13MFP_GPIO             (0x00UL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00536 #define SYS_GPB_MFPH_PB13MFP_ACMP0_P3         (0x01UL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< Analog comparator0 positive input pin. \hideinitializer */
00537 #define SYS_GPB_MFPH_PB13MFP_ACMP1_P3         (0x01UL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< Analog comparator1 positive input pin. \hideinitializer */
00538 #define SYS_GPB_MFPH_PB13MFP_DAC1_OUT         (0x01UL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< DAC1 channel analog output. \hideinitializer */
00539 #define SYS_GPB_MFPH_PB13MFP_EADC0_CH13       (0x01UL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< EADC0 channel1 analog input. \hideinitializer */
00540 #define SYS_GPB_MFPH_PB13MFP_EBI_AD14         (0x02UL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< EBI address/data bus bit1. \hideinitializer */
00541 #define SYS_GPB_MFPH_PB13MFP_SC1_DAT          (0x03UL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< SmartCard1 data pin. \hideinitializer */
00542 #define SYS_GPB_MFPH_PB13MFP_SPI0_MISO        (0x04UL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< 1st SPI0 MISO (Master In, Slave Out) pin. \hideinitializer */
00543 #define SYS_GPB_MFPH_PB13MFP_USCI0_DAT0       (0x05UL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< USCI0 data0 pin. \hideinitializer */
00544 #define SYS_GPB_MFPH_PB13MFP_UART0_TXD        (0x06UL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< Data transmitter output pin for UART0. \hideinitializer */
00545 #define SYS_GPB_MFPH_PB13MFP_UART3_nRTS       (0x07UL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< Request to Send output pin for UART3. \hideinitializer */
00546 #define SYS_GPB_MFPH_PB13MFP_I2C2_SCL         (0x08UL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< I2C2 clock pin. \hideinitializer */
00547 #define SYS_GPB_MFPH_PB13MFP_EPWM1_CH2        (0x0BUL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< EPWM1 channel2 output/capture input. \hideinitializer */
00548 #define SYS_GPB_MFPH_PB13MFP_ETM_TRACE_DATA2  (0x0CUL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< ETM Rx input bus bit2. \hideinitializer */
00549 #define SYS_GPB_MFPH_PB13MFP_TM2_EXT          (0x0DUL<<SYS_GPB_MFPH_PB13MFP_Pos) /*!< Timer2 event counter input / toggle output  \hideinitializer */
00550 #define SYS_GPB_MFPH_PB14MFP_GPIO             (0x00UL<<SYS_GPB_MFPH_PB14MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00551 #define SYS_GPB_MFPH_PB14MFP_EADC0_CH14       (0x01UL<<SYS_GPB_MFPH_PB14MFP_Pos) /*!< EADC0 channel1 analog input. \hideinitializer */
00552 #define SYS_GPB_MFPH_PB14MFP_EBI_AD13         (0x02UL<<SYS_GPB_MFPH_PB14MFP_Pos) /*!< EBI address/data bus bit1. \hideinitializer */
00553 #define SYS_GPB_MFPH_PB14MFP_SC1_RST          (0x03UL<<SYS_GPB_MFPH_PB14MFP_Pos) /*!< SmartCard1 reset pin. \hideinitializer */
00554 #define SYS_GPB_MFPH_PB14MFP_SPI0_CLK         (0x04UL<<SYS_GPB_MFPH_PB14MFP_Pos) /*!< SPI0 serial clock pin. \hideinitializer */
00555 #define SYS_GPB_MFPH_PB14MFP_USCI0_DAT1       (0x05UL<<SYS_GPB_MFPH_PB14MFP_Pos) /*!< USCI0 data1 pin. \hideinitializer */
00556 #define SYS_GPB_MFPH_PB14MFP_UART0_nRTS       (0x06UL<<SYS_GPB_MFPH_PB14MFP_Pos) /*!< Request to Send output pin for UART0. \hideinitializer */
00557 #define SYS_GPB_MFPH_PB14MFP_UART3_RXD        (0x07UL<<SYS_GPB_MFPH_PB14MFP_Pos) /*!< Data receiver input pin for UART3. \hideinitializer */
00558 #define SYS_GPB_MFPH_PB14MFP_I2C2_SMBSUS      (0x08UL<<SYS_GPB_MFPH_PB14MFP_Pos) /*!< I2C2 SMBus SMBSUS# pin (PMBus CONTROL pin)  \hideinitializer */
00559 #define SYS_GPB_MFPH_PB14MFP_EPWM1_CH1        (0x0BUL<<SYS_GPB_MFPH_PB14MFP_Pos) /*!< EPWM1 channel1 output/capture input. \hideinitializer */
00560 #define SYS_GPB_MFPH_PB14MFP_ETM_TRACE_DATA1  (0x0CUL<<SYS_GPB_MFPH_PB14MFP_Pos) /*!< ETM Rx input bus bit1. \hideinitializer */
00561 #define SYS_GPB_MFPH_PB14MFP_TM1_EXT          (0x0DUL<<SYS_GPB_MFPH_PB14MFP_Pos) /*!< Timer1 event counter input / toggle output  \hideinitializer */
00562 #define SYS_GPB_MFPH_PB14MFP_CLKO             (0x0EUL<<SYS_GPB_MFPH_PB14MFP_Pos) /*!< Clock Output pin. \hideinitializer */
00563 #define SYS_GPB_MFPH_PB15MFP_GPIO             (0x00UL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00564 #define SYS_GPB_MFPH_PB15MFP_EADC0_CH15       (0x01UL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< EADC0 channel1 analog input. \hideinitializer */
00565 #define SYS_GPB_MFPH_PB15MFP_EBI_AD12         (0x02UL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< EBI address/data bus bit1. \hideinitializer */
00566 #define SYS_GPB_MFPH_PB15MFP_SC1_PWR          (0x03UL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< SmartCard1 power pin. \hideinitializer */
00567 #define SYS_GPB_MFPH_PB15MFP_SPI0_SS          (0x04UL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< 1st SPI0 slave select pin. \hideinitializer */
00568 #define SYS_GPB_MFPH_PB15MFP_USCI0_CTL1       (0x05UL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< USCI0 control1 pin. \hideinitializer */
00569 #define SYS_GPB_MFPH_PB15MFP_UART0_nCTS       (0x06UL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< Clear to Send input pin for UART0. \hideinitializer */
00570 #define SYS_GPB_MFPH_PB15MFP_UART3_TXD        (0x07UL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< Data transmitter output pin for UART3. \hideinitializer */
00571 #define SYS_GPB_MFPH_PB15MFP_I2C2_SMBAL       (0x08UL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< I2C2 SMBus SMBALTER# pin   \hideinitializer */
00572 #define SYS_GPB_MFPH_PB15MFP_EPWM1_CH0        (0x0BUL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< EPWM1 channel0 output/capture input. \hideinitializer */
00573 #define SYS_GPB_MFPH_PB15MFP_ETM_TRACE_DATA0  (0x0CUL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< ETM Rx input bus bit0. \hideinitializer */
00574 #define SYS_GPB_MFPH_PB15MFP_TM0_EXT          (0x0DUL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< Timer0 event counter input / toggle output  \hideinitializer */
00575 #define SYS_GPB_MFPH_PB15MFP_USB_VBUS_EN      (0x0EUL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< Power supply from USB Full speed host or HUB. \hideinitializer */
00576 #define SYS_GPB_MFPH_PB15MFP_HSUSB_VBUS_EN    (0x0FUL<<SYS_GPB_MFPH_PB15MFP_Pos) /*!< Power supply from USB High speed host or HUB. \hideinitializer */
00577 /********************* Bit definition of GPC_MFPL register **********************/
00578 #define SYS_GPC_MFPL_PC0MFP_GPIO              (0x00UL<<SYS_GPC_MFPL_PC0MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00579 #define SYS_GPC_MFPL_PC0MFP_EBI_AD0           (0x02UL<<SYS_GPC_MFPL_PC0MFP_Pos)  /*!< EBI address/data bus bit0. \hideinitializer */
00580 #define SYS_GPC_MFPL_PC0MFP_SPIM_MOSI         (0x03UL<<SYS_GPC_MFPL_PC0MFP_Pos)  /*!< 1st SPIM MOSI (Master Out, Slave In) pin. \hideinitializer */
00581 #define SYS_GPC_MFPL_PC0MFP_QSPI0_MOSI0        (0x04UL<<SYS_GPC_MFPL_PC0MFP_Pos)  /*!< 1st QSPI0 MOSI (Master Out, Slave In) pin. \hideinitializer */
00582 #define SYS_GPC_MFPL_PC0MFP_SC1_CLK           (0x05UL<<SYS_GPC_MFPL_PC0MFP_Pos)  /*!< SmartCard1 clock pin. \hideinitializer */
00583 #define SYS_GPC_MFPL_PC0MFP_I2S0_LRCK         (0x06UL<<SYS_GPC_MFPL_PC0MFP_Pos)  /*!< I2S0 left right channel clock. \hideinitializer */
00584 #define SYS_GPC_MFPL_PC0MFP_SPI1_SS           (0x07UL<<SYS_GPC_MFPL_PC0MFP_Pos)  /*!< 1st SPI1 slave select pin. \hideinitializer */
00585 #define SYS_GPC_MFPL_PC0MFP_UART2_RXD         (0x08UL<<SYS_GPC_MFPL_PC0MFP_Pos)  /*!< Data receiver input pin for UART2. \hideinitializer */
00586 #define SYS_GPC_MFPL_PC0MFP_I2C0_SDA          (0x09UL<<SYS_GPC_MFPL_PC0MFP_Pos)  /*!< I2C0 data input/output pin. \hideinitializer */
00587 #define SYS_GPC_MFPL_PC0MFP_EPWM1_CH5         (0x0CUL<<SYS_GPC_MFPL_PC0MFP_Pos)  /*!< EPWM1 channel5 output/capture input. \hideinitializer */
00588 #define SYS_GPC_MFPL_PC0MFP_ACMP1_O           (0x0EUL<<SYS_GPC_MFPL_PC0MFP_Pos)  /*!< Analog comparator1 output. \hideinitializer */
00589 #define SYS_GPC_MFPL_PC1MFP_GPIO              (0x00UL<<SYS_GPC_MFPL_PC1MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00590 #define SYS_GPC_MFPL_PC1MFP_EBI_AD1           (0x02UL<<SYS_GPC_MFPL_PC1MFP_Pos)  /*!< EBI address/data bus bit1. \hideinitializer */
00591 #define SYS_GPC_MFPL_PC1MFP_SPIM_MISO         (0x03UL<<SYS_GPC_MFPL_PC1MFP_Pos)  /*!< 1st SPIM MISO (Master In, Slave Out) pin. \hideinitializer */
00592 #define SYS_GPC_MFPL_PC1MFP_QSPI0_MISO0        (0x04UL<<SYS_GPC_MFPL_PC1MFP_Pos)  /*!< 1st QSPI0 MISO (Master In, Slave Out) pin. \hideinitializer */
00593 #define SYS_GPC_MFPL_PC1MFP_SC1_DAT           (0x05UL<<SYS_GPC_MFPL_PC1MFP_Pos)  /*!< SmartCard1 data pin. \hideinitializer */
00594 #define SYS_GPC_MFPL_PC1MFP_I2S0_DO           (0x06UL<<SYS_GPC_MFPL_PC1MFP_Pos)  /*!< I2S0 data output. \hideinitializer */
00595 #define SYS_GPC_MFPL_PC1MFP_SPI1_CLK          (0x07UL<<SYS_GPC_MFPL_PC1MFP_Pos)  /*!< SPI1 serial clock pin. \hideinitializer */
00596 #define SYS_GPC_MFPL_PC1MFP_UART2_TXD         (0x08UL<<SYS_GPC_MFPL_PC1MFP_Pos)  /*!< Data transmitter output pin for UART2. \hideinitializer */
00597 #define SYS_GPC_MFPL_PC1MFP_I2C0_SCL          (0x09UL<<SYS_GPC_MFPL_PC1MFP_Pos)  /*!< I2C0 clock pin. \hideinitializer */
00598 #define SYS_GPC_MFPL_PC1MFP_EPWM1_CH4         (0x0CUL<<SYS_GPC_MFPL_PC1MFP_Pos)  /*!< EPWM1 channel4 output/capture input. \hideinitializer */
00599 #define SYS_GPC_MFPL_PC1MFP_ACMP0_O           (0x0EUL<<SYS_GPC_MFPL_PC1MFP_Pos)  /*!< Analog comparator0 output. \hideinitializer */
00600 #define SYS_GPC_MFPL_PC2MFP_GPIO              (0x00UL<<SYS_GPC_MFPL_PC2MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00601 #define SYS_GPC_MFPL_PC2MFP_EBI_AD2           (0x02UL<<SYS_GPC_MFPL_PC2MFP_Pos)  /*!< EBI address/data bus bit2. \hideinitializer */
00602 #define SYS_GPC_MFPL_PC2MFP_SPIM_CLK          (0x03UL<<SYS_GPC_MFPL_PC2MFP_Pos)  /*!< SPIM serial clock pin. \hideinitializer */
00603 #define SYS_GPC_MFPL_PC2MFP_QSPI0_CLK          (0x04UL<<SYS_GPC_MFPL_PC2MFP_Pos)  /*!< QSPI0 serial clock pin. \hideinitializer */
00604 #define SYS_GPC_MFPL_PC2MFP_SC1_RST           (0x05UL<<SYS_GPC_MFPL_PC2MFP_Pos)  /*!< SmartCard1 reset pin. \hideinitializer */
00605 #define SYS_GPC_MFPL_PC2MFP_I2S0_DI           (0x06UL<<SYS_GPC_MFPL_PC2MFP_Pos)  /*!< I2S0 data input. \hideinitializer */
00606 #define SYS_GPC_MFPL_PC2MFP_SPI1_MOSI         (0x07UL<<SYS_GPC_MFPL_PC2MFP_Pos)  /*!< 1st SPI1 MOSI (Master Out, Slave In) pin. \hideinitializer */
00607 #define SYS_GPC_MFPL_PC2MFP_UART2_nCTS        (0x08UL<<SYS_GPC_MFPL_PC2MFP_Pos)  /*!< Clear to Send input pin for UART2. \hideinitializer */
00608 #define SYS_GPC_MFPL_PC2MFP_I2C0_SMBSUS       (0x09UL<<SYS_GPC_MFPL_PC2MFP_Pos)  /*!< I2C0 SMBus SMBSUS# pin (PMBus CONTROL pin)  \hideinitializer */
00609 #define SYS_GPC_MFPL_PC2MFP_CAN1_RXD          (0x0AUL<<SYS_GPC_MFPL_PC2MFP_Pos)  /*!< CAN1 bus receiver input. \hideinitializer */
00610 #define SYS_GPC_MFPL_PC2MFP_UART3_RXD         (0x0BUL<<SYS_GPC_MFPL_PC2MFP_Pos)  /*!< Data receiver input pin for UART3. \hideinitializer */
00611 #define SYS_GPC_MFPL_PC2MFP_EPWM1_CH3         (0x0CUL<<SYS_GPC_MFPL_PC2MFP_Pos)  /*!< EPWM1 channel3 output/capture input. \hideinitializer */
00612 #define SYS_GPC_MFPL_PC3MFP_GPIO              (0x00UL<<SYS_GPC_MFPL_PC3MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00613 #define SYS_GPC_MFPL_PC3MFP_EBI_AD3           (0x02UL<<SYS_GPC_MFPL_PC3MFP_Pos)  /*!< EBI address/data bus bit3. \hideinitializer */
00614 #define SYS_GPC_MFPL_PC3MFP_SPIM_SS           (0x03UL<<SYS_GPC_MFPL_PC3MFP_Pos)  /*!< 1st SPIM slave select pin. \hideinitializer */
00615 #define SYS_GPC_MFPL_PC3MFP_QSPI0_SS           (0x04UL<<SYS_GPC_MFPL_PC3MFP_Pos)  /*!< 1st QSPI0 slave select pin. \hideinitializer */
00616 #define SYS_GPC_MFPL_PC3MFP_SC1_PWR           (0x05UL<<SYS_GPC_MFPL_PC3MFP_Pos)  /*!< SmartCard1 power pin. \hideinitializer */
00617 #define SYS_GPC_MFPL_PC3MFP_I2S0_MCLK         (0x06UL<<SYS_GPC_MFPL_PC3MFP_Pos)  /*!< I2S0 master clock output pin. \hideinitializer */
00618 #define SYS_GPC_MFPL_PC3MFP_SPI1_MISO         (0x07UL<<SYS_GPC_MFPL_PC3MFP_Pos)  /*!< 1st SPI1 MISO (Master In, Slave Out) pin. \hideinitializer */
00619 #define SYS_GPC_MFPL_PC3MFP_UART2_nRTS        (0x08UL<<SYS_GPC_MFPL_PC3MFP_Pos)  /*!< Request to Send output pin for UART2. \hideinitializer */
00620 #define SYS_GPC_MFPL_PC3MFP_I2C0_SMBAL        (0x09UL<<SYS_GPC_MFPL_PC3MFP_Pos)  /*!< I2C0 SMBus SMBALTER# pin  \hideinitializer  */
00621 #define SYS_GPC_MFPL_PC3MFP_CAN1_TXD          (0x0AUL<<SYS_GPC_MFPL_PC3MFP_Pos)  /*!< CAN1 bus transmitter output. \hideinitializer */
00622 #define SYS_GPC_MFPL_PC3MFP_UART3_TXD         (0x0BUL<<SYS_GPC_MFPL_PC3MFP_Pos)  /*!< Data transmitter output pin for UART3. \hideinitializer */
00623 #define SYS_GPC_MFPL_PC3MFP_EPWM1_CH2         (0x0CUL<<SYS_GPC_MFPL_PC3MFP_Pos)  /*!< EPWM1 channel2 output/capture input. \hideinitializer */
00624 #define SYS_GPC_MFPL_PC4MFP_GPIO              (0x00UL<<SYS_GPC_MFPL_PC4MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00625 #define SYS_GPC_MFPL_PC4MFP_EBI_AD4           (0x02UL<<SYS_GPC_MFPL_PC4MFP_Pos)  /*!< EBI address/data bus bit4. \hideinitializer */
00626 #define SYS_GPC_MFPL_PC4MFP_SPIM_D3           (0x03UL<<SYS_GPC_MFPL_PC4MFP_Pos)  /*!< SPIM data 3 pin for Quad Mode I/O. \hideinitializer */
00627 #define SYS_GPC_MFPL_PC4MFP_QSPI0_MOSI1        (0x04UL<<SYS_GPC_MFPL_PC4MFP_Pos)  /*!< 2nd QSPI0 MOSI (Master Out, Slave In) pin. \hideinitializer */
00628 #define SYS_GPC_MFPL_PC4MFP_SC1_nCD           (0x05UL<<SYS_GPC_MFPL_PC4MFP_Pos)  /*!< SmartCard1 card detect pin. \hideinitializer */
00629 #define SYS_GPC_MFPL_PC4MFP_I2S0_BCLK         (0x06UL<<SYS_GPC_MFPL_PC4MFP_Pos)  /*!< I2S0 bit clock pin. \hideinitializer */
00630 #define SYS_GPC_MFPL_PC4MFP_SPI1_I2SMCLK      (0x07UL<<SYS_GPC_MFPL_PC4MFP_Pos)  /*!< SPI1 I2S master clock output pin. \hideinitializer */
00631 #define SYS_GPC_MFPL_PC4MFP_UART2_RXD         (0x08UL<<SYS_GPC_MFPL_PC4MFP_Pos)  /*!< Data receiver input pin for UART2. \hideinitializer */
00632 #define SYS_GPC_MFPL_PC4MFP_I2C1_SDA          (0x09UL<<SYS_GPC_MFPL_PC4MFP_Pos)  /*!< I2C1 data input/output pin. \hideinitializer */
00633 #define SYS_GPC_MFPL_PC4MFP_CAN0_RXD          (0x0AUL<<SYS_GPC_MFPL_PC4MFP_Pos)  /*!< CAN0 bus receiver input. \hideinitializer */
00634 #define SYS_GPC_MFPL_PC4MFP_UART4_RXD         (0x0BUL<<SYS_GPC_MFPL_PC4MFP_Pos)  /*!< Data receiver input pin for UART4. \hideinitializer */
00635 #define SYS_GPC_MFPL_PC4MFP_EPWM1_CH1         (0x0CUL<<SYS_GPC_MFPL_PC4MFP_Pos)  /*!< EPWM1 channel1 output/capture input. \hideinitializer */
00636 #define SYS_GPC_MFPL_PC5MFP_GPIO              (0x00UL<<SYS_GPC_MFPL_PC5MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00637 #define SYS_GPC_MFPL_PC5MFP_EBI_AD5           (0x02UL<<SYS_GPC_MFPL_PC5MFP_Pos)  /*!< EBI address/data bus bit5. \hideinitializer */
00638 #define SYS_GPC_MFPL_PC5MFP_SPIM_D2           (0x03UL<<SYS_GPC_MFPL_PC5MFP_Pos)  /*!< SPIM data 2 pin for Quad Mode I/O. \hideinitializer */
00639 #define SYS_GPC_MFPL_PC5MFP_QSPI0_MISO1        (0x04UL<<SYS_GPC_MFPL_PC5MFP_Pos)  /*!< 2nd QSPI0 MISO (Master In, Slave Out) pin. \hideinitializer */
00640 #define SYS_GPC_MFPL_PC5MFP_UART2_TXD         (0x08UL<<SYS_GPC_MFPL_PC5MFP_Pos)  /*!< Data transmitter output pin for UART2. \hideinitializer */
00641 #define SYS_GPC_MFPL_PC5MFP_I2C1_SCL          (0x09UL<<SYS_GPC_MFPL_PC5MFP_Pos)  /*!< I2C1 clock pin. \hideinitializer */
00642 #define SYS_GPC_MFPL_PC5MFP_CAN0_TXD          (0x0AUL<<SYS_GPC_MFPL_PC5MFP_Pos)  /*!< CAN0 bus transmitter output. \hideinitializer */
00643 #define SYS_GPC_MFPL_PC5MFP_UART4_TXD         (0x0BUL<<SYS_GPC_MFPL_PC5MFP_Pos)  /*!< Data transmitter output pin for UART4. \hideinitializer */
00644 #define SYS_GPC_MFPL_PC5MFP_EPWM1_CH0         (0x0CUL<<SYS_GPC_MFPL_PC5MFP_Pos)  /*!< EPWM1 channel0 output/capture input. \hideinitializer */
00645 #define SYS_GPC_MFPL_PC6MFP_GPIO              (0x00UL<<SYS_GPC_MFPL_PC6MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00646 #define SYS_GPC_MFPL_PC6MFP_EBI_AD8           (0x02UL<<SYS_GPC_MFPL_PC6MFP_Pos)  /*!< EBI address/data bus bit8. \hideinitializer */
00647 #define SYS_GPC_MFPL_PC6MFP_EMAC_RMII_RXD1     (0x03UL<<SYS_GPC_MFPL_PC6MFP_Pos)  /*!< RMII Receive Data bus bit 1. \hideinitializer */
00648 #define SYS_GPC_MFPL_PC6MFP_SPI1_MOSI         (0x04UL<<SYS_GPC_MFPL_PC6MFP_Pos)  /*!< 1st SPI1 MOSI (Master Out, Slave In) pin. \hideinitializer */
00649 #define SYS_GPC_MFPL_PC6MFP_UART4_RXD         (0x05UL<<SYS_GPC_MFPL_PC6MFP_Pos)  /*!< Data receiver input pin for UART4. \hideinitializer */
00650 #define SYS_GPC_MFPL_PC6MFP_SC2_RST           (0x06UL<<SYS_GPC_MFPL_PC6MFP_Pos)  /*!< SmartCard2 reset pin. \hideinitializer */
00651 #define SYS_GPC_MFPL_PC6MFP_UART0_nRTS        (0x07UL<<SYS_GPC_MFPL_PC6MFP_Pos)  /*!< Request to Send output pin for UART0. \hideinitializer */
00652 #define SYS_GPC_MFPL_PC6MFP_I2C1_SMBSUS       (0x08UL<<SYS_GPC_MFPL_PC6MFP_Pos)  /*!< I2C1 SMBus SMBSUS# pin (PMBus CONTROL pin)  \hideinitializer */
00653 #define SYS_GPC_MFPL_PC6MFP_EPWM1_CH3         (0x0BUL<<SYS_GPC_MFPL_PC6MFP_Pos)  /*!< EPWM1 channel3 output/capture input. \hideinitializer */
00654 #define SYS_GPC_MFPL_PC6MFP_BPWM1_CH1         (0x0CUL<<SYS_GPC_MFPL_PC6MFP_Pos)  /*!< BPWM1 channel1 output/capture input. \hideinitializer */
00655 #define SYS_GPC_MFPL_PC6MFP_TM1               (0x0EUL<<SYS_GPC_MFPL_PC6MFP_Pos)  /*!< Timer1 event counter input / toggle output  \hideinitializer */
00656 #define SYS_GPC_MFPL_PC6MFP_INT2              (0x0FUL<<SYS_GPC_MFPL_PC6MFP_Pos)  /*!< External interrupt2 input pin. \hideinitializer */
00657 #define SYS_GPC_MFPL_PC7MFP_GPIO              (0x00UL<<SYS_GPC_MFPL_PC7MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00658 #define SYS_GPC_MFPL_PC7MFP_EBI_AD9           (0x02UL<<SYS_GPC_MFPL_PC7MFP_Pos)  /*!< EBI address/data bus bit9. \hideinitializer */
00659 #define SYS_GPC_MFPL_PC7MFP_EMAC_RMII_RXD0     (0x03UL<<SYS_GPC_MFPL_PC7MFP_Pos)  /*!< RMII Receive Data bus bit 0. \hideinitializer */
00660 #define SYS_GPC_MFPL_PC7MFP_SPI1_MISO         (0x04UL<<SYS_GPC_MFPL_PC7MFP_Pos)  /*!< 1st SPI1 MISO (Master In, Slave Out) pin. \hideinitializer */
00661 #define SYS_GPC_MFPL_PC7MFP_UART4_TXD         (0x05UL<<SYS_GPC_MFPL_PC7MFP_Pos)  /*!< Data transmitter output pin for UART4. \hideinitializer */
00662 #define SYS_GPC_MFPL_PC7MFP_SC2_PWR           (0x06UL<<SYS_GPC_MFPL_PC7MFP_Pos)  /*!< SmartCard2 power pin. \hideinitializer */
00663 #define SYS_GPC_MFPL_PC7MFP_UART0_nCTS        (0x07UL<<SYS_GPC_MFPL_PC7MFP_Pos)  /*!< Clear to Send input pin for UART0. \hideinitializer */
00664 #define SYS_GPC_MFPL_PC7MFP_I2C1_SMBAL        (0x08UL<<SYS_GPC_MFPL_PC7MFP_Pos)  /*!< I2C1 SMBus SMBALTER# pin  \hideinitializer  */
00665 #define SYS_GPC_MFPL_PC7MFP_EPWM1_CH2         (0x0BUL<<SYS_GPC_MFPL_PC7MFP_Pos)  /*!< EPWM1 channel2 output/capture input. \hideinitializer */
00666 #define SYS_GPC_MFPL_PC7MFP_BPWM1_CH0         (0x0CUL<<SYS_GPC_MFPL_PC7MFP_Pos)  /*!< BPWM1 channel0 output/capture input. \hideinitializer */
00667 #define SYS_GPC_MFPL_PC7MFP_TM0               (0x0EUL<<SYS_GPC_MFPL_PC7MFP_Pos)  /*!< Timer0 event counter input / toggle output  \hideinitializer */
00668 #define SYS_GPC_MFPL_PC7MFP_INT3              (0x0FUL<<SYS_GPC_MFPL_PC7MFP_Pos)  /*!< External interrupt3 input pin. \hideinitializer */
00669 /********************* Bit definition of GPC_MFPH register **********************/
00670 #define SYS_GPC_MFPH_PC8MFP_GPIO              (0x00UL<<SYS_GPC_MFPH_PC8MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00671 #define SYS_GPC_MFPH_PC8MFP_EBI_ADR16         (0x02UL<<SYS_GPC_MFPH_PC8MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
00672 #define SYS_GPC_MFPH_PC8MFP_EMAC_RMII_REFCLK       (0x03UL<<SYS_GPC_MFPH_PC8MFP_Pos)  /*!< EMAC mode clock input. \hideinitializer */
00673 #define SYS_GPC_MFPH_PC8MFP_I2C0_SDA          (0x04UL<<SYS_GPC_MFPH_PC8MFP_Pos)  /*!< I2C0 data input/output pin. \hideinitializer */
00674 #define SYS_GPC_MFPH_PC8MFP_UART4_nCTS        (0x05UL<<SYS_GPC_MFPH_PC8MFP_Pos)  /*!< Clear to Send input pin for UART4. \hideinitializer */
00675 #define SYS_GPC_MFPH_PC8MFP_UART1_RXD         (0x08UL<<SYS_GPC_MFPH_PC8MFP_Pos)  /*!< Data receiver input pin for UART1. \hideinitializer */
00676 #define SYS_GPC_MFPH_PC8MFP_EPWM1_CH1         (0x0BUL<<SYS_GPC_MFPH_PC8MFP_Pos)  /*!< EPWM1 channel1 output/capture input. \hideinitializer */
00677 #define SYS_GPC_MFPH_PC8MFP_BPWM1_CH4         (0x0CUL<<SYS_GPC_MFPH_PC8MFP_Pos)  /*!< BPWM1 channel4 output/capture input. \hideinitializer */
00678 #define SYS_GPC_MFPH_PC9MFP_GPIO              (0x00UL<<SYS_GPC_MFPH_PC9MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00679 #define SYS_GPC_MFPH_PC9MFP_EBI_ADR7          (0x02UL<<SYS_GPC_MFPH_PC9MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
00680 #define SYS_GPC_MFPH_PC9MFP_SPI3_SS           (0x06UL<<SYS_GPC_MFPH_PC9MFP_Pos)  /*!< 1st SPI3 slave select pin. \hideinitializer */
00681 #define SYS_GPC_MFPH_PC9MFP_UART3_RXD         (0x07UL<<SYS_GPC_MFPH_PC9MFP_Pos)  /*!< Data receiver input pin for UART3. \hideinitializer */
00682 #define SYS_GPC_MFPH_PC9MFP_CAN1_RXD          (0x09UL<<SYS_GPC_MFPH_PC9MFP_Pos)  /*!< CAN1 bus receiver input. \hideinitializer */
00683 #define SYS_GPC_MFPH_PC9MFP_EPWM1_CH3         (0x0CUL<<SYS_GPC_MFPH_PC9MFP_Pos)  /*!< EPWM1 channel3 output/capture input. \hideinitializer */
00684 #define SYS_GPC_MFPH_PC10MFP_GPIO             (0x00UL<<SYS_GPC_MFPH_PC10MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00685 #define SYS_GPC_MFPH_PC10MFP_EBI_ADR6         (0x02UL<<SYS_GPC_MFPH_PC10MFP_Pos) /*!< EBI address/data bus bit*. \hideinitializer */
00686 #define SYS_GPC_MFPH_PC10MFP_SPI3_CLK         (0x06UL<<SYS_GPC_MFPH_PC10MFP_Pos) /*!< SPI3 serial clock pin. \hideinitializer */
00687 #define SYS_GPC_MFPH_PC10MFP_UART3_TXD        (0x07UL<<SYS_GPC_MFPH_PC10MFP_Pos) /*!< Data transmitter output pin for UART3. \hideinitializer */
00688 #define SYS_GPC_MFPH_PC10MFP_CAN1_TXD         (0x09UL<<SYS_GPC_MFPH_PC10MFP_Pos) /*!< CAN1 bus transmitter output. \hideinitializer */
00689 #define SYS_GPC_MFPH_PC10MFP_ECAP1_IC0        (0x0BUL<<SYS_GPC_MFPH_PC10MFP_Pos) /*!< Input 0 of enhanced capture unit 1. \hideinitializer */
00690 #define SYS_GPC_MFPH_PC10MFP_EPWM1_CH2        (0x0CUL<<SYS_GPC_MFPH_PC10MFP_Pos) /*!< EPWM1 channel2 output/capture input. \hideinitializer */
00691 #define SYS_GPC_MFPH_PC11MFP_GPIO             (0x00UL<<SYS_GPC_MFPH_PC11MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00692 #define SYS_GPC_MFPH_PC11MFP_EBI_ADR5         (0x02UL<<SYS_GPC_MFPH_PC11MFP_Pos) /*!< EBI address/data bus bit*. \hideinitializer */
00693 #define SYS_GPC_MFPH_PC11MFP_UART0_RXD        (0x03UL<<SYS_GPC_MFPH_PC11MFP_Pos) /*!< Data receiver input pin for UART0. \hideinitializer */
00694 #define SYS_GPC_MFPH_PC11MFP_I2C0_SDA         (0x04UL<<SYS_GPC_MFPH_PC11MFP_Pos) /*!< I2C0 data input/output pin. \hideinitializer */
00695 #define SYS_GPC_MFPH_PC11MFP_SPI3_MOSI        (0x06UL<<SYS_GPC_MFPH_PC11MFP_Pos) /*!< 1st SPI3 MOSI (Master Out, Slave In) pin. \hideinitializer */
00696 #define SYS_GPC_MFPH_PC11MFP_ECAP1_IC1        (0x0BUL<<SYS_GPC_MFPH_PC11MFP_Pos) /*!< Input 1 of enhanced capture unit 1. \hideinitializer */
00697 #define SYS_GPC_MFPH_PC11MFP_EPWM1_CH1        (0x0CUL<<SYS_GPC_MFPH_PC11MFP_Pos) /*!< EPWM1 channel1 output/capture input. \hideinitializer */
00698 #define SYS_GPC_MFPH_PC11MFP_ACMP1_O          (0x0EUL<<SYS_GPC_MFPH_PC11MFP_Pos) /*!< Analog comparator1 output. \hideinitializer */
00699 #define SYS_GPC_MFPH_PC12MFP_GPIO             (0x00UL<<SYS_GPC_MFPH_PC12MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00700 #define SYS_GPC_MFPH_PC12MFP_EBI_ADR4         (0x02UL<<SYS_GPC_MFPH_PC12MFP_Pos) /*!< EBI address/data bus bit*. \hideinitializer */
00701 #define SYS_GPC_MFPH_PC12MFP_UART0_TXD        (0x03UL<<SYS_GPC_MFPH_PC12MFP_Pos) /*!< Data transmitter output pin for UART0. \hideinitializer */
00702 #define SYS_GPC_MFPH_PC12MFP_I2C0_SCL         (0x04UL<<SYS_GPC_MFPH_PC12MFP_Pos) /*!< I2C0 clock pin. \hideinitializer */
00703 #define SYS_GPC_MFPH_PC12MFP_SPI3_MISO        (0x06UL<<SYS_GPC_MFPH_PC12MFP_Pos) /*!< 1st SPI3 MISO (Master In, Slave Out) pin. \hideinitializer */
00704 #define SYS_GPC_MFPH_PC12MFP_SC0_nCD          (0x09UL<<SYS_GPC_MFPH_PC12MFP_Pos) /*!< SmartCard0 card detect pin. \hideinitializer */
00705 #define SYS_GPC_MFPH_PC12MFP_ECAP1_IC2        (0x0BUL<<SYS_GPC_MFPH_PC12MFP_Pos) /*!< Input 1 of enhanced capture unit 2. \hideinitializer */
00706 #define SYS_GPC_MFPH_PC12MFP_EPWM1_CH0        (0x0CUL<<SYS_GPC_MFPH_PC12MFP_Pos) /*!< EPWM1 channel0 output/capture input. \hideinitializer */
00707 #define SYS_GPC_MFPH_PC12MFP_ACMP0_O          (0x0EUL<<SYS_GPC_MFPH_PC12MFP_Pos) /*!< Analog comparator0 output. \hideinitializer */
00708 #define SYS_GPC_MFPH_PC13MFP_GPIO             (0x00UL<<SYS_GPC_MFPH_PC13MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00709 #define SYS_GPC_MFPH_PC13MFP_EBI_ADR10        (0x02UL<<SYS_GPC_MFPH_PC13MFP_Pos) /*!< EBI address/data bus bit*. \hideinitializer */
00710 #define SYS_GPC_MFPH_PC13MFP_SC2_nCD          (0x03UL<<SYS_GPC_MFPH_PC13MFP_Pos) /*!< SmartCard2 card detect pin. \hideinitializer */
00711 #define SYS_GPC_MFPH_PC13MFP_SPI2_I2SMCLK     (0x04UL<<SYS_GPC_MFPH_PC13MFP_Pos) /*!< SPI2 I2S master clock output pin. \hideinitializer */
00712 #define SYS_GPC_MFPH_PC13MFP_CAN1_TXD         (0x05UL<<SYS_GPC_MFPH_PC13MFP_Pos) /*!< CAN1 bus transmitter output. \hideinitializer */
00713 #define SYS_GPC_MFPH_PC13MFP_USCI0_CTL0       (0x06UL<<SYS_GPC_MFPH_PC13MFP_Pos) /*!< USCI0 control0 pin. \hideinitializer */
00714 #define SYS_GPC_MFPH_PC13MFP_UART2_TXD        (0x07UL<<SYS_GPC_MFPH_PC13MFP_Pos) /*!< Data transmitter output pin for UART2. \hideinitializer */
00715 #define SYS_GPC_MFPH_PC13MFP_BPWM0_CH4        (0x09UL<<SYS_GPC_MFPH_PC13MFP_Pos) /*!< BPWM0 channel4 output/capture input. \hideinitializer */
00716 #define SYS_GPC_MFPH_PC13MFP_CLKO             (0x0DUL<<SYS_GPC_MFPH_PC13MFP_Pos) /*!< Clock Output pin. \hideinitializer */
00717 #define SYS_GPC_MFPH_PC13MFP_EADC0_ST         (0x0EUL<<SYS_GPC_MFPH_PC13MFP_Pos) /*!< EADC external trigger input. \hideinitializer */
00718 #define SYS_GPC_MFPH_PC14MFP_GPIO             (0x00UL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00719 #define SYS_GPC_MFPH_PC14MFP_EBI_AD11         (0x02UL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< EBI address/data bus bit1. \hideinitializer */
00720 #define SYS_GPC_MFPH_PC14MFP_SC1_nCD          (0x03UL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< SmartCard1 card detect pin. \hideinitializer */
00721 #define SYS_GPC_MFPH_PC14MFP_SPI0_I2SMCLK     (0x04UL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< SPI0 I2S master clock output pin. \hideinitializer */
00722 #define SYS_GPC_MFPH_PC14MFP_USCI0_CTL0       (0x05UL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< USCI0 control0 pin. \hideinitializer */
00723 #define SYS_GPC_MFPH_PC14MFP_QSPI0_CLK         (0x06UL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< QSPI0 serial clock pin. \hideinitializer */
00724 #define SYS_GPC_MFPH_PC14MFP_EPWM0_SYNC_IN    (0x0BUL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< EPWM0 counter synchronous trigger input pin. \hideinitializer */
00725 #define SYS_GPC_MFPH_PC14MFP_ETM_TRACE_CLK    (0x0CUL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< ETM Rx clock input pin. \hideinitializer */
00726 #define SYS_GPC_MFPH_PC14MFP_TM1              (0x0DUL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< Timer1 event counter input / toggle output  \hideinitializer */
00727 #define SYS_GPC_MFPH_PC14MFP_USB_VBUS_ST      (0x0EUL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< Power supply from USB Full speed host or HUB. \hideinitializer */
00728 #define SYS_GPC_MFPH_PC14MFP_HSUSB_VBUS_ST    (0x0FUL<<SYS_GPC_MFPH_PC14MFP_Pos) /*!< Power supply from USB High speed host or HUB. \hideinitializer */
00729 /********************* Bit definition of GPD_MFPL register **********************/
00730 #define SYS_GPD_MFPL_PD0MFP_GPIO              (0x00UL<<SYS_GPD_MFPL_PD0MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00731 #define SYS_GPD_MFPL_PD0MFP_EBI_AD13          (0x02UL<<SYS_GPD_MFPL_PD0MFP_Pos)  /*!< EBI address/data bus bit1. \hideinitializer */
00732 #define SYS_GPD_MFPL_PD0MFP_USCI0_CLK         (0x03UL<<SYS_GPD_MFPL_PD0MFP_Pos)  /*!< USCI0 clock pin. \hideinitializer */
00733 #define SYS_GPD_MFPL_PD0MFP_SPI0_MOSI         (0x04UL<<SYS_GPD_MFPL_PD0MFP_Pos)  /*!< 1st SPI0 MOSI (Master Out, Slave In) pin. \hideinitializer */
00734 #define SYS_GPD_MFPL_PD0MFP_UART3_RXD         (0x05UL<<SYS_GPD_MFPL_PD0MFP_Pos)  /*!< Data receiver input pin for UART3. \hideinitializer */
00735 #define SYS_GPD_MFPL_PD0MFP_I2C2_SDA          (0x06UL<<SYS_GPD_MFPL_PD0MFP_Pos)  /*!< I2C2 data input/output pin. \hideinitializer */
00736 #define SYS_GPD_MFPL_PD0MFP_SC2_CLK           (0x07UL<<SYS_GPD_MFPL_PD0MFP_Pos)  /*!< SmartCard2 clock pin. \hideinitializer */
00737 #define SYS_GPD_MFPL_PD0MFP_TM2               (0x0EUL<<SYS_GPD_MFPL_PD0MFP_Pos)  /*!< Timer2 event counter input / toggle output  \hideinitializer */
00738 #define SYS_GPD_MFPL_PD1MFP_GPIO              (0x00UL<<SYS_GPD_MFPL_PD1MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00739 #define SYS_GPD_MFPL_PD1MFP_EBI_AD12          (0x02UL<<SYS_GPD_MFPL_PD1MFP_Pos)  /*!< EBI address/data bus bit1. \hideinitializer */
00740 #define SYS_GPD_MFPL_PD1MFP_USCI0_DAT0        (0x03UL<<SYS_GPD_MFPL_PD1MFP_Pos)  /*!< USCI0 data0 pin. \hideinitializer */
00741 #define SYS_GPD_MFPL_PD1MFP_SPI0_MISO         (0x04UL<<SYS_GPD_MFPL_PD1MFP_Pos)  /*!< 1st SPI0 MISO (Master In, Slave Out) pin. \hideinitializer */
00742 #define SYS_GPD_MFPL_PD1MFP_UART3_TXD         (0x05UL<<SYS_GPD_MFPL_PD1MFP_Pos)  /*!< Data transmitter output pin for UART3. \hideinitializer */
00743 #define SYS_GPD_MFPL_PD1MFP_I2C2_SCL          (0x06UL<<SYS_GPD_MFPL_PD1MFP_Pos)  /*!< I2C2 clock pin. \hideinitializer */
00744 #define SYS_GPD_MFPL_PD1MFP_SC2_DAT           (0x07UL<<SYS_GPD_MFPL_PD1MFP_Pos)  /*!< SmartCard2 data pin. \hideinitializer */
00745 #define SYS_GPD_MFPL_PD2MFP_GPIO              (0x00UL<<SYS_GPD_MFPL_PD2MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00746 #define SYS_GPD_MFPL_PD2MFP_EBI_AD11          (0x02UL<<SYS_GPD_MFPL_PD2MFP_Pos)  /*!< EBI address/data bus bit1. \hideinitializer */
00747 #define SYS_GPD_MFPL_PD2MFP_USCI0_DAT1        (0x03UL<<SYS_GPD_MFPL_PD2MFP_Pos)  /*!< USCI0 data1 pin. \hideinitializer */
00748 #define SYS_GPD_MFPL_PD2MFP_SPI0_CLK          (0x04UL<<SYS_GPD_MFPL_PD2MFP_Pos)  /*!< SPI0 serial clock pin. \hideinitializer */
00749 #define SYS_GPD_MFPL_PD2MFP_UART3_nCTS        (0x05UL<<SYS_GPD_MFPL_PD2MFP_Pos)  /*!< Clear to Send input pin for UART3. \hideinitializer */
00750 #define SYS_GPD_MFPL_PD2MFP_SC2_RST           (0x07UL<<SYS_GPD_MFPL_PD2MFP_Pos)  /*!< SmartCard2 reset pin. \hideinitializer */
00751 #define SYS_GPD_MFPL_PD2MFP_UART0_RXD         (0x09UL<<SYS_GPD_MFPL_PD2MFP_Pos)  /*!< Data receiver input pin for UART0. \hideinitializer */
00752 #define SYS_GPD_MFPL_PD3MFP_GPIO              (0x00UL<<SYS_GPD_MFPL_PD3MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00753 #define SYS_GPD_MFPL_PD3MFP_EBI_AD10          (0x02UL<<SYS_GPD_MFPL_PD3MFP_Pos)  /*!< EBI address/data bus bit1. \hideinitializer */
00754 #define SYS_GPD_MFPL_PD3MFP_USCI0_CTL1        (0x03UL<<SYS_GPD_MFPL_PD3MFP_Pos)  /*!< USCI0 control1 pin. \hideinitializer */
00755 #define SYS_GPD_MFPL_PD3MFP_SPI0_SS           (0x04UL<<SYS_GPD_MFPL_PD3MFP_Pos)  /*!< 1st SPI0 slave select pin. \hideinitializer */
00756 #define SYS_GPD_MFPL_PD3MFP_UART3_nRTS        (0x05UL<<SYS_GPD_MFPL_PD3MFP_Pos)  /*!< Request to Send output pin for UART3. \hideinitializer */
00757 #define SYS_GPD_MFPL_PD3MFP_USCI1_CTL0        (0x06UL<<SYS_GPD_MFPL_PD3MFP_Pos)  /*!< USCI1 control0 pin. \hideinitializer */
00758 #define SYS_GPD_MFPL_PD3MFP_SC2_PWR           (0x07UL<<SYS_GPD_MFPL_PD3MFP_Pos)  /*!< SmartCard2 power pin. \hideinitializer */
00759 #define SYS_GPD_MFPL_PD3MFP_SC1_nCD           (0x08UL<<SYS_GPD_MFPL_PD3MFP_Pos)  /*!< SmartCard1 card detect pin. \hideinitializer */
00760 #define SYS_GPD_MFPL_PD3MFP_UART0_TXD         (0x09UL<<SYS_GPD_MFPL_PD3MFP_Pos)  /*!< Data transmitter output pin for UART0. \hideinitializer */
00761 #define SYS_GPD_MFPL_PD4MFP_GPIO              (0x00UL<<SYS_GPD_MFPL_PD4MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00762 #define SYS_GPD_MFPL_PD4MFP_USCI0_CTL0        (0x03UL<<SYS_GPD_MFPL_PD4MFP_Pos)  /*!< USCI0 control0 pin. \hideinitializer */
00763 #define SYS_GPD_MFPL_PD4MFP_I2C1_SDA          (0x04UL<<SYS_GPD_MFPL_PD4MFP_Pos)  /*!< I2C1 data input/output pin. \hideinitializer */
00764 #define SYS_GPD_MFPL_PD4MFP_SPI1_SS           (0x05UL<<SYS_GPD_MFPL_PD4MFP_Pos)  /*!< 1st SPI1 slave select pin. \hideinitializer */
00765 #define SYS_GPD_MFPL_PD4MFP_USCI1_CTL1        (0x06UL<<SYS_GPD_MFPL_PD4MFP_Pos)  /*!< USCI1 control1 pin. \hideinitializer */
00766 #define SYS_GPD_MFPL_PD4MFP_SC1_CLK           (0x08UL<<SYS_GPD_MFPL_PD4MFP_Pos)  /*!< SmartCard1 clock pin. \hideinitializer */
00767 #define SYS_GPD_MFPL_PD4MFP_USB_VBUS_ST       (0x0EUL<<SYS_GPD_MFPL_PD4MFP_Pos)  /*!< Power supply from USB Full speed host or HUB. \hideinitializer */
00768 #define SYS_GPD_MFPL_PD5MFP_GPIO              (0x00UL<<SYS_GPD_MFPL_PD5MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00769 #define SYS_GPD_MFPL_PD5MFP_I2C1_SCL          (0x04UL<<SYS_GPD_MFPL_PD5MFP_Pos)  /*!< I2C1 clock pin. \hideinitializer */
00770 #define SYS_GPD_MFPL_PD5MFP_SPI1_CLK          (0x05UL<<SYS_GPD_MFPL_PD5MFP_Pos)  /*!< SPI1 serial clock pin. \hideinitializer */
00771 #define SYS_GPD_MFPL_PD5MFP_USCI1_DAT0        (0x06UL<<SYS_GPD_MFPL_PD5MFP_Pos)  /*!< USCI1 data0 pin. \hideinitializer */
00772 #define SYS_GPD_MFPL_PD5MFP_SC1_DAT           (0x08UL<<SYS_GPD_MFPL_PD5MFP_Pos)  /*!< SmartCard1 data pin. \hideinitializer */
00773 #define SYS_GPD_MFPL_PD6MFP_GPIO              (0x00UL<<SYS_GPD_MFPL_PD6MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00774 #define SYS_GPD_MFPL_PD6MFP_UART1_RXD         (0x03UL<<SYS_GPD_MFPL_PD6MFP_Pos)  /*!< Data receiver input pin for UART1. \hideinitializer */
00775 #define SYS_GPD_MFPL_PD6MFP_I2C0_SDA          (0x04UL<<SYS_GPD_MFPL_PD6MFP_Pos)  /*!< I2C0 data input/output pin. \hideinitializer */
00776 #define SYS_GPD_MFPL_PD6MFP_SPI1_MOSI         (0x05UL<<SYS_GPD_MFPL_PD6MFP_Pos)  /*!< 1st SPI1 MOSI (Master Out, Slave In) pin. \hideinitializer */
00777 #define SYS_GPD_MFPL_PD6MFP_USCI1_DAT1        (0x06UL<<SYS_GPD_MFPL_PD6MFP_Pos)  /*!< USCI1 data1 pin. \hideinitializer */
00778 #define SYS_GPD_MFPL_PD6MFP_SC1_RST           (0x08UL<<SYS_GPD_MFPL_PD6MFP_Pos)  /*!< SmartCard1 reset pin. \hideinitializer */
00779 #define SYS_GPD_MFPL_PD7MFP_GPIO              (0x00UL<<SYS_GPD_MFPL_PD7MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00780 #define SYS_GPD_MFPL_PD7MFP_UART1_TXD         (0x03UL<<SYS_GPD_MFPL_PD7MFP_Pos)  /*!< Data transmitter output pin for UART1. \hideinitializer */
00781 #define SYS_GPD_MFPL_PD7MFP_I2C0_SCL          (0x04UL<<SYS_GPD_MFPL_PD7MFP_Pos)  /*!< I2C0 clock pin. \hideinitializer */
00782 #define SYS_GPD_MFPL_PD7MFP_SPI1_MISO         (0x05UL<<SYS_GPD_MFPL_PD7MFP_Pos)  /*!< 1st SPI1 MISO (Master In, Slave Out) pin. \hideinitializer */
00783 #define SYS_GPD_MFPL_PD7MFP_USCI1_CLK         (0x06UL<<SYS_GPD_MFPL_PD7MFP_Pos)  /*!< USCI1 clock pin. \hideinitializer */
00784 #define SYS_GPD_MFPL_PD7MFP_SC1_PWR           (0x08UL<<SYS_GPD_MFPL_PD7MFP_Pos)  /*!< SmartCard1 power pin. \hideinitializer */
00785 /********************* Bit definition of GPD_MFPH register **********************/
00786 #define SYS_GPD_MFPH_PD8MFP_GPIO              (0x00UL<<SYS_GPD_MFPH_PD8MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00787 #define SYS_GPD_MFPH_PD8MFP_EBI_AD6           (0x02UL<<SYS_GPD_MFPH_PD8MFP_Pos)  /*!< EBI address/data bus bit6. \hideinitializer */
00788 #define SYS_GPD_MFPH_PD8MFP_I2C2_SDA          (0x03UL<<SYS_GPD_MFPH_PD8MFP_Pos)  /*!< I2C2 data input/output pin. \hideinitializer */
00789 #define SYS_GPD_MFPH_PD8MFP_UART2_nRTS        (0x04UL<<SYS_GPD_MFPH_PD8MFP_Pos)  /*!< Request to Send output pin for UART2. \hideinitializer */
00790 #define SYS_GPD_MFPH_PD9MFP_GPIO              (0x00UL<<SYS_GPD_MFPH_PD9MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00791 #define SYS_GPD_MFPH_PD9MFP_EBI_AD7           (0x02UL<<SYS_GPD_MFPH_PD9MFP_Pos)  /*!< EBI address/data bus bit7. \hideinitializer */
00792 #define SYS_GPD_MFPH_PD9MFP_I2C2_SCL          (0x03UL<<SYS_GPD_MFPH_PD9MFP_Pos)  /*!< I2C2 clock pin. \hideinitializer */
00793 #define SYS_GPD_MFPH_PD9MFP_UART2_nCTS        (0x04UL<<SYS_GPD_MFPH_PD9MFP_Pos)  /*!< Clear to Send input pin for UART2. \hideinitializer */
00794 #define SYS_GPD_MFPH_PD10MFP_GPIO             (0x00UL<<SYS_GPD_MFPH_PD10MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00795 #define SYS_GPD_MFPH_PD10MFP_OPA2_P           (0x01UL<<SYS_GPD_MFPH_PD10MFP_Pos) /*!< Operational amplifier positive input pin. \hideinitializer */
00796 #define SYS_GPD_MFPH_PD10MFP_EBI_nCS2         (0x02UL<<SYS_GPD_MFPH_PD10MFP_Pos) /*!< EBI chip select enable output pin. \hideinitializer */
00797 #define SYS_GPD_MFPH_PD10MFP_UART1_RXD        (0x03UL<<SYS_GPD_MFPH_PD10MFP_Pos) /*!< Data receiver input pin for UART1. \hideinitializer */
00798 #define SYS_GPD_MFPH_PD10MFP_CAN0_RXD         (0x04UL<<SYS_GPD_MFPH_PD10MFP_Pos) /*!< CAN0 bus receiver input. \hideinitializer */
00799 #define SYS_GPD_MFPH_PD10MFP_QEI0_B           (0x0AUL<<SYS_GPD_MFPH_PD10MFP_Pos) /*!< Quadrature encoder phase B input of QEI Unit 0. \hideinitializer */
00800 #define SYS_GPD_MFPH_PD10MFP_INT7             (0x0FUL<<SYS_GPD_MFPH_PD10MFP_Pos) /*!< External interrupt7 input pin. \hideinitializer */
00801 #define SYS_GPD_MFPH_PD11MFP_GPIO             (0x00UL<<SYS_GPD_MFPH_PD11MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00802 #define SYS_GPD_MFPH_PD11MFP_OPA2_N           (0x01UL<<SYS_GPD_MFPH_PD11MFP_Pos) /*!< Operational amplifier negative input pin. \hideinitializer */
00803 #define SYS_GPD_MFPH_PD11MFP_EBI_nCS1         (0x02UL<<SYS_GPD_MFPH_PD11MFP_Pos) /*!< EBI chip select enable output pin. \hideinitializer */
00804 #define SYS_GPD_MFPH_PD11MFP_UART1_TXD        (0x03UL<<SYS_GPD_MFPH_PD11MFP_Pos) /*!< Data transmitter output pin for UART1. \hideinitializer */
00805 #define SYS_GPD_MFPH_PD11MFP_CAN0_TXD         (0x04UL<<SYS_GPD_MFPH_PD11MFP_Pos) /*!< CAN0 bus transmitter output. \hideinitializer */
00806 #define SYS_GPD_MFPH_PD11MFP_QEI0_A           (0x0AUL<<SYS_GPD_MFPH_PD11MFP_Pos) /*!< Quadrature encoder phase A input of QEI Unit 0. \hideinitializer */
00807 #define SYS_GPD_MFPH_PD11MFP_INT6             (0x0FUL<<SYS_GPD_MFPH_PD11MFP_Pos) /*!< External interrupt6 input pin. \hideinitializer */
00808 #define SYS_GPD_MFPH_PD12MFP_GPIO             (0x00UL<<SYS_GPD_MFPH_PD12MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00809 #define SYS_GPD_MFPH_PD12MFP_OPA2_O           (0x01UL<<SYS_GPD_MFPH_PD12MFP_Pos) /*!< Operational amplifier output pin. \hideinitializer */
00810 #define SYS_GPD_MFPH_PD12MFP_EBI_nCS0         (0x02UL<<SYS_GPD_MFPH_PD12MFP_Pos) /*!< EBI chip select enable output pin. \hideinitializer */
00811 #define SYS_GPD_MFPH_PD12MFP_CAN1_RXD         (0x05UL<<SYS_GPD_MFPH_PD12MFP_Pos) /*!< CAN1 bus receiver input. \hideinitializer */
00812 #define SYS_GPD_MFPH_PD12MFP_UART2_RXD        (0x07UL<<SYS_GPD_MFPH_PD12MFP_Pos) /*!< Data receiver input pin for UART2. \hideinitializer */
00813 #define SYS_GPD_MFPH_PD12MFP_BPWM0_CH5        (0x09UL<<SYS_GPD_MFPH_PD12MFP_Pos) /*!< BPWM0 channel5 output/capture input. \hideinitializer */
00814 #define SYS_GPD_MFPH_PD12MFP_QEI0_INDEX       (0x0AUL<<SYS_GPD_MFPH_PD12MFP_Pos) /*!< Quadrature encoder index input of QEI Unit 0. \hideinitializer */
00815 #define SYS_GPD_MFPH_PD12MFP_CLKO             (0x0DUL<<SYS_GPD_MFPH_PD12MFP_Pos) /*!< Clock Output pin. \hideinitializer */
00816 #define SYS_GPD_MFPH_PD12MFP_EADC0_ST         (0x0EUL<<SYS_GPD_MFPH_PD12MFP_Pos) /*!< EADC external trigger input. \hideinitializer */
00817 #define SYS_GPD_MFPH_PD12MFP_INT5             (0x0FUL<<SYS_GPD_MFPH_PD12MFP_Pos) /*!< External interrupt5 input pin. \hideinitializer */
00818 #define SYS_GPD_MFPH_PD13MFP_GPIO             (0x00UL<<SYS_GPD_MFPH_PD13MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00819 #define SYS_GPD_MFPH_PD13MFP_EBI_AD10         (0x02UL<<SYS_GPD_MFPH_PD13MFP_Pos) /*!< EBI address/data bus bit1. \hideinitializer */
00820 #define SYS_GPD_MFPH_PD13MFP_SD0_nCD          (0x03UL<<SYS_GPD_MFPH_PD13MFP_Pos) /*!< SD/SDIO 0 card detect  \hideinitializer */
00821 #define SYS_GPD_MFPH_PD13MFP_SPI0_I2SMCLK     (0x04UL<<SYS_GPD_MFPH_PD13MFP_Pos) /*!< SPI0 I2S master clock output pin. \hideinitializer */
00822 #define SYS_GPD_MFPH_PD13MFP_SPI1_I2SMCLK     (0x05UL<<SYS_GPD_MFPH_PD13MFP_Pos) /*!< SPI1 I2S master clock output pin. \hideinitializer */
00823 #define SYS_GPD_MFPH_PD13MFP_SC2_nCD          (0x07UL<<SYS_GPD_MFPH_PD13MFP_Pos) /*!< SmartCard2 card detect pin. \hideinitializer */
00824 #define SYS_GPD_MFPH_PD14MFP_GPIO             (0x00UL<<SYS_GPD_MFPH_PD14MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00825 #define SYS_GPD_MFPH_PD14MFP_EBI_nCS0         (0x02UL<<SYS_GPD_MFPH_PD14MFP_Pos) /*!< EBI chip select enable output pin. \hideinitializer */
00826 #define SYS_GPD_MFPH_PD14MFP_SPI3_I2SMCLK     (0x03UL<<SYS_GPD_MFPH_PD14MFP_Pos) /*!< SPI3 I2S master clock output pin. \hideinitializer */
00827 #define SYS_GPD_MFPH_PD14MFP_SC1_nCD          (0x04UL<<SYS_GPD_MFPH_PD14MFP_Pos) /*!< SmartCard1 card detect pin. \hideinitializer */
00828 #define SYS_GPD_MFPH_PD14MFP_EPWM0_CH4        (0x0BUL<<SYS_GPD_MFPH_PD14MFP_Pos) /*!< EPWM0 channel4 output/capture input. \hideinitializer */
00829 /********************* Bit definition of GPE_MFPL register **********************/
00830 #define SYS_GPE_MFPL_PE0MFP_GPIO              (0x00UL<<SYS_GPE_MFPL_PE0MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00831 #define SYS_GPE_MFPL_PE0MFP_EBI_AD11          (0x02UL<<SYS_GPE_MFPL_PE0MFP_Pos)  /*!< EBI address/data bus bit1. \hideinitializer */
00832 #define SYS_GPE_MFPL_PE0MFP_QSPI0_MOSI0        (0x03UL<<SYS_GPE_MFPL_PE0MFP_Pos)  /*!< 1st QSPI0 MOSI (Master Out, Slave In) pin. \hideinitializer */
00833 #define SYS_GPE_MFPL_PE0MFP_SC2_CLK           (0x04UL<<SYS_GPE_MFPL_PE0MFP_Pos)  /*!< SmartCard2 clock pin. \hideinitializer */
00834 #define SYS_GPE_MFPL_PE0MFP_I2S0_MCLK         (0x05UL<<SYS_GPE_MFPL_PE0MFP_Pos)  /*!< I2S0 master clock output pin. \hideinitializer */
00835 #define SYS_GPE_MFPL_PE0MFP_SPI1_MOSI         (0x06UL<<SYS_GPE_MFPL_PE0MFP_Pos)  /*!< 1st SPI1 MOSI (Master Out, Slave In) pin. \hideinitializer */
00836 #define SYS_GPE_MFPL_PE0MFP_UART3_RXD         (0x07UL<<SYS_GPE_MFPL_PE0MFP_Pos)  /*!< Data receiver input pin for UART3. \hideinitializer */
00837 #define SYS_GPE_MFPL_PE0MFP_I2C1_SDA          (0x08UL<<SYS_GPE_MFPL_PE0MFP_Pos)  /*!< I2C1 data input/output pin. \hideinitializer */
00838 #define SYS_GPE_MFPL_PE0MFP_UART4_nRTS        (0x09UL<<SYS_GPE_MFPL_PE0MFP_Pos)  /*!< Request to Send output pin for UART4. \hideinitializer */
00839 #define SYS_GPE_MFPL_PE1MFP_GPIO              (0x00UL<<SYS_GPE_MFPL_PE1MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00840 #define SYS_GPE_MFPL_PE1MFP_EBI_AD10          (0x02UL<<SYS_GPE_MFPL_PE1MFP_Pos)  /*!< EBI address/data bus bit1. \hideinitializer */
00841 #define SYS_GPE_MFPL_PE1MFP_QSPI0_MISO0        (0x03UL<<SYS_GPE_MFPL_PE1MFP_Pos)  /*!< 1st QSPI0 MISO (Master In, Slave Out) pin. \hideinitializer */
00842 #define SYS_GPE_MFPL_PE1MFP_SC2_DAT           (0x04UL<<SYS_GPE_MFPL_PE1MFP_Pos)  /*!< SmartCard2 data pin. \hideinitializer */
00843 #define SYS_GPE_MFPL_PE1MFP_I2S0_BCLK         (0x05UL<<SYS_GPE_MFPL_PE1MFP_Pos)  /*!< I2S0 bit clock pin. \hideinitializer */
00844 #define SYS_GPE_MFPL_PE1MFP_SPI1_MISO         (0x06UL<<SYS_GPE_MFPL_PE1MFP_Pos)  /*!< 1st SPI1 MISO (Master In, Slave Out) pin. \hideinitializer */
00845 #define SYS_GPE_MFPL_PE1MFP_UART3_TXD         (0x07UL<<SYS_GPE_MFPL_PE1MFP_Pos)  /*!< Data transmitter output pin for UART3. \hideinitializer */
00846 #define SYS_GPE_MFPL_PE1MFP_I2C1_SCL          (0x08UL<<SYS_GPE_MFPL_PE1MFP_Pos)  /*!< I2C1 clock pin. \hideinitializer */
00847 #define SYS_GPE_MFPL_PE1MFP_UART4_nCTS        (0x09UL<<SYS_GPE_MFPL_PE1MFP_Pos)  /*!< Clear to Send input pin for UART4. \hideinitializer */
00848 #define SYS_GPE_MFPL_PE2MFP_GPIO              (0x00UL<<SYS_GPE_MFPL_PE2MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00849 #define SYS_GPE_MFPL_PE2MFP_EBI_ALE           (0x02UL<<SYS_GPE_MFPL_PE2MFP_Pos)  /*!< EBI address latch enable output pin. \hideinitializer */
00850 #define SYS_GPE_MFPL_PE2MFP_SD0_DAT0          (0x03UL<<SYS_GPE_MFPL_PE2MFP_Pos)  /*!< SD/SDIO 0 data line bit 0. \hideinitializer */
00851 #define SYS_GPE_MFPL_PE2MFP_SPIM_MOSI         (0x04UL<<SYS_GPE_MFPL_PE2MFP_Pos)  /*!< 1st SPIM MOSI (Master Out, Slave In) pin. \hideinitializer */
00852 #define SYS_GPE_MFPL_PE2MFP_SPI3_MOSI         (0x05UL<<SYS_GPE_MFPL_PE2MFP_Pos)  /*!< 1st SPI3 MOSI (Master Out, Slave In) pin. \hideinitializer */
00853 #define SYS_GPE_MFPL_PE2MFP_SC0_CLK           (0x06UL<<SYS_GPE_MFPL_PE2MFP_Pos)  /*!< SmartCard0 clock pin. \hideinitializer */
00854 #define SYS_GPE_MFPL_PE2MFP_USCI0_CLK         (0x07UL<<SYS_GPE_MFPL_PE2MFP_Pos)  /*!< USCI0 clock pin. \hideinitializer */
00855 #define SYS_GPE_MFPL_PE2MFP_QEI0_B            (0x0BUL<<SYS_GPE_MFPL_PE2MFP_Pos)  /*!< Quadrature encoder phase B input of QEI Unit 0. \hideinitializer */
00856 #define SYS_GPE_MFPL_PE2MFP_EPWM0_CH5         (0x0CUL<<SYS_GPE_MFPL_PE2MFP_Pos)  /*!< EPWM0 channel5 output/capture input. \hideinitializer */
00857 #define SYS_GPE_MFPL_PE2MFP_BPWM0_CH0         (0x0DUL<<SYS_GPE_MFPL_PE2MFP_Pos)  /*!< BPWM0 channel0 output/capture input. \hideinitializer */
00858 #define SYS_GPE_MFPL_PE3MFP_GPIO              (0x00UL<<SYS_GPE_MFPL_PE3MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00859 #define SYS_GPE_MFPL_PE3MFP_EBI_MCLK          (0x02UL<<SYS_GPE_MFPL_PE3MFP_Pos)  /*!< EBI external clock output pin. \hideinitializer */
00860 #define SYS_GPE_MFPL_PE3MFP_SD0_DAT1          (0x03UL<<SYS_GPE_MFPL_PE3MFP_Pos)  /*!< SD/SDIO 0 data line bit 1. \hideinitializer */
00861 #define SYS_GPE_MFPL_PE3MFP_SPIM_MISO         (0x04UL<<SYS_GPE_MFPL_PE3MFP_Pos)  /*!< 1st SPIM MISO (Master In, Slave Out) pin. \hideinitializer */
00862 #define SYS_GPE_MFPL_PE3MFP_SPI3_MISO         (0x05UL<<SYS_GPE_MFPL_PE3MFP_Pos)  /*!< 1st SPI3 MISO (Master In, Slave Out) pin. \hideinitializer */
00863 #define SYS_GPE_MFPL_PE3MFP_SC0_DAT           (0x06UL<<SYS_GPE_MFPL_PE3MFP_Pos)  /*!< SmartCard0 data pin. \hideinitializer */
00864 #define SYS_GPE_MFPL_PE3MFP_USCI0_DAT0        (0x07UL<<SYS_GPE_MFPL_PE3MFP_Pos)  /*!< USCI0 data0 pin. \hideinitializer */
00865 #define SYS_GPE_MFPL_PE3MFP_QEI0_A            (0x0BUL<<SYS_GPE_MFPL_PE3MFP_Pos)  /*!< Quadrature encoder phase A input of QEI Unit 0. \hideinitializer */
00866 #define SYS_GPE_MFPL_PE3MFP_EPWM0_CH4         (0x0CUL<<SYS_GPE_MFPL_PE3MFP_Pos)  /*!< EPWM0 channel4 output/capture input. \hideinitializer */
00867 #define SYS_GPE_MFPL_PE3MFP_BPWM0_CH1         (0x0DUL<<SYS_GPE_MFPL_PE3MFP_Pos)  /*!< BPWM0 channel1 output/capture input. \hideinitializer */
00868 #define SYS_GPE_MFPL_PE4MFP_GPIO              (0x00UL<<SYS_GPE_MFPL_PE4MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00869 #define SYS_GPE_MFPL_PE4MFP_EBI_nWR           (0x02UL<<SYS_GPE_MFPL_PE4MFP_Pos)  /*!< EBI write enable output pin. \hideinitializer */
00870 #define SYS_GPE_MFPL_PE4MFP_SD0_DAT2          (0x03UL<<SYS_GPE_MFPL_PE4MFP_Pos)  /*!< SD/SDIO 0 data line bit 2. \hideinitializer */
00871 #define SYS_GPE_MFPL_PE4MFP_SPIM_CLK          (0x04UL<<SYS_GPE_MFPL_PE4MFP_Pos)  /*!< SPIM serial clock pin. \hideinitializer */
00872 #define SYS_GPE_MFPL_PE4MFP_SPI3_CLK          (0x05UL<<SYS_GPE_MFPL_PE4MFP_Pos)  /*!< SPI3 serial clock pin. \hideinitializer */
00873 #define SYS_GPE_MFPL_PE4MFP_SC0_RST           (0x06UL<<SYS_GPE_MFPL_PE4MFP_Pos)  /*!< SmartCard0 reset pin. \hideinitializer */
00874 #define SYS_GPE_MFPL_PE4MFP_USCI0_DAT1        (0x07UL<<SYS_GPE_MFPL_PE4MFP_Pos)  /*!< USCI0 data1 pin. \hideinitializer */
00875 #define SYS_GPE_MFPL_PE4MFP_QEI0_INDEX        (0x0BUL<<SYS_GPE_MFPL_PE4MFP_Pos)  /*!< Quadrature encoder index input of QEI Unit 0. \hideinitializer */
00876 #define SYS_GPE_MFPL_PE4MFP_EPWM0_CH3         (0x0CUL<<SYS_GPE_MFPL_PE4MFP_Pos)  /*!< EPWM0 channel3 output/capture input. \hideinitializer */
00877 #define SYS_GPE_MFPL_PE4MFP_BPWM0_CH2         (0x0DUL<<SYS_GPE_MFPL_PE4MFP_Pos)  /*!< BPWM0 channel2 output/capture input. \hideinitializer */
00878 #define SYS_GPE_MFPL_PE5MFP_GPIO              (0x00UL<<SYS_GPE_MFPL_PE5MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00879 #define SYS_GPE_MFPL_PE5MFP_EBI_nRD           (0x02UL<<SYS_GPE_MFPL_PE5MFP_Pos)  /*!< EBI read enable output pin. \hideinitializer */
00880 #define SYS_GPE_MFPL_PE5MFP_SD0_DAT3          (0x03UL<<SYS_GPE_MFPL_PE5MFP_Pos)  /*!< SD/SDIO 0 data line bit 3. \hideinitializer */
00881 #define SYS_GPE_MFPL_PE5MFP_SPIM_SS           (0x04UL<<SYS_GPE_MFPL_PE5MFP_Pos)  /*!< 1st SPIM slave select pin. \hideinitializer */
00882 #define SYS_GPE_MFPL_PE5MFP_SPI3_SS           (0x05UL<<SYS_GPE_MFPL_PE5MFP_Pos)  /*!< 1st SPI3 slave select pin. \hideinitializer */
00883 #define SYS_GPE_MFPL_PE5MFP_SC0_PWR           (0x06UL<<SYS_GPE_MFPL_PE5MFP_Pos)  /*!< SmartCard0 power pin. \hideinitializer */
00884 #define SYS_GPE_MFPL_PE5MFP_USCI0_CTL1        (0x07UL<<SYS_GPE_MFPL_PE5MFP_Pos)  /*!< USCI0 control1 pin. \hideinitializer */
00885 #define SYS_GPE_MFPL_PE5MFP_QEI1_B            (0x0BUL<<SYS_GPE_MFPL_PE5MFP_Pos)  /*!< Quadrature encoder phase B input of QEI Unit 1. \hideinitializer */
00886 #define SYS_GPE_MFPL_PE5MFP_EPWM0_CH2         (0x0CUL<<SYS_GPE_MFPL_PE5MFP_Pos)  /*!< EPWM0 channel2 output/capture input. \hideinitializer */
00887 #define SYS_GPE_MFPL_PE5MFP_BPWM0_CH3         (0x0DUL<<SYS_GPE_MFPL_PE5MFP_Pos)  /*!< BPWM0 channel3 output/capture input. \hideinitializer */
00888 #define SYS_GPE_MFPL_PE6MFP_GPIO              (0x00UL<<SYS_GPE_MFPL_PE6MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00889 #define SYS_GPE_MFPL_PE6MFP_SD0_CLK           (0x03UL<<SYS_GPE_MFPL_PE6MFP_Pos)  /*!< SD/SDIO 0 clock. \hideinitializer */
00890 #define SYS_GPE_MFPL_PE6MFP_SPIM_D3           (0x04UL<<SYS_GPE_MFPL_PE6MFP_Pos)  /*!< SPIM data 3 pin for Quad Mode I/O. \hideinitializer */
00891 #define SYS_GPE_MFPL_PE6MFP_SPI3_I2SMCLK      (0x05UL<<SYS_GPE_MFPL_PE6MFP_Pos)  /*!< SPI3 I2S master clock output pin. \hideinitializer */
00892 #define SYS_GPE_MFPL_PE6MFP_SC0_nCD           (0x06UL<<SYS_GPE_MFPL_PE6MFP_Pos)  /*!< SmartCard0 card detect pin. \hideinitializer */
00893 #define SYS_GPE_MFPL_PE6MFP_USCI0_CTL0        (0x07UL<<SYS_GPE_MFPL_PE6MFP_Pos)  /*!< USCI0 control0 pin. \hideinitializer */
00894 #define SYS_GPE_MFPL_PE6MFP_UART5_RXD         (0x08UL<<SYS_GPE_MFPL_PE6MFP_Pos)  /*!< Data receiver input pin for UART5. \hideinitializer */
00895 #define SYS_GPE_MFPL_PE6MFP_CAN1_RXD          (0x09UL<<SYS_GPE_MFPL_PE6MFP_Pos)  /*!< CAN1 bus receiver input. \hideinitializer */
00896 #define SYS_GPE_MFPL_PE6MFP_QEI1_A            (0x0BUL<<SYS_GPE_MFPL_PE6MFP_Pos)  /*!< Quadrature encoder phase A input of QEI Unit 1. \hideinitializer */
00897 #define SYS_GPE_MFPL_PE6MFP_EPWM0_CH1         (0x0CUL<<SYS_GPE_MFPL_PE6MFP_Pos)  /*!< EPWM0 channel1 output/capture input. \hideinitializer */
00898 #define SYS_GPE_MFPL_PE6MFP_BPWM0_CH4         (0x0DUL<<SYS_GPE_MFPL_PE6MFP_Pos)  /*!< BPWM0 channel4 output/capture input. \hideinitializer */
00899 #define SYS_GPE_MFPL_PE7MFP_GPIO              (0x00UL<<SYS_GPE_MFPL_PE7MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00900 #define SYS_GPE_MFPL_PE7MFP_SD0_CMD           (0x03UL<<SYS_GPE_MFPL_PE7MFP_Pos)  /*!< SD/SDIO 0 command/response. \hideinitializer */
00901 #define SYS_GPE_MFPL_PE7MFP_SPIM_D2           (0x04UL<<SYS_GPE_MFPL_PE7MFP_Pos)  /*!< SPIM data 2 pin for Quad Mode I/O. \hideinitializer */
00902 #define SYS_GPE_MFPL_PE7MFP_UART5_TXD         (0x08UL<<SYS_GPE_MFPL_PE7MFP_Pos)  /*!< Data transmitter output pin for UART5. \hideinitializer */
00903 #define SYS_GPE_MFPL_PE7MFP_CAN1_TXD          (0x09UL<<SYS_GPE_MFPL_PE7MFP_Pos)  /*!< CAN1 bus transmitter output. \hideinitializer */
00904 #define SYS_GPE_MFPL_PE7MFP_QEI1_INDEX        (0x0BUL<<SYS_GPE_MFPL_PE7MFP_Pos)  /*!< Quadrature encoder index input of QEI Unit 1. \hideinitializer */
00905 #define SYS_GPE_MFPL_PE7MFP_EPWM0_CH0         (0x0CUL<<SYS_GPE_MFPL_PE7MFP_Pos)  /*!< EPWM0 channel0 output/capture input. \hideinitializer */
00906 #define SYS_GPE_MFPL_PE7MFP_BPWM0_CH5         (0x0DUL<<SYS_GPE_MFPL_PE7MFP_Pos)  /*!< BPWM0 channel5 output/capture input. \hideinitializer */
00907 /********************* Bit definition of GPE_MFPH register **********************/
00908 #define SYS_GPE_MFPH_PE8MFP_GPIO              (0x00UL<<SYS_GPE_MFPH_PE8MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00909 #define SYS_GPE_MFPH_PE8MFP_EBI_ADR10         (0x02UL<<SYS_GPE_MFPH_PE8MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
00910 #define SYS_GPE_MFPH_PE8MFP_EMAC_RMII_MDC      (0x03UL<<SYS_GPE_MFPH_PE8MFP_Pos)  /*!< RMII Management Data Clock. \hideinitializer */
00911 #define SYS_GPE_MFPH_PE8MFP_I2S0_BCLK         (0x04UL<<SYS_GPE_MFPH_PE8MFP_Pos)  /*!< I2S0 bit clock pin. \hideinitializer */
00912 #define SYS_GPE_MFPH_PE8MFP_SPI2_CLK          (0x05UL<<SYS_GPE_MFPH_PE8MFP_Pos)  /*!< SPI2 serial clock pin. \hideinitializer */
00913 #define SYS_GPE_MFPH_PE8MFP_USCI1_CTL1        (0x06UL<<SYS_GPE_MFPH_PE8MFP_Pos)  /*!< USCI1 control1 pin. \hideinitializer */
00914 #define SYS_GPE_MFPH_PE8MFP_UART2_TXD         (0x07UL<<SYS_GPE_MFPH_PE8MFP_Pos)  /*!< Data transmitter output pin for UART2. \hideinitializer */
00915 #define SYS_GPE_MFPH_PE8MFP_EPWM0_CH0         (0x0AUL<<SYS_GPE_MFPH_PE8MFP_Pos)  /*!< EPWM0 channel0 output/capture input. \hideinitializer */
00916 #define SYS_GPE_MFPH_PE8MFP_EPWM0_BRAKE0      (0x0BUL<<SYS_GPE_MFPH_PE8MFP_Pos)  /*!< Brake input pin 0 of EPWM0. \hideinitializer */
00917 #define SYS_GPE_MFPH_PE8MFP_ECAP0_IC0         (0x0CUL<<SYS_GPE_MFPH_PE8MFP_Pos)  /*!< Input 0 of enhanced capture unit 0. \hideinitializer */
00918 #define SYS_GPE_MFPH_PE8MFP_TRACE_DATA3       (0x0EUL<<SYS_GPE_MFPH_PE8MFP_Pos)  /*!< ETM Rx input bus bit3. \hideinitializer */
00919 #define SYS_GPE_MFPH_PE9MFP_GPIO              (0x00UL<<SYS_GPE_MFPH_PE9MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00920 #define SYS_GPE_MFPH_PE9MFP_EBI_ADR11         (0x02UL<<SYS_GPE_MFPH_PE9MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
00921 #define SYS_GPE_MFPH_PE9MFP_EMAC_RMII_MDIO     (0x03UL<<SYS_GPE_MFPH_PE9MFP_Pos)  /*!< RMII Management Data I/O. \hideinitializer */
00922 #define SYS_GPE_MFPH_PE9MFP_I2S0_MCLK         (0x04UL<<SYS_GPE_MFPH_PE9MFP_Pos)  /*!< I2S0 master clock output pin. \hideinitializer */
00923 #define SYS_GPE_MFPH_PE9MFP_SPI2_MISO         (0x05UL<<SYS_GPE_MFPH_PE9MFP_Pos)  /*!< 1st SPI2 MISO (Master In, Slave Out) pin. \hideinitializer */
00924 #define SYS_GPE_MFPH_PE9MFP_USCI1_CTL0        (0x06UL<<SYS_GPE_MFPH_PE9MFP_Pos)  /*!< USCI1 control0 pin. \hideinitializer */
00925 #define SYS_GPE_MFPH_PE9MFP_UART2_RXD         (0x07UL<<SYS_GPE_MFPH_PE9MFP_Pos)  /*!< Data receiver input pin for UART2. \hideinitializer */
00926 #define SYS_GPE_MFPH_PE9MFP_EPWM0_CH1         (0x0AUL<<SYS_GPE_MFPH_PE9MFP_Pos)  /*!< EPWM0 channel1 output/capture input. \hideinitializer */
00927 #define SYS_GPE_MFPH_PE9MFP_EPWM0_BRAKE1      (0x0BUL<<SYS_GPE_MFPH_PE9MFP_Pos)  /*!< Brake input pin 1 of EPWM0. \hideinitializer */
00928 #define SYS_GPE_MFPH_PE9MFP_ECAP0_IC1         (0x0CUL<<SYS_GPE_MFPH_PE9MFP_Pos)  /*!< Input 1 of enhanced capture unit 0. \hideinitializer */
00929 #define SYS_GPE_MFPH_PE9MFP_TRACE_DATA2       (0x0EUL<<SYS_GPE_MFPH_PE9MFP_Pos)  /*!< ETM Rx input bus bit2. \hideinitializer */
00930 #define SYS_GPE_MFPH_PE10MFP_GPIO             (0x00UL<<SYS_GPE_MFPH_PE10MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00931 #define SYS_GPE_MFPH_PE10MFP_EBI_ADR12        (0x02UL<<SYS_GPE_MFPH_PE10MFP_Pos) /*!< EBI address/data bus bit*. \hideinitializer */
00932 #define SYS_GPE_MFPH_PE10MFP_EMAC_RMII_TXD0    (0x03UL<<SYS_GPE_MFPH_PE10MFP_Pos) /*!< RMII Transmit Data bus bit 0. \hideinitializer */
00933 #define SYS_GPE_MFPH_PE10MFP_I2S0_DI          (0x04UL<<SYS_GPE_MFPH_PE10MFP_Pos) /*!< I2S0 data input. \hideinitializer */
00934 #define SYS_GPE_MFPH_PE10MFP_SPI2_MOSI        (0x05UL<<SYS_GPE_MFPH_PE10MFP_Pos) /*!< 1st SPI2 MOSI (Master Out, Slave In) pin. \hideinitializer */
00935 #define SYS_GPE_MFPH_PE10MFP_USCI1_DAT0       (0x06UL<<SYS_GPE_MFPH_PE10MFP_Pos) /*!< USCI1 data0 pin. \hideinitializer */
00936 #define SYS_GPE_MFPH_PE10MFP_UART3_TXD        (0x07UL<<SYS_GPE_MFPH_PE10MFP_Pos) /*!< Data transmitter output pin for UART3. \hideinitializer */
00937 #define SYS_GPE_MFPH_PE10MFP_EPWM0_CH2        (0x0AUL<<SYS_GPE_MFPH_PE10MFP_Pos) /*!< EPWM0 channel2 output/capture input. \hideinitializer */
00938 #define SYS_GPE_MFPH_PE10MFP_EPWM1_BRAKE0     (0x0BUL<<SYS_GPE_MFPH_PE10MFP_Pos) /*!< Brake input pin 0 of EPWM1. \hideinitializer */
00939 #define SYS_GPE_MFPH_PE10MFP_ECAP0_IC2        (0x0CUL<<SYS_GPE_MFPH_PE10MFP_Pos) /*!< Input 0 of enhanced capture unit 2. \hideinitializer */
00940 #define SYS_GPE_MFPH_PE10MFP_TRACE_DATA1      (0x0EUL<<SYS_GPE_MFPH_PE10MFP_Pos) /*!< ETM Rx input bus bit1. \hideinitializer */
00941 #define SYS_GPE_MFPH_PE11MFP_GPIO             (0x00UL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00942 #define SYS_GPE_MFPH_PE11MFP_EBI_ADR13        (0x02UL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< EBI address/data bus bit*. \hideinitializer */
00943 #define SYS_GPE_MFPH_PE11MFP_EMAC_RMII_TXD1    (0x03UL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< RMII Transmit Data bus bit 1. \hideinitializer */
00944 #define SYS_GPE_MFPH_PE11MFP_I2S0_DO          (0x04UL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< I2S0 data output. \hideinitializer */
00945 #define SYS_GPE_MFPH_PE11MFP_SPI2_SS          (0x05UL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< 1st SPI2 slave select pin. \hideinitializer */
00946 #define SYS_GPE_MFPH_PE11MFP_USCI1_DAT1       (0x06UL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< USCI1 data1 pin. \hideinitializer */
00947 #define SYS_GPE_MFPH_PE11MFP_UART3_RXD        (0x07UL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< Data receiver input pin for UART3. \hideinitializer */
00948 #define SYS_GPE_MFPH_PE11MFP_UART1_nCTS       (0x08UL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< Clear to Send input pin for UART1. \hideinitializer */
00949 #define SYS_GPE_MFPH_PE11MFP_EPWM0_CH3        (0x0AUL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< EPWM0 channel3 output/capture input. \hideinitializer */
00950 #define SYS_GPE_MFPH_PE11MFP_EPWM1_BRAKE1     (0x0BUL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< Brake input pin 1 of EPWM1. \hideinitializer */
00951 #define SYS_GPE_MFPH_PE11MFP_ECAP1_IC2        (0x0DUL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< Input 1 of enhanced capture unit 2. \hideinitializer */
00952 #define SYS_GPE_MFPH_PE11MFP_TRACE_DATA0      (0x0EUL<<SYS_GPE_MFPH_PE11MFP_Pos) /*!< ETM Rx input bus bit0. \hideinitializer */
00953 #define SYS_GPE_MFPH_PE12MFP_GPIO             (0x00UL<<SYS_GPE_MFPH_PE12MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00954 #define SYS_GPE_MFPH_PE12MFP_EBI_ADR14        (0x02UL<<SYS_GPE_MFPH_PE12MFP_Pos) /*!< EBI address/data bus bit*. \hideinitializer */
00955 #define SYS_GPE_MFPH_PE12MFP_EMAC_RMII_TXEN    (0x03UL<<SYS_GPE_MFPH_PE12MFP_Pos) /*!< RMII? Transmit Enable. \hideinitializer */
00956 #define SYS_GPE_MFPH_PE12MFP_I2S0_LRCK        (0x04UL<<SYS_GPE_MFPH_PE12MFP_Pos) /*!< I2S0 left right channel clock. \hideinitializer */
00957 #define SYS_GPE_MFPH_PE12MFP_SPI2_I2SMCLK     (0x05UL<<SYS_GPE_MFPH_PE12MFP_Pos) /*!< SPI2 I2S master clock output pin. \hideinitializer */
00958 #define SYS_GPE_MFPH_PE12MFP_USCI1_CLK        (0x06UL<<SYS_GPE_MFPH_PE12MFP_Pos) /*!< USCI1 clock pin. \hideinitializer */
00959 #define SYS_GPE_MFPH_PE12MFP_UART1_nRTS       (0x08UL<<SYS_GPE_MFPH_PE12MFP_Pos) /*!< Request to Send output pin for UART1. \hideinitializer */
00960 #define SYS_GPE_MFPH_PE12MFP_EPWM0_CH4        (0x0AUL<<SYS_GPE_MFPH_PE12MFP_Pos) /*!< EPWM0 channel4 output/capture input. \hideinitializer */
00961 #define SYS_GPE_MFPH_PE12MFP_ECAP1_IC1        (0x0DUL<<SYS_GPE_MFPH_PE12MFP_Pos) /*!< Input 1 of enhanced capture unit 1. \hideinitializer */
00962 #define SYS_GPE_MFPH_PE12MFP_TRACE_CLK        (0x0EUL<<SYS_GPE_MFPH_PE12MFP_Pos) /*!< ETM Rx clock input pin. \hideinitializer */
00963 #define SYS_GPE_MFPH_PE13MFP_GPIO             (0x00UL<<SYS_GPE_MFPH_PE13MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00964 #define SYS_GPE_MFPH_PE13MFP_EBI_ADR15        (0x02UL<<SYS_GPE_MFPH_PE13MFP_Pos) /*!< EBI address/data bus bit*. \hideinitializer */
00965 #define SYS_GPE_MFPH_PE13MFP_EMAC_PPS         (0x03UL<<SYS_GPE_MFPH_PE13MFP_Pos) /*!< EMAC Pulse Per Second output  \hideinitializer */
00966 #define SYS_GPE_MFPH_PE13MFP_I2C0_SCL         (0x04UL<<SYS_GPE_MFPH_PE13MFP_Pos) /*!< I2C0 clock pin. \hideinitializer */
00967 #define SYS_GPE_MFPH_PE13MFP_UART4_nRTS       (0x05UL<<SYS_GPE_MFPH_PE13MFP_Pos) /*!< Request to Send output pin for UART4. \hideinitializer */
00968 #define SYS_GPE_MFPH_PE13MFP_UART1_TXD        (0x08UL<<SYS_GPE_MFPH_PE13MFP_Pos) /*!< Data transmitter output pin for UART1. \hideinitializer */
00969 #define SYS_GPE_MFPH_PE13MFP_EPWM0_CH5        (0x0AUL<<SYS_GPE_MFPH_PE13MFP_Pos) /*!< EPWM0 channel5 output/capture input. \hideinitializer */
00970 #define SYS_GPE_MFPH_PE13MFP_EPWM1_CH0        (0x0BUL<<SYS_GPE_MFPH_PE13MFP_Pos) /*!< EPWM1 channel0 output/capture input. \hideinitializer */
00971 #define SYS_GPE_MFPH_PE13MFP_BPWM1_CH5        (0x0CUL<<SYS_GPE_MFPH_PE13MFP_Pos) /*!< BPWM1 channel5 output/capture input. \hideinitializer */
00972 #define SYS_GPE_MFPH_PE13MFP_ECAP1_IC0        (0x0DUL<<SYS_GPE_MFPH_PE13MFP_Pos) /*!< Input 0 of enhanced capture unit 1. \hideinitializer */
00973 #define SYS_GPE_MFPH_PE14MFP_GPIO             (0x00UL<<SYS_GPE_MFPH_PE14MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00974 #define SYS_GPE_MFPH_PE14MFP_EBI_AD8          (0x02UL<<SYS_GPE_MFPH_PE14MFP_Pos) /*!< EBI address/data bus bit8. \hideinitializer */
00975 #define SYS_GPE_MFPH_PE14MFP_UART2_TXD        (0x03UL<<SYS_GPE_MFPH_PE14MFP_Pos) /*!< Data transmitter output pin for UART2. \hideinitializer */
00976 #define SYS_GPE_MFPH_PE14MFP_CAN0_TXD         (0x04UL<<SYS_GPE_MFPH_PE14MFP_Pos) /*!< CAN0 bus transmitter output. \hideinitializer */
00977 #define SYS_GPE_MFPH_PE14MFP_SD1_nCD          (0x05UL<<SYS_GPE_MFPH_PE14MFP_Pos) /*!< SD/SDIO 1 card detect  \hideinitializer */
00978 #define SYS_GPE_MFPH_PE15MFP_GPIO             (0x00UL<<SYS_GPE_MFPH_PE15MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
00979 #define SYS_GPE_MFPH_PE15MFP_EBI_AD9          (0x02UL<<SYS_GPE_MFPH_PE15MFP_Pos) /*!< EBI address/data bus bit9. \hideinitializer */
00980 #define SYS_GPE_MFPH_PE15MFP_UART2_RXD        (0x03UL<<SYS_GPE_MFPH_PE15MFP_Pos) /*!< Data receiver input pin for UART2. \hideinitializer */
00981 #define SYS_GPE_MFPH_PE15MFP_CAN0_RXD         (0x04UL<<SYS_GPE_MFPH_PE15MFP_Pos) /*!< CAN0 bus receiver input. \hideinitializer */
00982 /********************* Bit definition of GPF_MFPL register **********************/
00983 #define SYS_GPF_MFPL_PF0MFP_GPIO              (0x00UL<<SYS_GPF_MFPL_PF0MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00984 #define SYS_GPF_MFPL_PF0MFP_UART1_TXD         (0x02UL<<SYS_GPF_MFPL_PF0MFP_Pos)  /*!< Data transmitter output pin for UART1. \hideinitializer */
00985 #define SYS_GPF_MFPL_PF0MFP_I2C1_SCL          (0x03UL<<SYS_GPF_MFPL_PF0MFP_Pos)  /*!< I2C1 clock pin. \hideinitializer */
00986 #define SYS_GPF_MFPL_PF0MFP_BPWM1_CH0         (0x0CUL<<SYS_GPF_MFPL_PF0MFP_Pos)  /*!< BPWM1 channel0 output/capture input. \hideinitializer */
00987 #define SYS_GPF_MFPL_PF0MFP_ICE_DAT           (0x0EUL<<SYS_GPF_MFPL_PF0MFP_Pos)  /*!< Serial wired debugger data pin. \hideinitializer */
00988 #define SYS_GPF_MFPL_PF1MFP_GPIO              (0x00UL<<SYS_GPF_MFPL_PF1MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00989 #define SYS_GPF_MFPL_PF1MFP_UART1_RXD         (0x02UL<<SYS_GPF_MFPL_PF1MFP_Pos)  /*!< Data receiver input pin for UART1. \hideinitializer */
00990 #define SYS_GPF_MFPL_PF1MFP_I2C1_SDA          (0x03UL<<SYS_GPF_MFPL_PF1MFP_Pos)  /*!< I2C1 data input/output pin. \hideinitializer */
00991 #define SYS_GPF_MFPL_PF1MFP_BPWM1_CH1         (0x0CUL<<SYS_GPF_MFPL_PF1MFP_Pos)  /*!< BPWM1 channel1 output/capture input. \hideinitializer */
00992 #define SYS_GPF_MFPL_PF1MFP_ICE_CLK           (0x0EUL<<SYS_GPF_MFPL_PF1MFP_Pos)  /*!< Serial wired debugger clock pin. \hideinitializer */
00993 #define SYS_GPF_MFPL_PF2MFP_GPIO              (0x00UL<<SYS_GPF_MFPL_PF2MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
00994 #define SYS_GPF_MFPL_PF2MFP_EBI_nCS1          (0x02UL<<SYS_GPF_MFPL_PF2MFP_Pos)  /*!< EBI chip select enable output pin. \hideinitializer */
00995 #define SYS_GPF_MFPL_PF2MFP_UART0_RXD         (0x03UL<<SYS_GPF_MFPL_PF2MFP_Pos)  /*!< Data receiver input pin for UART0. \hideinitializer */
00996 #define SYS_GPF_MFPL_PF2MFP_I2C0_SDA          (0x04UL<<SYS_GPF_MFPL_PF2MFP_Pos)  /*!< I2C0 data input/output pin. \hideinitializer */
00997 #define SYS_GPF_MFPL_PF2MFP_QSPI0_CLK          (0x05UL<<SYS_GPF_MFPL_PF2MFP_Pos)  /*!< QSPI0 serial clock pin. \hideinitializer */
00998 #define SYS_GPF_MFPL_PF2MFP_XT1_OUT           (0x0AUL<<SYS_GPF_MFPL_PF2MFP_Pos)  /*!< External 4~24 MHz (high speed) crystal output pin. \hideinitializer */
00999 #define SYS_GPF_MFPL_PF2MFP_BPWM1_CH1         (0x0BUL<<SYS_GPF_MFPL_PF2MFP_Pos)  /*!< BPWM1 channel1 output/capture input. \hideinitializer */
01000 #define SYS_GPF_MFPL_PF3MFP_GPIO              (0x00UL<<SYS_GPF_MFPL_PF3MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01001 #define SYS_GPF_MFPL_PF3MFP_EBI_nCS0          (0x02UL<<SYS_GPF_MFPL_PF3MFP_Pos)  /*!< EBI chip select enable output pin. \hideinitializer */
01002 #define SYS_GPF_MFPL_PF3MFP_UART0_TXD         (0x03UL<<SYS_GPF_MFPL_PF3MFP_Pos)  /*!< Data transmitter output pin for UART0. \hideinitializer */
01003 #define SYS_GPF_MFPL_PF3MFP_I2C0_SCL          (0x04UL<<SYS_GPF_MFPL_PF3MFP_Pos)  /*!< I2C0 clock pin. \hideinitializer */
01004 #define SYS_GPF_MFPL_PF3MFP_XT1_IN            (0x0AUL<<SYS_GPF_MFPL_PF3MFP_Pos)  /*!< External 4~24 MHz (high speed) crystal input pin. \hideinitializer */
01005 #define SYS_GPF_MFPL_PF3MFP_BPWM1_CH0         (0x0BUL<<SYS_GPF_MFPL_PF3MFP_Pos)  /*!< BPWM1 channel0 output/capture input. \hideinitializer */
01006 #define SYS_GPF_MFPL_PF4MFP_GPIO              (0x00UL<<SYS_GPF_MFPL_PF4MFP_Pos)  /*!< General purpose digital I/O pin.  \hideinitializer */
01007 #define SYS_GPF_MFPL_PF4MFP_UART2_TXD         (0x02UL<<SYS_GPF_MFPL_PF4MFP_Pos)  /*!< Data transmitter output pin for UART2. \hideinitializer */
01008 #define SYS_GPF_MFPL_PF4MFP_UART2_nRTS        (0x04UL<<SYS_GPF_MFPL_PF4MFP_Pos)  /*!< Request to Send output pin for UART2. \hideinitializer */
01009 #define SYS_GPF_MFPL_PF4MFP_BPWM0_CH5         (0x08UL<<SYS_GPF_MFPL_PF4MFP_Pos)  /*!< BPWM0 channel5 output/capture input. \hideinitializer */
01010 #define SYS_GPF_MFPL_PF4MFP_X32_OUT           (0x0AUL<<SYS_GPF_MFPL_PF4MFP_Pos)  /*!< External 32.768 kHz (low speed) crystal output pin. \hideinitializer */
01011 #define SYS_GPF_MFPL_PF5MFP_GPIO              (0x00UL<<SYS_GPF_MFPL_PF5MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01012 #define SYS_GPF_MFPL_PF5MFP_UART2_RXD         (0x02UL<<SYS_GPF_MFPL_PF5MFP_Pos)  /*!< Data receiver input pin for UART2. \hideinitializer */
01013 #define SYS_GPF_MFPL_PF5MFP_UART2_nCTS        (0x04UL<<SYS_GPF_MFPL_PF5MFP_Pos)  /*!< Clear to Send input pin for UART2. \hideinitializer */
01014 #define SYS_GPF_MFPL_PF5MFP_BPWM0_CH4         (0x08UL<<SYS_GPF_MFPL_PF5MFP_Pos)  /*!< BPWM0 channel4 output/capture input. \hideinitializer */
01015 #define SYS_GPF_MFPL_PF5MFP_EPWM0_SYNC_OUT    (0x09UL<<SYS_GPF_MFPL_PF5MFP_Pos)  /*!< EPWM0 counter synchronous trigger output pin. \hideinitializer */
01016 #define SYS_GPF_MFPL_PF5MFP_X32_IN            (0x0AUL<<SYS_GPF_MFPL_PF5MFP_Pos)  /*!< External 32.768 kHz (low speed) crystal input pin. \hideinitializer */
01017 #define SYS_GPF_MFPL_PF5MFP_EADC0_ST          (0x0BUL<<SYS_GPF_MFPL_PF5MFP_Pos)  /*!< EADC external trigger input. \hideinitializer */
01018 #define SYS_GPF_MFPL_PF6MFP_GPIO              (0x00UL<<SYS_GPF_MFPL_PF6MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01019 #define SYS_GPF_MFPL_PF6MFP_EBI_ADR19         (0x02UL<<SYS_GPF_MFPL_PF6MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
01020 #define SYS_GPF_MFPL_PF6MFP_SC0_CLK           (0x03UL<<SYS_GPF_MFPL_PF6MFP_Pos)  /*!< SmartCard0 clock pin. \hideinitializer */
01021 #define SYS_GPF_MFPL_PF6MFP_I2S0_LRCK         (0x04UL<<SYS_GPF_MFPL_PF6MFP_Pos)  /*!< I2S0 left right channel clock. \hideinitializer */
01022 #define SYS_GPF_MFPL_PF6MFP_SPI0_MOSI         (0x05UL<<SYS_GPF_MFPL_PF6MFP_Pos)  /*!< 1st SPI0 MOSI (Master Out, Slave In) pin. \hideinitializer */
01023 #define SYS_GPF_MFPL_PF6MFP_UART4_RXD         (0x06UL<<SYS_GPF_MFPL_PF6MFP_Pos)  /*!< Data receiver input pin for UART4. \hideinitializer */
01024 #define SYS_GPF_MFPL_PF6MFP_EBI_nCS0          (0x07UL<<SYS_GPF_MFPL_PF6MFP_Pos)  /*!< EBI chip select enable output pin. \hideinitializer */
01025 #define SYS_GPF_MFPL_PF6MFP_TAMPER0           (0x0AUL<<SYS_GPF_MFPL_PF6MFP_Pos)  /*!< TAMPER detector loop pin0. \hideinitializer */
01026 #define SYS_GPF_MFPL_PF7MFP_GPIO              (0x00UL<<SYS_GPF_MFPL_PF7MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01027 #define SYS_GPF_MFPL_PF7MFP_EBI_ADR18         (0x02UL<<SYS_GPF_MFPL_PF7MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
01028 #define SYS_GPF_MFPL_PF7MFP_SC0_DAT           (0x03UL<<SYS_GPF_MFPL_PF7MFP_Pos)  /*!< SmartCard0 data pin. \hideinitializer */
01029 #define SYS_GPF_MFPL_PF7MFP_I2S0_DO           (0x04UL<<SYS_GPF_MFPL_PF7MFP_Pos)  /*!< I2S0 data output. \hideinitializer */
01030 #define SYS_GPF_MFPL_PF7MFP_SPI0_MISO         (0x05UL<<SYS_GPF_MFPL_PF7MFP_Pos)  /*!< 1st SPI0 MISO (Master In, Slave Out) pin. \hideinitializer */
01031 #define SYS_GPF_MFPL_PF7MFP_UART4_TXD         (0x06UL<<SYS_GPF_MFPL_PF7MFP_Pos)  /*!< Data transmitter output pin for UART4. \hideinitializer */
01032 #define SYS_GPF_MFPL_PF7MFP_TAMPER1           (0x0AUL<<SYS_GPF_MFPL_PF7MFP_Pos)  /*!< TAMPER detector loop pin1. \hideinitializer */
01033 /********************* Bit definition of GPF_MFPH register **********************/
01034 #define SYS_GPF_MFPH_PF8MFP_GPIO              (0x00UL<<SYS_GPF_MFPH_PF8MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01035 #define SYS_GPF_MFPH_PF8MFP_EBI_ADR17         (0x02UL<<SYS_GPF_MFPH_PF8MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
01036 #define SYS_GPF_MFPH_PF8MFP_SC0_RST           (0x03UL<<SYS_GPF_MFPH_PF8MFP_Pos)  /*!< SmartCard0 reset pin. \hideinitializer */
01037 #define SYS_GPF_MFPH_PF8MFP_I2S0_DI           (0x04UL<<SYS_GPF_MFPH_PF8MFP_Pos)  /*!< I2S0 data input. \hideinitializer */
01038 #define SYS_GPF_MFPH_PF8MFP_SPI0_CLK          (0x05UL<<SYS_GPF_MFPH_PF8MFP_Pos)  /*!< SPI0 serial clock pin. \hideinitializer */
01039 #define SYS_GPF_MFPH_PF8MFP_TAMPER2           (0x0AUL<<SYS_GPF_MFPH_PF8MFP_Pos)  /*!< TAMPER detector loop pin2. \hideinitializer */
01040 #define SYS_GPF_MFPH_PF9MFP_GPIO              (0x00UL<<SYS_GPF_MFPH_PF9MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01041 #define SYS_GPF_MFPH_PF9MFP_EBI_ADR16         (0x02UL<<SYS_GPF_MFPH_PF9MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
01042 #define SYS_GPF_MFPH_PF9MFP_SC0_PWR           (0x03UL<<SYS_GPF_MFPH_PF9MFP_Pos)  /*!< SmartCard0 power pin. \hideinitializer */
01043 #define SYS_GPF_MFPH_PF9MFP_I2S0_MCLK         (0x04UL<<SYS_GPF_MFPH_PF9MFP_Pos)  /*!< I2S0 master clock output pin. \hideinitializer */
01044 #define SYS_GPF_MFPH_PF9MFP_SPI0_SS           (0x05UL<<SYS_GPF_MFPH_PF9MFP_Pos)  /*!< 1st SPI0 slave select pin. \hideinitializer */
01045 #define SYS_GPF_MFPH_PF9MFP_TAMPER3           (0x0AUL<<SYS_GPF_MFPH_PF9MFP_Pos)  /*!< TAMPER detector loop pin3. \hideinitializer */
01046 #define SYS_GPF_MFPH_PF10MFP_GPIO             (0x00UL<<SYS_GPF_MFPH_PF10MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
01047 #define SYS_GPF_MFPH_PF10MFP_EBI_ADR15        (0x02UL<<SYS_GPF_MFPH_PF10MFP_Pos) /*!< EBI address/data bus bit*. \hideinitializer */
01048 #define SYS_GPF_MFPH_PF10MFP_SC0_nCD          (0x03UL<<SYS_GPF_MFPH_PF10MFP_Pos) /*!< SmartCard0 card detect pin. \hideinitializer */
01049 #define SYS_GPF_MFPH_PF10MFP_I2S0_BCLK        (0x04UL<<SYS_GPF_MFPH_PF10MFP_Pos) /*!< I2S0 bit clock pin. \hideinitializer */
01050 #define SYS_GPF_MFPH_PF10MFP_SPI0_I2SMCLK     (0x05UL<<SYS_GPF_MFPH_PF10MFP_Pos) /*!< SPI0 I2S master clock output pin. \hideinitializer */
01051 #define SYS_GPF_MFPH_PF10MFP_TAMPER4          (0x0AUL<<SYS_GPF_MFPH_PF10MFP_Pos) /*!< TAMPER detector loop pin4. \hideinitializer */
01052 #define SYS_GPF_MFPH_PF11MFP_GPIO             (0x00UL<<SYS_GPF_MFPH_PF11MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
01053 #define SYS_GPF_MFPH_PF11MFP_EBI_ADR14        (0x02UL<<SYS_GPF_MFPH_PF11MFP_Pos) /*!< EBI address/data bus bit*. \hideinitializer */
01054 #define SYS_GPF_MFPH_PF11MFP_SPI2_MOSI        (0x03UL<<SYS_GPF_MFPH_PF11MFP_Pos) /*!< 1st SPI2 MOSI (Master Out, Slave In) pin. \hideinitializer */
01055 #define SYS_GPF_MFPH_PF11MFP_TAMPER5          (0x0AUL<<SYS_GPF_MFPH_PF11MFP_Pos) /*!< TAMPER detector loop pin5. \hideinitializer */
01056 #define SYS_GPF_MFPH_PF11MFP_TM3              (0x0DUL<<SYS_GPF_MFPH_PF11MFP_Pos) /*!< Timer3 event counter input / toggle output  \hideinitializer */
01057 /********************* Bit definition of GPG_MFPL register **********************/
01058 #define SYS_GPG_MFPL_PG0MFP_GPIO              (0x00UL<<SYS_GPG_MFPL_PG0MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01059 #define SYS_GPG_MFPL_PG0MFP_EBI_ADR8          (0x02UL<<SYS_GPG_MFPL_PG0MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
01060 #define SYS_GPG_MFPL_PG0MFP_I2C0_SCL          (0x04UL<<SYS_GPG_MFPL_PG0MFP_Pos)  /*!< I2C0 clock pin. \hideinitializer */
01061 #define SYS_GPG_MFPL_PG0MFP_I2C1_SMBAL        (0x05UL<<SYS_GPG_MFPL_PG0MFP_Pos)  /*!< I2C1 SMBus SMBALTER# pin  \hideinitializer  */
01062 #define SYS_GPG_MFPL_PG0MFP_UART2_RXD         (0x06UL<<SYS_GPG_MFPL_PG0MFP_Pos)  /*!< Data receiver input pin for UART2. \hideinitializer */
01063 #define SYS_GPG_MFPL_PG0MFP_CAN1_TXD          (0x07UL<<SYS_GPG_MFPL_PG0MFP_Pos)  /*!< CAN1 bus transmitter output. \hideinitializer */
01064 #define SYS_GPG_MFPL_PG0MFP_UART1_TXD         (0x08UL<<SYS_GPG_MFPL_PG0MFP_Pos)  /*!< Data transmitter output pin for UART1. \hideinitializer */
01065 #define SYS_GPG_MFPL_PG1MFP_GPIO              (0x00UL<<SYS_GPG_MFPL_PG1MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01066 #define SYS_GPG_MFPL_PG1MFP_EBI_ADR9          (0x02UL<<SYS_GPG_MFPL_PG1MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
01067 #define SYS_GPG_MFPL_PG1MFP_SPI2_I2SMCLK      (0x03UL<<SYS_GPG_MFPL_PG1MFP_Pos)  /*!< SPI2 I2S master clock output pin. \hideinitializer */
01068 #define SYS_GPG_MFPL_PG1MFP_I2C0_SDA          (0x04UL<<SYS_GPG_MFPL_PG1MFP_Pos)  /*!< I2C0 data input/output pin. \hideinitializer */
01069 #define SYS_GPG_MFPL_PG1MFP_I2C1_SMBSUS       (0x05UL<<SYS_GPG_MFPL_PG1MFP_Pos)  /*!< I2C1 SMBus SMBSUS# pin (PMBus CONTROL pin)  \hideinitializer */
01070 #define SYS_GPG_MFPL_PG1MFP_UART2_TXD         (0x06UL<<SYS_GPG_MFPL_PG1MFP_Pos)  /*!< Data transmitter output pin for UART2. \hideinitializer */
01071 #define SYS_GPG_MFPL_PG1MFP_CAN1_RXD          (0x07UL<<SYS_GPG_MFPL_PG1MFP_Pos)  /*!< CAN1 bus receiver input. \hideinitializer */
01072 #define SYS_GPG_MFPL_PG1MFP_UART1_RXD         (0x08UL<<SYS_GPG_MFPL_PG1MFP_Pos)  /*!< Data receiver input pin for UART1. \hideinitializer */
01073 #define SYS_GPG_MFPL_PG2MFP_GPIO              (0x00UL<<SYS_GPG_MFPL_PG2MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01074 #define SYS_GPG_MFPL_PG2MFP_EBI_ADR11         (0x02UL<<SYS_GPG_MFPL_PG2MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
01075 #define SYS_GPG_MFPL_PG2MFP_SPI2_SS           (0x03UL<<SYS_GPG_MFPL_PG2MFP_Pos)  /*!< 1st SPI2 slave select pin. \hideinitializer */
01076 #define SYS_GPG_MFPL_PG2MFP_I2C0_SMBAL        (0x04UL<<SYS_GPG_MFPL_PG2MFP_Pos)  /*!< I2C0 SMBus SMBALTER# pin  \hideinitializer  */
01077 #define SYS_GPG_MFPL_PG2MFP_I2C1_SCL          (0x05UL<<SYS_GPG_MFPL_PG2MFP_Pos)  /*!< I2C1 clock pin. \hideinitializer */
01078 #define SYS_GPG_MFPL_PG2MFP_TM0               (0x0DUL<<SYS_GPG_MFPL_PG2MFP_Pos)  /*!< Timer0 event counter input / toggle output  \hideinitializer */
01079 #define SYS_GPG_MFPL_PG3MFP_GPIO              (0x00UL<<SYS_GPG_MFPL_PG3MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01080 #define SYS_GPG_MFPL_PG3MFP_EBI_ADR12         (0x02UL<<SYS_GPG_MFPL_PG3MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
01081 #define SYS_GPG_MFPL_PG3MFP_SPI2_CLK          (0x03UL<<SYS_GPG_MFPL_PG3MFP_Pos)  /*!< SPI2 serial clock pin. \hideinitializer */
01082 #define SYS_GPG_MFPL_PG3MFP_I2C0_SMBSUS       (0x04UL<<SYS_GPG_MFPL_PG3MFP_Pos)  /*!< I2C0 SMBus SMBSUS# pin (PMBus CONTROL pin)  \hideinitializer */
01083 #define SYS_GPG_MFPL_PG3MFP_I2C1_SDA          (0x05UL<<SYS_GPG_MFPL_PG3MFP_Pos)  /*!< I2C1 data input/output pin. \hideinitializer */
01084 #define SYS_GPG_MFPL_PG3MFP_TM1               (0x0DUL<<SYS_GPG_MFPL_PG3MFP_Pos)  /*!< Timer1 event counter input / toggle output  \hideinitializer */
01085 #define SYS_GPG_MFPL_PG4MFP_GPIO              (0x00UL<<SYS_GPG_MFPL_PG4MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01086 #define SYS_GPG_MFPL_PG4MFP_EBI_ADR13         (0x02UL<<SYS_GPG_MFPL_PG4MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
01087 #define SYS_GPG_MFPL_PG4MFP_SPI2_MISO         (0x03UL<<SYS_GPG_MFPL_PG4MFP_Pos)  /*!< 1st SPI2 MISO (Master In, Slave Out) pin. \hideinitializer */
01088 #define SYS_GPG_MFPL_PG4MFP_TM2               (0x0DUL<<SYS_GPG_MFPL_PG4MFP_Pos)  /*!< Timer2 event counter input / toggle output \hideinitializer  */
01089 #define SYS_GPG_MFPL_PG5MFP_GPIO              (0x00UL<<SYS_GPG_MFPL_PG5MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01090 #define SYS_GPG_MFPL_PG5MFP_EBI_nCS1          (0x02UL<<SYS_GPG_MFPL_PG5MFP_Pos)  /*!< EBI chip select enable output pin. \hideinitializer */
01091 #define SYS_GPG_MFPL_PG5MFP_SPI3_SS           (0x03UL<<SYS_GPG_MFPL_PG5MFP_Pos)  /*!< 1st SPI3 slave select pin. \hideinitializer */
01092 #define SYS_GPG_MFPL_PG5MFP_SC1_PWR           (0x04UL<<SYS_GPG_MFPL_PG5MFP_Pos)  /*!< SmartCard1 power pin. \hideinitializer */
01093 #define SYS_GPG_MFPL_PG5MFP_EPWM0_CH3         (0x0BUL<<SYS_GPG_MFPL_PG5MFP_Pos)  /*!< EPWM0 channel3 output/capture input. \hideinitializer */
01094 #define SYS_GPG_MFPL_PG6MFP_GPIO              (0x00UL<<SYS_GPG_MFPL_PG6MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01095 #define SYS_GPG_MFPL_PG6MFP_EBI_nCS2          (0x02UL<<SYS_GPG_MFPL_PG6MFP_Pos)  /*!< EBI chip select enable output pin. \hideinitializer */
01096 #define SYS_GPG_MFPL_PG6MFP_SPI3_CLK          (0x03UL<<SYS_GPG_MFPL_PG6MFP_Pos)  /*!< SPI3 serial clock pin. \hideinitializer */
01097 #define SYS_GPG_MFPL_PG6MFP_SC1_RST           (0x04UL<<SYS_GPG_MFPL_PG6MFP_Pos)  /*!< SmartCard1 reset pin. \hideinitializer */
01098 #define SYS_GPG_MFPL_PG6MFP_EPWM0_CH2         (0x0BUL<<SYS_GPG_MFPL_PG6MFP_Pos)  /*!< EPWM0 channel2 output/capture input. \hideinitializer */
01099 #define SYS_GPG_MFPL_PG7MFP_GPIO              (0x00UL<<SYS_GPG_MFPL_PG7MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01100 #define SYS_GPG_MFPL_PG7MFP_EBI_nWRL          (0x02UL<<SYS_GPG_MFPL_PG7MFP_Pos)  /*!< EBI write enable output pin. \hideinitializer */
01101 #define SYS_GPG_MFPL_PG7MFP_SPI3_MISO         (0x03UL<<SYS_GPG_MFPL_PG7MFP_Pos)  /*!< 1st SPI3 MISO (Master In, Slave Out) pin. \hideinitializer */
01102 #define SYS_GPG_MFPL_PG7MFP_SC1_DAT           (0x04UL<<SYS_GPG_MFPL_PG7MFP_Pos)  /*!< SmartCard1 data pin. \hideinitializer */
01103 #define SYS_GPG_MFPL_PG7MFP_EPWM0_CH1         (0x0BUL<<SYS_GPG_MFPL_PG7MFP_Pos)  /*!< EPWM0 channel1 output/capture input. \hideinitializer */
01104 /********************* Bit definition of GPG_MFPH register **********************/
01105 #define SYS_GPG_MFPH_PG8MFP_GPIO              (0x00UL<<SYS_GPG_MFPH_PG8MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01106 #define SYS_GPG_MFPH_PG8MFP_EBI_nWRH          (0x02UL<<SYS_GPG_MFPH_PG8MFP_Pos)  /*!< EBI write enable output pin. \hideinitializer */
01107 #define SYS_GPG_MFPH_PG8MFP_SPI3_MOSI         (0x03UL<<SYS_GPG_MFPH_PG8MFP_Pos)  /*!< 1st SPI3 MOSI (Master Out, Slave In) pin. \hideinitializer */
01108 #define SYS_GPG_MFPH_PG8MFP_SC1_CLK           (0x04UL<<SYS_GPG_MFPH_PG8MFP_Pos)  /*!< SmartCard1 clock pin. \hideinitializer */
01109 #define SYS_GPG_MFPH_PG8MFP_EPWM0_CH0         (0x0BUL<<SYS_GPG_MFPH_PG8MFP_Pos)  /*!< EPWM0 channel0 output/capture input. \hideinitializer */
01110 #define SYS_GPG_MFPH_PG9MFP_GPIO              (0x00UL<<SYS_GPG_MFPH_PG9MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01111 #define SYS_GPG_MFPH_PG9MFP_EBI_AD0           (0x02UL<<SYS_GPG_MFPH_PG9MFP_Pos)  /*!< EBI address/data bus bit0. \hideinitializer */
01112 #define SYS_GPG_MFPH_PG9MFP_SD1_DAT3          (0x03UL<<SYS_GPG_MFPH_PG9MFP_Pos)  /*!< SD/SDIO 1 data line bit 3. \hideinitializer */
01113 #define SYS_GPG_MFPH_PG9MFP_SPIM_D2           (0x04UL<<SYS_GPG_MFPH_PG9MFP_Pos)  /*!< SPIM data 2 pin for Quad Mode I/O. \hideinitializer */
01114 #define SYS_GPG_MFPH_PG9MFP_BPWM0_CH5         (0x0CUL<<SYS_GPG_MFPH_PG9MFP_Pos)  /*!< BPWM0 channel5 output/capture input. \hideinitializer */
01115 #define SYS_GPG_MFPH_PG10MFP_GPIO             (0x00UL<<SYS_GPG_MFPH_PG10MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
01116 #define SYS_GPG_MFPH_PG10MFP_EBI_AD1          (0x02UL<<SYS_GPG_MFPH_PG10MFP_Pos) /*!< EBI address/data bus bit1. \hideinitializer */
01117 #define SYS_GPG_MFPH_PG10MFP_SD1_DAT2         (0x03UL<<SYS_GPG_MFPH_PG10MFP_Pos) /*!< SD/SDIO 1 data line bit 2. \hideinitializer */
01118 #define SYS_GPG_MFPH_PG10MFP_SPIM_D3          (0x04UL<<SYS_GPG_MFPH_PG10MFP_Pos) /*!< SPIM data 3 pin for Quad Mode I/O. \hideinitializer */
01119 #define SYS_GPG_MFPH_PG10MFP_BPWM0_CH4        (0x0CUL<<SYS_GPG_MFPH_PG10MFP_Pos) /*!< BPWM0 channel4 output/capture input. \hideinitializer */
01120 #define SYS_GPG_MFPH_PG11MFP_GPIO             (0x00UL<<SYS_GPG_MFPH_PG11MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
01121 #define SYS_GPG_MFPH_PG11MFP_EBI_AD2          (0x02UL<<SYS_GPG_MFPH_PG11MFP_Pos) /*!< EBI address/data bus bit2. \hideinitializer */
01122 #define SYS_GPG_MFPH_PG11MFP_SD1_DAT1         (0x03UL<<SYS_GPG_MFPH_PG11MFP_Pos) /*!< SD/SDIO 1 data line bit 1. \hideinitializer */
01123 #define SYS_GPG_MFPH_PG11MFP_SPIM_SS          (0x04UL<<SYS_GPG_MFPH_PG11MFP_Pos) /*!< 1st SPIM slave select pin. \hideinitializer */
01124 #define SYS_GPG_MFPH_PG11MFP_BPWM0_CH3        (0x0CUL<<SYS_GPG_MFPH_PG11MFP_Pos) /*!< BPWM0 channel3 output/capture input. \hideinitializer */
01125 #define SYS_GPG_MFPH_PG12MFP_GPIO             (0x00UL<<SYS_GPG_MFPH_PG12MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
01126 #define SYS_GPG_MFPH_PG12MFP_EBI_AD3          (0x02UL<<SYS_GPG_MFPH_PG12MFP_Pos) /*!< EBI address/data bus bit3. \hideinitializer */
01127 #define SYS_GPG_MFPH_PG12MFP_SD1_DAT0         (0x03UL<<SYS_GPG_MFPH_PG12MFP_Pos) /*!< SD/SDIO 1 data line bit 0. \hideinitializer */
01128 #define SYS_GPG_MFPH_PG12MFP_SPIM_CLK         (0x04UL<<SYS_GPG_MFPH_PG12MFP_Pos) /*!< SPIM serial clock pin. \hideinitializer */
01129 #define SYS_GPG_MFPH_PG12MFP_BPWM0_CH2        (0x0CUL<<SYS_GPG_MFPH_PG12MFP_Pos) /*!< BPWM0 channel2 output/capture input. \hideinitializer */
01130 #define SYS_GPG_MFPH_PG13MFP_GPIO             (0x00UL<<SYS_GPG_MFPH_PG13MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
01131 #define SYS_GPG_MFPH_PG13MFP_EBI_AD4          (0x02UL<<SYS_GPG_MFPH_PG13MFP_Pos) /*!< EBI address/data bus bit4. \hideinitializer */
01132 #define SYS_GPG_MFPH_PG13MFP_SD1_CMD          (0x03UL<<SYS_GPG_MFPH_PG13MFP_Pos) /*!< SD/SDIO 1 command/response. \hideinitializer */
01133 #define SYS_GPG_MFPH_PG13MFP_SPIM_MISO        (0x04UL<<SYS_GPG_MFPH_PG13MFP_Pos) /*!< 1st SPIM MISO (Master In, Slave Out) pin. \hideinitializer */
01134 #define SYS_GPG_MFPH_PG13MFP_BPWM0_CH1        (0x0CUL<<SYS_GPG_MFPH_PG13MFP_Pos) /*!< BPWM0 channel1 output/capture input. \hideinitializer */
01135 #define SYS_GPG_MFPH_PG14MFP_GPIO             (0x00UL<<SYS_GPG_MFPH_PG14MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
01136 #define SYS_GPG_MFPH_PG14MFP_EBI_AD5          (0x02UL<<SYS_GPG_MFPH_PG14MFP_Pos) /*!< EBI address/data bus bit5. \hideinitializer */
01137 #define SYS_GPG_MFPH_PG14MFP_SD1_CLK          (0x03UL<<SYS_GPG_MFPH_PG14MFP_Pos) /*!< SD/SDIO 1 clock. \hideinitializer */
01138 #define SYS_GPG_MFPH_PG14MFP_SPIM_MOSI        (0x04UL<<SYS_GPG_MFPH_PG14MFP_Pos) /*!< 1st SPIM MOSI (Master Out, Slave In) pin. \hideinitializer */
01139 #define SYS_GPG_MFPH_PG14MFP_BPWM0_CH0        (0x0CUL<<SYS_GPG_MFPH_PG14MFP_Pos) /*!< BPWM0 channel0 output/capture input. \hideinitializer */
01140 #define SYS_GPG_MFPH_PG15MFP_GPIO             (0x00UL<<SYS_GPG_MFPH_PG15MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
01141 #define SYS_GPG_MFPH_PG15MFP_SD1_nCD          (0x03UL<<SYS_GPG_MFPH_PG15MFP_Pos) /*!< SD/SDIO 1 card detect  \hideinitializer */
01142 #define SYS_GPG_MFPH_PG15MFP_CLKO             (0x0EUL<<SYS_GPG_MFPH_PG15MFP_Pos) /*!< Clock Output pin. \hideinitializer */
01143 #define SYS_GPG_MFPH_PG15MFP_EADC0_ST         (0x0FUL<<SYS_GPG_MFPH_PG15MFP_Pos) /*!< EADC external trigger input. \hideinitializer */
01144 /********************* Bit definition of GPH_MFPL register **********************/
01145 #define SYS_GPH_MFPL_PH0MFP_GPIO              (0x00UL<<SYS_GPH_MFPL_PH0MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01146 #define SYS_GPH_MFPL_PH0MFP_EBI_ADR7          (0x02UL<<SYS_GPH_MFPL_PH0MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
01147 #define SYS_GPH_MFPL_PH0MFP_UART5_TXD         (0x04UL<<SYS_GPH_MFPL_PH0MFP_Pos)  /*!< Data transmitter output pin for UART5. \hideinitializer */
01148 #define SYS_GPH_MFPL_PH0MFP_TM0_EXT           (0x0DUL<<SYS_GPH_MFPL_PH0MFP_Pos)  /*!< Timer0 event counter input / toggle output  \hideinitializer */
01149 #define SYS_GPH_MFPL_PH1MFP_GPIO              (0x00UL<<SYS_GPH_MFPL_PH1MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01150 #define SYS_GPH_MFPL_PH1MFP_EBI_ADR6          (0x02UL<<SYS_GPH_MFPL_PH1MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
01151 #define SYS_GPH_MFPL_PH1MFP_UART5_RXD         (0x04UL<<SYS_GPH_MFPL_PH1MFP_Pos)  /*!< Data receiver input pin for UART5. \hideinitializer */
01152 #define SYS_GPH_MFPL_PH1MFP_TM1_EXT           (0x0DUL<<SYS_GPH_MFPL_PH1MFP_Pos)  /*!< Timer1 event counter input / toggle output  \hideinitializer */
01153 #define SYS_GPH_MFPL_PH2MFP_GPIO              (0x00UL<<SYS_GPH_MFPL_PH2MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01154 #define SYS_GPH_MFPL_PH2MFP_EBI_ADR5          (0x02UL<<SYS_GPH_MFPL_PH2MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
01155 #define SYS_GPH_MFPL_PH2MFP_UART5_nRTS        (0x04UL<<SYS_GPH_MFPL_PH2MFP_Pos)  /*!< Request to Send output pin for UART5. \hideinitializer */
01156 #define SYS_GPH_MFPL_PH2MFP_UART4_TXD         (0x05UL<<SYS_GPH_MFPL_PH2MFP_Pos)  /*!< Data transmitter output pin for UART4. \hideinitializer */
01157 #define SYS_GPH_MFPL_PH2MFP_I2C0_SCL          (0x06UL<<SYS_GPH_MFPL_PH2MFP_Pos)  /*!< I2C0 clock pin. \hideinitializer */
01158 #define SYS_GPH_MFPL_PH2MFP_TM2_EXT           (0x0DUL<<SYS_GPH_MFPL_PH2MFP_Pos)  /*!< Timer2 event counter input / toggle output  \hideinitializer */
01159 #define SYS_GPH_MFPL_PH3MFP_GPIO              (0x00UL<<SYS_GPH_MFPL_PH3MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01160 #define SYS_GPH_MFPL_PH3MFP_EBI_ADR4          (0x02UL<<SYS_GPH_MFPL_PH3MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
01161 #define SYS_GPH_MFPL_PH3MFP_SPI1_I2SMCLK      (0x03UL<<SYS_GPH_MFPL_PH3MFP_Pos)  /*!< SPI1 I2S master clock output pin. \hideinitializer */
01162 #define SYS_GPH_MFPL_PH3MFP_UART5_nCTS        (0x04UL<<SYS_GPH_MFPL_PH3MFP_Pos)  /*!< Clear to Send input pin for UART5. \hideinitializer */
01163 #define SYS_GPH_MFPL_PH3MFP_UART4_RXD         (0x05UL<<SYS_GPH_MFPL_PH3MFP_Pos)  /*!< Data receiver input pin for UART4. \hideinitializer */
01164 #define SYS_GPH_MFPL_PH3MFP_I2C0_SDA          (0x06UL<<SYS_GPH_MFPL_PH3MFP_Pos)  /*!< I2C0 data input/output pin. \hideinitializer */
01165 #define SYS_GPH_MFPL_PH3MFP_TM3_EXT           (0x0DUL<<SYS_GPH_MFPL_PH3MFP_Pos)  /*!< Timer3 event counter input / toggle output  \hideinitializer */
01166 #define SYS_GPH_MFPL_PH4MFP_GPIO              (0x00UL<<SYS_GPH_MFPL_PH4MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01167 #define SYS_GPH_MFPL_PH4MFP_EBI_ADR3          (0x02UL<<SYS_GPH_MFPL_PH4MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
01168 #define SYS_GPH_MFPL_PH4MFP_SPI1_MISO         (0x03UL<<SYS_GPH_MFPL_PH4MFP_Pos)  /*!< 1st SPI1 MISO (Master In, Slave Out) pin. \hideinitializer */
01169 #define SYS_GPH_MFPL_PH5MFP_GPIO              (0x00UL<<SYS_GPH_MFPL_PH5MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01170 #define SYS_GPH_MFPL_PH5MFP_EBI_ADR2          (0x02UL<<SYS_GPH_MFPL_PH5MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
01171 #define SYS_GPH_MFPL_PH5MFP_SPI1_MOSI         (0x03UL<<SYS_GPH_MFPL_PH5MFP_Pos)  /*!< 1st SPI1 MOSI (Master Out, Slave In) pin. \hideinitializer */
01172 #define SYS_GPH_MFPL_PH6MFP_GPIO              (0x00UL<<SYS_GPH_MFPL_PH6MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01173 #define SYS_GPH_MFPL_PH6MFP_EBI_ADR1          (0x02UL<<SYS_GPH_MFPL_PH6MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
01174 #define SYS_GPH_MFPL_PH6MFP_SPI1_CLK          (0x03UL<<SYS_GPH_MFPL_PH6MFP_Pos)  /*!< SPI1 serial clock pin. \hideinitializer */
01175 #define SYS_GPH_MFPL_PH7MFP_GPIO              (0x00UL<<SYS_GPH_MFPL_PH7MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01176 #define SYS_GPH_MFPL_PH7MFP_EBI_ADR0          (0x02UL<<SYS_GPH_MFPL_PH7MFP_Pos)  /*!< EBI address/data bus bit*. \hideinitializer */
01177 #define SYS_GPH_MFPL_PH7MFP_SPI1_SS           (0x03UL<<SYS_GPH_MFPL_PH7MFP_Pos)  /*!< 1st SPI1 slave select pin. \hideinitializer */
01178 /********************* Bit definition of GPH_MFPH register **********************/
01179 #define SYS_GPH_MFPH_PH8MFP_GPIO              (0x00UL<<SYS_GPH_MFPH_PH8MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01180 #define SYS_GPH_MFPH_PH8MFP_EBI_AD12          (0x02UL<<SYS_GPH_MFPH_PH8MFP_Pos)  /*!< EBI address/data bus bit1. \hideinitializer */
01181 #define SYS_GPH_MFPH_PH8MFP_QSPI0_CLK          (0x03UL<<SYS_GPH_MFPH_PH8MFP_Pos)  /*!< QSPI0 serial clock pin. \hideinitializer */
01182 #define SYS_GPH_MFPH_PH8MFP_SC2_PWR           (0x04UL<<SYS_GPH_MFPH_PH8MFP_Pos)  /*!< SmartCard2 power pin. \hideinitializer */
01183 #define SYS_GPH_MFPH_PH8MFP_I2S0_DI           (0x05UL<<SYS_GPH_MFPH_PH8MFP_Pos)  /*!< I2S0 data input. \hideinitializer */
01184 #define SYS_GPH_MFPH_PH8MFP_SPI1_CLK          (0x06UL<<SYS_GPH_MFPH_PH8MFP_Pos)  /*!< SPI1 serial clock pin. \hideinitializer */
01185 #define SYS_GPH_MFPH_PH8MFP_UART3_nRTS        (0x07UL<<SYS_GPH_MFPH_PH8MFP_Pos)  /*!< Request to Send output pin for UART3. \hideinitializer */
01186 #define SYS_GPH_MFPH_PH8MFP_I2C1_SMBAL        (0x08UL<<SYS_GPH_MFPH_PH8MFP_Pos)  /*!< I2C1 SMBus SMBALTER# pin  \hideinitializer  */
01187 #define SYS_GPH_MFPH_PH8MFP_I2C2_SCL          (0x09UL<<SYS_GPH_MFPH_PH8MFP_Pos)  /*!< I2C2 clock pin. \hideinitializer */
01188 #define SYS_GPH_MFPH_PH8MFP_UART1_TXD         (0x0AUL<<SYS_GPH_MFPH_PH8MFP_Pos)  /*!< Data transmitter output pin for UART1. \hideinitializer */
01189 #define SYS_GPH_MFPH_PH9MFP_GPIO              (0x00UL<<SYS_GPH_MFPH_PH9MFP_Pos)  /*!< General purpose digital I/O pin. \hideinitializer */
01190 #define SYS_GPH_MFPH_PH9MFP_EBI_AD13          (0x02UL<<SYS_GPH_MFPH_PH9MFP_Pos)  /*!< EBI address/data bus bit1. \hideinitializer */
01191 #define SYS_GPH_MFPH_PH9MFP_QSPI0_SS           (0x03UL<<SYS_GPH_MFPH_PH9MFP_Pos)  /*!< 1st QSPI0 slave select pin. \hideinitializer */
01192 #define SYS_GPH_MFPH_PH9MFP_SC2_RST           (0x04UL<<SYS_GPH_MFPH_PH9MFP_Pos)  /*!< SmartCard2 reset pin. \hideinitializer */
01193 #define SYS_GPH_MFPH_PH9MFP_I2S0_DO           (0x05UL<<SYS_GPH_MFPH_PH9MFP_Pos)  /*!< I2S0 data output. \hideinitializer */
01194 #define SYS_GPH_MFPH_PH9MFP_SPI1_SS           (0x06UL<<SYS_GPH_MFPH_PH9MFP_Pos)  /*!< 1st SPI1 slave select pin. \hideinitializer */
01195 #define SYS_GPH_MFPH_PH9MFP_UART3_nCTS        (0x07UL<<SYS_GPH_MFPH_PH9MFP_Pos)  /*!< Clear to Send input pin for UART3. \hideinitializer */
01196 #define SYS_GPH_MFPH_PH9MFP_I2C1_SMBSUS       (0x08UL<<SYS_GPH_MFPH_PH9MFP_Pos)  /*!< I2C1 SMBus SMBSUS# pin (PMBus CONTROL pin)  \hideinitializer */
01197 #define SYS_GPH_MFPH_PH9MFP_I2C2_SDA          (0x09UL<<SYS_GPH_MFPH_PH9MFP_Pos)  /*!< I2C2 data input/output pin. \hideinitializer */
01198 #define SYS_GPH_MFPH_PH9MFP_UART1_RXD         (0x0AUL<<SYS_GPH_MFPH_PH9MFP_Pos)  /*!< Data receiver input pin for UART1. \hideinitializer */
01199 #define SYS_GPH_MFPH_PH10MFP_GPIO             (0x00UL<<SYS_GPH_MFPH_PH10MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
01200 #define SYS_GPH_MFPH_PH10MFP_EBI_AD14         (0x02UL<<SYS_GPH_MFPH_PH10MFP_Pos) /*!< EBI address/data bus bit1. \hideinitializer */
01201 #define SYS_GPH_MFPH_PH10MFP_QSPI0_MISO1       (0x03UL<<SYS_GPH_MFPH_PH10MFP_Pos) /*!< 2nd QSPI0 MISO (Master In, Slave Out) pin. \hideinitializer */
01202 #define SYS_GPH_MFPH_PH10MFP_SC2_nCD          (0x04UL<<SYS_GPH_MFPH_PH10MFP_Pos) /*!< SmartCard2 card detect pin. \hideinitializer */
01203 #define SYS_GPH_MFPH_PH10MFP_I2S0_LRCK        (0x05UL<<SYS_GPH_MFPH_PH10MFP_Pos) /*!< I2S0 left right channel clock. \hideinitializer */
01204 #define SYS_GPH_MFPH_PH10MFP_SPI1_I2SMCLK     (0x06UL<<SYS_GPH_MFPH_PH10MFP_Pos) /*!< SPI1 I2S master clock output pin. \hideinitializer */
01205 #define SYS_GPH_MFPH_PH10MFP_UART4_TXD        (0x07UL<<SYS_GPH_MFPH_PH10MFP_Pos) /*!< Data transmitter output pin for UART4. \hideinitializer */
01206 #define SYS_GPH_MFPH_PH10MFP_UART0_TXD        (0x08UL<<SYS_GPH_MFPH_PH10MFP_Pos) /*!< Data transmitter output pin for UART0. \hideinitializer */
01207 #define SYS_GPH_MFPH_PH11MFP_GPIO             (0x00UL<<SYS_GPH_MFPH_PH11MFP_Pos) /*!< General purpose digital I/O pin. \hideinitializer */
01208 #define SYS_GPH_MFPH_PH11MFP_EBI_AD15         (0x02UL<<SYS_GPH_MFPH_PH11MFP_Pos) /*!< EBI address/data bus bit1. \hideinitializer */
01209 #define SYS_GPH_MFPH_PH11MFP_QSPI0_MOSI1       (0x03UL<<SYS_GPH_MFPH_PH11MFP_Pos) /*!< 2nd QSPI0 MOSI (Master Out, Slave In) pin. \hideinitializer */
01210 #define SYS_GPH_MFPH_PH11MFP_UART4_RXD        (0x07UL<<SYS_GPH_MFPH_PH11MFP_Pos) /*!< Data receiver input pin for UART4. \hideinitializer */
01211 #define SYS_GPH_MFPH_PH11MFP_UART0_RXD        (0x08UL<<SYS_GPH_MFPH_PH11MFP_Pos) /*!< Data receiver input pin for UART0. \hideinitializer */
01212 #define SYS_GPH_MFPH_PH11MFP_EPWM0_CH5        (0x0BUL<<SYS_GPH_MFPH_PH11MFP_Pos) /*!< EPWM0 channel5 output/capture input. \hideinitializer */
01213 
01214 /*@}*/ /* end of group SYS_EXPORTED_CONSTANTS */
01215 
01216 
01217 /** @addtogroup SYS_EXPORTED_FUNCTIONS SYS Exported Functions
01218   @{
01219 */
01220 
01221 
01222 /**
01223   * @brief      Clear Brown-out detector interrupt flag
01224   * @param      None
01225   * @return     None
01226   * @details    This macro clear Brown-out detector interrupt flag.
01227   * \hideinitializer
01228   */
01229 #define SYS_CLEAR_BOD_INT_FLAG()        (SYS->BODCTL |= SYS_BODCTL_BODIF_Msk)
01230 
01231 /**
01232   * @brief      Set Brown-out detector function to normal mode
01233   * @param      None
01234   * @return     None
01235   * @details    This macro set Brown-out detector to normal mode.
01236   *             The register write-protection function should be disabled before using this macro.
01237   * \hideinitializer
01238   */
01239 #define SYS_CLEAR_BOD_LPM()             (SYS->BODCTL &= ~SYS_BODCTL_BODLPM_Msk)
01240 
01241 /**
01242   * @brief      Disable Brown-out detector function
01243   * @param      None
01244   * @return     None
01245   * @details    This macro disable Brown-out detector function.
01246   *             The register write-protection function should be disabled before using this macro.
01247   * \hideinitializer
01248   */
01249 #define SYS_DISABLE_BOD()               (SYS->BODCTL &= ~SYS_BODCTL_BODEN_Msk)
01250 
01251 /**
01252   * @brief      Enable Brown-out detector function
01253   * @param      None
01254   * @return     None
01255   * @details    This macro enable Brown-out detector function.
01256   *             The register write-protection function should be disabled before using this macro.
01257   * \hideinitializer
01258   */
01259 #define SYS_ENABLE_BOD()                (SYS->BODCTL |= SYS_BODCTL_BODEN_Msk)
01260 
01261 /**
01262   * @brief      Get Brown-out detector interrupt flag
01263   * @param      None
01264   * @retval     0   Brown-out detect interrupt flag is not set.
01265   * @retval     >=1 Brown-out detect interrupt flag is set.
01266   * @details    This macro get Brown-out detector interrupt flag.
01267   * \hideinitializer
01268   */
01269 #define SYS_GET_BOD_INT_FLAG()          (SYS->BODCTL & SYS_BODCTL_BODIF_Msk)
01270 
01271 /**
01272   * @brief      Get Brown-out detector status
01273   * @param      None
01274   * @retval     0   System voltage is higher than BOD threshold voltage setting or BOD function is disabled.
01275   * @retval     >=1 System voltage is lower than BOD threshold voltage setting.
01276   * @details    This macro get Brown-out detector output status.
01277   *             If the BOD function is disabled, this function always return 0.
01278   * \hideinitializer
01279   */
01280 #define SYS_GET_BOD_OUTPUT()            (SYS->BODCTL & SYS_BODCTL_BODOUT_Msk)
01281 
01282 /**
01283   * @brief      Enable Brown-out detector interrupt function
01284   * @param      None
01285   * @return     None
01286   * @details    This macro enable Brown-out detector interrupt function.
01287   *             The register write-protection function should be disabled before using this macro.
01288   * \hideinitializer
01289   */
01290 #define SYS_DISABLE_BOD_RST()           (SYS->BODCTL &= ~SYS_BODCTL_BODRSTEN_Msk)
01291 
01292 /**
01293   * @brief      Enable Brown-out detector reset function
01294   * @param      None
01295   * @return     None
01296   * @details    This macro enable Brown-out detect reset function.
01297   *             The register write-protection function should be disabled before using this macro.
01298   * \hideinitializer
01299   */
01300 #define SYS_ENABLE_BOD_RST()            (SYS->BODCTL |= SYS_BODCTL_BODRSTEN_Msk)
01301 
01302 /**
01303   * @brief      Set Brown-out detector function low power mode
01304   * @param      None
01305   * @return     None
01306   * @details    This macro set Brown-out detector to low power mode.
01307   *             The register write-protection function should be disabled before using this macro.
01308   * \hideinitializer
01309   */
01310 #define SYS_SET_BOD_LPM()               (SYS->BODCTL |= SYS_BODCTL_BODLPM_Msk)
01311 
01312 /**
01313   * @brief      Set Brown-out detector voltage level
01314   * @param[in]  u32Level is Brown-out voltage level. Including :
01315   *             - \ref SYS_BODCTL_BODVL_3_0V
01316   *             - \ref SYS_BODCTL_BODVL_2_8V
01317   *             - \ref SYS_BODCTL_BODVL_2_6V
01318   *             - \ref SYS_BODCTL_BODVL_2_4V
01319   *             - \ref SYS_BODCTL_BODVL_2_2V
01320   *             - \ref SYS_BODCTL_BODVL_2_0V
01321   *             - \ref SYS_BODCTL_BODVL_1_8V
01322   *             - \ref SYS_BODCTL_BODVL_1_6V
01323   * @return     None
01324   * @details    This macro set Brown-out detector voltage level.
01325   *             The write-protection function should be disabled before using this macro.
01326   * \hideinitializer
01327   */
01328 #define SYS_SET_BOD_LEVEL(u32Level)     (SYS->BODCTL = (SYS->BODCTL & ~SYS_BODCTL_BODVL_Msk) | (u32Level))
01329 
01330 /**
01331   * @brief      Get reset source is from Brown-out detector reset
01332   * @param      None
01333   * @retval     0   Previous reset source is not from Brown-out detector reset
01334   * @retval     >=1 Previous reset source is from Brown-out detector reset
01335   * @details    This macro get previous reset source is from Brown-out detect reset or not.
01336   * \hideinitializer
01337   */
01338 #define SYS_IS_BOD_RST()                (SYS->RSTSTS & SYS_RSTSTS_BODRF_Msk)
01339 
01340 /**
01341   * @brief      Get reset source is from CPU reset
01342   * @param      None
01343   * @retval     0   Previous reset source is not from CPU reset
01344   * @retval     >=1 Previous reset source is from CPU reset
01345   * @details    This macro get previous reset source is from CPU reset.
01346   * \hideinitializer
01347   */
01348 #define SYS_IS_CPU_RST()                (SYS->RSTSTS & SYS_RSTSTS_CPURF_Msk)
01349 
01350 /**
01351   * @brief      Get reset source is from LVR Reset
01352   * @param      None
01353   * @retval     0   Previous reset source is not from Low-Voltage-Reset
01354   * @retval     >=1 Previous reset source is from Low-Voltage-Reset
01355   * @details    This macro get previous reset source is from Low-Voltage-Reset.
01356   * \hideinitializer
01357   */
01358 #define SYS_IS_LVR_RST()                (SYS->RSTSTS & SYS_RSTSTS_LVRF_Msk)
01359 
01360 /**
01361   * @brief      Get reset source is from Power-on Reset
01362   * @param      None
01363   * @retval     0   Previous reset source is not from Power-on Reset
01364   * @retval     >=1 Previous reset source is from Power-on Reset
01365   * @details    This macro get previous reset source is from Power-on Reset.
01366   * \hideinitializer
01367   */
01368 #define SYS_IS_POR_RST()                (SYS->RSTSTS & SYS_RSTSTS_PORF_Msk)
01369 
01370 /**
01371   * @brief      Get reset source is from reset pin reset
01372   * @param      None
01373   * @retval     0   Previous reset source is not from reset pin reset
01374   * @retval     >=1 Previous reset source is from reset pin reset
01375   * @details    This macro get previous reset source is from reset pin reset.
01376   * \hideinitializer
01377   */
01378 #define SYS_IS_RSTPIN_RST()             (SYS->RSTSTS & SYS_RSTSTS_PINRF_Msk)
01379 
01380 /**
01381   * @brief      Get reset source is from system reset
01382   * @param      None
01383   * @retval     0   Previous reset source is not from system reset
01384   * @retval     >=1 Previous reset source is from system reset
01385   * @details    This macro get previous reset source is from system reset.
01386   * \hideinitializer
01387   */
01388 #define SYS_IS_SYSTEM_RST()             (SYS->RSTSTS & SYS_RSTSTS_SYSRF_Msk)
01389 
01390 /**
01391   * @brief      Get reset source is from window watch dog reset
01392   * @param      None
01393   * @retval     0   Previous reset source is not from window watch dog reset
01394   * @retval     >=1 Previous reset source is from window watch dog reset
01395   * @details    This macro get previous reset source is from window watch dog reset.
01396   * \hideinitializer
01397   */
01398 #define SYS_IS_WDT_RST()                (SYS->RSTSTS & SYS_RSTSTS_WDTRF_Msk)
01399 
01400 /**
01401   * @brief      Disable Low-Voltage-Reset function
01402   * @param      None
01403   * @return     None
01404   * @details    This macro disable Low-Voltage-Reset function.
01405   *             The register write-protection function should be disabled before using this macro.
01406   * \hideinitializer
01407   */
01408 #define SYS_DISABLE_LVR()               (SYS->BODCTL &= ~SYS_BODCTL_LVREN_Msk)
01409 
01410 /**
01411   * @brief      Enable Low-Voltage-Reset function
01412   * @param      None
01413   * @return     None
01414   * @details    This macro enable Low-Voltage-Reset function.
01415   *             The register write-protection function should be disabled before using this macro.
01416   * \hideinitializer
01417   */
01418 #define SYS_ENABLE_LVR()                (SYS->BODCTL |= SYS_BODCTL_LVREN_Msk)
01419 
01420 /**
01421   * @brief      Disable Power-on Reset function
01422   * @param      None
01423   * @return     None
01424   * @details    This macro disable Power-on Reset function.
01425   *             The register write-protection function should be disabled before using this macro.
01426   * \hideinitializer
01427   */
01428 #define SYS_DISABLE_POR()               (SYS->PORCTL = 0x5AA5)
01429 
01430 /**
01431   * @brief      Enable Power-on Reset function
01432   * @param      None
01433   * @return     None
01434   * @details    This macro enable Power-on Reset function.
01435   *             The register write-protection function should be disabled before using this macro.
01436   * \hideinitializer
01437   */
01438 #define SYS_ENABLE_POR()                (SYS->PORCTL = 0)
01439 
01440 /**
01441   * @brief      Clear reset source flag
01442   * @param[in]  u32RstSrc is reset source. Including :
01443   *             - \ref SYS_RSTSTS_PORF_Msk
01444   *             - \ref SYS_RSTSTS_PINRF_Msk
01445   *             - \ref SYS_RSTSTS_WDTRF_Msk
01446   *             - \ref SYS_RSTSTS_LVRF_Msk
01447   *             - \ref SYS_RSTSTS_BODRF_Msk
01448   *             - \ref SYS_RSTSTS_SYSRF_Msk
01449   *             - \ref SYS_RSTSTS_CPURF_Msk
01450   *             - \ref SYS_RSTSTS_CPULKRF_Msk
01451   * @return     None
01452   * @details    This macro clear reset source flag.
01453   * \hideinitializer
01454   */
01455 #define SYS_CLEAR_RST_SOURCE(u32RstSrc) ((SYS->RSTSTS) = (u32RstSrc) )
01456 
01457 
01458 /*---------------------------------------------------------------------------------------------------------*/
01459 /* static inline functions                                                                                 */
01460 /*---------------------------------------------------------------------------------------------------------*/
01461 /* Declare these inline functions here to avoid MISRA C 2004 rule 8.1 error */
01462 __STATIC_INLINE void SYS_UnlockReg(void);
01463 __STATIC_INLINE void SYS_LockReg(void);
01464 
01465 /**
01466   * @brief      Disable register write-protection function
01467   * @param      None
01468   * @return     None
01469   * @details    This function disable register write-protection function.
01470   *             To unlock the protected register to allow write access.
01471   */
01472 __STATIC_INLINE void SYS_UnlockReg(void)
01473 {
01474     do {
01475         SYS->REGLCTL = 0x59UL;
01476         SYS->REGLCTL = 0x16UL;
01477         SYS->REGLCTL = 0x88UL;
01478     } while (SYS->REGLCTL == 0UL);
01479 }
01480 
01481 /**
01482   * @brief      Enable register write-protection function
01483   * @param      None
01484   * @return     None
01485   * @details    This function is used to enable register write-protection function.
01486   *             To lock the protected register to forbid write access.
01487   */
01488 __STATIC_INLINE void SYS_LockReg(void)
01489 {
01490     SYS->REGLCTL = 0UL;
01491 }
01492 
01493 
01494 void SYS_ClearResetSrc(uint32_t u32Src);
01495 uint32_t SYS_GetBODStatus(void);
01496 uint32_t SYS_GetResetSrc(void);
01497 uint32_t SYS_IsRegLocked(void);
01498 uint32_t SYS_ReadPDID(void);
01499 void SYS_ResetChip(void);
01500 void SYS_ResetCPU(void);
01501 void SYS_ResetModule(uint32_t u32ModuleIndex);
01502 void SYS_EnableBOD(int32_t i32Mode, uint32_t u32BODLevel);
01503 void SYS_DisableBOD(void);
01504 void SYS_SetPowerLevel(uint32_t u32PowerLevel);
01505 
01506 
01507 /*@}*/ /* end of group SYS_EXPORTED_FUNCTIONS */
01508 
01509 /*@}*/ /* end of group SYS_Driver */
01510 
01511 /*@}*/ /* end of group Standard_Driver */
01512 
01513 
01514 #ifdef __cplusplus
01515 }
01516 #endif
01517 
01518 #endif  /* __SYS_H__ */
01519 
01520 /*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/