IO_Config.h

00001 /**
00002  * @file    IO_Config.h
00003  * @brief
00004  *
00005  * DAPLink Interface Firmware
00006  * Copyright (c) 2009-2016, ARM Limited, All Rights Reserved
00007  * SPDX-License-Identifier: Apache-2.0
00008  *
00009  * Licensed under the Apache License, Version 2.0 (the "License"); you may
00010  * not use this file except in compliance with the License.
00011  * You may obtain a copy of the License at
00012  *
00013  * http://www.apache.org/licenses/LICENSE-2.0
00014  *
00015  * Unless required by applicable law or agreed to in writing, software
00016  * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
00017  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00018  * See the License for the specific language governing permissions and
00019  * limitations under the License.
00020  */
00021 
00022 #ifndef __IO_CONFIG_H__
00023 #define __IO_CONFIG_H__
00024 
00025 #include "fsl_device_registers.h"
00026 #include "compiler.h"
00027 #include "daplink.h"
00028 
00029 // This GPIO configuration is only valid for the K26F HIC
00030 COMPILER_ASSERT(DAPLINK_HIC_ID == DAPLINK_HIC_ID_K26F);
00031 
00032 
00033 // Debug Port I/O Pins
00034 
00035 // SWCLK Pin                    PTC5
00036 // (SDA_SWD_SCK on schematic)
00037 #define PIN_SWCLK_PORT          PORTC
00038 #define PIN_SWCLK_GPIO          PTC
00039 #define PIN_SWCLK_BIT           5
00040 
00041 // SWDIO Out Pin                PTC6
00042 // (SDA_SWD_DOUT on schematic)
00043 #define PIN_SWDIO_OUT_PORT      PORTC
00044 #define PIN_SWDIO_OUT_GPIO      PTC
00045 #define PIN_SWDIO_OUT_BIT       6
00046 
00047 // SWDIO In Pin                 PTC7
00048 // (SDA_SWD_DIN on schematic)
00049 #define PIN_SWDIO_IN_PORT       PORTC
00050 #define PIN_SWDIO_IN_GPIO       PTC
00051 #define PIN_SWDIO_IN_BIT        7
00052 
00053 // SWDIO Output Enable Pin     PTA5
00054 // (SDA_SWD_OE on schematic)
00055 #define PIN_SWDIO_OE_PORT      PORTA
00056 #define PIN_SWDIO_OE_GPIO      PTA
00057 #define PIN_SWDIO_OE_BIT       5
00058 
00059 // SWD Enable Pin              PTA4
00060 // (SDA_SWD_EN on schematic)
00061 #define PIN_SWD_OE_PORT        PORTA
00062 #define PIN_SWD_OE_GPIO        PTA
00063 #define PIN_SWD_OE_BIT         9
00064 
00065 // SWO Input Pin               PTC3
00066 // (SDA_SWD_SWO on schematic)
00067 #define PIN_SWO_RX_PORT        PORTC
00068 #define PIN_SWO_RX_GPIO        PTC
00069 #define PIN_SWO_RX_BIT         3
00070 
00071 // nRESET Pin                   PTA7
00072 #define PIN_nRESET_PORT         PORTA
00073 #define PIN_nRESET_GPIO         PTA
00074 #define PIN_nRESET_BIT          7
00075 #define PIN_nRESET              (1 << PIN_nRESET_BIT)
00076 
00077 // nRESET Pin Level Shifter Enable PTA6
00078 // (SDA_LVLRST_EN on schematic)
00079 #define PIN_nRESET_EN_PORT      PORTA
00080 #define PIN_nRESET_EN_GPIO      PTA
00081 #define PIN_nRESET_EN_BIT       6
00082 #define PIN_nRESET_EN           (1 << PIN_nRESET_EN_BIT)
00083 
00084 // SWD Detect Pin               PTA8
00085 // (x_SWD_DETECT on schematic)
00086 #define PIN_SWD_DETECT_PORT     PORTA
00087 #define PIN_SWD_DETECTGPIO      PTA
00088 #define PIN_SWD_DETECT_BIT      8
00089 #define PIN_SWD_DETECT          (1 << PIN_SWD_DETECT_BIT)
00090 
00091 
00092 // Power monitor
00093 
00094 // SDA_G1 Pin                PTE17
00095 #define PIN_G1_PORT          PORTE
00096 #define PIN_G1_GPIO          PTE
00097 #define PIN_G1_BIT           17
00098 #define PIN_G1               (1 << PIN_G1_BIT)
00099 
00100 // SDA_G2 Pin                PTE18
00101 #define PIN_G2_PORT          PORTE
00102 #define PIN_G2_GPIO          PTE
00103 #define PIN_G2_BIT           18
00104 #define PIN_G2               (1 << PIN_G2_BIT)
00105 
00106 // SDA_LOW_RANGE_EN Pin      PTE19
00107 #define PIN_LOW_RANGE_EN_PORT          PORTE
00108 #define PIN_LOW_RANGE_EN_GPIO          PTE
00109 #define PIN_LOW_RANGE_EN_BIT           19
00110 #define PIN_LOW_RANGE_EN               (1 << PIN_LOW_RANGE_EN_BIT)
00111 
00112 // SDA_CAL_EN Pin            PTE24
00113 #define PIN_CAL_EN_PORT      PORTE
00114 #define PIN_CAL_EN_GPIO      PTE
00115 #define PIN_CAL_EN_BIT       24
00116 #define PIN_CAL_EN           (1 << PIN_CAL_EN_BIT)
00117 
00118 // SDA_CTRL0 Pin             PTE25
00119 #define PIN_CTRL0_PORT       PORTE
00120 #define PIN_CTRL0_GPIO       PTE
00121 #define PIN_CTRL0_BIT        25
00122 #define PIN_CTRL0            (1 << PIN_CTRL0_BIT)
00123 
00124 // SDA_CTRL1 Pin             PTE26
00125 #define PIN_CTRL1_PORT       PORTE
00126 #define PIN_CTRL1_GPIO       PTE
00127 #define PIN_CTRL1_BIT        26
00128 #define PIN_CTRL1            (1 << PIN_CTRL1_BIT)
00129 
00130 // SDA_CTRL2 Pin             PTE27
00131 #define PIN_CTRL2_PORT       PORTE
00132 #define PIN_CTRL2_GPIO       PTE
00133 #define PIN_CTRL2_BIT        27
00134 #define PIN_CTRL2            (1 << PIN_CTRL2_BIT)
00135 
00136 // SDA_CTRL3 Pin             PTE28
00137 #define PIN_CTRL3_PORT       PORTE
00138 #define PIN_CTRL3_GPIO       PTE
00139 #define PIN_CTRL3_BIT        28
00140 #define PIN_CTRL3            (1 << PIN_CTRL3_BIT)
00141 
00142 
00143 // Misc target connections
00144 
00145 // SDA_GPIO0_B Pin           PTB22
00146 #define PIN_GPIO0_B_PORT     PORTB
00147 #define PIN_GPIO0_B_GPIO     PTB
00148 #define PIN_GPIO0_B_BIT      22
00149 #define PIN_GPIO0_B          (1 < PIN_GPIO0_B_BIT)
00150 
00151 // SDA_CLKOUT_B Pin          PTC
00152 #define PIN_CLKOUT_B_PORT    PORTC
00153 #define PIN_CLKOUT_B_GPIO    PTC
00154 #define PIN_CLKOUT_B_BIT     3
00155 #define PIN_CLKOUT_B         (1 << PIN_CLKOUT_B_BIT)
00156 
00157 
00158 // Power and fault detection
00159 
00160 // PWR_REG_EN                   PTE12
00161 #define PIN_POWER_EN_PORT       PORTE
00162 #define PIN_POWER_EN_GPIO       PTE
00163 #define PIN_POWER_EN_BIT        12
00164 #define PIN_POWER_EN            (1 << PIN_POWER_EN_BIT)
00165 
00166 // VTRG_FAULT_B                 PTE11
00167 #define PIN_VTRG_FAULT_B_PORT   PORTE
00168 #define PIN_VTRG_FAULT_B_GPIO   PTE
00169 #define PIN_VTRG_FAULT_B_BIT    11
00170 
00171 // Debug Unit LEDs
00172 
00173 // Connected LED                PTD4
00174 #define LED_CONNECTED_PORT      PORTD
00175 #define LED_CONNECTED_GPIO      PTD
00176 #define LED_CONNECTED_BIT       4
00177 #define LED_CONNECTED           (1 << LED_CONNECTED_BIT)
00178 
00179 // Target Running LED           Not available
00180 
00181 // Debug Unit LEDs
00182 
00183 // HID_LED PTD4
00184 #define PIN_HID_LED_PORT        PORTD
00185 #define PIN_HID_LED_GPIO        PTD
00186 #define PIN_HID_LED_BIT         (4)
00187 #define PIN_HID_LED             (1<<PIN_HID_LED_BIT)
00188 
00189 // MSC_LED PTD4
00190 #define PIN_MSC_LED_PORT        PORTD
00191 #define PIN_MSC_LED_GPIO        PTD
00192 #define PIN_MSC_LED_BIT         (4)
00193 #define PIN_MSC_LED             (1<<PIN_HID_LED_BIT)
00194 
00195 // CDC_LED PTD4
00196 #define PIN_CDC_LED_PORT        PORTD
00197 #define PIN_CDC_LED_GPIO        PTD
00198 #define PIN_CDC_LED_BIT         (4)
00199 #define PIN_CDC_LED             (1<<PIN_HID_LED_BIT)
00200 
00201 // SW RESET BUTTON PTB1
00202 #define PIN_SW_RESET_PORT       PORTB
00203 #define PIN_SW_RESET_GPIO       PTB
00204 #define PIN_SW_RESET_BIT        (1)
00205 #define PIN_SW_RESET            (1<<PIN_SW_RESET_BIT)
00206 
00207 #endif