uart.h

00001 /* ---------------------------------------------------------------------------- */
00002 /*                  Atmel Microcontroller Software Support                      */
00003 /*                       SAM Software Package License                           */
00004 /* ---------------------------------------------------------------------------- */
00005 /* Copyright (c) %copyright_year%, Atmel Corporation                                        */
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00010 /* modification, are permitted provided that the following condition is met:    */
00011 /*                                                                              */
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00013 /* this list of conditions and the disclaimer below.                            */
00014 /*                                                                              */
00015 /* Atmel's name may not be used to endorse or promote products derived from     */
00016 /* this software without specific prior written permission.                     */
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00029 
00030 #ifndef _SAM3U_UART_INSTANCE_
00031 #define _SAM3U_UART_INSTANCE_
00032 
00033 /* ========== Register definition for UART peripheral ========== */
00034 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
00035 #define REG_UART_CR            (0x400E0600U) /**< \brief (UART) Control Register */
00036 #define REG_UART_MR            (0x400E0604U) /**< \brief (UART) Mode Register */
00037 #define REG_UART_IER           (0x400E0608U) /**< \brief (UART) Interrupt Enable Register */
00038 #define REG_UART_IDR           (0x400E060CU) /**< \brief (UART) Interrupt Disable Register */
00039 #define REG_UART_IMR           (0x400E0610U) /**< \brief (UART) Interrupt Mask Register */
00040 #define REG_UART_SR            (0x400E0614U) /**< \brief (UART) Status Register */
00041 #define REG_UART_RHR           (0x400E0618U) /**< \brief (UART) Receive Holding Register */
00042 #define REG_UART_THR           (0x400E061CU) /**< \brief (UART) Transmit Holding Register */
00043 #define REG_UART_BRGR          (0x400E0620U) /**< \brief (UART) Baud Rate Generator Register */
00044 #define REG_UART_RPR           (0x400E0700U) /**< \brief (UART) Receive Pointer Register */
00045 #define REG_UART_RCR           (0x400E0704U) /**< \brief (UART) Receive Counter Register */
00046 #define REG_UART_TPR           (0x400E0708U) /**< \brief (UART) Transmit Pointer Register */
00047 #define REG_UART_TCR           (0x400E070CU) /**< \brief (UART) Transmit Counter Register */
00048 #define REG_UART_RNPR          (0x400E0710U) /**< \brief (UART) Receive Next Pointer Register */
00049 #define REG_UART_RNCR          (0x400E0714U) /**< \brief (UART) Receive Next Counter Register */
00050 #define REG_UART_TNPR          (0x400E0718U) /**< \brief (UART) Transmit Next Pointer Register */
00051 #define REG_UART_TNCR          (0x400E071CU) /**< \brief (UART) Transmit Next Counter Register */
00052 #define REG_UART_PTCR          (0x400E0720U) /**< \brief (UART) Transfer Control Register */
00053 #define REG_UART_PTSR          (0x400E0724U) /**< \brief (UART) Transfer Status Register */
00054 #else
00055 #define REG_UART_CR   (*(WoReg*)0x400E0600U) /**< \brief (UART) Control Register */
00056 #define REG_UART_MR   (*(RwReg*)0x400E0604U) /**< \brief (UART) Mode Register */
00057 #define REG_UART_IER  (*(WoReg*)0x400E0608U) /**< \brief (UART) Interrupt Enable Register */
00058 #define REG_UART_IDR  (*(WoReg*)0x400E060CU) /**< \brief (UART) Interrupt Disable Register */
00059 #define REG_UART_IMR  (*(RoReg*)0x400E0610U) /**< \brief (UART) Interrupt Mask Register */
00060 #define REG_UART_SR   (*(RoReg*)0x400E0614U) /**< \brief (UART) Status Register */
00061 #define REG_UART_RHR  (*(RoReg*)0x400E0618U) /**< \brief (UART) Receive Holding Register */
00062 #define REG_UART_THR  (*(WoReg*)0x400E061CU) /**< \brief (UART) Transmit Holding Register */
00063 #define REG_UART_BRGR (*(RwReg*)0x400E0620U) /**< \brief (UART) Baud Rate Generator Register */
00064 #define REG_UART_RPR  (*(RwReg*)0x400E0700U) /**< \brief (UART) Receive Pointer Register */
00065 #define REG_UART_RCR  (*(RwReg*)0x400E0704U) /**< \brief (UART) Receive Counter Register */
00066 #define REG_UART_TPR  (*(RwReg*)0x400E0708U) /**< \brief (UART) Transmit Pointer Register */
00067 #define REG_UART_TCR  (*(RwReg*)0x400E070CU) /**< \brief (UART) Transmit Counter Register */
00068 #define REG_UART_RNPR (*(RwReg*)0x400E0710U) /**< \brief (UART) Receive Next Pointer Register */
00069 #define REG_UART_RNCR (*(RwReg*)0x400E0714U) /**< \brief (UART) Receive Next Counter Register */
00070 #define REG_UART_TNPR (*(RwReg*)0x400E0718U) /**< \brief (UART) Transmit Next Pointer Register */
00071 #define REG_UART_TNCR (*(RwReg*)0x400E071CU) /**< \brief (UART) Transmit Next Counter Register */
00072 #define REG_UART_PTCR (*(WoReg*)0x400E0720U) /**< \brief (UART) Transfer Control Register */
00073 #define REG_UART_PTSR (*(RoReg*)0x400E0724U) /**< \brief (UART) Transfer Status Register */
00074 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
00075 
00076 #endif /* _SAM3U_UART_INSTANCE_ */