Driver_USART.h

00001 /*
00002  * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
00003  *
00004  * SPDX-License-Identifier: Apache-2.0
00005  *
00006  * Licensed under the Apache License, Version 2.0 (the License); you may
00007  * not use this file except in compliance with the License.
00008  * You may obtain a copy of the License at
00009  *
00010  * www.apache.org/licenses/LICENSE-2.0
00011  *
00012  * Unless required by applicable law or agreed to in writing, software
00013  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
00014  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00015  * See the License for the specific language governing permissions and
00016  * limitations under the License.
00017  *
00018  * $Date:        2. Feb 2017
00019  * $Revision:    V2.3
00020  *
00021  * Project:      USART (Universal Synchronous Asynchronous Receiver Transmitter)
00022  *               Driver definitions
00023  */
00024 
00025 /* History:
00026  *  Version 2.3
00027  *    ARM_USART_STATUS and ARM_USART_MODEM_STATUS made volatile
00028  *  Version 2.2
00029  *    Corrected ARM_USART_CPOL_Pos and ARM_USART_CPHA_Pos definitions 
00030  *  Version 2.1
00031  *    Removed optional argument parameter from Signal Event
00032  *  Version 2.0
00033  *    New simplified driver:
00034  *      complexity moved to upper layer (especially data handling)
00035  *      more unified API for different communication interfaces
00036  *      renamed driver UART -> USART (Asynchronous & Synchronous)
00037  *    Added modes:
00038  *      Synchronous
00039  *      Single-wire
00040  *      IrDA
00041  *      Smart Card  
00042  *    Changed prefix ARM_DRV -> ARM_DRIVER
00043  *  Version 1.10
00044  *    Namespace prefix ARM_ added
00045  *  Version 1.01
00046  *    Added events:
00047  *      ARM_UART_EVENT_TX_EMPTY,     ARM_UART_EVENT_RX_TIMEOUT
00048  *      ARM_UART_EVENT_TX_THRESHOLD, ARM_UART_EVENT_RX_THRESHOLD
00049  *    Added functions: SetTxThreshold, SetRxThreshold
00050  *    Added "rx_timeout_event" to capabilities
00051  *  Version 1.00
00052  *    Initial release
00053  */
00054 
00055 #ifndef DRIVER_USART_H_
00056 #define DRIVER_USART_H_
00057 
00058 #ifdef  __cplusplus
00059 extern "C"
00060 {
00061 #endif
00062 
00063 #include "Driver_Common.h"
00064 
00065 #define ARM_USART_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,3)  /* API version */
00066 
00067 
00068 /****** USART Control Codes *****/
00069 
00070 #define ARM_USART_CONTROL_Pos                0
00071 #define ARM_USART_CONTROL_Msk               (0xFFUL << ARM_USART_CONTROL_Pos)
00072 
00073 /*----- USART Control Codes: Mode -----*/
00074 #define ARM_USART_MODE_ASYNCHRONOUS         (0x01UL << ARM_USART_CONTROL_Pos)   ///< UART (Asynchronous); arg = Baudrate
00075 #define ARM_USART_MODE_SYNCHRONOUS_MASTER   (0x02UL << ARM_USART_CONTROL_Pos)   ///< Synchronous Master (generates clock signal); arg = Baudrate
00076 #define ARM_USART_MODE_SYNCHRONOUS_SLAVE    (0x03UL << ARM_USART_CONTROL_Pos)   ///< Synchronous Slave (external clock signal)
00077 #define ARM_USART_MODE_SINGLE_WIRE          (0x04UL << ARM_USART_CONTROL_Pos)   ///< UART Single-wire (half-duplex); arg = Baudrate
00078 #define ARM_USART_MODE_IRDA                 (0x05UL << ARM_USART_CONTROL_Pos)   ///< UART IrDA; arg = Baudrate
00079 #define ARM_USART_MODE_SMART_CARD           (0x06UL << ARM_USART_CONTROL_Pos)   ///< UART Smart Card; arg = Baudrate
00080 
00081 /*----- USART Control Codes: Mode Parameters: Data Bits -----*/
00082 #define ARM_USART_DATA_BITS_Pos              8
00083 #define ARM_USART_DATA_BITS_Msk             (7UL << ARM_USART_DATA_BITS_Pos)
00084 #define ARM_USART_DATA_BITS_5               (5UL << ARM_USART_DATA_BITS_Pos)    ///< 5 Data bits
00085 #define ARM_USART_DATA_BITS_6               (6UL << ARM_USART_DATA_BITS_Pos)    ///< 6 Data bit
00086 #define ARM_USART_DATA_BITS_7               (7UL << ARM_USART_DATA_BITS_Pos)    ///< 7 Data bits
00087 #define ARM_USART_DATA_BITS_8               (0UL << ARM_USART_DATA_BITS_Pos)    ///< 8 Data bits (default)
00088 #define ARM_USART_DATA_BITS_9               (1UL << ARM_USART_DATA_BITS_Pos)    ///< 9 Data bits
00089 
00090 /*----- USART Control Codes: Mode Parameters: Parity -----*/
00091 #define ARM_USART_PARITY_Pos                 12
00092 #define ARM_USART_PARITY_Msk                (3UL << ARM_USART_PARITY_Pos)
00093 #define ARM_USART_PARITY_NONE               (0UL << ARM_USART_PARITY_Pos)       ///< No Parity (default)
00094 #define ARM_USART_PARITY_EVEN               (1UL << ARM_USART_PARITY_Pos)       ///< Even Parity
00095 #define ARM_USART_PARITY_ODD                (2UL << ARM_USART_PARITY_Pos)       ///< Odd Parity
00096 
00097 /*----- USART Control Codes: Mode Parameters: Stop Bits -----*/
00098 #define ARM_USART_STOP_BITS_Pos              14
00099 #define ARM_USART_STOP_BITS_Msk             (3UL << ARM_USART_STOP_BITS_Pos)
00100 #define ARM_USART_STOP_BITS_1               (0UL << ARM_USART_STOP_BITS_Pos)    ///< 1 Stop bit (default)
00101 #define ARM_USART_STOP_BITS_2               (1UL << ARM_USART_STOP_BITS_Pos)    ///< 2 Stop bits
00102 #define ARM_USART_STOP_BITS_1_5             (2UL << ARM_USART_STOP_BITS_Pos)    ///< 1.5 Stop bits
00103 #define ARM_USART_STOP_BITS_0_5             (3UL << ARM_USART_STOP_BITS_Pos)    ///< 0.5 Stop bits
00104 
00105 /*----- USART Control Codes: Mode Parameters: Flow Control -----*/
00106 #define ARM_USART_FLOW_CONTROL_Pos           16
00107 #define ARM_USART_FLOW_CONTROL_Msk          (3UL << ARM_USART_FLOW_CONTROL_Pos)
00108 #define ARM_USART_FLOW_CONTROL_NONE         (0UL << ARM_USART_FLOW_CONTROL_Pos) ///< No Flow Control (default)
00109 #define ARM_USART_FLOW_CONTROL_RTS          (1UL << ARM_USART_FLOW_CONTROL_Pos) ///< RTS Flow Control
00110 #define ARM_USART_FLOW_CONTROL_CTS          (2UL << ARM_USART_FLOW_CONTROL_Pos) ///< CTS Flow Control
00111 #define ARM_USART_FLOW_CONTROL_RTS_CTS      (3UL << ARM_USART_FLOW_CONTROL_Pos) ///< RTS/CTS Flow Control
00112 
00113 /*----- USART Control Codes: Mode Parameters: Clock Polarity (Synchronous mode) -----*/
00114 #define ARM_USART_CPOL_Pos                   18
00115 #define ARM_USART_CPOL_Msk                  (1UL << ARM_USART_CPOL_Pos)
00116 #define ARM_USART_CPOL0                     (0UL << ARM_USART_CPOL_Pos)         ///< CPOL = 0 (default)
00117 #define ARM_USART_CPOL1                     (1UL << ARM_USART_CPOL_Pos)         ///< CPOL = 1
00118 
00119 /*----- USART Control Codes: Mode Parameters: Clock Phase (Synchronous mode) -----*/
00120 #define ARM_USART_CPHA_Pos                   19
00121 #define ARM_USART_CPHA_Msk                  (1UL << ARM_USART_CPHA_Pos)
00122 #define ARM_USART_CPHA0                     (0UL << ARM_USART_CPHA_Pos)         ///< CPHA = 0 (default)
00123 #define ARM_USART_CPHA1                     (1UL << ARM_USART_CPHA_Pos)         ///< CPHA = 1
00124 
00125 
00126 /*----- USART Control Codes: Miscellaneous Controls  -----*/
00127 #define ARM_USART_SET_DEFAULT_TX_VALUE      (0x10UL << ARM_USART_CONTROL_Pos)   ///< Set default Transmit value (Synchronous Receive only); arg = value
00128 #define ARM_USART_SET_IRDA_PULSE            (0x11UL << ARM_USART_CONTROL_Pos)   ///< Set IrDA Pulse in ns; arg: 0=3/16 of bit period  
00129 #define ARM_USART_SET_SMART_CARD_GUARD_TIME (0x12UL << ARM_USART_CONTROL_Pos)   ///< Set Smart Card Guard Time; arg = number of bit periods
00130 #define ARM_USART_SET_SMART_CARD_CLOCK      (0x13UL << ARM_USART_CONTROL_Pos)   ///< Set Smart Card Clock in Hz; arg: 0=Clock not generated
00131 #define ARM_USART_CONTROL_SMART_CARD_NACK   (0x14UL << ARM_USART_CONTROL_Pos)   ///< Smart Card NACK generation; arg: 0=disabled, 1=enabled
00132 #define ARM_USART_CONTROL_TX                (0x15UL << ARM_USART_CONTROL_Pos)   ///< Transmitter; arg: 0=disabled, 1=enabled
00133 #define ARM_USART_CONTROL_RX                (0x16UL << ARM_USART_CONTROL_Pos)   ///< Receiver; arg: 0=disabled, 1=enabled
00134 #define ARM_USART_CONTROL_BREAK             (0x17UL << ARM_USART_CONTROL_Pos)   ///< Continuous Break transmission; arg: 0=disabled, 1=enabled
00135 #define ARM_USART_ABORT_SEND                (0x18UL << ARM_USART_CONTROL_Pos)   ///< Abort \ref ARM_USART_Send
00136 #define ARM_USART_ABORT_RECEIVE             (0x19UL << ARM_USART_CONTROL_Pos)   ///< Abort \ref ARM_USART_Receive
00137 #define ARM_USART_ABORT_TRANSFER            (0x1AUL << ARM_USART_CONTROL_Pos)   ///< Abort \ref ARM_USART_Transfer
00138 
00139 
00140 
00141 /****** USART specific error codes *****/
00142 #define ARM_USART_ERROR_MODE                (ARM_DRIVER_ERROR_SPECIFIC - 1)     ///< Specified Mode not supported
00143 #define ARM_USART_ERROR_BAUDRATE            (ARM_DRIVER_ERROR_SPECIFIC - 2)     ///< Specified baudrate not supported
00144 #define ARM_USART_ERROR_DATA_BITS           (ARM_DRIVER_ERROR_SPECIFIC - 3)     ///< Specified number of Data bits not supported
00145 #define ARM_USART_ERROR_PARITY              (ARM_DRIVER_ERROR_SPECIFIC - 4)     ///< Specified Parity not supported
00146 #define ARM_USART_ERROR_STOP_BITS           (ARM_DRIVER_ERROR_SPECIFIC - 5)     ///< Specified number of Stop bits not supported
00147 #define ARM_USART_ERROR_FLOW_CONTROL        (ARM_DRIVER_ERROR_SPECIFIC - 6)     ///< Specified Flow Control not supported
00148 #define ARM_USART_ERROR_CPOL                (ARM_DRIVER_ERROR_SPECIFIC - 7)     ///< Specified Clock Polarity not supported
00149 #define ARM_USART_ERROR_CPHA                (ARM_DRIVER_ERROR_SPECIFIC - 8)     ///< Specified Clock Phase not supported
00150 
00151 
00152 /**
00153 \brief USART Status
00154 */
00155 typedef volatile struct _ARM_USART_STATUS {
00156   uint32_t tx_busy          : 1;        ///< Transmitter busy flag
00157   uint32_t rx_busy          : 1;        ///< Receiver busy flag
00158   uint32_t tx_underflow     : 1;        ///< Transmit data underflow detected (cleared on start of next send operation)
00159   uint32_t rx_overflow      : 1;        ///< Receive data overflow detected (cleared on start of next receive operation)
00160   uint32_t rx_break         : 1;        ///< Break detected on receive (cleared on start of next receive operation)
00161   uint32_t rx_framing_error : 1;        ///< Framing error detected on receive (cleared on start of next receive operation)
00162   uint32_t rx_parity_error  : 1;        ///< Parity error detected on receive (cleared on start of next receive operation)
00163   uint32_t reserved         : 25;
00164 } ARM_USART_STATUS;
00165 
00166 /**
00167 \brief USART Modem Control
00168 */
00169 typedef enum _ARM_USART_MODEM_CONTROL {
00170   ARM_USART_RTS_CLEAR,                  ///< Deactivate RTS
00171   ARM_USART_RTS_SET,                    ///< Activate RTS
00172   ARM_USART_DTR_CLEAR,                  ///< Deactivate DTR
00173   ARM_USART_DTR_SET                     ///< Activate DTR
00174 } ARM_USART_MODEM_CONTROL;
00175 
00176 /**
00177 \brief USART Modem Status
00178 */
00179 typedef volatile struct _ARM_USART_MODEM_STATUS {
00180   uint32_t cts      : 1;                ///< CTS state: 1=Active, 0=Inactive
00181   uint32_t dsr      : 1;                ///< DSR state: 1=Active, 0=Inactive
00182   uint32_t dcd      : 1;                ///< DCD state: 1=Active, 0=Inactive
00183   uint32_t ri       : 1;                ///< RI  state: 1=Active, 0=Inactive
00184   uint32_t reserved : 28;
00185 } ARM_USART_MODEM_STATUS;
00186 
00187 
00188 /****** USART Event *****/
00189 #define ARM_USART_EVENT_SEND_COMPLETE       (1UL << 0)  ///< Send completed; however USART may still transmit data
00190 #define ARM_USART_EVENT_RECEIVE_COMPLETE    (1UL << 1)  ///< Receive completed
00191 #define ARM_USART_EVENT_TRANSFER_COMPLETE   (1UL << 2)  ///< Transfer completed
00192 #define ARM_USART_EVENT_TX_COMPLETE         (1UL << 3)  ///< Transmit completed (optional)
00193 #define ARM_USART_EVENT_TX_UNDERFLOW        (1UL << 4)  ///< Transmit data not available (Synchronous Slave)
00194 #define ARM_USART_EVENT_RX_OVERFLOW         (1UL << 5)  ///< Receive data overflow
00195 #define ARM_USART_EVENT_RX_TIMEOUT          (1UL << 6)  ///< Receive character timeout (optional)
00196 #define ARM_USART_EVENT_RX_BREAK            (1UL << 7)  ///< Break detected on receive
00197 #define ARM_USART_EVENT_RX_FRAMING_ERROR    (1UL << 8)  ///< Framing error detected on receive
00198 #define ARM_USART_EVENT_RX_PARITY_ERROR     (1UL << 9)  ///< Parity error detected on receive
00199 #define ARM_USART_EVENT_CTS                 (1UL << 10) ///< CTS state changed (optional)
00200 #define ARM_USART_EVENT_DSR                 (1UL << 11) ///< DSR state changed (optional)
00201 #define ARM_USART_EVENT_DCD                 (1UL << 12) ///< DCD state changed (optional)
00202 #define ARM_USART_EVENT_RI                  (1UL << 13) ///< RI  state changed (optional)
00203 
00204 
00205 // Function documentation
00206 /**
00207   \fn          ARM_DRIVER_VERSION ARM_USART_GetVersion (void)
00208   \brief       Get driver version.
00209   \return      \ref ARM_DRIVER_VERSION
00210 
00211   \fn          ARM_USART_CAPABILITIES ARM_USART_GetCapabilities (void)
00212   \brief       Get driver capabilities
00213   \return      \ref ARM_USART_CAPABILITIES
00214 
00215   \fn          int32_t ARM_USART_Initialize (ARM_USART_SignalEvent_t cb_event)
00216   \brief       Initialize USART Interface.
00217   \param[in]   cb_event  Pointer to \ref ARM_USART_SignalEvent
00218   \return      \ref execution_status
00219 
00220   \fn          int32_t ARM_USART_Uninitialize (void)
00221   \brief       De-initialize USART Interface.
00222   \return      \ref execution_status
00223 
00224   \fn          int32_t ARM_USART_PowerControl (ARM_POWER_STATE state)
00225   \brief       Control USART Interface Power.
00226   \param[in]   state  Power state
00227   \return      \ref execution_status
00228 
00229   \fn          int32_t ARM_USART_Send (const void *data, uint32_t num)
00230   \brief       Start sending data to USART transmitter.
00231   \param[in]   data  Pointer to buffer with data to send to USART transmitter
00232   \param[in]   num   Number of data items to send
00233   \return      \ref execution_status
00234 
00235   \fn          int32_t ARM_USART_Receive (void *data, uint32_t num)
00236   \brief       Start receiving data from USART receiver.
00237   \param[out]  data  Pointer to buffer for data to receive from USART receiver
00238   \param[in]   num   Number of data items to receive
00239   \return      \ref execution_status
00240 
00241   \fn          int32_t ARM_USART_Transfer (const void *data_out,
00242                                                  void *data_in,
00243                                            uint32_t    num)
00244   \brief       Start sending/receiving data to/from USART transmitter/receiver.
00245   \param[in]   data_out  Pointer to buffer with data to send to USART transmitter
00246   \param[out]  data_in   Pointer to buffer for data to receive from USART receiver
00247   \param[in]   num       Number of data items to transfer
00248   \return      \ref execution_status
00249 
00250   \fn          uint32_t ARM_USART_GetTxCount (void)
00251   \brief       Get transmitted data count.
00252   \return      number of data items transmitted
00253 
00254   \fn          uint32_t ARM_USART_GetRxCount (void)
00255   \brief       Get received data count.
00256   \return      number of data items received
00257 
00258   \fn          int32_t ARM_USART_Control (uint32_t control, uint32_t arg)
00259   \brief       Control USART Interface.
00260   \param[in]   control  Operation
00261   \param[in]   arg      Argument of operation (optional)
00262   \return      common \ref execution_status and driver specific \ref usart_execution_status
00263 
00264   \fn          ARM_USART_STATUS ARM_USART_GetStatus (void)
00265   \brief       Get USART status.
00266   \return      USART status \ref ARM_USART_STATUS
00267 
00268   \fn          int32_t ARM_USART_SetModemControl (ARM_USART_MODEM_CONTROL control)
00269   \brief       Set USART Modem Control line state.
00270   \param[in]   control  \ref ARM_USART_MODEM_CONTROL
00271   \return      \ref execution_status 
00272 
00273   \fn          ARM_USART_MODEM_STATUS ARM_USART_GetModemStatus (void)
00274   \brief       Get USART Modem Status lines state.
00275   \return      modem status \ref ARM_USART_MODEM_STATUS
00276 
00277   \fn          void ARM_USART_SignalEvent (uint32_t event)
00278   \brief       Signal USART Events.
00279   \param[in]   event  \ref USART_events notification mask
00280   \return      none
00281 */
00282 
00283 typedef void (*ARM_USART_SignalEvent_t) (uint32_t event);  ///< Pointer to \ref ARM_USART_SignalEvent : Signal USART Event.
00284 
00285 
00286 /**
00287 \brief USART Device Driver Capabilities.
00288 */
00289 typedef struct _ARM_USART_CAPABILITIES {
00290   uint32_t asynchronous       : 1;      ///< supports UART (Asynchronous) mode 
00291   uint32_t synchronous_master : 1;      ///< supports Synchronous Master mode
00292   uint32_t synchronous_slave  : 1;      ///< supports Synchronous Slave mode
00293   uint32_t single_wire        : 1;      ///< supports UART Single-wire mode
00294   uint32_t irda               : 1;      ///< supports UART IrDA mode
00295   uint32_t smart_card         : 1;      ///< supports UART Smart Card mode
00296   uint32_t smart_card_clock   : 1;      ///< Smart Card Clock generator available
00297   uint32_t flow_control_rts   : 1;      ///< RTS Flow Control available
00298   uint32_t flow_control_cts   : 1;      ///< CTS Flow Control available
00299   uint32_t event_tx_complete  : 1;      ///< Transmit completed event: \ref ARM_USART_EVENT_TX_COMPLETE
00300   uint32_t event_rx_timeout   : 1;      ///< Signal receive character timeout event: \ref ARM_USART_EVENT_RX_TIMEOUT
00301   uint32_t rts                : 1;      ///< RTS Line: 0=not available, 1=available
00302   uint32_t cts                : 1;      ///< CTS Line: 0=not available, 1=available
00303   uint32_t dtr                : 1;      ///< DTR Line: 0=not available, 1=available
00304   uint32_t dsr                : 1;      ///< DSR Line: 0=not available, 1=available
00305   uint32_t dcd                : 1;      ///< DCD Line: 0=not available, 1=available
00306   uint32_t ri                 : 1;      ///< RI Line: 0=not available, 1=available
00307   uint32_t event_cts          : 1;      ///< Signal CTS change event: \ref ARM_USART_EVENT_CTS
00308   uint32_t event_dsr          : 1;      ///< Signal DSR change event: \ref ARM_USART_EVENT_DSR
00309   uint32_t event_dcd          : 1;      ///< Signal DCD change event: \ref ARM_USART_EVENT_DCD
00310   uint32_t event_ri           : 1;      ///< Signal RI change event: \ref ARM_USART_EVENT_RI
00311   uint32_t reserved           : 11;     ///< Reserved (must be zero)
00312 } ARM_USART_CAPABILITIES;
00313 
00314 
00315 /**
00316 \brief Access structure of the USART Driver.
00317 */
00318 typedef struct _ARM_DRIVER_USART {
00319   ARM_DRIVER_VERSION     (*GetVersion)      (void);                              ///< Pointer to \ref ARM_USART_GetVersion : Get driver version.
00320   ARM_USART_CAPABILITIES (*GetCapabilities) (void);                              ///< Pointer to \ref ARM_USART_GetCapabilities : Get driver capabilities.
00321   int32_t                (*Initialize)      (ARM_USART_SignalEvent_t cb_event);  ///< Pointer to \ref ARM_USART_Initialize : Initialize USART Interface.
00322   int32_t                (*Uninitialize)    (void);                              ///< Pointer to \ref ARM_USART_Uninitialize : De-initialize USART Interface.
00323   int32_t                (*PowerControl)    (ARM_POWER_STATE state);             ///< Pointer to \ref ARM_USART_PowerControl : Control USART Interface Power.
00324   int32_t                (*Send)            (const void *data, uint32_t num);    ///< Pointer to \ref ARM_USART_Send : Start sending data to USART transmitter.
00325   int32_t                (*Receive)         (      void *data, uint32_t num);    ///< Pointer to \ref ARM_USART_Receive : Start receiving data from USART receiver.
00326   int32_t                (*Transfer)        (const void *data_out,
00327                                                    void *data_in,
00328                                              uint32_t    num);                   ///< Pointer to \ref ARM_USART_Transfer : Start sending/receiving data to/from USART.
00329   uint32_t               (*GetTxCount)      (void);                              ///< Pointer to \ref ARM_USART_GetTxCount : Get transmitted data count.
00330   uint32_t               (*GetRxCount)      (void);                              ///< Pointer to \ref ARM_USART_GetRxCount : Get received data count.
00331   int32_t                (*Control)         (uint32_t control, uint32_t arg);    ///< Pointer to \ref ARM_USART_Control : Control USART Interface.
00332   ARM_USART_STATUS       (*GetStatus)       (void);                              ///< Pointer to \ref ARM_USART_GetStatus : Get USART status.
00333   int32_t                (*SetModemControl) (ARM_USART_MODEM_CONTROL control);   ///< Pointer to \ref ARM_USART_SetModemControl : Set USART Modem Control line state.
00334   ARM_USART_MODEM_STATUS (*GetModemStatus)  (void);                              ///< Pointer to \ref ARM_USART_GetModemStatus : Get USART Modem Status lines state.
00335 } const ARM_DRIVER_USART;
00336 
00337 #ifdef  __cplusplus
00338 }
00339 #endif
00340 
00341 #endif /* DRIVER_USART_H_ */