Analog Devices / mbed-drivers

A collection of Analog Devices drivers for the mbed platform

For additional information check out the mbed page of the Analog Devices wiki: https://wiki.analog.com/resources/tools-software/mbed-drivers-all

libraries/ADXL362/ADXL362.h@24:dae7123d432a, 2016-05-18 (annotated)

Committer:
Adrian Suciu
Date:
Wed May 18 16:57:57 2016 +0300
Revision:
24:dae7123d432a
Child:
29:c693bdaac786
Improved compatibility with Linux systems

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Adrian Suciu 24:dae7123d432a 1 #ifndef ADXL362_H_
Adrian Suciu 24:dae7123d432a 2 #define ADXL362_H_
Adrian Suciu 24:dae7123d432a 3
Adrian Suciu 24:dae7123d432a 4 /**
Adrian Suciu 24:dae7123d432a 5 * @file ADXL362.cpp
Adrian Suciu 24:dae7123d432a 6 * @brief Header file for ADXL362
Adrian Suciu 24:dae7123d432a 7 * @author Analog Devices Inc.
Adrian Suciu 24:dae7123d432a 8 *
Adrian Suciu 24:dae7123d432a 9 * For support please go to:
Adrian Suciu 24:dae7123d432a 10 * Github: https://github.com/analogdevicesinc/mbed-adi
Adrian Suciu 24:dae7123d432a 11 * Support: https://ez.analog.com/community/linux-device-drivers/microcontroller-no-os-drivers
Adrian Suciu 24:dae7123d432a 12 * Product: http://www.analog.com/adxl362
Adrian Suciu 24:dae7123d432a 13 * More: https://wiki.analog.com/resources/tools-software/mbed-drivers-all
Adrian Suciu 24:dae7123d432a 14
Adrian Suciu 24:dae7123d432a 15 ********************************************************************************
Adrian Suciu 24:dae7123d432a 16 * Copyright 2016(c) Analog Devices, Inc.
Adrian Suciu 24:dae7123d432a 17 *
Adrian Suciu 24:dae7123d432a 18 * All rights reserved.
Adrian Suciu 24:dae7123d432a 19 *
Adrian Suciu 24:dae7123d432a 20 * Redistribution and use in source and binary forms, with or without
Adrian Suciu 24:dae7123d432a 21 * modification, are permitted provided that the following conditions are met:
Adrian Suciu 24:dae7123d432a 22 * - Redistributions of source code must retain the above copyright
Adrian Suciu 24:dae7123d432a 23 * notice, this list of conditions and the following disclaimer.
Adrian Suciu 24:dae7123d432a 24 * - Redistributions in binary form must reproduce the above copyright
Adrian Suciu 24:dae7123d432a 25 * notice, this list of conditions and the following disclaimer in
Adrian Suciu 24:dae7123d432a 26 * the documentation and/or other materials provided with the
Adrian Suciu 24:dae7123d432a 27 * distribution.
Adrian Suciu 24:dae7123d432a 28 * - Neither the name of Analog Devices, Inc. nor the names of its
Adrian Suciu 24:dae7123d432a 29 * contributors may be used to endorse or promote products derived
Adrian Suciu 24:dae7123d432a 30 * from this software without specific prior written permission.
Adrian Suciu 24:dae7123d432a 31 * - The use of this software may or may not infringe the patent rights
Adrian Suciu 24:dae7123d432a 32 * of one or more patent holders. This license does not release you
Adrian Suciu 24:dae7123d432a 33 * from the requirement that you obtain separate licenses from these
Adrian Suciu 24:dae7123d432a 34 * patent holders to use this software.
Adrian Suciu 24:dae7123d432a 35 * - Use of the software either in source or binary form, must be run
Adrian Suciu 24:dae7123d432a 36 * on or directly connected to an Analog Devices Inc. component.
Adrian Suciu 24:dae7123d432a 37 *
Adrian Suciu 24:dae7123d432a 38 * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
Adrian Suciu 24:dae7123d432a 39 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
Adrian Suciu 24:dae7123d432a 40 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
Adrian Suciu 24:dae7123d432a 41 * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
Adrian Suciu 24:dae7123d432a 42 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
Adrian Suciu 24:dae7123d432a 43 * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
Adrian Suciu 24:dae7123d432a 44 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Adrian Suciu 24:dae7123d432a 45 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Adrian Suciu 24:dae7123d432a 46 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Adrian Suciu 24:dae7123d432a 47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Adrian Suciu 24:dae7123d432a 48 *
Adrian Suciu 24:dae7123d432a 49 ********************************************************************************/
Adrian Suciu 24:dae7123d432a 50
Adrian Suciu 24:dae7123d432a 51 #include "mbed.h"
Adrian Suciu 24:dae7123d432a 52
Adrian Suciu 24:dae7123d432a 53 class ADXL362
Adrian Suciu 24:dae7123d432a 54 {
Adrian Suciu 24:dae7123d432a 55 public:
Adrian Suciu 24:dae7123d432a 56
Adrian Suciu 24:dae7123d432a 57 /* Temperature parameters */
Adrian Suciu 24:dae7123d432a 58 typedef enum {
Adrian Suciu 24:dae7123d432a 59 DEVID_AD = 0x00,
Adrian Suciu 24:dae7123d432a 60 DEVID_MST = 0x01,
Adrian Suciu 24:dae7123d432a 61 PARTID = 0x02,
Adrian Suciu 24:dae7123d432a 62 REVID = 0x03,
Adrian Suciu 24:dae7123d432a 63 XDATA = 0x08,
Adrian Suciu 24:dae7123d432a 64 YDATA = 0x09,
Adrian Suciu 24:dae7123d432a 65 ZDATA = 0x0A,
Adrian Suciu 24:dae7123d432a 66 STATUS = 0x0B,
Adrian Suciu 24:dae7123d432a 67 FIFO_ENTRIES_L = 0x0C,
Adrian Suciu 24:dae7123d432a 68 FIFO_ENTRIES_H = 0x0D,
Adrian Suciu 24:dae7123d432a 69 XDATA_L = 0x0E,
Adrian Suciu 24:dae7123d432a 70 XDATA_H = 0x0F,
Adrian Suciu 24:dae7123d432a 71 YDATA_L = 0x10,
Adrian Suciu 24:dae7123d432a 72 YDATA_H = 0x11,
Adrian Suciu 24:dae7123d432a 73 ZDATA_L = 0x12,
Adrian Suciu 24:dae7123d432a 74 ZDATA_H = 0x13,
Adrian Suciu 24:dae7123d432a 75 TEMP_L = 0x14,
Adrian Suciu 24:dae7123d432a 76 TEMP_H = 0x15,
Adrian Suciu 24:dae7123d432a 77 // Reserved = 0x16;
Adrian Suciu 24:dae7123d432a 78 // Reserved = 0x17;
Adrian Suciu 24:dae7123d432a 79 SOFT_RESET = 0x1F,
Adrian Suciu 24:dae7123d432a 80 THRESH_ACT_L = 0x20,
Adrian Suciu 24:dae7123d432a 81 THRESH_ACT_H = 0x21,
Adrian Suciu 24:dae7123d432a 82 TIME_ACT = 0x22,
Adrian Suciu 24:dae7123d432a 83 THRESH_INACT_L = 0x23,
Adrian Suciu 24:dae7123d432a 84 THRESH_INACT_H = 0x24,
Adrian Suciu 24:dae7123d432a 85 TIME_INACT_L = 0x25,
Adrian Suciu 24:dae7123d432a 86 TIME_INACT_H = 0x26,
Adrian Suciu 24:dae7123d432a 87 ACT_INACT_CTL = 0x27,
Adrian Suciu 24:dae7123d432a 88 FIFO_CONTROL = 0x28,
Adrian Suciu 24:dae7123d432a 89 FIFO_SAMPLES = 0x29,
Adrian Suciu 24:dae7123d432a 90 INTMAP1 = 0x2A,
Adrian Suciu 24:dae7123d432a 91 INTMAP2 = 0x2B,
Adrian Suciu 24:dae7123d432a 92 FILTER_CTL = 0x2C,
Adrian Suciu 24:dae7123d432a 93 POWER_CTL = 0x2D,
Adrian Suciu 24:dae7123d432a 94 SELF_TEST = 0x2E,
Adrian Suciu 24:dae7123d432a 95 } ADXL362_register_t;
Adrian Suciu 24:dae7123d432a 96
Adrian Suciu 24:dae7123d432a 97 typedef enum {
Adrian Suciu 24:dae7123d432a 98 STANDBY = 0x00,
Adrian Suciu 24:dae7123d432a 99 MEASUREMENT = 0x02
Adrian Suciu 24:dae7123d432a 100 } ADXL362_modes_t;
Adrian Suciu 24:dae7123d432a 101
Adrian Suciu 24:dae7123d432a 102 typedef enum {
Adrian Suciu 24:dae7123d432a 103 ERR_USER_REGS = 0x80,
Adrian Suciu 24:dae7123d432a 104 AWAKE = 0x40,
Adrian Suciu 24:dae7123d432a 105 INACT = 0x20,
Adrian Suciu 24:dae7123d432a 106 ACT = 0x10,
Adrian Suciu 24:dae7123d432a 107 FIFO_OVERRUN = 0x08,
Adrian Suciu 24:dae7123d432a 108 FIFO_WATERMARK = 0x04,
Adrian Suciu 24:dae7123d432a 109 FIFO_READY = 0x02,
Adrian Suciu 24:dae7123d432a 110 DATA_READY = 0x01
Adrian Suciu 24:dae7123d432a 111 } ADXL362_STATUS_reg_bits_t;
Adrian Suciu 24:dae7123d432a 112
Adrian Suciu 24:dae7123d432a 113 typedef enum {
Adrian Suciu 24:dae7123d432a 114 LINKLOOP1 = 0x20,
Adrian Suciu 24:dae7123d432a 115 LINKLOOP0 = 0x10,
Adrian Suciu 24:dae7123d432a 116 DEFAULTMODE = 0x00,
Adrian Suciu 24:dae7123d432a 117 LINKED_MODE = 0x10,
Adrian Suciu 24:dae7123d432a 118 LOOP_MODE = 0x30,
Adrian Suciu 24:dae7123d432a 119 INACT_REF = 0x08,
Adrian Suciu 24:dae7123d432a 120 INACT_EN = 0x04,
Adrian Suciu 24:dae7123d432a 121 ACT_REF = 0x02,
Adrian Suciu 24:dae7123d432a 122 ACT_EN = 0x01
Adrian Suciu 24:dae7123d432a 123 } ADXL362_ACT_INACT_CTL_reg_bits_t;
Adrian Suciu 24:dae7123d432a 124
Adrian Suciu 24:dae7123d432a 125 typedef enum {
Adrian Suciu 24:dae7123d432a 126 AH = 0x08,
Adrian Suciu 24:dae7123d432a 127 FIFO_TEMP = 0x04,
Adrian Suciu 24:dae7123d432a 128 FIFO_MODE1 = 0x02,
Adrian Suciu 24:dae7123d432a 129 FIFO_MODE = 0x01,
Adrian Suciu 24:dae7123d432a 130 } ADXL362_FIFO_CONTROL_reg_bits_t;
Adrian Suciu 24:dae7123d432a 131
Adrian Suciu 24:dae7123d432a 132 typedef enum {
Adrian Suciu 24:dae7123d432a 133 FIFO_DISABLED = 0x00,
Adrian Suciu 24:dae7123d432a 134 FIFO_OLDEST = 0x01,
Adrian Suciu 24:dae7123d432a 135 FIFO_STREAM = 0x02,
Adrian Suciu 24:dae7123d432a 136 FIFO_TRIGGERED = 0x03,
Adrian Suciu 24:dae7123d432a 137 } ADXL362_FIFO_modes_t;
Adrian Suciu 24:dae7123d432a 138
Adrian Suciu 24:dae7123d432a 139 typedef enum {
Adrian Suciu 24:dae7123d432a 140 INT_LOW = 0x80,
Adrian Suciu 24:dae7123d432a 141 INT_AWAKE = 0x40,
Adrian Suciu 24:dae7123d432a 142 INT_INACT = 0x20,
Adrian Suciu 24:dae7123d432a 143 INT_ACT = 0x10,
Adrian Suciu 24:dae7123d432a 144 INT_FIFO_OVERRUN = 0x08,
Adrian Suciu 24:dae7123d432a 145 INT_FIFO_WATERMARK = 0x04,
Adrian Suciu 24:dae7123d432a 146 INT_FIFO_READY = 0x02,
Adrian Suciu 24:dae7123d432a 147 INT_DATA_READY = 0x01
Adrian Suciu 24:dae7123d432a 148 } ADXL362_INTMAP_reg_bits_t;
Adrian Suciu 24:dae7123d432a 149
Adrian Suciu 24:dae7123d432a 150 typedef enum {
Adrian Suciu 24:dae7123d432a 151 RANGE1 = 0x80,
Adrian Suciu 24:dae7123d432a 152 RANGE0 = 0x40,
Adrian Suciu 24:dae7123d432a 153 RANGE2G = 0x00,
Adrian Suciu 24:dae7123d432a 154 RANGE4G = 0x40,
Adrian Suciu 24:dae7123d432a 155 RANGE8G = 0x80,
Adrian Suciu 24:dae7123d432a 156 HALF_BW = 0x10,
Adrian Suciu 24:dae7123d432a 157 EXT_SAMPLE = 0x08,
Adrian Suciu 24:dae7123d432a 158 ODR2 = 0x04,
Adrian Suciu 24:dae7123d432a 159 ODR1 = 0x02,
Adrian Suciu 24:dae7123d432a 160 ODR0 = 0x01,
Adrian Suciu 24:dae7123d432a 161 ODR12HZ = 0x00,
Adrian Suciu 24:dae7123d432a 162 ODR25HZ = 0x01,
Adrian Suciu 24:dae7123d432a 163 ODR50Hz = 0x02,
Adrian Suciu 24:dae7123d432a 164 ODR100HZ = 0x03,
Adrian Suciu 24:dae7123d432a 165 ODR200Hz = 0x04,
Adrian Suciu 24:dae7123d432a 166 ODR400HZ = 0x07
Adrian Suciu 24:dae7123d432a 167 } ADXL362_FILTER_CTL_reg_bits_t;
Adrian Suciu 24:dae7123d432a 168
Adrian Suciu 24:dae7123d432a 169 typedef enum {
Adrian Suciu 24:dae7123d432a 170 EXT_CLK = 0x40,
Adrian Suciu 24:dae7123d432a 171 LOW_NOISE1 = 0x20,
Adrian Suciu 24:dae7123d432a 172 LOW_NOISE0 = 0x10,
Adrian Suciu 24:dae7123d432a 173 NORMAL_OPERATION = 0x00,
Adrian Suciu 24:dae7123d432a 174 LOW_NOISE = 0x10,
Adrian Suciu 24:dae7123d432a 175 ULTRALOW_NOISE = 0x20,
Adrian Suciu 24:dae7123d432a 176 WAKEUP = 0x08,
Adrian Suciu 24:dae7123d432a 177 AUTOSLEEP = 0x04,
Adrian Suciu 24:dae7123d432a 178 MEASURE1 = 0x02,
Adrian Suciu 24:dae7123d432a 179 MEASURE0 = 0x01,
Adrian Suciu 24:dae7123d432a 180 } ADXL362_POWER_CTL_reg_bits_t;
Adrian Suciu 24:dae7123d432a 181
Adrian Suciu 24:dae7123d432a 182 /** SPI configuration & constructor */
Adrian Suciu 24:dae7123d432a 183 ADXL362(PinName CS = SPI_CS, PinName MOSI = SPI_MOSI, PinName MISO =
Adrian Suciu 24:dae7123d432a 184 SPI_MISO, PinName SCK = SPI_SCK);
Adrian Suciu 24:dae7123d432a 185 void frequency(int hz);
Adrian Suciu 24:dae7123d432a 186
Adrian Suciu 24:dae7123d432a 187 /** Low level SPI bus comm methods */
Adrian Suciu 24:dae7123d432a 188 void reset(void);
Adrian Suciu 24:dae7123d432a 189 void write_reg(ADXL362_register_t reg, uint8_t data);
Adrian Suciu 24:dae7123d432a 190 uint8_t read_reg(ADXL362_register_t reg);
Adrian Suciu 24:dae7123d432a 191 uint16_t read_reg_u16(ADXL362_register_t reg);
Adrian Suciu 24:dae7123d432a 192 void write_reg_u16(ADXL362_register_t reg, uint16_t data);
Adrian Suciu 24:dae7123d432a 193
Adrian Suciu 24:dae7123d432a 194 /** ADXL general register R/W methods */
Adrian Suciu 24:dae7123d432a 195 void set_power_ctl_reg(uint8_t data);
Adrian Suciu 24:dae7123d432a 196 void set_filter_ctl_reg(uint8_t data);
Adrian Suciu 24:dae7123d432a 197 uint8_t read_status();
Adrian Suciu 24:dae7123d432a 198 void set_mode(ADXL362_modes_t mode);
Adrian Suciu 24:dae7123d432a 199
Adrian Suciu 24:dae7123d432a 200 /** ADXL X/Y/Z/T scanning methods*/
Adrian Suciu 24:dae7123d432a 201 uint64_t scan();
Adrian Suciu 24:dae7123d432a 202 uint8_t scanx_u8();
Adrian Suciu 24:dae7123d432a 203 uint16_t scanx();
Adrian Suciu 24:dae7123d432a 204 uint8_t scany_u8();
Adrian Suciu 24:dae7123d432a 205 uint16_t scany();
Adrian Suciu 24:dae7123d432a 206 uint8_t scanz_u8();
Adrian Suciu 24:dae7123d432a 207 uint16_t scanz();
Adrian Suciu 24:dae7123d432a 208 uint16_t scant();
Adrian Suciu 24:dae7123d432a 209
Adrian Suciu 24:dae7123d432a 210 /** ADXL362 activity methods */
Adrian Suciu 24:dae7123d432a 211 void set_activity_threshold(uint16_t threshold);
Adrian Suciu 24:dae7123d432a 212 void set_activity_time(uint8_t time);
Adrian Suciu 24:dae7123d432a 213 void set_inactivity_threshold(uint16_t threshold);
Adrian Suciu 24:dae7123d432a 214 void set_inactivity_time(uint16_t time);
Adrian Suciu 24:dae7123d432a 215 void set_act_inact_ctl_reg(uint8_t data);
Adrian Suciu 24:dae7123d432a 216
Adrian Suciu 24:dae7123d432a 217 /** ADXL362 interrupt methods */
Adrian Suciu 24:dae7123d432a 218 void set_interrupt1_pin(PinName in, uint8_t data, void (*callback_rising)(void), void (*callback_falling)(void), PinMode pull = PullNone);
Adrian Suciu 24:dae7123d432a 219 void set_interrupt2_pin(PinName in, uint8_t data, void (*callback_rising)(void), void (*callback_falling)(void), PinMode pull = PullNone);
Adrian Suciu 24:dae7123d432a 220 void enable_interrupt1();
Adrian Suciu 24:dae7123d432a 221 void enable_interrupt2();
Adrian Suciu 24:dae7123d432a 222 void disable_interrupt1();
Adrian Suciu 24:dae7123d432a 223 void disable_interrupt2();
Adrian Suciu 24:dae7123d432a 224
Adrian Suciu 24:dae7123d432a 225 void set_polling_interrupt1_pin(PinName in, uint8_t data, PinMode pull = PullNone);
Adrian Suciu 24:dae7123d432a 226 void set_polling_interrupt2_pin(PinName in, uint8_t data, PinMode pull = PullNone);
Adrian Suciu 24:dae7123d432a 227
Adrian Suciu 24:dae7123d432a 228 bool get_int1();
Adrian Suciu 24:dae7123d432a 229 bool get_int2();
Adrian Suciu 24:dae7123d432a 230
Adrian Suciu 24:dae7123d432a 231 /** ADXL362 FIFO methods */
Adrian Suciu 24:dae7123d432a 232 uint16_t fifo_read_nr_of_entries();
Adrian Suciu 24:dae7123d432a 233 void fifo_setup(bool store_temp, ADXL362_FIFO_modes_t mode, uint16_t nr_of_entries);
Adrian Suciu 24:dae7123d432a 234 uint16_t fifo_read_u16();
Adrian Suciu 24:dae7123d432a 235 uint64_t fifo_scan();
Adrian Suciu 24:dae7123d432a 236
Adrian Suciu 24:dae7123d432a 237 SPI adxl362; ///< SPI instance of the ADXL362
Adrian Suciu 24:dae7123d432a 238 DigitalOut cs; ///< DigitalOut instance for the chipselect of the ADXL362
Adrian Suciu 24:dae7123d432a 239
Adrian Suciu 24:dae7123d432a 240 private:
Adrian Suciu 24:dae7123d432a 241
Adrian Suciu 24:dae7123d432a 242 InterruptIn *_int1;
Adrian Suciu 24:dae7123d432a 243 InterruptIn *_int2;
Adrian Suciu 24:dae7123d432a 244 DigitalIn _int1_poll;
Adrian Suciu 24:dae7123d432a 245 DigitalIn _int2_poll;
Adrian Suciu 24:dae7123d432a 246 bool _int1_act_low;
Adrian Suciu 24:dae7123d432a 247 bool _int2_act_low;
Adrian Suciu 24:dae7123d432a 248 bool _temp_stored_in_fifo;
Adrian Suciu 24:dae7123d432a 249
Adrian Suciu 24:dae7123d432a 250 const static uint8_t _DUMMY_BYTE = 0xAA;
Adrian Suciu 24:dae7123d432a 251 const static uint8_t _WRITE_REG_CMD = 0x0A; // write register
Adrian Suciu 24:dae7123d432a 252 const static uint8_t _READ_REG_CMD = 0x0B; // read register
Adrian Suciu 24:dae7123d432a 253 const static uint8_t _READ_FIFO_CMD = 0x0D; // read FIFO
Adrian Suciu 24:dae7123d432a 254 const static uint8_t _SPI_MODE = 0;
Adrian Suciu 24:dae7123d432a 255 };
Adrian Suciu 24:dae7123d432a 256
Adrian Suciu 24:dae7123d432a 257 #endif