Analog Devices / Mbed OS EVAL-AD4130

Example program for EVAL-AD4130

Dependencies:   tempsensors sdp_k1_sdram

app/app_config.c@2:7b2b268ea49c, 22 months ago (annotated)

Committer:
Mahesh Phalke
Date:
Wed Jul 20 18:12:00 2022 +0530
Revision:
2:7b2b268ea49c
Initial firmware commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Mahesh Phalke 2:7b2b268ea49c 1 /***************************************************************************//**
Mahesh Phalke 2:7b2b268ea49c 2 * @file app_config.c
Mahesh Phalke 2:7b2b268ea49c 3 * @brief Application configurations module
Mahesh Phalke 2:7b2b268ea49c 4 * @details This module contains the configurations needed for IIO application
Mahesh Phalke 2:7b2b268ea49c 5 ********************************************************************************
Mahesh Phalke 2:7b2b268ea49c 6 * Copyright (c) 2020-2022 Analog Devices, Inc.
Mahesh Phalke 2:7b2b268ea49c 7 *
Mahesh Phalke 2:7b2b268ea49c 8 * This software is proprietary to Analog Devices, Inc. and its licensors.
Mahesh Phalke 2:7b2b268ea49c 9 * By using this software you agree to the terms of the associated
Mahesh Phalke 2:7b2b268ea49c 10 * Analog Devices Software License Agreement.
Mahesh Phalke 2:7b2b268ea49c 11 *******************************************************************************/
Mahesh Phalke 2:7b2b268ea49c 12
Mahesh Phalke 2:7b2b268ea49c 13 /******************************************************************************/
Mahesh Phalke 2:7b2b268ea49c 14 /***************************** Include Files **********************************/
Mahesh Phalke 2:7b2b268ea49c 15 /******************************************************************************/
Mahesh Phalke 2:7b2b268ea49c 16
Mahesh Phalke 2:7b2b268ea49c 17 #include <stdbool.h>
Mahesh Phalke 2:7b2b268ea49c 18
Mahesh Phalke 2:7b2b268ea49c 19 #include "app_config.h"
Mahesh Phalke 2:7b2b268ea49c 20 #include "ad4130_data_capture.h"
Mahesh Phalke 2:7b2b268ea49c 21 #include "no_os_error.h"
Mahesh Phalke 2:7b2b268ea49c 22 #include "no_os_uart.h"
Mahesh Phalke 2:7b2b268ea49c 23 #include "no_os_irq.h"
Mahesh Phalke 2:7b2b268ea49c 24 #include "no_os_gpio.h"
Mahesh Phalke 2:7b2b268ea49c 25
Mahesh Phalke 2:7b2b268ea49c 26 /******************************************************************************/
Mahesh Phalke 2:7b2b268ea49c 27 /************************ Macros/Constants ************************************/
Mahesh Phalke 2:7b2b268ea49c 28 /******************************************************************************/
Mahesh Phalke 2:7b2b268ea49c 29
Mahesh Phalke 2:7b2b268ea49c 30 /******************************************************************************/
Mahesh Phalke 2:7b2b268ea49c 31 /******************** Variables and User Defined Data Types *******************/
Mahesh Phalke 2:7b2b268ea49c 32 /******************************************************************************/
Mahesh Phalke 2:7b2b268ea49c 33
Mahesh Phalke 2:7b2b268ea49c 34 /* UART init parameters */
Mahesh Phalke 2:7b2b268ea49c 35 struct no_os_uart_init_param uart_init_params = {
Mahesh Phalke 2:7b2b268ea49c 36 .device_id = NULL,
Mahesh Phalke 2:7b2b268ea49c 37 .baud_rate = IIO_UART_BAUD_RATE,
Mahesh Phalke 2:7b2b268ea49c 38 .size = NO_OS_UART_CS_8,
Mahesh Phalke 2:7b2b268ea49c 39 .parity = NO_OS_UART_PAR_NO,
Mahesh Phalke 2:7b2b268ea49c 40 .stop = NO_OS_UART_STOP_1_BIT,
Mahesh Phalke 2:7b2b268ea49c 41 .extra = &uart_extra_init_params
Mahesh Phalke 2:7b2b268ea49c 42 };
Mahesh Phalke 2:7b2b268ea49c 43
Mahesh Phalke 2:7b2b268ea49c 44 /* SPI initialization parameters */
Mahesh Phalke 2:7b2b268ea49c 45 struct no_os_spi_init_param spi_init_params = {
Mahesh Phalke 2:7b2b268ea49c 46 .max_speed_hz = 10000000, // Max SPI Speed
Mahesh Phalke 2:7b2b268ea49c 47 .chip_select = SPI_CSB, // Chip Select
Mahesh Phalke 2:7b2b268ea49c 48 .mode = NO_OS_SPI_MODE_3, // CPOL = 1, CPHA = 1
Mahesh Phalke 2:7b2b268ea49c 49 .platform_ops = &spi_ops,
Mahesh Phalke 2:7b2b268ea49c 50 .extra = &spi_extra_init_params // SPI extra configurations
Mahesh Phalke 2:7b2b268ea49c 51 };
Mahesh Phalke 2:7b2b268ea49c 52
Mahesh Phalke 2:7b2b268ea49c 53 /* External interrupt init parameters */
Mahesh Phalke 2:7b2b268ea49c 54 static struct no_os_irq_init_param ext_int_init_params = {
Mahesh Phalke 2:7b2b268ea49c 55 .irq_ctrl_id = 0,
Mahesh Phalke 2:7b2b268ea49c 56 .platform_ops = &irq_ops,
Mahesh Phalke 2:7b2b268ea49c 57 .extra = &ext_int_extra_init_params
Mahesh Phalke 2:7b2b268ea49c 58 };
Mahesh Phalke 2:7b2b268ea49c 59
Mahesh Phalke 2:7b2b268ea49c 60 /* External interrupt callback descriptor */
Mahesh Phalke 2:7b2b268ea49c 61 static struct no_os_callback_desc ext_int_callback_desc = {
Mahesh Phalke 2:7b2b268ea49c 62 #if (DATA_CAPTURE_MODE == CONTINUOUS_DATA_CAPTURE)
Mahesh Phalke 2:7b2b268ea49c 63 data_capture_callback,
Mahesh Phalke 2:7b2b268ea49c 64 #elif (DATA_CAPTURE_MODE == FIFO_DATA_CAPTURE)
Mahesh Phalke 2:7b2b268ea49c 65 fifo_data_capture_callback,
Mahesh Phalke 2:7b2b268ea49c 66 #else
Mahesh Phalke 2:7b2b268ea49c 67 NULL,
Mahesh Phalke 2:7b2b268ea49c 68 #endif
Mahesh Phalke 2:7b2b268ea49c 69 NULL,
Mahesh Phalke 2:7b2b268ea49c 70 NULL
Mahesh Phalke 2:7b2b268ea49c 71 };
Mahesh Phalke 2:7b2b268ea49c 72
Mahesh Phalke 2:7b2b268ea49c 73 /* Conversion monitor GPO init parameters */
Mahesh Phalke 2:7b2b268ea49c 74 static struct no_os_gpio_init_param conv_mon_gpio_init_params = {
Mahesh Phalke 2:7b2b268ea49c 75 .number = CONV_MON,
Mahesh Phalke 2:7b2b268ea49c 76 .platform_ops = &gpio_ops,
Mahesh Phalke 2:7b2b268ea49c 77 .extra = NULL
Mahesh Phalke 2:7b2b268ea49c 78 };
Mahesh Phalke 2:7b2b268ea49c 79
Mahesh Phalke 2:7b2b268ea49c 80 /* UART descriptor */
Mahesh Phalke 2:7b2b268ea49c 81 struct no_os_uart_desc *uart_desc;
Mahesh Phalke 2:7b2b268ea49c 82
Mahesh Phalke 2:7b2b268ea49c 83 /* External interrupt descriptor */
Mahesh Phalke 2:7b2b268ea49c 84 struct no_os_irq_ctrl_desc *external_int_desc;
Mahesh Phalke 2:7b2b268ea49c 85
Mahesh Phalke 2:7b2b268ea49c 86 /* LED GPO descriptor */
Mahesh Phalke 2:7b2b268ea49c 87 struct no_os_gpio_desc *conv_mon_gpio_desc = NULL;
Mahesh Phalke 2:7b2b268ea49c 88
Mahesh Phalke 2:7b2b268ea49c 89 /******************************************************************************/
Mahesh Phalke 2:7b2b268ea49c 90 /************************ Functions Prototypes ********************************/
Mahesh Phalke 2:7b2b268ea49c 91 /******************************************************************************/
Mahesh Phalke 2:7b2b268ea49c 92
Mahesh Phalke 2:7b2b268ea49c 93 /******************************************************************************/
Mahesh Phalke 2:7b2b268ea49c 94 /************************ Functions Definitions *******************************/
Mahesh Phalke 2:7b2b268ea49c 95 /******************************************************************************/
Mahesh Phalke 2:7b2b268ea49c 96
Mahesh Phalke 2:7b2b268ea49c 97 /**
Mahesh Phalke 2:7b2b268ea49c 98 * @brief Initialize the GPIOs
Mahesh Phalke 2:7b2b268ea49c 99 * @return 0 in case of success, negative error code otherwise
Mahesh Phalke 2:7b2b268ea49c 100 */
Mahesh Phalke 2:7b2b268ea49c 101 static int32_t init_gpio(void)
Mahesh Phalke 2:7b2b268ea49c 102 {
Mahesh Phalke 2:7b2b268ea49c 103 int32_t ret;
Mahesh Phalke 2:7b2b268ea49c 104
Mahesh Phalke 2:7b2b268ea49c 105 /* Initialize the conversion monitor GPO */
Mahesh Phalke 2:7b2b268ea49c 106 ret = no_os_gpio_get_optional(&conv_mon_gpio_desc,
Mahesh Phalke 2:7b2b268ea49c 107 &conv_mon_gpio_init_params);
Mahesh Phalke 2:7b2b268ea49c 108 if (ret) {
Mahesh Phalke 2:7b2b268ea49c 109 return ret;
Mahesh Phalke 2:7b2b268ea49c 110 }
Mahesh Phalke 2:7b2b268ea49c 111
Mahesh Phalke 2:7b2b268ea49c 112 ret = no_os_gpio_direction_input(conv_mon_gpio_desc);
Mahesh Phalke 2:7b2b268ea49c 113 if (ret) {
Mahesh Phalke 2:7b2b268ea49c 114 return ret;
Mahesh Phalke 2:7b2b268ea49c 115 }
Mahesh Phalke 2:7b2b268ea49c 116
Mahesh Phalke 2:7b2b268ea49c 117 return 0;
Mahesh Phalke 2:7b2b268ea49c 118 }
Mahesh Phalke 2:7b2b268ea49c 119
Mahesh Phalke 2:7b2b268ea49c 120 /**
Mahesh Phalke 2:7b2b268ea49c 121 * @brief Initialize the UART peripheral
Mahesh Phalke 2:7b2b268ea49c 122 * @return 0 in case of success, negative error code otherwise
Mahesh Phalke 2:7b2b268ea49c 123 */
Mahesh Phalke 2:7b2b268ea49c 124 static int32_t init_uart(void)
Mahesh Phalke 2:7b2b268ea49c 125 {
Mahesh Phalke 2:7b2b268ea49c 126 return no_os_uart_init(&uart_desc, &uart_init_params);
Mahesh Phalke 2:7b2b268ea49c 127 }
Mahesh Phalke 2:7b2b268ea49c 128
Mahesh Phalke 2:7b2b268ea49c 129 /**
Mahesh Phalke 2:7b2b268ea49c 130 * @brief Initialize the IRQ contoller
Mahesh Phalke 2:7b2b268ea49c 131 * @return 0 in case of success, negative error code otherwise
Mahesh Phalke 2:7b2b268ea49c 132 */
Mahesh Phalke 2:7b2b268ea49c 133 static int32_t init_interrupt(void)
Mahesh Phalke 2:7b2b268ea49c 134 {
Mahesh Phalke 2:7b2b268ea49c 135 int32_t ret;
Mahesh Phalke 2:7b2b268ea49c 136
Mahesh Phalke 2:7b2b268ea49c 137 #if (DATA_CAPTURE_MODE != BURST_DATA_CAPTURE_MODE)
Mahesh Phalke 2:7b2b268ea49c 138 /* Init interrupt controller for external interrupt (for monitoring
Mahesh Phalke 2:7b2b268ea49c 139 * conversion event on BUSY pin) */
Mahesh Phalke 2:7b2b268ea49c 140 ext_int_extra_init_params.gpio_irq_pin = CONV_MON;
Mahesh Phalke 2:7b2b268ea49c 141 ret = no_os_irq_ctrl_init(&external_int_desc, &ext_int_init_params);
Mahesh Phalke 2:7b2b268ea49c 142 if (ret) {
Mahesh Phalke 2:7b2b268ea49c 143 return ret;
Mahesh Phalke 2:7b2b268ea49c 144 }
Mahesh Phalke 2:7b2b268ea49c 145
Mahesh Phalke 2:7b2b268ea49c 146 /* Register a callback function for external interrupt */
Mahesh Phalke 2:7b2b268ea49c 147 ret = no_os_irq_register_callback(external_int_desc,
Mahesh Phalke 2:7b2b268ea49c 148 EXT_INT_ID,
Mahesh Phalke 2:7b2b268ea49c 149 &ext_int_callback_desc);
Mahesh Phalke 2:7b2b268ea49c 150 if (ret) {
Mahesh Phalke 2:7b2b268ea49c 151 return ret;
Mahesh Phalke 2:7b2b268ea49c 152 }
Mahesh Phalke 2:7b2b268ea49c 153
Mahesh Phalke 2:7b2b268ea49c 154 ret = no_os_irq_trigger_level_set(external_int_desc,
Mahesh Phalke 2:7b2b268ea49c 155 EXT_INT_ID, NO_OS_IRQ_EDGE_RISING);
Mahesh Phalke 2:7b2b268ea49c 156 if (ret) {
Mahesh Phalke 2:7b2b268ea49c 157 return ret;
Mahesh Phalke 2:7b2b268ea49c 158 }
Mahesh Phalke 2:7b2b268ea49c 159
Mahesh Phalke 2:7b2b268ea49c 160 /* Enable external interrupt */
Mahesh Phalke 2:7b2b268ea49c 161 ret = no_os_irq_enable(external_int_desc, EXT_INT_ID);
Mahesh Phalke 2:7b2b268ea49c 162 if (ret) {
Mahesh Phalke 2:7b2b268ea49c 163 return ret;
Mahesh Phalke 2:7b2b268ea49c 164 }
Mahesh Phalke 2:7b2b268ea49c 165 #endif
Mahesh Phalke 2:7b2b268ea49c 166
Mahesh Phalke 2:7b2b268ea49c 167 return 0;
Mahesh Phalke 2:7b2b268ea49c 168 }
Mahesh Phalke 2:7b2b268ea49c 169
Mahesh Phalke 2:7b2b268ea49c 170 /**
Mahesh Phalke 2:7b2b268ea49c 171 * @brief Initialize the system peripherals
Mahesh Phalke 2:7b2b268ea49c 172 * @return 0 in case of success, negative error code otherwise
Mahesh Phalke 2:7b2b268ea49c 173 */
Mahesh Phalke 2:7b2b268ea49c 174 int32_t init_system(void)
Mahesh Phalke 2:7b2b268ea49c 175 {
Mahesh Phalke 2:7b2b268ea49c 176 int32_t ret;
Mahesh Phalke 2:7b2b268ea49c 177
Mahesh Phalke 2:7b2b268ea49c 178 ret = init_gpio();
Mahesh Phalke 2:7b2b268ea49c 179 if (ret) {
Mahesh Phalke 2:7b2b268ea49c 180 return ret;
Mahesh Phalke 2:7b2b268ea49c 181 }
Mahesh Phalke 2:7b2b268ea49c 182
Mahesh Phalke 2:7b2b268ea49c 183 ret = init_uart();
Mahesh Phalke 2:7b2b268ea49c 184 if (ret) {
Mahesh Phalke 2:7b2b268ea49c 185 return ret;
Mahesh Phalke 2:7b2b268ea49c 186 }
Mahesh Phalke 2:7b2b268ea49c 187
Mahesh Phalke 2:7b2b268ea49c 188 ret = init_interrupt();
Mahesh Phalke 2:7b2b268ea49c 189 if (ret) {
Mahesh Phalke 2:7b2b268ea49c 190 return ret;
Mahesh Phalke 2:7b2b268ea49c 191 }
Mahesh Phalke 2:7b2b268ea49c 192
Mahesh Phalke 2:7b2b268ea49c 193 #if defined(USE_SDRAM_CAPTURE_BUFFER)
Mahesh Phalke 2:7b2b268ea49c 194 ret = sdram_init();
Mahesh Phalke 2:7b2b268ea49c 195 if (ret) {
Mahesh Phalke 2:7b2b268ea49c 196 return ret;
Mahesh Phalke 2:7b2b268ea49c 197 }
Mahesh Phalke 2:7b2b268ea49c 198 #endif
Mahesh Phalke 2:7b2b268ea49c 199
Mahesh Phalke 2:7b2b268ea49c 200 return 0;
Mahesh Phalke 2:7b2b268ea49c 201 }