Analog Devices / Mbed OS EVAL-AD4130

Example program for EVAL-AD4130

Dependencies:   tempsensors sdp_k1_sdram

app/ad4130_user_config.h@2:7b2b268ea49c, 22 months ago (annotated)

Committer:
Mahesh Phalke
Date:
Wed Jul 20 18:12:00 2022 +0530
Revision:
2:7b2b268ea49c
Initial firmware commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Mahesh Phalke 2:7b2b268ea49c 1 /*************************************************************************//**
Mahesh Phalke 2:7b2b268ea49c 2 * @file ad4130_user_config.h
Mahesh Phalke 2:7b2b268ea49c 3 * @brief Header for AD4130 user configuration file
Mahesh Phalke 2:7b2b268ea49c 4 ******************************************************************************
Mahesh Phalke 2:7b2b268ea49c 5 * Copyright (c) 2020, 2022 Analog Devices, Inc.
Mahesh Phalke 2:7b2b268ea49c 6 * All rights reserved.
Mahesh Phalke 2:7b2b268ea49c 7 *
Mahesh Phalke 2:7b2b268ea49c 8 * This software is proprietary to Analog Devices, Inc. and its licensors.
Mahesh Phalke 2:7b2b268ea49c 9 * By using this software you agree to the terms of the associated
Mahesh Phalke 2:7b2b268ea49c 10 * Analog Devices Software License Agreement.
Mahesh Phalke 2:7b2b268ea49c 11 *****************************************************************************/
Mahesh Phalke 2:7b2b268ea49c 12
Mahesh Phalke 2:7b2b268ea49c 13 #ifndef _AD4130_USER_CONFIG_H_
Mahesh Phalke 2:7b2b268ea49c 14 #define _AD4130_USER_CONFIG_H_
Mahesh Phalke 2:7b2b268ea49c 15
Mahesh Phalke 2:7b2b268ea49c 16 /******************************************************************************/
Mahesh Phalke 2:7b2b268ea49c 17 /***************************** Include Files **********************************/
Mahesh Phalke 2:7b2b268ea49c 18 /******************************************************************************/
Mahesh Phalke 2:7b2b268ea49c 19
Mahesh Phalke 2:7b2b268ea49c 20 #include <stdint.h>
Mahesh Phalke 2:7b2b268ea49c 21 #include "ad413x.h"
Mahesh Phalke 2:7b2b268ea49c 22
Mahesh Phalke 2:7b2b268ea49c 23 /******************************************************************************/
Mahesh Phalke 2:7b2b268ea49c 24 /********************** Macros and Constants Definition ***********************/
Mahesh Phalke 2:7b2b268ea49c 25 /******************************************************************************/
Mahesh Phalke 2:7b2b268ea49c 26
Mahesh Phalke 2:7b2b268ea49c 27 /* Select channel config for default user config (applicable to all channels) */
Mahesh Phalke 2:7b2b268ea49c 28 //#define DIFFERENTIAL_CHN_CFG // Uncomment to select differential config
Mahesh Phalke 2:7b2b268ea49c 29
Mahesh Phalke 2:7b2b268ea49c 30 /* Select FS (or ODR) for default user config (applicable to all channels) */
Mahesh Phalke 2:7b2b268ea49c 31 #if (FS_CONFIG_VALUE != 0)
Mahesh Phalke 2:7b2b268ea49c 32 #define AD4130_FS_CONFIG FS_CONFIG_VALUE
Mahesh Phalke 2:7b2b268ea49c 33 #else
Mahesh Phalke 2:7b2b268ea49c 34 #define AD4130_FS_CONFIG 1 // ODR = 2.4KSPS (max)
Mahesh Phalke 2:7b2b268ea49c 35 #endif
Mahesh Phalke 2:7b2b268ea49c 36
Mahesh Phalke 2:7b2b268ea49c 37 /* Filter type for default user config
Mahesh Phalke 2:7b2b268ea49c 38 * Note: Applicable for all setups to keep the same ODR for all channels */
Mahesh Phalke 2:7b2b268ea49c 39 #define AD4130_FILTER_TYPE AD413X_SYNC3_STANDALONE
Mahesh Phalke 2:7b2b268ea49c 40
Mahesh Phalke 2:7b2b268ea49c 41 /* Scaler factor used in FS to ODR conversion (For SINC3/4 filter) */
Mahesh Phalke 2:7b2b268ea49c 42 #define FS_TO_ODR_CONV_SCALER (32U * AD4130_FS_CONFIG)
Mahesh Phalke 2:7b2b268ea49c 43
Mahesh Phalke 2:7b2b268ea49c 44 /* Select the positive and negative analog inputs for each channel */
Mahesh Phalke 2:7b2b268ea49c 45 #if defined(DIFFERENTIAL_CHN_CFG)
Mahesh Phalke 2:7b2b268ea49c 46 #define CHN0_AINP AD413X_AIN0
Mahesh Phalke 2:7b2b268ea49c 47 #define CHN0_AINM AD413X_AIN1
Mahesh Phalke 2:7b2b268ea49c 48 #define CHN1_AINP AD413X_AIN2
Mahesh Phalke 2:7b2b268ea49c 49 #define CHN1_AINM AD413X_AIN3
Mahesh Phalke 2:7b2b268ea49c 50 #define CHN2_AINP AD413X_AIN4
Mahesh Phalke 2:7b2b268ea49c 51 #define CHN2_AINM AD413X_AIN5
Mahesh Phalke 2:7b2b268ea49c 52 #define CHN3_AINP AD413X_AIN6
Mahesh Phalke 2:7b2b268ea49c 53 #define CHN3_AINM AD413X_AIN7
Mahesh Phalke 2:7b2b268ea49c 54 #define CHN4_AINP AD413X_AIN8
Mahesh Phalke 2:7b2b268ea49c 55 #define CHN4_AINM AD413X_AIN9
Mahesh Phalke 2:7b2b268ea49c 56 #define CHN5_AINP AD413X_AIN10
Mahesh Phalke 2:7b2b268ea49c 57 #define CHN5_AINM AD413X_AIN11
Mahesh Phalke 2:7b2b268ea49c 58 #define CHN6_AINP AD413X_AIN12
Mahesh Phalke 2:7b2b268ea49c 59 #define CHN6_AINM AD413X_AIN13
Mahesh Phalke 2:7b2b268ea49c 60 #define CHN7_AINP AD413X_AIN14
Mahesh Phalke 2:7b2b268ea49c 61 #define CHN7_AINM AD413X_AIN15
Mahesh Phalke 2:7b2b268ea49c 62 #define ADC_USER_CHANNELS ADC_DIFFERENTIAL_CHNS
Mahesh Phalke 2:7b2b268ea49c 63 #else
Mahesh Phalke 2:7b2b268ea49c 64 #define CHN0_AINP AD413X_AIN0
Mahesh Phalke 2:7b2b268ea49c 65 #define CHN0_AINM AD413X_AVSS
Mahesh Phalke 2:7b2b268ea49c 66 #define CHN1_AINP AD413X_AIN1
Mahesh Phalke 2:7b2b268ea49c 67 #define CHN1_AINM AD413X_AVSS
Mahesh Phalke 2:7b2b268ea49c 68 #define CHN2_AINP AD413X_AIN2
Mahesh Phalke 2:7b2b268ea49c 69 #define CHN2_AINM AD413X_AVSS
Mahesh Phalke 2:7b2b268ea49c 70 #define CHN3_AINP AD413X_AIN3
Mahesh Phalke 2:7b2b268ea49c 71 #define CHN3_AINM AD413X_AVSS
Mahesh Phalke 2:7b2b268ea49c 72 #define CHN4_AINP AD413X_AIN4
Mahesh Phalke 2:7b2b268ea49c 73 #define CHN4_AINM AD413X_AVSS
Mahesh Phalke 2:7b2b268ea49c 74 #define CHN5_AINP AD413X_AIN5
Mahesh Phalke 2:7b2b268ea49c 75 #define CHN5_AINM AD413X_AVSS
Mahesh Phalke 2:7b2b268ea49c 76 #define CHN6_AINP AD413X_AIN6
Mahesh Phalke 2:7b2b268ea49c 77 #define CHN6_AINM AD413X_AVSS
Mahesh Phalke 2:7b2b268ea49c 78 #define CHN7_AINP AD413X_AIN7
Mahesh Phalke 2:7b2b268ea49c 79 #define CHN7_AINM AD413X_AVSS
Mahesh Phalke 2:7b2b268ea49c 80 #define CHN8_AINP AD413X_AIN8
Mahesh Phalke 2:7b2b268ea49c 81 #define CHN8_AINM AD413X_AVSS
Mahesh Phalke 2:7b2b268ea49c 82 #define CHN9_AINP AD413X_AIN9
Mahesh Phalke 2:7b2b268ea49c 83 #define CHN9_AINM AD413X_AVSS
Mahesh Phalke 2:7b2b268ea49c 84 #define CHN10_AINP AD413X_AIN10
Mahesh Phalke 2:7b2b268ea49c 85 #define CHN10_AINM AD413X_AVSS
Mahesh Phalke 2:7b2b268ea49c 86 #define CHN11_AINP AD413X_AIN11
Mahesh Phalke 2:7b2b268ea49c 87 #define CHN11_AINM AD413X_AVSS
Mahesh Phalke 2:7b2b268ea49c 88 #define CHN12_AINP AD413X_AIN12
Mahesh Phalke 2:7b2b268ea49c 89 #define CHN12_AINM AD413X_AVSS
Mahesh Phalke 2:7b2b268ea49c 90 #define CHN13_AINP AD413X_AIN13
Mahesh Phalke 2:7b2b268ea49c 91 #define CHN13_AINM AD413X_AVSS
Mahesh Phalke 2:7b2b268ea49c 92 #define CHN14_AINP AD413X_AIN14
Mahesh Phalke 2:7b2b268ea49c 93 #define CHN14_AINM AD413X_AVSS
Mahesh Phalke 2:7b2b268ea49c 94 #define CHN15_AINP AD413X_AIN15
Mahesh Phalke 2:7b2b268ea49c 95 #define CHN15_AINM AD413X_AVSS
Mahesh Phalke 2:7b2b268ea49c 96 #define ADC_USER_CHANNELS ADC_PSEUDO_DIFF_CHNS
Mahesh Phalke 2:7b2b268ea49c 97 #endif
Mahesh Phalke 2:7b2b268ea49c 98
Mahesh Phalke 2:7b2b268ea49c 99 /******************************************************************************/
Mahesh Phalke 2:7b2b268ea49c 100 /********************** Public/Extern Declarations ****************************/
Mahesh Phalke 2:7b2b268ea49c 101 /******************************************************************************/
Mahesh Phalke 2:7b2b268ea49c 102
Mahesh Phalke 2:7b2b268ea49c 103 extern struct ad413x_init_param ad4130_user_config_params;
Mahesh Phalke 2:7b2b268ea49c 104
Mahesh Phalke 2:7b2b268ea49c 105 #endif /* end of _AD4130_USER_CONFIG_H_ */