AD7798 ADC driver

Dependents:   CN0396 CN0397

Committer:
adisuciu
Date:
Mon Nov 07 15:45:27 2016 +0000
Revision:
0:fb6fe6fa2835
Initial revision

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adisuciu 0:fb6fe6fa2835 1 #ifndef _AD7798_H_
adisuciu 0:fb6fe6fa2835 2 #define _AD7798_H_
adisuciu 0:fb6fe6fa2835 3
adisuciu 0:fb6fe6fa2835 4 #include <mbed.h>
adisuciu 0:fb6fe6fa2835 5
adisuciu 0:fb6fe6fa2835 6 /******************************************************************************/
adisuciu 0:fb6fe6fa2835 7 /* AD7798 */
adisuciu 0:fb6fe6fa2835 8 /******************************************************************************/
adisuciu 0:fb6fe6fa2835 9
adisuciu 0:fb6fe6fa2835 10 /*AD7798 Registers*/
adisuciu 0:fb6fe6fa2835 11 #define AD7798_REG_COMM 0 /* Communications Register(WO, 8-bit) */
adisuciu 0:fb6fe6fa2835 12 #define AD7798_REG_STAT 0 /* Status Register (RO, 8-bit) */
adisuciu 0:fb6fe6fa2835 13 #define AD7798_REG_MODE 1 /* Mode Register (RW, 16-bit */
adisuciu 0:fb6fe6fa2835 14 #define AD7798_REG_CONF 2 /* Configuration Register (RW, 16-bit)*/
adisuciu 0:fb6fe6fa2835 15 #define AD7798_REG_DATA 3 /* Data Register (RO, 16-/24-bit) */
adisuciu 0:fb6fe6fa2835 16 #define AD7798_REG_ID 4 /* ID Register (RO, 8-bit) */
adisuciu 0:fb6fe6fa2835 17 #define AD7798_REG_IO 5 /* IO Register (RO, 8-bit) */
adisuciu 0:fb6fe6fa2835 18 #define AD7798_REG_OFFSET 6 /* Offset Register (RW, 24-bit */
adisuciu 0:fb6fe6fa2835 19 #define AD7798_REG_FULLSCALE 7 /* Full-Scale Register (RW, 24-bit */
adisuciu 0:fb6fe6fa2835 20
adisuciu 0:fb6fe6fa2835 21 /* Communications Register Bit Designations (AD7798_REG_COMM) */
adisuciu 0:fb6fe6fa2835 22 #define AD7798_COMM_WEN (1 << 7) /* Write Enable */
adisuciu 0:fb6fe6fa2835 23 #define AD7798_COMM_WRITE (0 << 6) /* Write Operation */
adisuciu 0:fb6fe6fa2835 24 #define AD7798_COMM_READ (1 << 6) /* Read Operation */
adisuciu 0:fb6fe6fa2835 25 #define AD7798_COMM_ADDR(x) (((x) & 0x7) << 3) /* Register Address */
adisuciu 0:fb6fe6fa2835 26 #define AD7798_COMM_CREAD (1 << 2) /* Continuous Read of Data Register */
adisuciu 0:fb6fe6fa2835 27
adisuciu 0:fb6fe6fa2835 28 /* Status Register Bit Designations (AD7798_REG_STAT) */
adisuciu 0:fb6fe6fa2835 29 #define AD7798_STAT_RDY (1 << 7) /* Ready */
adisuciu 0:fb6fe6fa2835 30 #define AD7798_STAT_ERR (1 << 6) /* Error (Overrange, Underrange) */
adisuciu 0:fb6fe6fa2835 31 #define AD7798_STAT_CH3 (1 << 2) /* Channel 3 */
adisuciu 0:fb6fe6fa2835 32 #define AD7798_STAT_CH2 (1 << 1) /* Channel 2 */
adisuciu 0:fb6fe6fa2835 33 #define AD7798_STAT_CH1 (1 << 0) /* Channel 1 */
adisuciu 0:fb6fe6fa2835 34
adisuciu 0:fb6fe6fa2835 35
adisuciu 0:fb6fe6fa2835 36 #define AD7798_CH3 (1 << 2) /* Channel 3 */
adisuciu 0:fb6fe6fa2835 37 #define AD7798_CH2 (1 << 1) /* Channel 2 */
adisuciu 0:fb6fe6fa2835 38 #define AD7798_CH1 (1 << 0) /* Channel 1 */
adisuciu 0:fb6fe6fa2835 39
adisuciu 0:fb6fe6fa2835 40 /* Mode Register Bit Designations (AD7798_REG_MODE) */
adisuciu 0:fb6fe6fa2835 41 #define AD7798_MODE_SEL(x) (((x) & 0x7) << 13) /* Operation Mode Select */
adisuciu 0:fb6fe6fa2835 42 #define AD7798_MODE_PSW(x) (1 << 12) /* Power Switch Control Bit */
adisuciu 0:fb6fe6fa2835 43 #define AD7798_MODE_RATE(x) ((x) & 0xF) /* Filter Update Rate Select */
adisuciu 0:fb6fe6fa2835 44
adisuciu 0:fb6fe6fa2835 45 /* AD7798_MODE_SEL(x) options */
adisuciu 0:fb6fe6fa2835 46 #define AD7798_MODE_CONT 0 /* Continuous Conversion Mode */
adisuciu 0:fb6fe6fa2835 47 #define AD7798_MODE_SINGLE 1 /* Single Conversion Mode */
adisuciu 0:fb6fe6fa2835 48 #define AD7798_MODE_IDLE 2 /* Idle Mode */
adisuciu 0:fb6fe6fa2835 49 #define AD7798_MODE_PWRDN 3 /* Power-Down Mode */
adisuciu 0:fb6fe6fa2835 50 #define AD7798_MODE_CAL_INT_ZERO 4 /* Internal Zero-Scale Calibration */
adisuciu 0:fb6fe6fa2835 51 #define AD7798_MODE_CAL_INT_FULL 5 /* Internal Full-Scale Calibration */
adisuciu 0:fb6fe6fa2835 52 #define AD7798_MODE_CAL_SYS_ZERO 6 /* System Zero-Scale Calibration */
adisuciu 0:fb6fe6fa2835 53 #define AD7798_MODE_CAL_SYS_FULL 7 /* System Full-Scale Calibration */
adisuciu 0:fb6fe6fa2835 54
adisuciu 0:fb6fe6fa2835 55 /* Configuration Register Bit Designations (AD7798_REG_CONF) */
adisuciu 0:fb6fe6fa2835 56 #define AD7798_CONF_BO_EN (1 << 13) /* Burnout Current Enable */
adisuciu 0:fb6fe6fa2835 57 #define AD7798_CONF_UNIPOLAR (1 << 12) /* Unipolar/Bipolar Enable */
adisuciu 0:fb6fe6fa2835 58 #define AD7798_CONF_GAIN(x) (((x) & 0x7) << 8) /* Gain Select */
adisuciu 0:fb6fe6fa2835 59 #define AD7798_CONF_REFDET(x) (((x) & 0x1) << 5) /* Reference detect function */
adisuciu 0:fb6fe6fa2835 60 #define AD7798_CONF_BUF (1 << 4) /* Buffered Mode Enable */
adisuciu 0:fb6fe6fa2835 61 #define AD7798_CONF_CHAN(x) ((x) & 0x7) /* Channel select */
adisuciu 0:fb6fe6fa2835 62
adisuciu 0:fb6fe6fa2835 63 /* AD7798_CONF_GAIN(x) options */
adisuciu 0:fb6fe6fa2835 64 #define AD7798_GAIN_1 0
adisuciu 0:fb6fe6fa2835 65 #define AD7798_GAIN_2 1
adisuciu 0:fb6fe6fa2835 66 #define AD7798_GAIN_4 2
adisuciu 0:fb6fe6fa2835 67 #define AD7798_GAIN_8 3
adisuciu 0:fb6fe6fa2835 68 #define AD7798_GAIN_16 4
adisuciu 0:fb6fe6fa2835 69 #define AD7798_GAIN_32 5
adisuciu 0:fb6fe6fa2835 70 #define AD7798_GAIN_64 6
adisuciu 0:fb6fe6fa2835 71 #define AD7798_GAIN_128 7
adisuciu 0:fb6fe6fa2835 72
adisuciu 0:fb6fe6fa2835 73 /* AD7798_CONF_REFDET(x) options */
adisuciu 0:fb6fe6fa2835 74 #define AD7798_REFDET_ENA 1
adisuciu 0:fb6fe6fa2835 75 #define AD7798_REFDET_DIS 0
adisuciu 0:fb6fe6fa2835 76
adisuciu 0:fb6fe6fa2835 77 /* AD7798_CONF_CHAN(x) options */
adisuciu 0:fb6fe6fa2835 78 #define AD7798_CH_AIN1P_AIN1M 0 /* AIN1(+) - AIN1(-) */
adisuciu 0:fb6fe6fa2835 79 #define AD7798_CH_AIN2P_AIN2M 1 /* AIN2(+) - AIN2(-) */
adisuciu 0:fb6fe6fa2835 80 #define AD7798_CH_AIN3P_AIN3M 2 /* AIN3(+) - AIN3(-) */
adisuciu 0:fb6fe6fa2835 81 #define AD7798_CH_AIN1M_AIN1M 3 /* AIN1(-) - AIN1(-) */
adisuciu 0:fb6fe6fa2835 82 #define AD7798_CH_AVDD_MONITOR 7 /* AVDD Monitor */
adisuciu 0:fb6fe6fa2835 83
adisuciu 0:fb6fe6fa2835 84 /* ID Register Bit Designations (AD7798_REG_ID) */
adisuciu 0:fb6fe6fa2835 85 #define AD7798_ID 0x8
adisuciu 0:fb6fe6fa2835 86 #define AD7798_ID_MASK 0xF
adisuciu 0:fb6fe6fa2835 87
adisuciu 0:fb6fe6fa2835 88 /* IO (Excitation Current Sources) Register Bit Designations (AD7798_REG_IO) */
adisuciu 0:fb6fe6fa2835 89 #define AD7798_IOEN (1 << 6)
adisuciu 0:fb6fe6fa2835 90 #define AD7798_IO1(x) (((x) & 0x1) << 4)
adisuciu 0:fb6fe6fa2835 91 #define AD7798_IO2(x) (((x) & 0x1) << 5)
adisuciu 0:fb6fe6fa2835 92
adisuciu 0:fb6fe6fa2835 93 #define TRUE 1
adisuciu 0:fb6fe6fa2835 94 #define FALSE 0
adisuciu 0:fb6fe6fa2835 95
adisuciu 0:fb6fe6fa2835 96 #define AD7798_UNIPOLAR TRUE
adisuciu 0:fb6fe6fa2835 97 #define AD7798_BIPOLAR FALSE
adisuciu 0:fb6fe6fa2835 98
adisuciu 0:fb6fe6fa2835 99 #define AD7798_ENABLE TRUE
adisuciu 0:fb6fe6fa2835 100 #define AD7798_DISABLE FALSE
adisuciu 0:fb6fe6fa2835 101
adisuciu 0:fb6fe6fa2835 102 /******************************************************************************/
adisuciu 0:fb6fe6fa2835 103 /* Functions Prototypes */
adisuciu 0:fb6fe6fa2835 104 /*****************************************************************************/
adisuciu 0:fb6fe6fa2835 105
adisuciu 0:fb6fe6fa2835 106 class AD7798
adisuciu 0:fb6fe6fa2835 107 {
adisuciu 0:fb6fe6fa2835 108 public:
adisuciu 0:fb6fe6fa2835 109 AD7798( PinName CS, PinName MOSI = SPI_MOSI, PinName MISO = SPI_MISO, PinName SCK = SPI_SCK);
adisuciu 0:fb6fe6fa2835 110 /* Initialize AD7798 and check if the device is present*/
adisuciu 0:fb6fe6fa2835 111 uint8_t init(void);
adisuciu 0:fb6fe6fa2835 112 void frequency(int hz);
adisuciu 0:fb6fe6fa2835 113 /* Sends 32 consecutive 1's on SPI in order to reset the part. */
adisuciu 0:fb6fe6fa2835 114 void reset(void);
adisuciu 0:fb6fe6fa2835 115 /* Reads the value of the selected register. */
adisuciu 0:fb6fe6fa2835 116 uint16_t get_register_value(uint8_t regAddress, uint8_t size, bool toggle_cs = true);
adisuciu 0:fb6fe6fa2835 117 /* Writes a value to the register. */
adisuciu 0:fb6fe6fa2835 118 void set_register_value(uint8_t regAddress, uint16_t regValue, uint8_t size, bool toggle_cs = true);
adisuciu 0:fb6fe6fa2835 119 /* Sets the operating mode of AD7798. */
adisuciu 0:fb6fe6fa2835 120 void set_mode(uint8_t mode);
adisuciu 0:fb6fe6fa2835 121 /* Reads /RDY bit of Status register. */
adisuciu 0:fb6fe6fa2835 122 uint8_t ready(void);
adisuciu 0:fb6fe6fa2835 123 /* Selects the channel of AD7798. */
adisuciu 0:fb6fe6fa2835 124 void set_channel(uint8_t channel);
adisuciu 0:fb6fe6fa2835 125 /* Sets the gain of the In-Amp. */
adisuciu 0:fb6fe6fa2835 126 void set_gain(uint16_t gain);
adisuciu 0:fb6fe6fa2835 127 /* Enables or disables the reference detect function. */
adisuciu 0:fb6fe6fa2835 128 void set_reference(uint8_t state);
adisuciu 0:fb6fe6fa2835 129
adisuciu 0:fb6fe6fa2835 130 void set_filter(uint8_t filter);
adisuciu 0:fb6fe6fa2835 131 void set_coding_mode(uint8_t mode);
adisuciu 0:fb6fe6fa2835 132 void set_burnout_current(uint8_t select);
adisuciu 0:fb6fe6fa2835 133
adisuciu 0:fb6fe6fa2835 134 void read_data(uint8_t adcChannel, uint16_t *adcData);
adisuciu 0:fb6fe6fa2835 135
adisuciu 0:fb6fe6fa2835 136 uint8_t spi_read(uint8_t *data, uint8_t bytes_number, bool toggle_cs = true);
adisuciu 0:fb6fe6fa2835 137 uint8_t spi_write(uint8_t *data, uint8_t bytes_number, bool toggle_cs = true);
adisuciu 0:fb6fe6fa2835 138
adisuciu 0:fb6fe6fa2835 139
adisuciu 0:fb6fe6fa2835 140
adisuciu 0:fb6fe6fa2835 141 //DigitalIn miso;///< DigitalIn must be initialized before SPI to prevent pin MUX overwrite
adisuciu 0:fb6fe6fa2835 142 SPI ad7798;
adisuciu 0:fb6fe6fa2835 143 DigitalOut cs;
adisuciu 0:fb6fe6fa2835 144
adisuciu 0:fb6fe6fa2835 145 private:
adisuciu 0:fb6fe6fa2835 146 const uint8_t _SPI_MODE = 0x03;
adisuciu 0:fb6fe6fa2835 147 };
adisuciu 0:fb6fe6fa2835 148 #endif // _AD7798_H_