AKM Development Platform / MCP342x

Driver for the Microchip MCP432x series of ADCs.

Dependents:   AKDP-RevD7_014

Fork of MCP342x by Osamu Koizumi

mcp342x.cpp@4:6215f50b3297, 2016-05-14 (annotated)

Committer:
masahikofukasawa
Date:
Sat May 14 00:06:26 2016 +0000
Revision:
4:6215f50b3297
Parent:
2:96d9bfe25b03
Child:
5:0ecc54b7fb2e
test

Who changed what in which revision?

UserRevisionLine numberNew contents of line
coisme 1:bc877c37027c 1 #include "mcp342x.h"
coisme 1:bc877c37027c 2
coisme 1:bc877c37027c 3
coisme 1:bc877c37027c 4 #define LEN_DATA_REGISTER 3 // Length of the data registers.
coisme 1:bc877c37027c 5 #define LEN_ONE_BYTE 1
coisme 1:bc877c37027c 6
coisme 1:bc877c37027c 7 MCP342X::MCP342X(I2C *conn, SlaveAddress addr) {
coisme 1:bc877c37027c 8 slaveAddress = addr;
coisme 1:bc877c37027c 9 connection = conn;
coisme 1:bc877c37027c 10
coisme 1:bc877c37027c 11 init();
coisme 1:bc877c37027c 12 }
coisme 1:bc877c37027c 13
masahikofukasawa 4:6215f50b3297 14 /**
masahikofukasawa 4:6215f50b3297 15 * Destructor.
masahikofukasawa 4:6215f50b3297 16 *
masahikofukasawa 4:6215f50b3297 17 */
masahikofukasawa 4:6215f50b3297 18 //MCP342X::~MCP342X(){
masahikofukasawa 4:6215f50b3297 19 // if (connection) delete connection;
masahikofukasawa 4:6215f50b3297 20 //}
masahikofukasawa 4:6215f50b3297 21
coisme 1:bc877c37027c 22 MCP342X::Status MCP342X::init() {
coisme 1:bc877c37027c 23 Status status;
coisme 1:bc877c37027c 24 int16_t val = 0;
coisme 1:bc877c37027c 25
coisme 1:bc877c37027c 26 // Reads the current configuration.
coisme 1:bc877c37027c 27 if ((status=readData(&val, &currentConfig)) != SUCCESS) {
coisme 1:bc877c37027c 28 return status;
coisme 1:bc877c37027c 29 }
coisme 1:bc877c37027c 30
coisme 1:bc877c37027c 31 // Initialize internal variable
coisme 1:bc877c37027c 32 currentConfig.measurementTrigger = NONE;
coisme 1:bc877c37027c 33
coisme 1:bc877c37027c 34 return status;
coisme 1:bc877c37027c 35 }
coisme 1:bc877c37027c 36
coisme 1:bc877c37027c 37 MCP342X::Status MCP342X::readData(int16_t *val, Config *config) {
coisme 1:bc877c37027c 38 char buf[LEN_DATA_REGISTER];
coisme 1:bc877c37027c 39
coisme 1:bc877c37027c 40 // Reads data registers.
coisme 1:bc877c37027c 41 if (connection->read((slaveAddress << 1), buf, LEN_DATA_REGISTER) != 0) {
coisme 1:bc877c37027c 42 return ERROR_I2C_READ;
coisme 1:bc877c37027c 43 }
coisme 1:bc877c37027c 44
coisme 1:bc877c37027c 45 // Decodes configuration register data.
coisme 1:bc877c37027c 46 decodeConfigurationRegister(config, buf[2]);
coisme 1:bc877c37027c 47
coisme 1:bc877c37027c 48 // Converts AD value
coisme 1:bc877c37027c 49 *val = (int16_t)((buf[0] << 8) | buf[1]);
coisme 1:bc877c37027c 50
coisme 1:bc877c37027c 51 return SUCCESS;
coisme 1:bc877c37027c 52 }
coisme 1:bc877c37027c 53
coisme 1:bc877c37027c 54 void MCP342X::decodeConfigurationRegister(Config *config, uint8_t regVal) {
coisme 1:bc877c37027c 55 uint8_t tmp = 0;
coisme 1:bc877c37027c 56
coisme 1:bc877c37027c 57 // For the meaning of each bit, see the section 5.2 in the datasheet.
coisme 1:bc877c37027c 58
coisme 1:bc877c37027c 59 // Decodes Ready Bit (~RDY), Bit 7
coisme 1:bc877c37027c 60 tmp = ((0x80 & regVal) >> 7);
coisme 1:bc877c37027c 61 if (tmp == 0x00) {
coisme 1:bc877c37027c 62 config->dataStatus = DATA_UPDATED;
coisme 1:bc877c37027c 63 } else {
coisme 1:bc877c37027c 64 config->dataStatus = DATA_NOT_UPDATED;
coisme 1:bc877c37027c 65 }
coisme 1:bc877c37027c 66
coisme 1:bc877c37027c 67 // Decodes Channel Selection Bits, Bit 6-5
coisme 1:bc877c37027c 68 tmp = ((0x60 & regVal) >> 5);
coisme 1:bc877c37027c 69 if (tmp == 0x00) {
coisme 1:bc877c37027c 70 config->adcChannel = ADC_CH1;
coisme 1:bc877c37027c 71 } else if (tmp == 0x01) {
coisme 1:bc877c37027c 72 config->adcChannel = ADC_CH2;
coisme 1:bc877c37027c 73 } else if (tmp == 0x02) {
coisme 1:bc877c37027c 74 config->adcChannel = ADC_CH3;
coisme 1:bc877c37027c 75 } else { // ch == 0x03
coisme 1:bc877c37027c 76 config->adcChannel = ADC_CH4;
coisme 1:bc877c37027c 77 }
coisme 1:bc877c37027c 78
coisme 1:bc877c37027c 79 // Decodes Conversion Mode Bit, Bit 4
coisme 1:bc877c37027c 80 tmp = ((0x10 & regVal) >> 4);
coisme 1:bc877c37027c 81 if (tmp == 0x01) {
coisme 1:bc877c37027c 82 config->conversionMode = CONTINUOUS;
coisme 1:bc877c37027c 83 } else {
coisme 1:bc877c37027c 84 config->conversionMode = ONE_SHOT;
coisme 1:bc877c37027c 85 }
coisme 1:bc877c37027c 86
coisme 1:bc877c37027c 87 // Decodes Sample Rate Selection Bit
coisme 1:bc877c37027c 88 tmp = ((0x0C & regVal) >> 2);
coisme 1:bc877c37027c 89 if (tmp == 0x00) {
coisme 1:bc877c37027c 90 config->sampleSetting = SAMPLE_240HZ_12BIT;
coisme 1:bc877c37027c 91 } else if (tmp == 0x01) {
coisme 1:bc877c37027c 92 config->sampleSetting = SAMPLE_60HZ_14BIT;
coisme 1:bc877c37027c 93 } else {
coisme 1:bc877c37027c 94 config->sampleSetting = SAMPLE_15HZ_16BIT;
coisme 1:bc877c37027c 95 }
coisme 1:bc877c37027c 96
coisme 1:bc877c37027c 97 // Decodes PGA Gain Selection Bits
coisme 1:bc877c37027c 98 tmp = (0x03 & regVal);
coisme 1:bc877c37027c 99 if (tmp == 0x00) {
coisme 1:bc877c37027c 100 config->pgaSetting = PGA_1X;
coisme 1:bc877c37027c 101 } else if (tmp == 0x01) {
coisme 1:bc877c37027c 102 config->pgaSetting = PGA_2X;
coisme 1:bc877c37027c 103 } else if (tmp == 0x02) {
coisme 1:bc877c37027c 104 config->pgaSetting = PGA_4X;
coisme 1:bc877c37027c 105 } else {
coisme 1:bc877c37027c 106 config->pgaSetting = PGA_8X;
coisme 1:bc877c37027c 107 }
coisme 1:bc877c37027c 108 }
coisme 1:bc877c37027c 109
coisme 1:bc877c37027c 110 MCP342X::Status MCP342X::setConfig(const Config *config) {
coisme 1:bc877c37027c 111 char val = 0;
coisme 1:bc877c37027c 112
coisme 1:bc877c37027c 113 // Measurement trigger
coisme 1:bc877c37027c 114 if (config->measurementTrigger == TRIGGER) {
coisme 1:bc877c37027c 115 val |= 0x80;
coisme 1:bc877c37027c 116 } else {
coisme 1:bc877c37027c 117 val |= 0x00;
coisme 1:bc877c37027c 118 }
coisme 1:bc877c37027c 119
coisme 1:bc877c37027c 120 // Channel Selection
coisme 1:bc877c37027c 121 if (config->adcChannel == ADC_CH1) {
coisme 1:bc877c37027c 122 val |= 0x00;
coisme 1:bc877c37027c 123 } else if (config->adcChannel == ADC_CH2) {
coisme 1:bc877c37027c 124 val |= 0x20;
coisme 1:bc877c37027c 125 } else if (config->adcChannel == ADC_CH3) {
coisme 1:bc877c37027c 126 val |= 0x40;
coisme 1:bc877c37027c 127 } else { // config->adcChannel == ADC_CH4
coisme 1:bc877c37027c 128 val |= 0x60;
coisme 1:bc877c37027c 129 }
coisme 1:bc877c37027c 130
coisme 1:bc877c37027c 131 // Conversion Mode
coisme 1:bc877c37027c 132 if (config->conversionMode == CONTINUOUS) {
coisme 1:bc877c37027c 133 val |= 0x10;
coisme 1:bc877c37027c 134 } else if (config->conversionMode == ONE_SHOT) {
coisme 1:bc877c37027c 135 val |= 0x00;
coisme 1:bc877c37027c 136 }
coisme 1:bc877c37027c 137
coisme 1:bc877c37027c 138 // Sample Rate
coisme 1:bc877c37027c 139 if (config->sampleSetting == SAMPLE_240HZ_12BIT) {
coisme 1:bc877c37027c 140 val |= 0x00;
coisme 1:bc877c37027c 141 } else if (config->sampleSetting == SAMPLE_60HZ_14BIT) {
coisme 1:bc877c37027c 142 val |= 0x04;
coisme 1:bc877c37027c 143 } else { //config->sampleSetting == SAMPLE_15HZ_16BIT
coisme 1:bc877c37027c 144 val |= 0x08;
coisme 1:bc877c37027c 145 }
coisme 1:bc877c37027c 146
coisme 1:bc877c37027c 147 // PGA Gain Selection
coisme 1:bc877c37027c 148 if (config->pgaSetting == PGA_1X) {
coisme 1:bc877c37027c 149 val |= 0x00;
coisme 1:bc877c37027c 150 } else if (config->pgaSetting == PGA_2X) {
coisme 1:bc877c37027c 151 val |= 0x01;
coisme 1:bc877c37027c 152 } else if (config->pgaSetting == PGA_4X) {
coisme 1:bc877c37027c 153 val |= 0x02;
coisme 1:bc877c37027c 154 } else { // config->pgaSetting == PGA_8X) {
coisme 1:bc877c37027c 155 val |= 0x03;
coisme 1:bc877c37027c 156 }
coisme 1:bc877c37027c 157
coisme 1:bc877c37027c 158 // Write to the device.
coisme 1:bc877c37027c 159 if (connection->write((slaveAddress << 1), &val, LEN_ONE_BYTE) != 0) {
coisme 1:bc877c37027c 160 return ERROR_I2C_WRITE;
coisme 1:bc877c37027c 161 }
coisme 1:bc877c37027c 162
coisme 1:bc877c37027c 163 return SUCCESS;
coisme 1:bc877c37027c 164 }
coisme 1:bc877c37027c 165
coisme 1:bc877c37027c 166
coisme 1:bc877c37027c 167 MCP342X::Status MCP342X::setChannel(AdcChannel ch) {
coisme 1:bc877c37027c 168 currentConfig.adcChannel = ch;
coisme 1:bc877c37027c 169 return setConfig(&currentConfig);
coisme 1:bc877c37027c 170 }
coisme 1:bc877c37027c 171
coisme 1:bc877c37027c 172 MCP342X::AdcChannel MCP342X::getChannel() {
coisme 1:bc877c37027c 173 return currentConfig.adcChannel;
coisme 1:bc877c37027c 174 }
coisme 1:bc877c37027c 175
coisme 1:bc877c37027c 176 MCP342X::Status MCP342X::setConversionMode(ConversionMode mode) {
coisme 1:bc877c37027c 177 currentConfig.conversionMode = mode;
coisme 1:bc877c37027c 178 return setConfig(&currentConfig);
coisme 1:bc877c37027c 179 }
coisme 1:bc877c37027c 180
coisme 1:bc877c37027c 181 MCP342X::ConversionMode MCP342X::getConversionMode() {
coisme 1:bc877c37027c 182 return currentConfig.conversionMode;
coisme 1:bc877c37027c 183 }
coisme 1:bc877c37027c 184
coisme 1:bc877c37027c 185 MCP342X::Status MCP342X::setSampleSetting(SampleSetting s) {
coisme 1:bc877c37027c 186 currentConfig.sampleSetting = s;
coisme 1:bc877c37027c 187 return setConfig(&currentConfig);
coisme 1:bc877c37027c 188 }
coisme 1:bc877c37027c 189
coisme 1:bc877c37027c 190 MCP342X::SampleSetting MCP342X::getSampleSetting() {
coisme 1:bc877c37027c 191 return currentConfig.sampleSetting;
coisme 1:bc877c37027c 192 }
coisme 1:bc877c37027c 193
coisme 1:bc877c37027c 194 MCP342X::Status MCP342X::setPgaSetting(PgaSetting s) {
coisme 1:bc877c37027c 195 currentConfig.pgaSetting = s;
coisme 1:bc877c37027c 196 return setConfig(&currentConfig);
coisme 1:bc877c37027c 197 }
coisme 1:bc877c37027c 198
coisme 1:bc877c37027c 199 MCP342X::PgaSetting MCP342X::getPgaSetting() {
coisme 1:bc877c37027c 200 return currentConfig.pgaSetting;
coisme 1:bc877c37027c 201 }
coisme 1:bc877c37027c 202
coisme 1:bc877c37027c 203 MCP342X::Status MCP342X::getData(Data *pt) {
coisme 1:bc877c37027c 204 Status status;
coisme 1:bc877c37027c 205
coisme 1:bc877c37027c 206 int16_t val = 0;
coisme 1:bc877c37027c 207 if ((status=readData(&val, &currentConfig)) != SUCCESS) {
coisme 1:bc877c37027c 208 return status;
coisme 1:bc877c37027c 209 }
coisme 1:bc877c37027c 210
coisme 1:bc877c37027c 211 pt->st = currentConfig.dataStatus;
coisme 1:bc877c37027c 212 pt->value = val;
coisme 1:bc877c37027c 213
coisme 1:bc877c37027c 214 return status;
coisme 1:bc877c37027c 215 }
coisme 1:bc877c37027c 216
coisme 1:bc877c37027c 217 MCP342X::Status MCP342X::trigger(){
coisme 1:bc877c37027c 218 Status status;
coisme 1:bc877c37027c 219
coisme 1:bc877c37027c 220 currentConfig.measurementTrigger = TRIGGER;
coisme 1:bc877c37027c 221 status = setConfig(&currentConfig);
coisme 1:bc877c37027c 222 currentConfig.measurementTrigger = NONE;
coisme 1:bc877c37027c 223
coisme 1:bc877c37027c 224 return status;
coisme 2:96d9bfe25b03 225 }
coisme 2:96d9bfe25b03 226