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initial commit
Revision 6:9d393a9677f4, committed 2019-06-15
- Comitter:
- Vkadaba
- Date:
- Sat Jun 15 14:30:49 2019 +0000
- Parent:
- 5:0728bde67bdb
- Child:
- 7:e75e825c04a4
- Commit message:
- Register map is updated and sensor config files are modified
Changed in this revision
--- a/common/utils.c Wed Jun 05 05:39:15 2019 +0000 +++ b/common/utils.c Sat Jun 15 14:30:49 2019 +0000 @@ -26,8 +26,7 @@ ADMW_LOG_INFO("\tActive Configuration Errors - ATTENTION REQUIRED"); if (pStatus->deviceStatus & ADMW_DEVICE_STATUS_LUT_ERROR) ADMW_LOG_INFO("\tActive Look-Up Table Errors - ATTENTION REQUIRED"); - if (pStatus->deviceStatus & ADMW_DEVICE_STATUS_EXT_FLASH_ERROR) - ADMW_LOG_INFO("\tActive External Flash Errors - ATTENTION REQUIRED"); + if (pStatus->deviceStatus & ADMW_DEVICE_STATUS_ERROR) { @@ -45,12 +44,9 @@ if (pStatus->diagnosticsStatus & ADMW_DIAGNOSTICS_STATUS_CHECKSUM_ERROR) ADMW_LOG_INFO("\t\t\tInternal Checksum fault detected"); - if (pStatus->diagnosticsStatus & ADMW_DIAGNOSTICS_STATUS_COMMS_ERROR) - ADMW_LOG_INFO("\t\t\tInternal Communications fault detected"); - if (pStatus->diagnosticsStatus & ADMW_DIAGNOSTICS_STATUS_SUPPLY_MONITOR_ERROR) - ADMW_LOG_INFO("\t\t\tSupply Monitor fault detected"); - if (pStatus->diagnosticsStatus & ADMW_DIAGNOSTICS_STATUS_SUPPLY_CAP_ERROR) - ADMW_LOG_INFO("\t\t\tSupply Regulator Capacitor fault detected"); + + + if (pStatus->diagnosticsStatus & ADMW_DIAGNOSTICS_STATUS_CONVERSION_ERROR) ADMW_LOG_INFO("\t\t\tInternal ADC Conversions fault detected"); if (pStatus->diagnosticsStatus & ADMW_DIAGNOSTICS_STATUS_CALIBRATION_ERROR) @@ -117,31 +113,11 @@ uint32_t nNumSamples, ADMW_MEASUREMENT_MODE eMeasurementMode) { - bool fftMode = (eMeasurementMode == ADMW_MEASUREMENT_MODE_FFT); + - for (uint32_t i = 0; i < nNumSamples; i++) - { - if (fftMode) - { - ADMW_LOG_INFO("Sample # %2d Channel # %2d :: Bin/Raw %8d :: Magnitude %e :: flags:%s%s", - i+1, - pSampleBuffer[i].channelId, - pSampleBuffer[i].rawValue, - pSampleBuffer[i].processedValue, - pSampleBuffer[i].status & ADMW_DEVICE_STATUS_ERROR ? " ERROR" : "", - pSampleBuffer[i].status & ADMW_DEVICE_STATUS_ALERT ? " ALERT" : ""); - } - else - { - ADMW_LOG_INFO("Sample # %2d Channel # %2d :: Raw %0X %f :: Processed %f :: flags:%s%s", - i+1, - pSampleBuffer[i].channelId, - pSampleBuffer[i].rawValue, (pSampleBuffer[i].rawValue/1024.0), - pSampleBuffer[i].processedValue, - pSampleBuffer[i].status & ADMW_DEVICE_STATUS_ERROR ? " ERROR" : "", - pSampleBuffer[i].status & ADMW_DEVICE_STATUS_ALERT ? " ALERT" : ""); - } - } + + + } static void gpioCallbackFn(ADMW_GPIO_PIN ePinId, void * pArg)
--- a/i2c0_sensirionSHT3X_config.c Wed Jun 05 05:39:15 2019 +0000 +++ b/i2c0_sensirionSHT3X_config.c Sat Jun 15 14:30:49 2019 +0000 @@ -47,7 +47,7 @@ .productId = ADMW_PRODUCT_ID_ADMW1001, .admw1001 = { .power = { - .powerMode = ADMW1001_POWER_MODE_FULL, + .powerMode = ADMW1001_POWER_MODE_ACTIVE, }, .measurement = { .operatingMode = ADMW1001_OPERATING_MODE_SINGLECYCLE,
--- a/inc/admw1001/ADMW1001_REGISTERS.h Wed Jun 05 05:39:15 2019 +0000 +++ b/inc/admw1001/ADMW1001_REGISTERS.h Sat Jun 15 14:30:49 2019 +0000 @@ -1,12 +1,12 @@ /* ================================================================================ - Project : ADMW1000_REGISTERS - File : ADMW1000_REGISTERS.h + Project : ADMW1001_REGISTERS + File : ADMW1001_REGISTERS.h Description : Register Definitions - Date : Nov 5, 2018 + Date : Apr 30, 2019 - Copyright (c) 2018 Analog Devices, Inc. All Rights Reserved. + Copyright (c) 2019 Analog Devices, Inc. All Rights Reserved. This software is proprietary and confidential to Analog Devices, Inc. and its licensors. @@ -25,53 +25,53 @@ #define __ADI_GENERATED_DEF_HEADERS__ 1 #endif -#define __ADI_HAS_CORE__ 1 -#define __ADI_HAS_SPI__ 1 -#define __ADI_HAS_TEST__ 1 +#define __ADI_HAS_CORE__ 1 +#define __ADI_HAS_SPI__ 1 +#define __ADI_HASTEST__ 1 /* ============================================================================================================================ ============================================================================================================================ */ /* ============================================================================================================================ - ADMW_SPI + SPI ============================================================================================================================ */ -#define REG_SPI_INTERFACE_CONFIG_A_RESET 0x00000030 /* Reset Value for Interface_Config_A */ -#define REG_SPI_INTERFACE_CONFIG_A 0x00000000 /* ADMW_SPI Interface Configuration A */ -#define REG_SPI_INTERFACE_CONFIG_B_RESET 0x00000000 /* Reset Value for Interface_Config_B */ -#define REG_SPI_INTERFACE_CONFIG_B 0x00000001 /* ADMW_SPI Interface Configuration B */ -#define REG_SPI_DEVICE_CONFIG_RESET 0x00000000 /* Reset Value for Device_Config */ -#define REG_SPI_DEVICE_CONFIG 0x00000002 /* ADMW_SPI Device Configuration */ -#define REG_SPI_CHIP_TYPE_RESET 0x00000007 /* Reset Value for Chip_Type */ -#define REG_SPI_CHIP_TYPE 0x00000003 /* ADMW_SPI Chip Type */ -#define REG_SPI_PRODUCT_ID_L_RESET 0x00000020 /* Reset Value for Product_ID_L */ -#define REG_SPI_PRODUCT_ID_L 0x00000004 /* ADMW_SPI Product ID Low */ -#define REG_SPI_PRODUCT_ID_H_RESET 0x00000000 /* Reset Value for Product_ID_H */ -#define REG_SPI_PRODUCT_ID_H 0x00000005 /* ADMW_SPI Product ID High */ -#define REG_SPI_CHIP_GRADE_RESET 0x00000000 /* Reset Value for Chip_Grade */ -#define REG_SPI_CHIP_GRADE 0x00000006 /* ADMW_SPI Chip Grade */ -#define REG_SPI_SCRATCH_PAD_RESET 0x00000000 /* Reset Value for Scratch_Pad */ -#define REG_SPI_SCRATCH_PAD 0x0000000A /* ADMW_SPI Scratch Pad */ -#define REG_SPI_SPI_REVISION_RESET 0x00000082 /* Reset Value for SPI_Revision */ -#define REG_SPI_SPI_REVISION 0x0000000B /* ADMW_SPI SPI Revision */ -#define REG_SPI_VENDOR_L_RESET 0x00000056 /* Reset Value for Vendor_L */ -#define REG_SPI_VENDOR_L 0x0000000C /* ADMW_SPI Vendor ID Low */ -#define REG_SPI_VENDOR_H_RESET 0x00000004 /* Reset Value for Vendor_H */ -#define REG_SPI_VENDOR_H 0x0000000D /* ADMW_SPI Vendor ID High */ -#define REG_SPI_STREAM_MODE_RESET 0x00000000 /* Reset Value for Stream_Mode */ -#define REG_SPI_STREAM_MODE 0x0000000E /* ADMW_SPI Stream Mode */ -#define REG_SPI_TRANSFER_CONFIG_RESET 0x00000000 /* Reset Value for Transfer_Config */ -#define REG_SPI_TRANSFER_CONFIG 0x0000000F /* ADMW_SPI Transfer Config */ -#define REG_SPI_INTERFACE_CONFIG_C_RESET 0x00000033 /* Reset Value for Interface_Config_C */ -#define REG_SPI_INTERFACE_CONFIG_C 0x00000010 /* ADMW_SPI Interface Configuration C */ -#define REG_SPI_INTERFACE_STATUS_A_RESET 0x00000000 /* Reset Value for Interface_Status_A */ -#define REG_SPI_INTERFACE_STATUS_A 0x00000011 /* ADMW_SPI Interface Status A */ +#define REG_SPI_INTERFACE_CONFIG_A_RESET 0x00000030 /* Reset Value for Interface_Config_A */ +#define REG_SPI_INTERFACE_CONFIG_A 0x00000000 /* SPI Interface Configuration A */ +#define REG_SPI_INTERFACE_CONFIG_B_RESET 0x00000000 /* Reset Value for Interface_Config_B */ +#define REG_SPI_INTERFACE_CONFIG_B 0x00000001 /* SPI Interface Configuration B */ +#define REG_SPI_DEVICE_CONFIG_RESET 0x00000000 /* Reset Value for Device_Config */ +#define REG_SPI_DEVICE_CONFIG 0x00000002 /* SPI Device Configuration */ +#define REG_SPI_CHIP_TYPE_RESET 0x00000007 /* Reset Value for Chip_Type */ +#define REG_SPI_CHIP_TYPE 0x00000003 /* SPI Chip Type */ +#define REG_SPI_PRODUCT_ID_L_RESET 0x00000020 /* Reset Value for Product_ID_L */ +#define REG_SPI_PRODUCT_ID_L 0x00000004 /* SPI Product ID Low */ +#define REG_SPI_PRODUCT_ID_H_RESET 0x00000000 /* Reset Value for Product_ID_H */ +#define REG_SPI_PRODUCT_ID_H 0x00000005 /* SPI Product ID High */ +#define REG_SPI_CHIP_GRADE_RESET 0x00000000 /* Reset Value for Chip_Grade */ +#define REG_SPI_CHIP_GRADE 0x00000006 /* SPI Chip Grade */ +#define REG_SPI_SCRATCH_PAD_RESET 0x00000000 /* Reset Value for Scratch_Pad */ +#define REG_SPI_SCRATCH_PAD 0x0000000A /* SPI Scratch Pad */ +#define REG_SPI_SPI_REVISION_RESET 0x00000082 /* Reset Value for SPI_Revision */ +#define REG_SPI_SPI_REVISION 0x0000000B /* SPI SPI Revision */ +#define REG_SPI_VENDOR_L_RESET 0x00000056 /* Reset Value for Vendor_L */ +#define REG_SPI_VENDOR_L 0x0000000C /* SPI Vendor ID Low */ +#define REG_SPI_VENDOR_H_RESET 0x00000004 /* Reset Value for Vendor_H */ +#define REG_SPI_VENDOR_H 0x0000000D /* SPI Vendor ID High */ +#define REG_SPI_STREAM_MODE_RESET 0x00000000 /* Reset Value for Stream_Mode */ +#define REG_SPI_STREAM_MODE 0x0000000E /* SPI Stream Mode */ +#define REG_SPI_TRANSFER_CONFIG_RESET 0x00000000 /* Reset Value for Transfer_Config */ +#define REG_SPI_TRANSFER_CONFIG 0x0000000F /* SPI Transfer Config */ +#define REG_SPI_INTERFACE_CONFIG_C_RESET 0x00000033 /* Reset Value for Interface_Config_C */ +#define REG_SPI_INTERFACE_CONFIG_C 0x00000010 /* SPI Interface Configuration C */ +#define REG_SPI_INTERFACE_STATUS_A_RESET 0x00000000 /* Reset Value for Interface_Status_A */ +#define REG_SPI_INTERFACE_STATUS_A 0x00000011 /* SPI Interface Status A */ /* ============================================================================================================================ - ADMW_SPI Register BitMasks, Positions & Enumerations + SPI Register BitMasks, Positions & Enumerations ============================================================================================================================ */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_SPI_INTERFACE_CONFIG_A Pos/Masks Description + SPI_INTERFACE_CONFIG_A Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_SPI_INTERFACE_CONFIG_A_SW_RESET 7 /* First of Two of SW_RESET Bits. */ #define BITP_SPI_INTERFACE_CONFIG_A_ADDR_ASCENSION 5 /* Determines Sequential Addressing Behavior */ @@ -81,88 +81,88 @@ #define BITM_SPI_INTERFACE_CONFIG_A_ADDR_ASCENSION 0x00000020 /* Determines Sequential Addressing Behavior */ #define BITM_SPI_INTERFACE_CONFIG_A_SDO_ENABLE 0x00000010 /* SDO Pin Enable */ #define BITM_SPI_INTERFACE_CONFIG_A_SW_RESETX 0x00000001 /* Second of Two of SW_RESET Bits. */ -#define ENUM_SPI_INTERFACE_CONFIG_A_DESCEND 0x00000000 /* Addr_Ascension: Address accessed is decremented by one for each data byte when streaming */ -#define ENUM_SPI_INTERFACE_CONFIG_A_ASCEND 0x00000020 /* Addr_Ascension: Address accessed is incremented by one for each data byte when streaming */ +#define ENUM_SPI_INTERFACE_CONFIG_A_DESCEND 0x00000000 /* Addr_Ascension: Address accessed is decremented by one for each data byte when streaming */ +#define ENUM_SPI_INTERFACE_CONFIG_A_ASCEND 0x00000020 /* Addr_Ascension: Address accessed is incremented by one for each data byte when streaming */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_SPI_INTERFACE_CONFIG_B Pos/Masks Description + SPI_INTERFACE_CONFIG_B Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_SPI_SPI_INTERFACE_CONFIG_B_SINGLE_INST 7 /* Select Streaming or Single Instruction Mode */ +#define BITP_SPI_INTERFACE_CONFIG_B_SINGLE_INST 7 /* Select Streaming or Single Instruction Mode */ #define BITM_SPI_INTERFACE_CONFIG_B_SINGLE_INST 0x00000080 /* Select Streaming or Single Instruction Mode */ #define ENUM_SPI_INTERFACE_CONFIG_B_STREAMING_MODE 0x00000000 /* Single_Inst: Streaming mode is enabled */ #define ENUM_SPI_INTERFACE_CONFIG_B_SINGLE_INSTRUCTION_MODE 0x00000080 /* Single_Inst: Single Instruction mode is enabled */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_SPI_DEVICE_CONFIG Pos/Masks Description + SPI_DEVICE_CONFIG Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_SPI_SPI_DEVICE_CONFIG_OPERATING_MODES 0 /* Power Modes */ +#define BITP_SPI_DEVICE_CONFIG_OPERATING_MODES 0 /* Power Modes */ #define BITM_SPI_DEVICE_CONFIG_OPERATING_MODES 0x00000003 /* Power Modes */ -#define ENUM_SPI_DEVICE_CONFIG_NORMAL 0x00000000 /* Operating_Modes: Normal Operating Mode */ -#define ENUM_SPI_DEVICE_CONFIG_SLEEP 0x00000003 /* Operating_Modes: Low Power Mode */ +#define ENUM_SPI_DEVICE_CONFIG_NORMAL 0x00000000 /* Operating_Modes: Normal Operating Mode */ +#define ENUM_SPI_DEVICE_CONFIG_SLEEP 0x00000003 /* Operating_Modes: Low Power Mode */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_SPI_CHIP_TYPE Pos/Masks Description + SPI_CHIP_TYPE Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_SPI_CHIP_TYPE_CHIP_TYPE 0 /* Precision ADC */ -#define BITM_SPI_CHIP_TYPE_CHIP_TYPE 0x0000000F /* Precision ADC */ +#define BITP_SPI_CHIP_TYPE_CHIP_TYPE 0 /* Precision ADC */ +#define BITM_SPI_CHIP_TYPE_CHIP_TYPE 0x0000000F /* Precision ADC */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_SPI_PRODUCT_ID_L Pos/Masks Description + SPI_PRODUCT_ID_L Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_SPI_PRODUCT_ID_L_PRODUCT_ID 0 /* This is Device Chip Type/Family */ -#define BITM_SPI_PRODUCT_ID_L_PRODUCT_ID 0x000000FF /* This is Device Chip Type/Family */ +#define BITP_SPI_PRODUCT_ID_L_PRODUCT_ID 0 /* This is Device Chip Type/Family */ +#define BITM_SPI_PRODUCT_ID_L_PRODUCT_ID 0x000000FF /* This is Device Chip Type/Family */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_SPI_PRODUCT_ID_H Pos/Masks Description + SPI_PRODUCT_ID_H Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_SPI_PRODUCT_ID_H_PRODUCT_ID 0 /* This is Device Chip Type/Family */ -#define BITM_SPI_PRODUCT_ID_H_PRODUCT_ID 0x000000FF /* This is Device Chip Type/Family */ +#define BITP_SPI_PRODUCT_ID_H_PRODUCT_ID 0 /* This is Device Chip Type/Family */ +#define BITM_SPI_PRODUCT_ID_H_PRODUCT_ID 0x000000FF /* This is Device Chip Type/Family */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_SPI_CHIP_GRADE Pos/Masks Description + SPI_CHIP_GRADE Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_SPI_CHIP_GRADE_GRADE 4 /* This is the Device Performance Grade */ -#define BITP_SPI_CHIP_GRADE_DEVICE_REVISION 0 /* This is the Device Hardware Revision */ -#define BITM_SPI_CHIP_GRADE_GRADE 0x000000F0 /* This is the Device Performance Grade */ -#define BITM_SPI_CHIP_GRADE_DEVICE_REVISION 0x0000000F /* This is the Device Hardware Revision */ +#define BITP_SPI_CHIP_GRADE_GRADE 4 /* This is the Device Performance Grade */ +#define BITP_SPI_CHIP_GRADE_DEVICE_REVISION 0 /* This is the Device Hardware Revision */ +#define BITM_SPI_CHIP_GRADE_GRADE 0x000000F0 /* This is the Device Performance Grade */ +#define BITM_SPI_CHIP_GRADE_DEVICE_REVISION 0x0000000F /* This is the Device Hardware Revision */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_SPI_SCRATCH_PAD Pos/Masks Description + SPI_SCRATCH_PAD Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_SPI_SCRATCH_PAD_SCRATCH_VALUE 0 /* Software Scratchpad */ -#define BITM_SPI_SCRATCH_PAD_SCRATCH_VALUE 0x000000FF /* Software Scratchpad */ +#define BITP_SPI_SCRATCH_PAD_SCRATCH_VALUE 0 /* Software Scratchpad */ +#define BITM_SPI_SCRATCH_PAD_SCRATCH_VALUE 0x000000FF /* Software Scratchpad */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_SPI_SPI_REVISION Pos/Masks Description + SPI_SPI_REVISION Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_SPI_SPI_REVISION_SPI_TYPE 6 /* Always Reads as 0x2 */ -#define BITP_SPI_SPI_REVISION_VERSION 0 /* SPI Version */ -#define BITM_SPI_SPI_REVISION_SPI_TYPE 0x000000C0 /* Always Reads as 0x2 */ -#define BITM_SPI_SPI_REVISION_VERSION 0x0000003F /* SPI Version */ -#define ENUM_SPI_SPI_REVISION_ADI_SPI 0x00000000 -#define ENUM_SPI_SPI_REVISION_LPT_SPI 0x00000080 -#define ENUM_SPI_SPI_REVISION_REV1_0 0x00000002 /* Version: Revision 1.0 */ +#define BITP_SPI_SPI_REVISION_SPI_TYPE 6 /* Always Reads as 0x2 */ +#define BITP_SPI_SPI_REVISION_VERSION 0 /* SPI Version */ +#define BITM_SPI_SPI_REVISION_SPI_TYPE 0x000000C0 /* Always Reads as 0x2 */ +#define BITM_SPI_SPI_REVISION_VERSION 0x0000003F /* SPI Version */ +#define ENUM_SPI_SPI_REVISION_ADI_SPI 0x00000000 +#define ENUM_SPI_SPI_REVISION_LPT_SPI 0x00000080 +#define ENUM_SPI_SPI_REVISION_REV1_0 0x00000002 /* Version: Revision 1.0 */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_SPI_VENDOR_L Pos/Masks Description + SPI_VENDOR_L Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_SPI_VENDOR_L_VID 0 /* Analog Devices Vendor ID */ -#define BITM_SPI_VENDOR_L_VID 0x000000FF /* Analog Devices Vendor ID */ +#define BITP_SPI_VENDOR_L_VID 0 /* Analog Devices Vendor ID */ +#define BITM_SPI_VENDOR_L_VID 0x000000FF /* Analog Devices Vendor ID */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_SPI_VENDOR_H Pos/Masks Description + SPI_VENDOR_H Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_SPI_VENDOR_H_VID 0 /* Analog Devices Vendor ID */ -#define BITM_SPI_VENDOR_H_VID 0x000000FF /* Analog Devices Vendor ID */ +#define BITP_SPI_VENDOR_H_VID 0 /* Analog Devices Vendor ID */ +#define BITM_SPI_VENDOR_H_VID 0x000000FF /* Analog Devices Vendor ID */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_SPI_STREAM_MODE Pos/Masks Description + SPI_STREAM_MODE Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_SPI_STREAM_MODE_LOOP_COUNT 0 /* Sets the Data Byte Count Before Looping to Start Address */ -#define BITM_SPI_STREAM_MODE_LOOP_COUNT 0x000000FF /* Sets the Data Byte Count Before Looping to Start Address */ +#define BITP_SPI_STREAM_MODE_LOOP_COUNT 0 /* Sets the Data Byte Count Before Looping to Start Address */ +#define BITM_SPI_STREAM_MODE_LOOP_COUNT 0x000000FF /* Sets the Data Byte Count Before Looping to Start Address */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_SPI_TRANSFER_CONFIG Pos/Masks Description + SPI_TRANSFER_CONFIG Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_SPI_TRANSFER_CONFIG_STREAM_MODE 1 /* When Streaming, Controls Master-Slave Transfer */ #define BITM_SPI_TRANSFER_CONFIG_STREAM_MODE 0x00000002 /* When Streaming, Controls Master-Slave Transfer */ @@ -170,7 +170,7 @@ #define ENUM_SPI_TRANSFER_CONFIG_UPDATE_ON_ADDRESS_LOOP 0x00000002 /* Stream_Mode: Transfers when address loops */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_SPI_INTERFACE_CONFIG_C Pos/Masks Description + SPI_INTERFACE_CONFIG_C Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_SPI_INTERFACE_CONFIG_C_CRC_ENABLE 6 /* CRC Enable */ #define BITP_SPI_INTERFACE_CONFIG_C_STRICT_REGISTER_ACCESS 5 /* Multi-byte Registers Must Be Read/Written in Full */ @@ -181,12 +181,12 @@ #define BITM_SPI_INTERFACE_CONFIG_C_SEND_STATUS 0x00000010 /* Enables Sending of Status in 4-wire Mode */ #define BITM_SPI_INTERFACE_CONFIG_C_CRC_ENABLEB 0x00000003 /* Inverted CRC Enable */ #define ENUM_SPI_INTERFACE_CONFIG_C_DISABLED 0x00000000 /* CRC_Enable: CRC Disabled */ -#define ENUM_SPI_INTERFACE_CONFIG_C_ENABLED 0x00000040 /* CRC_Enable: CRC Enabled */ +#define ENUM_SPI_INTERFACE_CONFIG_C_ENABLED 0x00000040 /* CRC_Enable: CRC Enabled */ #define ENUM_SPI_INTERFACE_CONFIG_C_NORMAL_ACCESS 0x00000000 /* Strict_Register_Access: Normal mode, no access restrictions */ #define ENUM_SPI_INTERFACE_CONFIG_C_STRICT_ACCESS 0x00000020 /* Strict_Register_Access: Strict mode, multi-byte registers require all bytes read/written */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_SPI_INTERFACE_STATUS_A Pos/Masks Description + SPI_INTERFACE_STATUS_A Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_SPI_INTERFACE_STATUS_A_NOT_READY_ERROR 7 /* Device Not Ready for Transaction */ #define BITP_SPI_INTERFACE_STATUS_A_CLOCK_COUNT_ERROR 4 /* Incorrect Number of Clocks Detected in a Transaction */ @@ -203,344 +203,266 @@ /* ============================================================================================================================ - ADMW1000 Core Registers + ADISENSE1000 Core Registers ============================================================================================================================ */ /* ============================================================================================================================ - ADMW_CORE + CORE ============================================================================================================================ */ -#define REG_CORE_COMMAND_RESET 0x00000000 /* Reset Value for Command */ -#define REG_CORE_COMMAND 0x00000014 /* ADMW_CORE Special Command */ -#define REG_CORE_MODE_RESET 0x00000000 /* Reset Value for Mode */ -#define REG_CORE_MODE 0x00000016 /* ADMW_CORE Operating Mode and DRDY Control */ -#define REG_CORE_POWER_CONFIG_RESET 0x00000000 /* Reset Value for Power_Config */ -#define REG_CORE_POWER_CONFIG 0x00000017 /* ADMW_CORE General Configuration */ -#define REG_CORE_CYCLE_CONTROL_RESET 0x00000000 /* Reset Value for Cycle_Control */ -#define REG_CORE_CYCLE_CONTROL 0x00000018 /* ADMW_CORE Measurement Cycle */ -#define REG_CORE_FIFO_NUM_CYCLES_RESET 0x00000001 /* Reset Value for Fifo_Num_Cycles */ -#define REG_CORE_FIFO_NUM_CYCLES 0x0000001A /* ADMW_CORE Number of Measurement Cycles to Store in FIFO */ +#define REG_CORE_COMMAND_RESET 0x00000000 /* Reset Value for Command */ +#define REG_CORE_COMMAND 0x00000014 /* CORE Special Command */ +#define REG_CORE_MODE_RESET 0x00000000 /* Reset Value for Mode */ +#define REG_CORE_MODE 0x00000016 /* CORE Operating Mode and DRDY Control */ +#define REG_CORE_POWER_CONFIG_RESET 0x00000000 /* Reset Value for Power_Config */ +#define REG_CORE_POWER_CONFIG 0x00000017 /* CORE General Configuration */ +#define REG_CORE_CYCLE_CONTROL_RESET 0x00000000 /* Reset Value for Cycle_Control */ +#define REG_CORE_CYCLE_CONTROL 0x00000018 /* CORE Measurement Cycle */ +#define REG_CORE_FIFO_NUM_CYCLES_RESET 0x00000001 /* Reset Value for Fifo_Num_Cycles */ +#define REG_CORE_FIFO_NUM_CYCLES 0x0000001A /* CORE Number of Measurement Cycles to Store in FIFO */ #define REG_CORE_MULTI_CYCLE_REPEAT_INTERVAL_RESET 0x00000000 /* Reset Value for Multi_Cycle_Repeat_Interval */ -#define REG_CORE_MULTI_CYCLE_REPEAT_INTERVAL 0x0000001C /* ADMW_CORE Time Between Repeats of Multi-Cycle Conversions.... */ -#define REG_CORE_STATUS_RESET 0x00000000 /* Reset Value for Status */ -#define REG_CORE_STATUS 0x00000020 /* ADMW_CORE General Status */ -#define REG_CORE_DIAGNOSTICS_STATUS_RESET 0x00000000 /* Reset Value for Diagnostics_Status */ -#define REG_CORE_DIAGNOSTICS_STATUS 0x00000024 /* ADMW_CORE Diagnostics Status */ -#define REG_CORE_CHANNEL_ALERT_STATUS_RESET 0x00000000 /* Reset Value for Channel_Alert_Status */ -#define REG_CORE_CHANNEL_ALERT_STATUS 0x00000026 /* ADMW_CORE Alert Status Summary */ -#define REG_CORE_ALERT_STATUS_2_RESET 0x00000000 /* Reset Value for Alert_Status_2 */ -#define REG_CORE_ALERT_STATUS_2 0x00000028 /* ADMW_CORE Additional Alert Status Information */ -#define REG_CORE_ALERT_DETAIL_CHn_RESET 0x00000000 /* Reset Value for Alert_Detail_Ch[n] */ -#define REG_CORE_ALERT_DETAIL_CH0_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH0 */ -#define REG_CORE_ALERT_DETAIL_CH1_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH1 */ -#define REG_CORE_ALERT_DETAIL_CH2_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH2 */ -#define REG_CORE_ALERT_DETAIL_CH3_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH3 */ -#define REG_CORE_ALERT_DETAIL_CH4_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH4 */ -#define REG_CORE_ALERT_DETAIL_CH5_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH5 */ -#define REG_CORE_ALERT_DETAIL_CH6_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH6 */ -#define REG_CORE_ALERT_DETAIL_CH7_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH7 */ -#define REG_CORE_ALERT_DETAIL_CH8_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH8 */ -#define REG_CORE_ALERT_DETAIL_CH9_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH9 */ -#define REG_CORE_ALERT_DETAIL_CH10_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH10 */ -#define REG_CORE_ALERT_DETAIL_CH11_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH11 */ -#define REG_CORE_ALERT_DETAIL_CH12_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH12 */ -#define REG_CORE_ALERT_DETAIL_CH13_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH13 */ -#define REG_CORE_ALERT_DETAIL_CH14_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH14 */ -#define REG_CORE_ALERT_DETAIL_CH15_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH15 */ -#define REG_CORE_ALERT_DETAIL_CH0 0x0000002A /* ADMW_CORE Detailed Error Information */ -#define REG_CORE_ALERT_DETAIL_CH1 0x0000002C /* ADMW_CORE Detailed Error Information */ -#define REG_CORE_ALERT_DETAIL_CH2 0x0000002E /* ADMW_CORE Detailed Error Information */ -#define REG_CORE_ALERT_DETAIL_CH3 0x00000030 /* ADMW_CORE Detailed Error Information */ -#define REG_CORE_ALERT_DETAIL_CH4 0x00000032 /* ADMW_CORE Detailed Error Information */ -#define REG_CORE_ALERT_DETAIL_CH5 0x00000034 /* ADMW_CORE Detailed Error Information */ -#define REG_CORE_ALERT_DETAIL_CH6 0x00000036 /* ADMW_CORE Detailed Error Information */ -#define REG_CORE_ALERT_DETAIL_CH7 0x00000038 /* ADMW_CORE Detailed Error Information */ -#define REG_CORE_ALERT_DETAIL_CH8 0x0000003A /* ADMW_CORE Detailed Error Information */ -#define REG_CORE_ALERT_DETAIL_CH9 0x0000003C /* ADMW_CORE Detailed Error Information */ -#define REG_CORE_ALERT_DETAIL_CH10 0x0000003E /* ADMW_CORE Detailed Error Information */ -#define REG_CORE_ALERT_DETAIL_CH11 0x00000040 /* ADMW_CORE Detailed Error Information */ -#define REG_CORE_ALERT_DETAIL_CH12 0x00000042 /* ADMW_CORE Detailed Error Information */ -#define REG_CORE_ALERT_DETAIL_CH13 0x00000044 /* ADMW_CORE Detailed Error Information */ -#define REG_CORE_ALERT_DETAIL_CH14 0x00000046 /* ADMW_CORE Detailed Error Information */ -#define REG_CORE_ALERT_DETAIL_CH15 0x00000048 /* ADMW_CORE Detailed Error Information */ -#define REG_CORE_ALERT_DETAIL_CHn(i) (REG_CORE_ALERT_DETAIL_CH0 + ((i) * 2)) -#define REG_CORE_ALERT_DETAIL_CHn_COUNT 16 -#define REG_CORE_ERROR_CODE_RESET 0x00000000 /* Reset Value for Error_Code */ -#define REG_CORE_ERROR_CODE 0x0000004C /* ADMW_CORE Code Indicating Source of Error */ -#define REG_CORE_ALERT_CODE_RESET 0x00000000 /* Reset Value for Alert_Code */ -#define REG_CORE_ALERT_CODE 0x0000004E /* ADMW_CORE Code Indicating Source of Alert */ -#define REG_CORE_EXTERNAL_REFERENCE1_RESET 0x00000000 /* Reset Value for External_Reference1 */ -#define REG_CORE_EXTERNAL_REFERENCE1 0x00000050 /* ADMW_CORE External Reference Information */ -#define REG_CORE_EXTERNAL_REFERENCE2_RESET 0x00000000 /* Reset Value for External_Reference2 */ -#define REG_CORE_EXTERNAL_REFERENCE2 0x00000054 /* ADMW_CORE External Reference Information */ -#define REG_CORE_DIAGNOSTICS_CONTROL_RESET 0x00000000 /* Reset Value for Diagnostics_Control */ -#define REG_CORE_DIAGNOSTICS_CONTROL 0x0000005C /* ADMW_CORE Diagnostic Control */ -#define REG_CORE_DATA_FIFO_RESET 0x00000000 /* Reset Value for Data_FIFO */ -#define REG_CORE_DATA_FIFO 0x00000060 /* ADMW_CORE FIFO Buffer of Sensor Results */ -#define REG_CORE_DEBUG_CODE_RESET 0x00000000 /* Reset Value for Debug_Code */ -#define REG_CORE_DEBUG_CODE 0x00000064 /* ADMW_CORE Additional Information on Source of Alert or Errors */ -#define REG_CORE_FFT_CONFIG_RESET 0x00000000 /* Reset Value for FFT_Config */ -#define REG_CORE_FFT_CONFIG 0x00000068 /* ADMW_CORE FFT Configuration */ +#define REG_CORE_MULTI_CYCLE_REPEAT_INTERVAL 0x0000001C /* CORE Time Between Repeats of Multi-Cycle Conversions.... */ +#define REG_CORE_STATUS_RESET 0x00000000 /* Reset Value for Status */ +#define REG_CORE_STATUS 0x00000020 /* CORE General Status */ +#define REG_CORE_DIAGNOSTICS_STATUS_RESET 0x00000000 /* Reset Value for Diagnostics_Status */ +#define REG_CORE_DIAGNOSTICS_STATUS 0x00000024 /* CORE Diagnostics Status */ +#define REG_CORE_CHANNEL_ALERT_STATUS_RESET 0x00000000 /* Reset Value for Channel_Alert_Status */ +#define REG_CORE_CHANNEL_ALERT_STATUS 0x00000026 /* CORE Alert Status Summary */ +#define REG_CORE_ALERT_STATUS_2_RESET 0x00000000 /* Reset Value for Alert_Status_2 */ +#define REG_CORE_ALERT_STATUS_2 0x00000028 /* CORE Additional Alert Status Information */ +#define REG_CORE_ALERT_DETAIL_CHn_RESET 0x00000000 /* Reset Value for Alert_Detail_Ch[n] */ +#define REG_CORE_ALERT_DETAIL_CH0_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH0 */ +#define REG_CORE_ALERT_DETAIL_CH1_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH1 */ +#define REG_CORE_ALERT_DETAIL_CH2_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH2 */ +#define REG_CORE_ALERT_DETAIL_CH3_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH3 */ +#define REG_CORE_ALERT_DETAIL_CH4_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH4 */ +#define REG_CORE_ALERT_DETAIL_CH5_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH5 */ +#define REG_CORE_ALERT_DETAIL_CH6_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH6 */ +#define REG_CORE_ALERT_DETAIL_CH7_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH7 */ +#define REG_CORE_ALERT_DETAIL_CH8_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH8 */ +#define REG_CORE_ALERT_DETAIL_CH9_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH9 */ +#define REG_CORE_ALERT_DETAIL_CH10_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH10 */ +#define REG_CORE_ALERT_DETAIL_CH11_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH11 */ +#define REG_CORE_ALERT_DETAIL_CH12_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH12 */ +#define REG_CORE_ALERT_DETAIL_CH13_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH13 */ +#define REG_CORE_ALERT_DETAIL_CH14_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH14 */ +#define REG_CORE_ALERT_DETAIL_CH15_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_DETAIL_CH15 */ +#define REG_CORE_ALERT_DETAIL_CH0 0x0000002A /* CORE Detailed Error Information */ +#define REG_CORE_ALERT_DETAIL_CH1 0x0000002C /* CORE Detailed Error Information */ +#define REG_CORE_ALERT_DETAIL_CH2 0x0000002E /* CORE Detailed Error Information */ +#define REG_CORE_ALERT_DETAIL_CH3 0x00000030 /* CORE Detailed Error Information */ +#define REG_CORE_ALERT_DETAIL_CH4 0x00000032 /* CORE Detailed Error Information */ +#define REG_CORE_ALERT_DETAIL_CH5 0x00000034 /* CORE Detailed Error Information */ +#define REG_CORE_ALERT_DETAIL_CH6 0x00000036 /* CORE Detailed Error Information */ +#define REG_CORE_ALERT_DETAIL_CH7 0x00000038 /* CORE Detailed Error Information */ +#define REG_CORE_ALERT_DETAIL_CH8 0x0000003A /* CORE Detailed Error Information */ +#define REG_CORE_ALERT_DETAIL_CH9 0x0000003C /* CORE Detailed Error Information */ +#define REG_CORE_ALERT_DETAIL_CH10 0x0000003E /* CORE Detailed Error Information */ +#define REG_CORE_ALERT_DETAIL_CH11 0x00000040 /* CORE Detailed Error Information */ +#define REG_CORE_ALERT_DETAIL_CH12 0x00000042 /* CORE Detailed Error Information */ +#define REG_CORE_ALERT_DETAIL_CH13 0x00000044 /* CORE Detailed Error Information */ +#define REG_CORE_ALERT_DETAIL_CH14 0x00000046 /* CORE Detailed Error Information */ +#define REG_CORE_ALERT_DETAIL_CH15 0x00000048 /* CORE Detailed Error Information */ +#define REG_CORE_ALERT_DETAIL_CHn(i) (REG_CORE_ALERT_DETAIL_CH0 + ((i) * 2)) +#define REG_CORE_ALERT_DETAIL_CHn_COUNT 16 +#define REG_CORE_ERROR_CODE_RESET 0x00000000 /* Reset Value for Error_Code */ +#define REG_CORE_ERROR_CODE 0x0000004C /* CORE Code Indicating Source of Error */ +#define REG_CORE_ALERT_CODE_RESET 0x00000000 /* Reset Value for Alert_Code */ +#define REG_CORE_ALERT_CODE 0x0000004E /* CORE Code Indicating Source of Alert */ +#define REG_CORE_EXTERNAL_REFERENCE_RESISTOR_RESET 0x447A0000 /* Reset Value for External_Reference_Resistor */ +#define REG_CORE_EXTERNAL_REFERENCE_RESISTOR 0x00000050 /* CORE External Reference Information */ +#define REG_CORE_EXTERNAL_VOLTAGE_REFERENCE_RESET 0x40200000 /* Reset Value for External_Voltage_Reference */ +#define REG_CORE_EXTERNAL_VOLTAGE_REFERENCE 0x00000054 /* CORE External Reference Information */ +#define REG_CORE_DIAGNOSTICS_CONTROL_RESET 0x00000000 /* Reset Value for Diagnostics_Control */ +#define REG_CORE_DIAGNOSTICS_CONTROL 0x0000005C /* CORE Diagnostic Control */ +#define REG_CORE_DATA_FIFO_RESET 0x00000000 /* Reset Value for Data_FIFO */ +#define REG_CORE_DATA_FIFO 0x00000060 /* CORE FIFO Buffer of Sensor Results */ +#define REG_CORE_DEBUG_CODE_RESET 0x00000000 /* Reset Value for Debug_Code */ +#define REG_CORE_DEBUG_CODE 0x00000064 /* CORE Additional Information on Source of Alert or Errors */ #define REG_CORE_ADVANCED_SENSOR_ACCESS_RESET 0x00000000 /* Reset Value for Advanced_Sensor_Access */ -#define REG_CORE_ADVANCED_SENSOR_ACCESS 0x0000006E /* ADMW_CORE Enables Access to Advanced Sensor Configuration */ -#define REG_CORE_LUT_SELECT_RESET 0x00000000 /* Reset Value for LUT_Select */ -#define REG_CORE_LUT_SELECT 0x00000070 /* ADMW_CORE Read/Write Strobe */ -#define REG_CORE_LUT_OFFSET_RESET 0x00000000 /* Reset Value for LUT_Offset */ -#define REG_CORE_LUT_OFFSET 0x00000072 /* ADMW_CORE Offset into Selected LUT */ -#define REG_CORE_LUT_DATA_RESET 0x00000000 /* Reset Value for LUT_Data */ -#define REG_CORE_LUT_DATA 0x00000074 /* ADMW_CORE Data to Read/Write from Addressed LUT Entry */ -#define REG_CORE_EXT_FLASH_INDEX_RESET 0x00000000 /* Reset Value for Ext_Flash_Index */ -#define REG_CORE_EXT_FLASH_INDEX 0x00000080 /* ADMW_CORE Start Position (Sample No.) for Retrieval of Ext. Flash Data */ -#define REG_CORE_EXT_FLASH_SAMPLE_COUNT_RESET 0x00000000 /* Reset Value for Ext_Flash_Sample_Count */ -#define REG_CORE_EXT_FLASH_SAMPLE_COUNT 0x00000084 /* ADMW_CORE Indicates How Many Samples Stored in External Flash */ -#define REG_CORE_EXT_FLASH_DATA_RESET 0x00000000 /* Reset Value for Ext_Flash_Data */ -#define REG_CORE_EXT_FLASH_DATA 0x00000088 /* ADMW_CORE Data Read Back from External Flash */ -#define REG_CORE_REVISION_RESET 0x00000000 /* Reset Value for Revision */ -#define REG_CORE_REVISION 0x0000008C /* ADMW_CORE Hardware, Firmware Revision */ -#define REG_CORE_CHANNEL_COUNTn_RESET 0x00000000 /* Reset Value for Channel_Count[n] */ -#define REG_CORE_CHANNEL_COUNT0_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT0 */ -#define REG_CORE_CHANNEL_COUNT1_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT1 */ -#define REG_CORE_CHANNEL_COUNT2_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT2 */ -#define REG_CORE_CHANNEL_COUNT3_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT3 */ -#define REG_CORE_CHANNEL_COUNT4_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT4 */ -#define REG_CORE_CHANNEL_COUNT5_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT5 */ -#define REG_CORE_CHANNEL_COUNT6_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT6 */ -#define REG_CORE_CHANNEL_COUNT7_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT7 */ -#define REG_CORE_CHANNEL_COUNT8_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT8 */ -#define REG_CORE_CHANNEL_COUNT9_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT9 */ -#define REG_CORE_CHANNEL_COUNT10_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT10 */ -#define REG_CORE_CHANNEL_COUNT11_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT11 */ -#define REG_CORE_CHANNEL_COUNT12_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT12 */ -#define REG_CORE_CHANNEL_COUNT13_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT13 */ -#define REG_CORE_CHANNEL_COUNT14_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT14 */ -#define REG_CORE_CHANNEL_COUNT15_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT15 */ -#define REG_CORE_CHANNEL_COUNT0 0x00000090 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */ -#define REG_CORE_CHANNEL_COUNT1 0x000000D0 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */ -#define REG_CORE_CHANNEL_COUNT2 0x00000110 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */ -#define REG_CORE_CHANNEL_COUNT3 0x00000150 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */ -#define REG_CORE_CHANNEL_COUNT4 0x00000190 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */ -#define REG_CORE_CHANNEL_COUNT5 0x000001D0 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */ -#define REG_CORE_CHANNEL_COUNT6 0x00000210 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */ -#define REG_CORE_CHANNEL_COUNT7 0x00000250 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */ -#define REG_CORE_CHANNEL_COUNT8 0x00000290 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */ -#define REG_CORE_CHANNEL_COUNT9 0x000002D0 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */ -#define REG_CORE_CHANNEL_COUNT10 0x00000310 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */ -#define REG_CORE_CHANNEL_COUNT11 0x00000350 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */ -#define REG_CORE_CHANNEL_COUNT12 0x00000390 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */ -#define REG_CORE_CHANNEL_COUNT13 0x000003D0 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */ -#define REG_CORE_CHANNEL_COUNT14 0x00000410 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */ -#define REG_CORE_CHANNEL_COUNT15 0x00000450 /* ADMW_CORE Number of Channel Occurrences per Measurement Cycle */ -#define REG_CORE_CHANNEL_COUNTn(i) (REG_CORE_CHANNEL_COUNT0 + ((i) * 64)) -#define REG_CORE_CHANNEL_COUNTn_COUNT 16 -#define REG_CORE_CHANNEL_OPTIONSn_RESET 0x00000000 /* Reset Value for Channel_Options[n] */ -#define REG_CORE_CHANNEL_OPTIONS0_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS0 */ -#define REG_CORE_CHANNEL_OPTIONS1_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS1 */ -#define REG_CORE_CHANNEL_OPTIONS2_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS2 */ -#define REG_CORE_CHANNEL_OPTIONS3_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS3 */ -#define REG_CORE_CHANNEL_OPTIONS4_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS4 */ -#define REG_CORE_CHANNEL_OPTIONS5_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS5 */ -#define REG_CORE_CHANNEL_OPTIONS6_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS6 */ -#define REG_CORE_CHANNEL_OPTIONS7_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS7 */ -#define REG_CORE_CHANNEL_OPTIONS8_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS8 */ -#define REG_CORE_CHANNEL_OPTIONS9_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS9 */ -#define REG_CORE_CHANNEL_OPTIONS10_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS10 */ -#define REG_CORE_CHANNEL_OPTIONS11_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS11 */ -#define REG_CORE_CHANNEL_OPTIONS12_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS12 */ -#define REG_CORE_CHANNEL_OPTIONS13_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS13 */ -#define REG_CORE_CHANNEL_OPTIONS14_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS14 */ -#define REG_CORE_CHANNEL_OPTIONS15_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS15 */ -#define REG_CORE_CHANNEL_OPTIONS0 0x00000091 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */ -#define REG_CORE_CHANNEL_OPTIONS1 0x000000D1 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */ -#define REG_CORE_CHANNEL_OPTIONS2 0x00000111 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */ -#define REG_CORE_CHANNEL_OPTIONS3 0x00000151 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */ -#define REG_CORE_CHANNEL_OPTIONS4 0x00000191 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */ -#define REG_CORE_CHANNEL_OPTIONS5 0x000001D1 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */ -#define REG_CORE_CHANNEL_OPTIONS6 0x00000211 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */ -#define REG_CORE_CHANNEL_OPTIONS7 0x00000251 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */ -#define REG_CORE_CHANNEL_OPTIONS8 0x00000291 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */ -#define REG_CORE_CHANNEL_OPTIONS9 0x000002D1 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */ -#define REG_CORE_CHANNEL_OPTIONS10 0x00000311 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */ -#define REG_CORE_CHANNEL_OPTIONS11 0x00000351 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */ -#define REG_CORE_CHANNEL_OPTIONS12 0x00000391 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */ -#define REG_CORE_CHANNEL_OPTIONS13 0x000003D1 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */ -#define REG_CORE_CHANNEL_OPTIONS14 0x00000411 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */ -#define REG_CORE_CHANNEL_OPTIONS15 0x00000451 /* ADMW_CORE Position of Channel Within Sequence and Enable for FFT */ -#define REG_CORE_CHANNEL_OPTIONSn(i) (REG_CORE_CHANNEL_OPTIONS0 + ((i) * 64)) -#define REG_CORE_CHANNEL_OPTIONSn_COUNT 16 -#define REG_CORE_SENSOR_TYPEn_RESET 0x00000000 /* Reset Value for Sensor_Type[n] */ -#define REG_CORE_SENSOR_TYPE0_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE0 */ -#define REG_CORE_SENSOR_TYPE1_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE1 */ -#define REG_CORE_SENSOR_TYPE2_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE2 */ -#define REG_CORE_SENSOR_TYPE3_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE3 */ -#define REG_CORE_SENSOR_TYPE4_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE4 */ -#define REG_CORE_SENSOR_TYPE5_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE5 */ -#define REG_CORE_SENSOR_TYPE6_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE6 */ -#define REG_CORE_SENSOR_TYPE7_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE7 */ -#define REG_CORE_SENSOR_TYPE8_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE8 */ -#define REG_CORE_SENSOR_TYPE9_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE9 */ -#define REG_CORE_SENSOR_TYPE10_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE10 */ -#define REG_CORE_SENSOR_TYPE11_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE11 */ -#define REG_CORE_SENSOR_TYPE12_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE12 */ -#define REG_CORE_SENSOR_TYPE13_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE13 */ -#define REG_CORE_SENSOR_TYPE14_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE14 */ -#define REG_CORE_SENSOR_TYPE15_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE15 */ -#define REG_CORE_SENSOR_TYPE0 0x00000092 /* ADMW_CORE Sensor Select */ -#define REG_CORE_SENSOR_TYPE1 0x000000D2 /* ADMW_CORE Sensor Select */ -#define REG_CORE_SENSOR_TYPE2 0x00000112 /* ADMW_CORE Sensor Select */ -#define REG_CORE_SENSOR_TYPE3 0x00000152 /* ADMW_CORE Sensor Select */ -#define REG_CORE_SENSOR_TYPE4 0x00000192 /* ADMW_CORE Sensor Select */ -#define REG_CORE_SENSOR_TYPE5 0x000001D2 /* ADMW_CORE Sensor Select */ -#define REG_CORE_SENSOR_TYPE6 0x00000212 /* ADMW_CORE Sensor Select */ -#define REG_CORE_SENSOR_TYPE7 0x00000252 /* ADMW_CORE Sensor Select */ -#define REG_CORE_SENSOR_TYPE8 0x00000292 /* ADMW_CORE Sensor Select */ -#define REG_CORE_SENSOR_TYPE9 0x000002D2 /* ADMW_CORE Sensor Select */ -#define REG_CORE_SENSOR_TYPE10 0x00000312 /* ADMW_CORE Sensor Select */ -#define REG_CORE_SENSOR_TYPE11 0x00000352 /* ADMW_CORE Sensor Select */ -#define REG_CORE_SENSOR_TYPE12 0x00000392 /* ADMW_CORE Sensor Select */ -#define REG_CORE_SENSOR_TYPE13 0x000003D2 /* ADMW_CORE Sensor Select */ -#define REG_CORE_SENSOR_TYPE14 0x00000412 /* ADMW_CORE Sensor Select */ -#define REG_CORE_SENSOR_TYPE15 0x00000452 /* ADMW_CORE Sensor Select */ -#define REG_CORE_SENSOR_TYPEn(i) (REG_CORE_SENSOR_TYPE0 + ((i) * 64)) -#define REG_CORE_SENSOR_TYPEn_COUNT 16 -#define REG_CORE_SENSOR_DETAILSn_RESET 0x0000FFF0 /* Reset Value for Sensor_Details[n] */ -#define REG_CORE_SENSOR_DETAILS0_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS0 */ -#define REG_CORE_SENSOR_DETAILS1_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS1 */ -#define REG_CORE_SENSOR_DETAILS2_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS2 */ -#define REG_CORE_SENSOR_DETAILS3_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS3 */ -#define REG_CORE_SENSOR_DETAILS4_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS4 */ -#define REG_CORE_SENSOR_DETAILS5_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS5 */ -#define REG_CORE_SENSOR_DETAILS6_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS6 */ -#define REG_CORE_SENSOR_DETAILS7_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS7 */ -#define REG_CORE_SENSOR_DETAILS8_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS8 */ -#define REG_CORE_SENSOR_DETAILS9_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS9 */ -#define REG_CORE_SENSOR_DETAILS10_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS10 */ -#define REG_CORE_SENSOR_DETAILS11_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS11 */ -#define REG_CORE_SENSOR_DETAILS12_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS12 */ -#define REG_CORE_SENSOR_DETAILS13_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS13 */ -#define REG_CORE_SENSOR_DETAILS14_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS14 */ -#define REG_CORE_SENSOR_DETAILS15_RESET 0x0000FFF0 /* Reset Value for REG_CORE_SENSOR_DETAILS15 */ -#define REG_CORE_SENSOR_DETAILS0 0x00000094 /* ADMW_CORE Sensor Details */ -#define REG_CORE_SENSOR_DETAILS1 0x000000D4 /* ADMW_CORE Sensor Details */ -#define REG_CORE_SENSOR_DETAILS2 0x00000114 /* ADMW_CORE Sensor Details */ -#define REG_CORE_SENSOR_DETAILS3 0x00000154 /* ADMW_CORE Sensor Details */ -#define REG_CORE_SENSOR_DETAILS4 0x00000194 /* ADMW_CORE Sensor Details */ -#define REG_CORE_SENSOR_DETAILS5 0x000001D4 /* ADMW_CORE Sensor Details */ -#define REG_CORE_SENSOR_DETAILS6 0x00000214 /* ADMW_CORE Sensor Details */ -#define REG_CORE_SENSOR_DETAILS7 0x00000254 /* ADMW_CORE Sensor Details */ -#define REG_CORE_SENSOR_DETAILS8 0x00000294 /* ADMW_CORE Sensor Details */ -#define REG_CORE_SENSOR_DETAILS9 0x000002D4 /* ADMW_CORE Sensor Details */ -#define REG_CORE_SENSOR_DETAILS10 0x00000314 /* ADMW_CORE Sensor Details */ -#define REG_CORE_SENSOR_DETAILS11 0x00000354 /* ADMW_CORE Sensor Details */ -#define REG_CORE_SENSOR_DETAILS12 0x00000394 /* ADMW_CORE Sensor Details */ -#define REG_CORE_SENSOR_DETAILS13 0x000003D4 /* ADMW_CORE Sensor Details */ -#define REG_CORE_SENSOR_DETAILS14 0x00000414 /* ADMW_CORE Sensor Details */ -#define REG_CORE_SENSOR_DETAILS15 0x00000454 /* ADMW_CORE Sensor Details */ -#define REG_CORE_SENSOR_DETAILSn(i) (REG_CORE_SENSOR_DETAILS0 + ((i) * 64)) -#define REG_CORE_SENSOR_DETAILSn_COUNT 16 -#define REG_CORE_CHANNEL_EXCITATIONn_RESET 0x00000000 /* Reset Value for Channel_Excitation[n] */ -#define REG_CORE_CHANNEL_EXCITATION0_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION0 */ -#define REG_CORE_CHANNEL_EXCITATION1_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION1 */ -#define REG_CORE_CHANNEL_EXCITATION2_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION2 */ -#define REG_CORE_CHANNEL_EXCITATION3_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION3 */ -#define REG_CORE_CHANNEL_EXCITATION4_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION4 */ -#define REG_CORE_CHANNEL_EXCITATION5_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION5 */ -#define REG_CORE_CHANNEL_EXCITATION6_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION6 */ -#define REG_CORE_CHANNEL_EXCITATION7_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION7 */ -#define REG_CORE_CHANNEL_EXCITATION8_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION8 */ -#define REG_CORE_CHANNEL_EXCITATION9_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION9 */ -#define REG_CORE_CHANNEL_EXCITATION10_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION10 */ -#define REG_CORE_CHANNEL_EXCITATION11_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION11 */ -#define REG_CORE_CHANNEL_EXCITATION12_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION12 */ -#define REG_CORE_CHANNEL_EXCITATION13_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION13 */ -#define REG_CORE_CHANNEL_EXCITATION14_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION14 */ -#define REG_CORE_CHANNEL_EXCITATION15_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION15 */ -#define REG_CORE_CHANNEL_EXCITATION0 0x00000098 /* ADMW_CORE Excitation Current */ -#define REG_CORE_CHANNEL_EXCITATION1 0x000000D8 /* ADMW_CORE Excitation Current */ -#define REG_CORE_CHANNEL_EXCITATION2 0x00000118 /* ADMW_CORE Excitation Current */ -#define REG_CORE_CHANNEL_EXCITATION3 0x00000158 /* ADMW_CORE Excitation Current */ -#define REG_CORE_CHANNEL_EXCITATION4 0x00000198 /* ADMW_CORE Excitation Current */ -#define REG_CORE_CHANNEL_EXCITATION5 0x000001D8 /* ADMW_CORE Excitation Current */ -#define REG_CORE_CHANNEL_EXCITATION6 0x00000218 /* ADMW_CORE Excitation Current */ -#define REG_CORE_CHANNEL_EXCITATION7 0x00000258 /* ADMW_CORE Excitation Current */ -#define REG_CORE_CHANNEL_EXCITATION8 0x00000298 /* ADMW_CORE Excitation Current */ -#define REG_CORE_CHANNEL_EXCITATION9 0x000002D8 /* ADMW_CORE Excitation Current */ -#define REG_CORE_CHANNEL_EXCITATION10 0x00000318 /* ADMW_CORE Excitation Current */ -#define REG_CORE_CHANNEL_EXCITATION11 0x00000358 /* ADMW_CORE Excitation Current */ -#define REG_CORE_CHANNEL_EXCITATION12 0x00000398 /* ADMW_CORE Excitation Current */ -#define REG_CORE_CHANNEL_EXCITATION13 0x000003D8 /* ADMW_CORE Excitation Current */ -#define REG_CORE_CHANNEL_EXCITATION14 0x00000418 /* ADMW_CORE Excitation Current */ -#define REG_CORE_CHANNEL_EXCITATION15 0x00000458 /* ADMW_CORE Excitation Current */ -#define REG_CORE_CHANNEL_EXCITATIONn(i) (REG_CORE_CHANNEL_EXCITATION0 + ((i) * 64)) -#define REG_CORE_CHANNEL_EXCITATIONn_COUNT 16 -#define REG_CORE_SETTLING_TIMEn_RESET 0x00000000 /* Reset Value for Settling_Time[n] */ -#define REG_CORE_SETTLING_TIME0_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME0 */ -#define REG_CORE_SETTLING_TIME1_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME1 */ -#define REG_CORE_SETTLING_TIME2_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME2 */ -#define REG_CORE_SETTLING_TIME3_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME3 */ -#define REG_CORE_SETTLING_TIME4_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME4 */ -#define REG_CORE_SETTLING_TIME5_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME5 */ -#define REG_CORE_SETTLING_TIME6_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME6 */ -#define REG_CORE_SETTLING_TIME7_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME7 */ -#define REG_CORE_SETTLING_TIME8_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME8 */ -#define REG_CORE_SETTLING_TIME9_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME9 */ -#define REG_CORE_SETTLING_TIME10_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME10 */ -#define REG_CORE_SETTLING_TIME11_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME11 */ -#define REG_CORE_SETTLING_TIME12_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME12 */ -#define REG_CORE_SETTLING_TIME13_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME13 */ -#define REG_CORE_SETTLING_TIME14_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME14 */ -#define REG_CORE_SETTLING_TIME15_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME15 */ -#define REG_CORE_SETTLING_TIME0 0x0000009A /* ADMW_CORE Settling Time */ -#define REG_CORE_SETTLING_TIME1 0x000000DA /* ADMW_CORE Settling Time */ -#define REG_CORE_SETTLING_TIME2 0x0000011A /* ADMW_CORE Settling Time */ -#define REG_CORE_SETTLING_TIME3 0x0000015A /* ADMW_CORE Settling Time */ -#define REG_CORE_SETTLING_TIME4 0x0000019A /* ADMW_CORE Settling Time */ -#define REG_CORE_SETTLING_TIME5 0x000001DA /* ADMW_CORE Settling Time */ -#define REG_CORE_SETTLING_TIME6 0x0000021A /* ADMW_CORE Settling Time */ -#define REG_CORE_SETTLING_TIME7 0x0000025A /* ADMW_CORE Settling Time */ -#define REG_CORE_SETTLING_TIME8 0x0000029A /* ADMW_CORE Settling Time */ -#define REG_CORE_SETTLING_TIME9 0x000002DA /* ADMW_CORE Settling Time */ -#define REG_CORE_SETTLING_TIME10 0x0000031A /* ADMW_CORE Settling Time */ -#define REG_CORE_SETTLING_TIME11 0x0000035A /* ADMW_CORE Settling Time */ -#define REG_CORE_SETTLING_TIME12 0x0000039A /* ADMW_CORE Settling Time */ -#define REG_CORE_SETTLING_TIME13 0x000003DA /* ADMW_CORE Settling Time */ -#define REG_CORE_SETTLING_TIME14 0x0000041A /* ADMW_CORE Settling Time */ -#define REG_CORE_SETTLING_TIME15 0x0000045A /* ADMW_CORE Settling Time */ -#define REG_CORE_SETTLING_TIMEn(i) (REG_CORE_SETTLING_TIME0 + ((i) * 64)) -#define REG_CORE_SETTLING_TIMEn_COUNT 16 -#define REG_CORE_FILTER_SELECTn_RESET 0x00000000 /* Reset Value for Filter_Select[n] */ -#define REG_CORE_FILTER_SELECT0_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT0 */ -#define REG_CORE_FILTER_SELECT1_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT1 */ -#define REG_CORE_FILTER_SELECT2_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT2 */ -#define REG_CORE_FILTER_SELECT3_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT3 */ -#define REG_CORE_FILTER_SELECT4_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT4 */ -#define REG_CORE_FILTER_SELECT5_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT5 */ -#define REG_CORE_FILTER_SELECT6_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT6 */ -#define REG_CORE_FILTER_SELECT7_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT7 */ -#define REG_CORE_FILTER_SELECT8_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT8 */ -#define REG_CORE_FILTER_SELECT9_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT9 */ -#define REG_CORE_FILTER_SELECT10_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT10 */ -#define REG_CORE_FILTER_SELECT11_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT11 */ -#define REG_CORE_FILTER_SELECT12_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT12 */ -#define REG_CORE_FILTER_SELECT13_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT13 */ -#define REG_CORE_FILTER_SELECT14_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT14 */ -#define REG_CORE_FILTER_SELECT15_RESET 0x00000000 /* Reset Value for REG_CORE_FILTER_SELECT15 */ -#define REG_CORE_FILTER_SELECT0 0x0000009C /* ADMW_CORE ADC Digital Filter Selection */ -#define REG_CORE_FILTER_SELECT1 0x000000DC /* ADMW_CORE ADC Digital Filter Selection */ -#define REG_CORE_FILTER_SELECT2 0x0000011C /* ADMW_CORE ADC Digital Filter Selection */ -#define REG_CORE_FILTER_SELECT3 0x0000015C /* ADMW_CORE ADC Digital Filter Selection */ -#define REG_CORE_FILTER_SELECT4 0x0000019C /* ADMW_CORE ADC Digital Filter Selection */ -#define REG_CORE_FILTER_SELECT5 0x000001DC /* ADMW_CORE ADC Digital Filter Selection */ -#define REG_CORE_FILTER_SELECT6 0x0000021C /* ADMW_CORE ADC Digital Filter Selection */ -#define REG_CORE_FILTER_SELECT7 0x0000025C /* ADMW_CORE ADC Digital Filter Selection */ -#define REG_CORE_FILTER_SELECT8 0x0000029C /* ADMW_CORE ADC Digital Filter Selection */ -#define REG_CORE_FILTER_SELECT9 0x000002DC /* ADMW_CORE ADC Digital Filter Selection */ -#define REG_CORE_FILTER_SELECT10 0x0000031C /* ADMW_CORE ADC Digital Filter Selection */ -#define REG_CORE_FILTER_SELECT11 0x0000035C /* ADMW_CORE ADC Digital Filter Selection */ -#define REG_CORE_FILTER_SELECT12 0x0000039C /* ADMW_CORE ADC Digital Filter Selection */ -#define REG_CORE_FILTER_SELECT13 0x000003DC /* ADMW_CORE ADC Digital Filter Selection */ -#define REG_CORE_FILTER_SELECT14 0x0000041C /* ADMW_CORE ADC Digital Filter Selection */ -#define REG_CORE_FILTER_SELECT15 0x0000045C /* ADMW_CORE ADC Digital Filter Selection */ -#define REG_CORE_FILTER_SELECTn(i) (REG_CORE_FILTER_SELECT0 + ((i) * 64)) -#define REG_CORE_FILTER_SELECTn_COUNT 16 +#define REG_CORE_ADVANCED_SENSOR_ACCESS 0x0000006E /* CORE Enables Access to Advanced Sensor Configuration */ +#define REG_CORE_LUT_SELECT_RESET 0x00000000 /* Reset Value for LUT_Select */ +#define REG_CORE_LUT_SELECT 0x00000070 /* CORE Read/Write Strobe */ +#define REG_CORE_LUT_OFFSET_RESET 0x00000000 /* Reset Value for LUT_Offset */ +#define REG_CORE_LUT_OFFSET 0x00000072 /* CORE Offset into Selected LUT */ +#define REG_CORE_LUT_DATA_RESET 0x00000000 /* Reset Value for LUT_Data */ +#define REG_CORE_LUT_DATA 0x00000074 /* CORE Data to Read/Write from Addressed LUT Entry */ +#define REG_CORE_REVISION_RESET 0x00000000 /* Reset Value for Revision */ +#define REG_CORE_REVISION 0x0000008C /* CORE Hardware, Firmware Revision */ +#define REG_CORE_CHANNEL_COUNTn_RESET 0x00000000 /* Reset Value for Channel_Count[n] */ +#define REG_CORE_CHANNEL_COUNT0_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT0 */ +#define REG_CORE_CHANNEL_COUNT1_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT1 */ +#define REG_CORE_CHANNEL_COUNT2_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT2 */ +#define REG_CORE_CHANNEL_COUNT3_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT3 */ +#define REG_CORE_CHANNEL_COUNT4_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT4 */ +#define REG_CORE_CHANNEL_COUNT5_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT5 */ +#define REG_CORE_CHANNEL_COUNT6_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT6 */ +#define REG_CORE_CHANNEL_COUNT7_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT7 */ +#define REG_CORE_CHANNEL_COUNT8_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT8 */ +#define REG_CORE_CHANNEL_COUNT9_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT9 */ +#define REG_CORE_CHANNEL_COUNT10_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_COUNT10 */ +#define REG_CORE_CHANNEL_COUNT0 0x00000090 /* CORE Number of Channel Occurrences per Measurement Cycle */ +#define REG_CORE_CHANNEL_COUNT1 0x000000D0 /* CORE Number of Channel Occurrences per Measurement Cycle */ +#define REG_CORE_CHANNEL_COUNT2 0x00000110 /* CORE Number of Channel Occurrences per Measurement Cycle */ +#define REG_CORE_CHANNEL_COUNT3 0x00000150 /* CORE Number of Channel Occurrences per Measurement Cycle */ +#define REG_CORE_CHANNEL_COUNT4 0x00000190 /* CORE Number of Channel Occurrences per Measurement Cycle */ +#define REG_CORE_CHANNEL_COUNT5 0x000001D0 /* CORE Number of Channel Occurrences per Measurement Cycle */ +#define REG_CORE_CHANNEL_COUNT6 0x00000210 /* CORE Number of Channel Occurrences per Measurement Cycle */ +#define REG_CORE_CHANNEL_COUNT7 0x00000250 /* CORE Number of Channel Occurrences per Measurement Cycle */ +#define REG_CORE_CHANNEL_COUNT8 0x00000290 /* CORE Number of Channel Occurrences per Measurement Cycle */ +#define REG_CORE_CHANNEL_COUNT9 0x000002D0 /* CORE Number of Channel Occurrences per Measurement Cycle */ +#define REG_CORE_CHANNEL_COUNT10 0x00000310 /* CORE Number of Channel Occurrences per Measurement Cycle */ +#define REG_CORE_CHANNEL_COUNTn(i) (REG_CORE_CHANNEL_COUNT0 + ((i) * 64)) +#define REG_CORE_CHANNEL_COUNTn_COUNT 11 +#define REG_CORE_CHANNEL_OPTIONSn_RESET 0x00000000 /* Reset Value for Channel_Options[n] */ +#define REG_CORE_CHANNEL_OPTIONS0_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS0 */ +#define REG_CORE_CHANNEL_OPTIONS1_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS1 */ +#define REG_CORE_CHANNEL_OPTIONS2_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS2 */ +#define REG_CORE_CHANNEL_OPTIONS3_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS3 */ +#define REG_CORE_CHANNEL_OPTIONS4_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS4 */ +#define REG_CORE_CHANNEL_OPTIONS5_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS5 */ +#define REG_CORE_CHANNEL_OPTIONS6_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS6 */ +#define REG_CORE_CHANNEL_OPTIONS7_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS7 */ +#define REG_CORE_CHANNEL_OPTIONS8_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS8 */ +#define REG_CORE_CHANNEL_OPTIONS9_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS9 */ +#define REG_CORE_CHANNEL_OPTIONS10_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_OPTIONS10 */ +#define REG_CORE_CHANNEL_OPTIONS0 0x00000091 /* CORE Position of Channel Within Sequence and Enable for FFT */ +#define REG_CORE_CHANNEL_OPTIONS1 0x000000D1 /* CORE Position of Channel Within Sequence and Enable for FFT */ +#define REG_CORE_CHANNEL_OPTIONS2 0x00000111 /* CORE Position of Channel Within Sequence and Enable for FFT */ +#define REG_CORE_CHANNEL_OPTIONS3 0x00000151 /* CORE Position of Channel Within Sequence and Enable for FFT */ +#define REG_CORE_CHANNEL_OPTIONS4 0x00000191 /* CORE Position of Channel Within Sequence and Enable for FFT */ +#define REG_CORE_CHANNEL_OPTIONS5 0x000001D1 /* CORE Position of Channel Within Sequence and Enable for FFT */ +#define REG_CORE_CHANNEL_OPTIONS6 0x00000211 /* CORE Position of Channel Within Sequence and Enable for FFT */ +#define REG_CORE_CHANNEL_OPTIONS7 0x00000251 /* CORE Position of Channel Within Sequence and Enable for FFT */ +#define REG_CORE_CHANNEL_OPTIONS8 0x00000291 /* CORE Position of Channel Within Sequence and Enable for FFT */ +#define REG_CORE_CHANNEL_OPTIONS9 0x000002D1 /* CORE Position of Channel Within Sequence and Enable for FFT */ +#define REG_CORE_CHANNEL_OPTIONS10 0x00000311 /* CORE Position of Channel Within Sequence and Enable for FFT */ +#define REG_CORE_CHANNEL_OPTIONSn(i) (REG_CORE_CHANNEL_OPTIONS0 + ((i) * 64)) +#define REG_CORE_CHANNEL_OPTIONSn_COUNT 11 +#define REG_CORE_SENSOR_TYPEn_RESET 0x00000000 /* Reset Value for Sensor_Type[n] */ +#define REG_CORE_SENSOR_TYPE0_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE0 */ +#define REG_CORE_SENSOR_TYPE1_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE1 */ +#define REG_CORE_SENSOR_TYPE2_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE2 */ +#define REG_CORE_SENSOR_TYPE3_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE3 */ +#define REG_CORE_SENSOR_TYPE4_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE4 */ +#define REG_CORE_SENSOR_TYPE5_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE5 */ +#define REG_CORE_SENSOR_TYPE6_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE6 */ +#define REG_CORE_SENSOR_TYPE7_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE7 */ +#define REG_CORE_SENSOR_TYPE8_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE8 */ +#define REG_CORE_SENSOR_TYPE9_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE9 */ +#define REG_CORE_SENSOR_TYPE10_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_TYPE10 */ +#define REG_CORE_SENSOR_TYPE0 0x00000092 /* CORE Sensor Select */ +#define REG_CORE_SENSOR_TYPE1 0x000000D2 /* CORE Sensor Select */ +#define REG_CORE_SENSOR_TYPE2 0x00000112 /* CORE Sensor Select */ +#define REG_CORE_SENSOR_TYPE3 0x00000152 /* CORE Sensor Select */ +#define REG_CORE_SENSOR_TYPE4 0x00000192 /* CORE Sensor Select */ +#define REG_CORE_SENSOR_TYPE5 0x000001D2 /* CORE Sensor Select */ +#define REG_CORE_SENSOR_TYPE6 0x00000212 /* CORE Sensor Select */ +#define REG_CORE_SENSOR_TYPE7 0x00000252 /* CORE Sensor Select */ +#define REG_CORE_SENSOR_TYPE8 0x00000292 /* CORE Sensor Select */ +#define REG_CORE_SENSOR_TYPE9 0x000002D2 /* CORE Sensor Select */ +#define REG_CORE_SENSOR_TYPE10 0x00000312 /* CORE Sensor Select */ +#define REG_CORE_SENSOR_TYPEn(i) (REG_CORE_SENSOR_TYPE0 + ((i) * 64)) +#define REG_CORE_SENSOR_TYPEn_COUNT 11 +#define REG_CORE_SENSOR_DETAILSn_RESET 0x000000F0 /* Reset Value for Sensor_Details[n] */ +#define REG_CORE_SENSOR_DETAILS0_RESET 0x000000F0 /* Reset Value for REG_CORE_SENSOR_DETAILS0 */ +#define REG_CORE_SENSOR_DETAILS1_RESET 0x000000F0 /* Reset Value for REG_CORE_SENSOR_DETAILS1 */ +#define REG_CORE_SENSOR_DETAILS2_RESET 0x000000F0 /* Reset Value for REG_CORE_SENSOR_DETAILS2 */ +#define REG_CORE_SENSOR_DETAILS3_RESET 0x000000F0 /* Reset Value for REG_CORE_SENSOR_DETAILS3 */ +#define REG_CORE_SENSOR_DETAILS4_RESET 0x000000F0 /* Reset Value for REG_CORE_SENSOR_DETAILS4 */ +#define REG_CORE_SENSOR_DETAILS5_RESET 0x000000F0 /* Reset Value for REG_CORE_SENSOR_DETAILS5 */ +#define REG_CORE_SENSOR_DETAILS6_RESET 0x000000F0 /* Reset Value for REG_CORE_SENSOR_DETAILS6 */ +#define REG_CORE_SENSOR_DETAILS7_RESET 0x000000F0 /* Reset Value for REG_CORE_SENSOR_DETAILS7 */ +#define REG_CORE_SENSOR_DETAILS8_RESET 0x000000F0 /* Reset Value for REG_CORE_SENSOR_DETAILS8 */ +#define REG_CORE_SENSOR_DETAILS9_RESET 0x000000F0 /* Reset Value for REG_CORE_SENSOR_DETAILS9 */ +#define REG_CORE_SENSOR_DETAILS10_RESET 0x000000F0 /* Reset Value for REG_CORE_SENSOR_DETAILS10 */ +#define REG_CORE_SENSOR_DETAILS0 0x00000094 /* CORE Sensor Details */ +#define REG_CORE_SENSOR_DETAILS1 0x000000D4 /* CORE Sensor Details */ +#define REG_CORE_SENSOR_DETAILS2 0x00000114 /* CORE Sensor Details */ +#define REG_CORE_SENSOR_DETAILS3 0x00000154 /* CORE Sensor Details */ +#define REG_CORE_SENSOR_DETAILS4 0x00000194 /* CORE Sensor Details */ +#define REG_CORE_SENSOR_DETAILS5 0x000001D4 /* CORE Sensor Details */ +#define REG_CORE_SENSOR_DETAILS6 0x00000214 /* CORE Sensor Details */ +#define REG_CORE_SENSOR_DETAILS7 0x00000254 /* CORE Sensor Details */ +#define REG_CORE_SENSOR_DETAILS8 0x00000294 /* CORE Sensor Details */ +#define REG_CORE_SENSOR_DETAILS9 0x000002D4 /* CORE Sensor Details */ +#define REG_CORE_SENSOR_DETAILS10 0x00000314 /* CORE Sensor Details */ +#define REG_CORE_SENSOR_DETAILSn(i) (REG_CORE_SENSOR_DETAILS0 + ((i) * 64)) +#define REG_CORE_SENSOR_DETAILSn_COUNT 11 +#define REG_CORE_CHANNEL_EXCITATIONn_RESET 0x00000000 /* Reset Value for Channel_Excitation[n] */ +#define REG_CORE_CHANNEL_EXCITATION0_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION0 */ +#define REG_CORE_CHANNEL_EXCITATION1_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION1 */ +#define REG_CORE_CHANNEL_EXCITATION2_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION2 */ +#define REG_CORE_CHANNEL_EXCITATION3_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION3 */ +#define REG_CORE_CHANNEL_EXCITATION4_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION4 */ +#define REG_CORE_CHANNEL_EXCITATION5_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION5 */ +#define REG_CORE_CHANNEL_EXCITATION6_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION6 */ +#define REG_CORE_CHANNEL_EXCITATION7_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION7 */ +#define REG_CORE_CHANNEL_EXCITATION8_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION8 */ +#define REG_CORE_CHANNEL_EXCITATION9_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION9 */ +#define REG_CORE_CHANNEL_EXCITATION10_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_EXCITATION10 */ +#define REG_CORE_CHANNEL_EXCITATION0 0x00000098 /* CORE Excitation Current */ +#define REG_CORE_CHANNEL_EXCITATION1 0x000000D8 /* CORE Excitation Current */ +#define REG_CORE_CHANNEL_EXCITATION2 0x00000118 /* CORE Excitation Current */ +#define REG_CORE_CHANNEL_EXCITATION3 0x00000158 /* CORE Excitation Current */ +#define REG_CORE_CHANNEL_EXCITATION4 0x00000198 /* CORE Excitation Current */ +#define REG_CORE_CHANNEL_EXCITATION5 0x000001D8 /* CORE Excitation Current */ +#define REG_CORE_CHANNEL_EXCITATION6 0x00000218 /* CORE Excitation Current */ +#define REG_CORE_CHANNEL_EXCITATION7 0x00000258 /* CORE Excitation Current */ +#define REG_CORE_CHANNEL_EXCITATION8 0x00000298 /* CORE Excitation Current */ +#define REG_CORE_CHANNEL_EXCITATION9 0x000002D8 /* CORE Excitation Current */ +#define REG_CORE_CHANNEL_EXCITATION10 0x00000318 /* CORE Excitation Current */ +#define REG_CORE_CHANNEL_EXCITATIONn(i) (REG_CORE_CHANNEL_EXCITATION0 + ((i) * 64)) +#define REG_CORE_CHANNEL_EXCITATIONn_COUNT 11 +#define REG_CORE_SETTLING_TIMEn_RESET 0x00000000 /* Reset Value for Settling_Time[n] */ +#define REG_CORE_SETTLING_TIME0_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME0 */ +#define REG_CORE_SETTLING_TIME1_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME1 */ +#define REG_CORE_SETTLING_TIME2_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME2 */ +#define REG_CORE_SETTLING_TIME3_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME3 */ +#define REG_CORE_SETTLING_TIME4_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME4 */ +#define REG_CORE_SETTLING_TIME5_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME5 */ +#define REG_CORE_SETTLING_TIME6_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME6 */ +#define REG_CORE_SETTLING_TIME7_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME7 */ +#define REG_CORE_SETTLING_TIME8_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME8 */ +#define REG_CORE_SETTLING_TIME9_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME9 */ +#define REG_CORE_SETTLING_TIME10_RESET 0x00000000 /* Reset Value for REG_CORE_SETTLING_TIME10 */ +#define REG_CORE_SETTLING_TIME0 0x0000009A /* CORE Settling Time */ +#define REG_CORE_SETTLING_TIME1 0x000000DA /* CORE Settling Time */ +#define REG_CORE_SETTLING_TIME2 0x0000011A /* CORE Settling Time */ +#define REG_CORE_SETTLING_TIME3 0x0000015A /* CORE Settling Time */ +#define REG_CORE_SETTLING_TIME4 0x0000019A /* CORE Settling Time */ +#define REG_CORE_SETTLING_TIME5 0x000001DA /* CORE Settling Time */ +#define REG_CORE_SETTLING_TIME6 0x0000021A /* CORE Settling Time */ +#define REG_CORE_SETTLING_TIME7 0x0000025A /* CORE Settling Time */ +#define REG_CORE_SETTLING_TIME8 0x0000029A /* CORE Settling Time */ +#define REG_CORE_SETTLING_TIME9 0x000002DA /* CORE Settling Time */ +#define REG_CORE_SETTLING_TIME10 0x0000031A /* CORE Settling Time */ +#define REG_CORE_SETTLING_TIMEn(i) (REG_CORE_SETTLING_TIME0 + ((i) * 64)) +#define REG_CORE_SETTLING_TIMEn_COUNT 11 +#define REG_CORE_MEASUREMENT_SETUPn_RESET 0x00000000 /* Reset Value for Measurement_Setup[n] */ +#define REG_CORE_MEASUREMENT_SETUP0_RESET 0x00000000 /* Reset Value for REG_CORE_MEASUREMENT_SETUP0 */ +#define REG_CORE_MEASUREMENT_SETUP1_RESET 0x00000000 /* Reset Value for REG_CORE_MEASUREMENT_SETUP1 */ +#define REG_CORE_MEASUREMENT_SETUP2_RESET 0x00000000 /* Reset Value for REG_CORE_MEASUREMENT_SETUP2 */ +#define REG_CORE_MEASUREMENT_SETUP3_RESET 0x00000000 /* Reset Value for REG_CORE_MEASUREMENT_SETUP3 */ +#define REG_CORE_MEASUREMENT_SETUP4_RESET 0x00000000 /* Reset Value for REG_CORE_MEASUREMENT_SETUP4 */ +#define REG_CORE_MEASUREMENT_SETUP5_RESET 0x00000000 /* Reset Value for REG_CORE_MEASUREMENT_SETUP5 */ +#define REG_CORE_MEASUREMENT_SETUP6_RESET 0x00000000 /* Reset Value for REG_CORE_MEASUREMENT_SETUP6 */ +#define REG_CORE_MEASUREMENT_SETUP7_RESET 0x00000000 /* Reset Value for REG_CORE_MEASUREMENT_SETUP7 */ +#define REG_CORE_MEASUREMENT_SETUP8_RESET 0x00000000 /* Reset Value for REG_CORE_MEASUREMENT_SETUP8 */ +#define REG_CORE_MEASUREMENT_SETUP9_RESET 0x00000000 /* Reset Value for REG_CORE_MEASUREMENT_SETUP9 */ +#define REG_CORE_MEASUREMENT_SETUP10_RESET 0x00000000 /* Reset Value for REG_CORE_MEASUREMENT_SETUP10 */ +#define REG_CORE_MEASUREMENT_SETUP0 0x0000009C /* CORE ADC Digital Filter Selection */ +#define REG_CORE_MEASUREMENT_SETUP1 0x000000DC /* CORE ADC Digital Filter Selection */ +#define REG_CORE_MEASUREMENT_SETUP2 0x0000011C /* CORE ADC Digital Filter Selection */ +#define REG_CORE_MEASUREMENT_SETUP3 0x0000015C /* CORE ADC Digital Filter Selection */ +#define REG_CORE_MEASUREMENT_SETUP4 0x0000019C /* CORE ADC Digital Filter Selection */ +#define REG_CORE_MEASUREMENT_SETUP5 0x000001DC /* CORE ADC Digital Filter Selection */ +#define REG_CORE_MEASUREMENT_SETUP6 0x0000021C /* CORE ADC Digital Filter Selection */ +#define REG_CORE_MEASUREMENT_SETUP7 0x0000025C /* CORE ADC Digital Filter Selection */ +#define REG_CORE_MEASUREMENT_SETUP8 0x0000029C /* CORE ADC Digital Filter Selection */ +#define REG_CORE_MEASUREMENT_SETUP9 0x000002DC /* CORE ADC Digital Filter Selection */ +#define REG_CORE_MEASUREMENT_SETUP10 0x0000031C /* CORE ADC Digital Filter Selection */ +#define REG_CORE_MEASUREMENT_SETUPn(i) (REG_CORE_MEASUREMENT_SETUP0 + ((i) * 64)) +#define REG_CORE_MEASUREMENT_SETUPn_COUNT 11 #define REG_CORE_HIGH_THRESHOLD_LIMITn_RESET 0x7F800000 /* Reset Value for High_Threshold_Limit[n] */ #define REG_CORE_HIGH_THRESHOLD_LIMIT0_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT0 */ #define REG_CORE_HIGH_THRESHOLD_LIMIT1_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT1 */ @@ -553,239 +475,169 @@ #define REG_CORE_HIGH_THRESHOLD_LIMIT8_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT8 */ #define REG_CORE_HIGH_THRESHOLD_LIMIT9_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT9 */ #define REG_CORE_HIGH_THRESHOLD_LIMIT10_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT10 */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT11_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT11 */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT12_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT12 */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT13_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT13 */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT14_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT14 */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT15_RESET 0x7F800000 /* Reset Value for REG_CORE_HIGH_THRESHOLD_LIMIT15 */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT0 0x000000A0 /* ADMW_CORE High Threshold */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT1 0x000000E0 /* ADMW_CORE High Threshold */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT2 0x00000120 /* ADMW_CORE High Threshold */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT3 0x00000160 /* ADMW_CORE High Threshold */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT4 0x000001A0 /* ADMW_CORE High Threshold */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT5 0x000001E0 /* ADMW_CORE High Threshold */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT6 0x00000220 /* ADMW_CORE High Threshold */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT7 0x00000260 /* ADMW_CORE High Threshold */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT8 0x000002A0 /* ADMW_CORE High Threshold */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT9 0x000002E0 /* ADMW_CORE High Threshold */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT10 0x00000320 /* ADMW_CORE High Threshold */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT11 0x00000360 /* ADMW_CORE High Threshold */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT12 0x000003A0 /* ADMW_CORE High Threshold */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT13 0x000003E0 /* ADMW_CORE High Threshold */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT14 0x00000420 /* ADMW_CORE High Threshold */ -#define REG_CORE_HIGH_THRESHOLD_LIMIT15 0x00000460 /* ADMW_CORE High Threshold */ -#define REG_CORE_HIGH_THRESHOLD_LIMITn(i) (REG_CORE_HIGH_THRESHOLD_LIMIT0 + ((i) * 64)) -#define REG_CORE_HIGH_THRESHOLD_LIMITn_COUNT 16 -#define REG_CORE_LOW_THRESHOLD_LIMITn_RESET 0xFF800000 /* Reset Value for Low_Threshold_Limit[n] */ -#define REG_CORE_LOW_THRESHOLD_LIMIT0_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT0 */ -#define REG_CORE_LOW_THRESHOLD_LIMIT1_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT1 */ -#define REG_CORE_LOW_THRESHOLD_LIMIT2_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT2 */ -#define REG_CORE_LOW_THRESHOLD_LIMIT3_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT3 */ -#define REG_CORE_LOW_THRESHOLD_LIMIT4_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT4 */ -#define REG_CORE_LOW_THRESHOLD_LIMIT5_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT5 */ -#define REG_CORE_LOW_THRESHOLD_LIMIT6_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT6 */ -#define REG_CORE_LOW_THRESHOLD_LIMIT7_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT7 */ -#define REG_CORE_LOW_THRESHOLD_LIMIT8_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT8 */ -#define REG_CORE_LOW_THRESHOLD_LIMIT9_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT9 */ +#define REG_CORE_HIGH_THRESHOLD_LIMIT0 0x000000A0 /* CORE High Threshold */ +#define REG_CORE_HIGH_THRESHOLD_LIMIT1 0x000000E0 /* CORE High Threshold */ +#define REG_CORE_HIGH_THRESHOLD_LIMIT2 0x00000120 /* CORE High Threshold */ +#define REG_CORE_HIGH_THRESHOLD_LIMIT3 0x00000160 /* CORE High Threshold */ +#define REG_CORE_HIGH_THRESHOLD_LIMIT4 0x000001A0 /* CORE High Threshold */ +#define REG_CORE_HIGH_THRESHOLD_LIMIT5 0x000001E0 /* CORE High Threshold */ +#define REG_CORE_HIGH_THRESHOLD_LIMIT6 0x00000220 /* CORE High Threshold */ +#define REG_CORE_HIGH_THRESHOLD_LIMIT7 0x00000260 /* CORE High Threshold */ +#define REG_CORE_HIGH_THRESHOLD_LIMIT8 0x000002A0 /* CORE High Threshold */ +#define REG_CORE_HIGH_THRESHOLD_LIMIT9 0x000002E0 /* CORE High Threshold */ +#define REG_CORE_HIGH_THRESHOLD_LIMIT10 0x00000320 /* CORE High Threshold */ +#define REG_CORE_HIGH_THRESHOLD_LIMITn(i) (REG_CORE_HIGH_THRESHOLD_LIMIT0 + ((i) * 64)) +#define REG_CORE_HIGH_THRESHOLD_LIMITn_COUNT 11 +#define REG_CORE_LOW_THRESHOLD_LIMITn_RESET 0xFF800000 /* Reset Value for Low_Threshold_Limit[n] */ +#define REG_CORE_LOW_THRESHOLD_LIMIT0_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT0 */ +#define REG_CORE_LOW_THRESHOLD_LIMIT1_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT1 */ +#define REG_CORE_LOW_THRESHOLD_LIMIT2_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT2 */ +#define REG_CORE_LOW_THRESHOLD_LIMIT3_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT3 */ +#define REG_CORE_LOW_THRESHOLD_LIMIT4_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT4 */ +#define REG_CORE_LOW_THRESHOLD_LIMIT5_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT5 */ +#define REG_CORE_LOW_THRESHOLD_LIMIT6_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT6 */ +#define REG_CORE_LOW_THRESHOLD_LIMIT7_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT7 */ +#define REG_CORE_LOW_THRESHOLD_LIMIT8_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT8 */ +#define REG_CORE_LOW_THRESHOLD_LIMIT9_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT9 */ #define REG_CORE_LOW_THRESHOLD_LIMIT10_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT10 */ -#define REG_CORE_LOW_THRESHOLD_LIMIT11_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT11 */ -#define REG_CORE_LOW_THRESHOLD_LIMIT12_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT12 */ -#define REG_CORE_LOW_THRESHOLD_LIMIT13_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT13 */ -#define REG_CORE_LOW_THRESHOLD_LIMIT14_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT14 */ -#define REG_CORE_LOW_THRESHOLD_LIMIT15_RESET 0xFF800000 /* Reset Value for REG_CORE_LOW_THRESHOLD_LIMIT15 */ -#define REG_CORE_LOW_THRESHOLD_LIMIT0 0x000000A4 /* ADMW_CORE Low Threshold */ -#define REG_CORE_LOW_THRESHOLD_LIMIT1 0x000000E4 /* ADMW_CORE Low Threshold */ -#define REG_CORE_LOW_THRESHOLD_LIMIT2 0x00000124 /* ADMW_CORE Low Threshold */ -#define REG_CORE_LOW_THRESHOLD_LIMIT3 0x00000164 /* ADMW_CORE Low Threshold */ -#define REG_CORE_LOW_THRESHOLD_LIMIT4 0x000001A4 /* ADMW_CORE Low Threshold */ -#define REG_CORE_LOW_THRESHOLD_LIMIT5 0x000001E4 /* ADMW_CORE Low Threshold */ -#define REG_CORE_LOW_THRESHOLD_LIMIT6 0x00000224 /* ADMW_CORE Low Threshold */ -#define REG_CORE_LOW_THRESHOLD_LIMIT7 0x00000264 /* ADMW_CORE Low Threshold */ -#define REG_CORE_LOW_THRESHOLD_LIMIT8 0x000002A4 /* ADMW_CORE Low Threshold */ -#define REG_CORE_LOW_THRESHOLD_LIMIT9 0x000002E4 /* ADMW_CORE Low Threshold */ -#define REG_CORE_LOW_THRESHOLD_LIMIT10 0x00000324 /* ADMW_CORE Low Threshold */ -#define REG_CORE_LOW_THRESHOLD_LIMIT11 0x00000364 /* ADMW_CORE Low Threshold */ -#define REG_CORE_LOW_THRESHOLD_LIMIT12 0x000003A4 /* ADMW_CORE Low Threshold */ -#define REG_CORE_LOW_THRESHOLD_LIMIT13 0x000003E4 /* ADMW_CORE Low Threshold */ -#define REG_CORE_LOW_THRESHOLD_LIMIT14 0x00000424 /* ADMW_CORE Low Threshold */ -#define REG_CORE_LOW_THRESHOLD_LIMIT15 0x00000464 /* ADMW_CORE Low Threshold */ -#define REG_CORE_LOW_THRESHOLD_LIMITn(i) (REG_CORE_LOW_THRESHOLD_LIMIT0 + ((i) * 64)) -#define REG_CORE_LOW_THRESHOLD_LIMITn_COUNT 16 -#define REG_CORE_SENSOR_OFFSETn_RESET 0x00000000 /* Reset Value for Sensor_Offset[n] */ -#define REG_CORE_SENSOR_OFFSET0_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET0 */ -#define REG_CORE_SENSOR_OFFSET1_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET1 */ -#define REG_CORE_SENSOR_OFFSET2_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET2 */ -#define REG_CORE_SENSOR_OFFSET3_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET3 */ -#define REG_CORE_SENSOR_OFFSET4_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET4 */ -#define REG_CORE_SENSOR_OFFSET5_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET5 */ -#define REG_CORE_SENSOR_OFFSET6_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET6 */ -#define REG_CORE_SENSOR_OFFSET7_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET7 */ -#define REG_CORE_SENSOR_OFFSET8_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET8 */ -#define REG_CORE_SENSOR_OFFSET9_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET9 */ -#define REG_CORE_SENSOR_OFFSET10_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET10 */ -#define REG_CORE_SENSOR_OFFSET11_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET11 */ -#define REG_CORE_SENSOR_OFFSET12_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET12 */ -#define REG_CORE_SENSOR_OFFSET13_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET13 */ -#define REG_CORE_SENSOR_OFFSET14_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET14 */ -#define REG_CORE_SENSOR_OFFSET15_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET15 */ -#define REG_CORE_SENSOR_OFFSET0 0x000000A8 /* ADMW_CORE Sensor Offset Adjustment */ -#define REG_CORE_SENSOR_OFFSET1 0x000000E8 /* ADMW_CORE Sensor Offset Adjustment */ -#define REG_CORE_SENSOR_OFFSET2 0x00000128 /* ADMW_CORE Sensor Offset Adjustment */ -#define REG_CORE_SENSOR_OFFSET3 0x00000168 /* ADMW_CORE Sensor Offset Adjustment */ -#define REG_CORE_SENSOR_OFFSET4 0x000001A8 /* ADMW_CORE Sensor Offset Adjustment */ -#define REG_CORE_SENSOR_OFFSET5 0x000001E8 /* ADMW_CORE Sensor Offset Adjustment */ -#define REG_CORE_SENSOR_OFFSET6 0x00000228 /* ADMW_CORE Sensor Offset Adjustment */ -#define REG_CORE_SENSOR_OFFSET7 0x00000268 /* ADMW_CORE Sensor Offset Adjustment */ -#define REG_CORE_SENSOR_OFFSET8 0x000002A8 /* ADMW_CORE Sensor Offset Adjustment */ -#define REG_CORE_SENSOR_OFFSET9 0x000002E8 /* ADMW_CORE Sensor Offset Adjustment */ -#define REG_CORE_SENSOR_OFFSET10 0x00000328 /* ADMW_CORE Sensor Offset Adjustment */ -#define REG_CORE_SENSOR_OFFSET11 0x00000368 /* ADMW_CORE Sensor Offset Adjustment */ -#define REG_CORE_SENSOR_OFFSET12 0x000003A8 /* ADMW_CORE Sensor Offset Adjustment */ -#define REG_CORE_SENSOR_OFFSET13 0x000003E8 /* ADMW_CORE Sensor Offset Adjustment */ -#define REG_CORE_SENSOR_OFFSET14 0x00000428 /* ADMW_CORE Sensor Offset Adjustment */ -#define REG_CORE_SENSOR_OFFSET15 0x00000468 /* ADMW_CORE Sensor Offset Adjustment */ -#define REG_CORE_SENSOR_OFFSETn(i) (REG_CORE_SENSOR_OFFSET0 + ((i) * 64)) -#define REG_CORE_SENSOR_OFFSETn_COUNT 16 -#define REG_CORE_SENSOR_GAINn_RESET 0x3F800000 /* Reset Value for Sensor_Gain[n] */ -#define REG_CORE_SENSOR_GAIN0_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN0 */ -#define REG_CORE_SENSOR_GAIN1_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN1 */ -#define REG_CORE_SENSOR_GAIN2_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN2 */ -#define REG_CORE_SENSOR_GAIN3_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN3 */ -#define REG_CORE_SENSOR_GAIN4_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN4 */ -#define REG_CORE_SENSOR_GAIN5_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN5 */ -#define REG_CORE_SENSOR_GAIN6_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN6 */ -#define REG_CORE_SENSOR_GAIN7_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN7 */ -#define REG_CORE_SENSOR_GAIN8_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN8 */ -#define REG_CORE_SENSOR_GAIN9_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN9 */ -#define REG_CORE_SENSOR_GAIN10_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN10 */ -#define REG_CORE_SENSOR_GAIN11_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN11 */ -#define REG_CORE_SENSOR_GAIN12_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN12 */ -#define REG_CORE_SENSOR_GAIN13_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN13 */ -#define REG_CORE_SENSOR_GAIN14_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN14 */ -#define REG_CORE_SENSOR_GAIN15_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN15 */ -#define REG_CORE_SENSOR_GAIN0 0x000000AC /* ADMW_CORE Sensor Gain Adjustment */ -#define REG_CORE_SENSOR_GAIN1 0x000000EC /* ADMW_CORE Sensor Gain Adjustment */ -#define REG_CORE_SENSOR_GAIN2 0x0000012C /* ADMW_CORE Sensor Gain Adjustment */ -#define REG_CORE_SENSOR_GAIN3 0x0000016C /* ADMW_CORE Sensor Gain Adjustment */ -#define REG_CORE_SENSOR_GAIN4 0x000001AC /* ADMW_CORE Sensor Gain Adjustment */ -#define REG_CORE_SENSOR_GAIN5 0x000001EC /* ADMW_CORE Sensor Gain Adjustment */ -#define REG_CORE_SENSOR_GAIN6 0x0000022C /* ADMW_CORE Sensor Gain Adjustment */ -#define REG_CORE_SENSOR_GAIN7 0x0000026C /* ADMW_CORE Sensor Gain Adjustment */ -#define REG_CORE_SENSOR_GAIN8 0x000002AC /* ADMW_CORE Sensor Gain Adjustment */ -#define REG_CORE_SENSOR_GAIN9 0x000002EC /* ADMW_CORE Sensor Gain Adjustment */ -#define REG_CORE_SENSOR_GAIN10 0x0000032C /* ADMW_CORE Sensor Gain Adjustment */ -#define REG_CORE_SENSOR_GAIN11 0x0000036C /* ADMW_CORE Sensor Gain Adjustment */ -#define REG_CORE_SENSOR_GAIN12 0x000003AC /* ADMW_CORE Sensor Gain Adjustment */ -#define REG_CORE_SENSOR_GAIN13 0x000003EC /* ADMW_CORE Sensor Gain Adjustment */ -#define REG_CORE_SENSOR_GAIN14 0x0000042C /* ADMW_CORE Sensor Gain Adjustment */ -#define REG_CORE_SENSOR_GAIN15 0x0000046C /* ADMW_CORE Sensor Gain Adjustment */ -#define REG_CORE_SENSOR_GAINn(i) (REG_CORE_SENSOR_GAIN0 + ((i) * 64)) -#define REG_CORE_SENSOR_GAINn_COUNT 16 -#define REG_CORE_ALERT_CODE_CHn_RESET 0x00000000 /* Reset Value for Alert_Code_Ch[n] */ -#define REG_CORE_ALERT_CODE_CH0_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH0 */ -#define REG_CORE_ALERT_CODE_CH1_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH1 */ -#define REG_CORE_ALERT_CODE_CH2_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH2 */ -#define REG_CORE_ALERT_CODE_CH3_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH3 */ -#define REG_CORE_ALERT_CODE_CH4_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH4 */ -#define REG_CORE_ALERT_CODE_CH5_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH5 */ -#define REG_CORE_ALERT_CODE_CH6_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH6 */ -#define REG_CORE_ALERT_CODE_CH7_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH7 */ -#define REG_CORE_ALERT_CODE_CH8_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH8 */ -#define REG_CORE_ALERT_CODE_CH9_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH9 */ -#define REG_CORE_ALERT_CODE_CH10_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH10 */ -#define REG_CORE_ALERT_CODE_CH11_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH11 */ -#define REG_CORE_ALERT_CODE_CH12_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH12 */ -#define REG_CORE_ALERT_CODE_CH13_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH13 */ -#define REG_CORE_ALERT_CODE_CH14_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH14 */ -#define REG_CORE_ALERT_CODE_CH15_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH15 */ -#define REG_CORE_ALERT_CODE_CH0 0x000000B0 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */ -#define REG_CORE_ALERT_CODE_CH1 0x000000F0 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */ -#define REG_CORE_ALERT_CODE_CH2 0x00000130 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */ -#define REG_CORE_ALERT_CODE_CH3 0x00000170 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */ -#define REG_CORE_ALERT_CODE_CH4 0x000001B0 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */ -#define REG_CORE_ALERT_CODE_CH5 0x000001F0 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */ -#define REG_CORE_ALERT_CODE_CH6 0x00000230 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */ -#define REG_CORE_ALERT_CODE_CH7 0x00000270 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */ -#define REG_CORE_ALERT_CODE_CH8 0x000002B0 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */ -#define REG_CORE_ALERT_CODE_CH9 0x000002F0 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */ -#define REG_CORE_ALERT_CODE_CH10 0x00000330 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */ -#define REG_CORE_ALERT_CODE_CH11 0x00000370 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */ -#define REG_CORE_ALERT_CODE_CH12 0x000003B0 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */ -#define REG_CORE_ALERT_CODE_CH13 0x000003F0 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */ -#define REG_CORE_ALERT_CODE_CH14 0x00000430 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */ -#define REG_CORE_ALERT_CODE_CH15 0x00000470 /* ADMW_CORE Per-Channel Detailed Alert-Code Information */ -#define REG_CORE_ALERT_CODE_CHn(i) (REG_CORE_ALERT_CODE_CH0 + ((i) * 64)) -#define REG_CORE_ALERT_CODE_CHn_COUNT 16 -#define REG_CORE_CHANNEL_SKIPn_RESET 0x00000000 /* Reset Value for Channel_Skip[n] */ -#define REG_CORE_CHANNEL_SKIP0_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP0 */ -#define REG_CORE_CHANNEL_SKIP1_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP1 */ -#define REG_CORE_CHANNEL_SKIP2_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP2 */ -#define REG_CORE_CHANNEL_SKIP3_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP3 */ -#define REG_CORE_CHANNEL_SKIP4_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP4 */ -#define REG_CORE_CHANNEL_SKIP5_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP5 */ -#define REG_CORE_CHANNEL_SKIP6_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP6 */ -#define REG_CORE_CHANNEL_SKIP7_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP7 */ -#define REG_CORE_CHANNEL_SKIP8_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP8 */ -#define REG_CORE_CHANNEL_SKIP9_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP9 */ -#define REG_CORE_CHANNEL_SKIP10_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP10 */ -#define REG_CORE_CHANNEL_SKIP11_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP11 */ -#define REG_CORE_CHANNEL_SKIP12_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP12 */ -#define REG_CORE_CHANNEL_SKIP13_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP13 */ -#define REG_CORE_CHANNEL_SKIP14_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP14 */ -#define REG_CORE_CHANNEL_SKIP15_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP15 */ -#define REG_CORE_CHANNEL_SKIP0 0x000000B2 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */ -#define REG_CORE_CHANNEL_SKIP1 0x000000F2 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */ -#define REG_CORE_CHANNEL_SKIP2 0x00000132 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */ -#define REG_CORE_CHANNEL_SKIP3 0x00000172 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */ -#define REG_CORE_CHANNEL_SKIP4 0x000001B2 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */ -#define REG_CORE_CHANNEL_SKIP5 0x000001F2 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */ -#define REG_CORE_CHANNEL_SKIP6 0x00000232 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */ -#define REG_CORE_CHANNEL_SKIP7 0x00000272 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */ -#define REG_CORE_CHANNEL_SKIP8 0x000002B2 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */ -#define REG_CORE_CHANNEL_SKIP9 0x000002F2 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */ -#define REG_CORE_CHANNEL_SKIP10 0x00000332 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */ -#define REG_CORE_CHANNEL_SKIP11 0x00000372 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */ -#define REG_CORE_CHANNEL_SKIP12 0x000003B2 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */ -#define REG_CORE_CHANNEL_SKIP13 0x000003F2 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */ -#define REG_CORE_CHANNEL_SKIP14 0x00000432 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */ -#define REG_CORE_CHANNEL_SKIP15 0x00000472 /* ADMW_CORE Indicates If Channel Will Skip Some Measurement Cycles */ -#define REG_CORE_CHANNEL_SKIPn(i) (REG_CORE_CHANNEL_SKIP0 + ((i) * 64)) -#define REG_CORE_CHANNEL_SKIPn_COUNT 16 -#define REG_CORE_SENSOR_PARAMETERn_RESET 0x7FC00000 /* Reset Value for Sensor_Parameter[n] */ -#define REG_CORE_SENSOR_PARAMETER0_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER0 */ -#define REG_CORE_SENSOR_PARAMETER1_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER1 */ -#define REG_CORE_SENSOR_PARAMETER2_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER2 */ -#define REG_CORE_SENSOR_PARAMETER3_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER3 */ -#define REG_CORE_SENSOR_PARAMETER4_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER4 */ -#define REG_CORE_SENSOR_PARAMETER5_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER5 */ -#define REG_CORE_SENSOR_PARAMETER6_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER6 */ -#define REG_CORE_SENSOR_PARAMETER7_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER7 */ -#define REG_CORE_SENSOR_PARAMETER8_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER8 */ -#define REG_CORE_SENSOR_PARAMETER9_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER9 */ -#define REG_CORE_SENSOR_PARAMETER10_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER10 */ -#define REG_CORE_SENSOR_PARAMETER11_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER11 */ -#define REG_CORE_SENSOR_PARAMETER12_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER12 */ -#define REG_CORE_SENSOR_PARAMETER13_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER13 */ -#define REG_CORE_SENSOR_PARAMETER14_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER14 */ -#define REG_CORE_SENSOR_PARAMETER15_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER15 */ -#define REG_CORE_SENSOR_PARAMETER0 0x000000B4 /* ADMW_CORE Sensor Parameter Adjustment */ -#define REG_CORE_SENSOR_PARAMETER1 0x000000F4 /* ADMW_CORE Sensor Parameter Adjustment */ -#define REG_CORE_SENSOR_PARAMETER2 0x00000134 /* ADMW_CORE Sensor Parameter Adjustment */ -#define REG_CORE_SENSOR_PARAMETER3 0x00000174 /* ADMW_CORE Sensor Parameter Adjustment */ -#define REG_CORE_SENSOR_PARAMETER4 0x000001B4 /* ADMW_CORE Sensor Parameter Adjustment */ -#define REG_CORE_SENSOR_PARAMETER5 0x000001F4 /* ADMW_CORE Sensor Parameter Adjustment */ -#define REG_CORE_SENSOR_PARAMETER6 0x00000234 /* ADMW_CORE Sensor Parameter Adjustment */ -#define REG_CORE_SENSOR_PARAMETER7 0x00000274 /* ADMW_CORE Sensor Parameter Adjustment */ -#define REG_CORE_SENSOR_PARAMETER8 0x000002B4 /* ADMW_CORE Sensor Parameter Adjustment */ -#define REG_CORE_SENSOR_PARAMETER9 0x000002F4 /* ADMW_CORE Sensor Parameter Adjustment */ -#define REG_CORE_SENSOR_PARAMETER10 0x00000334 /* ADMW_CORE Sensor Parameter Adjustment */ -#define REG_CORE_SENSOR_PARAMETER11 0x00000374 /* ADMW_CORE Sensor Parameter Adjustment */ -#define REG_CORE_SENSOR_PARAMETER12 0x000003B4 /* ADMW_CORE Sensor Parameter Adjustment */ -#define REG_CORE_SENSOR_PARAMETER13 0x000003F4 /* ADMW_CORE Sensor Parameter Adjustment */ -#define REG_CORE_SENSOR_PARAMETER14 0x00000434 /* ADMW_CORE Sensor Parameter Adjustment */ -#define REG_CORE_SENSOR_PARAMETER15 0x00000474 /* ADMW_CORE Sensor Parameter Adjustment */ -#define REG_CORE_SENSOR_PARAMETERn(i) (REG_CORE_SENSOR_PARAMETER0 + ((i) * 64)) -#define REG_CORE_SENSOR_PARAMETERn_COUNT 16 +#define REG_CORE_LOW_THRESHOLD_LIMIT0 0x000000A4 /* CORE Low Threshold */ +#define REG_CORE_LOW_THRESHOLD_LIMIT1 0x000000E4 /* CORE Low Threshold */ +#define REG_CORE_LOW_THRESHOLD_LIMIT2 0x00000124 /* CORE Low Threshold */ +#define REG_CORE_LOW_THRESHOLD_LIMIT3 0x00000164 /* CORE Low Threshold */ +#define REG_CORE_LOW_THRESHOLD_LIMIT4 0x000001A4 /* CORE Low Threshold */ +#define REG_CORE_LOW_THRESHOLD_LIMIT5 0x000001E4 /* CORE Low Threshold */ +#define REG_CORE_LOW_THRESHOLD_LIMIT6 0x00000224 /* CORE Low Threshold */ +#define REG_CORE_LOW_THRESHOLD_LIMIT7 0x00000264 /* CORE Low Threshold */ +#define REG_CORE_LOW_THRESHOLD_LIMIT8 0x000002A4 /* CORE Low Threshold */ +#define REG_CORE_LOW_THRESHOLD_LIMIT9 0x000002E4 /* CORE Low Threshold */ +#define REG_CORE_LOW_THRESHOLD_LIMIT10 0x00000324 /* CORE Low Threshold */ +#define REG_CORE_LOW_THRESHOLD_LIMITn(i) (REG_CORE_LOW_THRESHOLD_LIMIT0 + ((i) * 64)) +#define REG_CORE_LOW_THRESHOLD_LIMITn_COUNT 11 +#define REG_CORE_SENSOR_OFFSETn_RESET 0x00000000 /* Reset Value for Sensor_Offset[n] */ +#define REG_CORE_SENSOR_OFFSET0_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET0 */ +#define REG_CORE_SENSOR_OFFSET1_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET1 */ +#define REG_CORE_SENSOR_OFFSET2_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET2 */ +#define REG_CORE_SENSOR_OFFSET3_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET3 */ +#define REG_CORE_SENSOR_OFFSET4_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET4 */ +#define REG_CORE_SENSOR_OFFSET5_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET5 */ +#define REG_CORE_SENSOR_OFFSET6_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET6 */ +#define REG_CORE_SENSOR_OFFSET7_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET7 */ +#define REG_CORE_SENSOR_OFFSET8_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET8 */ +#define REG_CORE_SENSOR_OFFSET9_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET9 */ +#define REG_CORE_SENSOR_OFFSET10_RESET 0x00000000 /* Reset Value for REG_CORE_SENSOR_OFFSET10 */ +#define REG_CORE_SENSOR_OFFSET0 0x000000A8 /* CORE Sensor Offset Adjustment */ +#define REG_CORE_SENSOR_OFFSET1 0x000000E8 /* CORE Sensor Offset Adjustment */ +#define REG_CORE_SENSOR_OFFSET2 0x00000128 /* CORE Sensor Offset Adjustment */ +#define REG_CORE_SENSOR_OFFSET3 0x00000168 /* CORE Sensor Offset Adjustment */ +#define REG_CORE_SENSOR_OFFSET4 0x000001A8 /* CORE Sensor Offset Adjustment */ +#define REG_CORE_SENSOR_OFFSET5 0x000001E8 /* CORE Sensor Offset Adjustment */ +#define REG_CORE_SENSOR_OFFSET6 0x00000228 /* CORE Sensor Offset Adjustment */ +#define REG_CORE_SENSOR_OFFSET7 0x00000268 /* CORE Sensor Offset Adjustment */ +#define REG_CORE_SENSOR_OFFSET8 0x000002A8 /* CORE Sensor Offset Adjustment */ +#define REG_CORE_SENSOR_OFFSET9 0x000002E8 /* CORE Sensor Offset Adjustment */ +#define REG_CORE_SENSOR_OFFSET10 0x00000328 /* CORE Sensor Offset Adjustment */ +#define REG_CORE_SENSOR_OFFSETn(i) (REG_CORE_SENSOR_OFFSET0 + ((i) * 64)) +#define REG_CORE_SENSOR_OFFSETn_COUNT 11 +#define REG_CORE_SENSOR_GAINn_RESET 0x3F800000 /* Reset Value for Sensor_Gain[n] */ +#define REG_CORE_SENSOR_GAIN0_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN0 */ +#define REG_CORE_SENSOR_GAIN1_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN1 */ +#define REG_CORE_SENSOR_GAIN2_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN2 */ +#define REG_CORE_SENSOR_GAIN3_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN3 */ +#define REG_CORE_SENSOR_GAIN4_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN4 */ +#define REG_CORE_SENSOR_GAIN5_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN5 */ +#define REG_CORE_SENSOR_GAIN6_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN6 */ +#define REG_CORE_SENSOR_GAIN7_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN7 */ +#define REG_CORE_SENSOR_GAIN8_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN8 */ +#define REG_CORE_SENSOR_GAIN9_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN9 */ +#define REG_CORE_SENSOR_GAIN10_RESET 0x3F800000 /* Reset Value for REG_CORE_SENSOR_GAIN10 */ +#define REG_CORE_SENSOR_GAIN0 0x000000AC /* CORE Sensor Gain Adjustment */ +#define REG_CORE_SENSOR_GAIN1 0x000000EC /* CORE Sensor Gain Adjustment */ +#define REG_CORE_SENSOR_GAIN2 0x0000012C /* CORE Sensor Gain Adjustment */ +#define REG_CORE_SENSOR_GAIN3 0x0000016C /* CORE Sensor Gain Adjustment */ +#define REG_CORE_SENSOR_GAIN4 0x000001AC /* CORE Sensor Gain Adjustment */ +#define REG_CORE_SENSOR_GAIN5 0x000001EC /* CORE Sensor Gain Adjustment */ +#define REG_CORE_SENSOR_GAIN6 0x0000022C /* CORE Sensor Gain Adjustment */ +#define REG_CORE_SENSOR_GAIN7 0x0000026C /* CORE Sensor Gain Adjustment */ +#define REG_CORE_SENSOR_GAIN8 0x000002AC /* CORE Sensor Gain Adjustment */ +#define REG_CORE_SENSOR_GAIN9 0x000002EC /* CORE Sensor Gain Adjustment */ +#define REG_CORE_SENSOR_GAIN10 0x0000032C /* CORE Sensor Gain Adjustment */ +#define REG_CORE_SENSOR_GAINn(i) (REG_CORE_SENSOR_GAIN0 + ((i) * 64)) +#define REG_CORE_SENSOR_GAINn_COUNT 11 +#define REG_CORE_ALERT_CODE_CHn_RESET 0x00000000 /* Reset Value for Alert_Code_Ch[n] */ +#define REG_CORE_ALERT_CODE_CH0_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH0 */ +#define REG_CORE_ALERT_CODE_CH1_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH1 */ +#define REG_CORE_ALERT_CODE_CH2_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH2 */ +#define REG_CORE_ALERT_CODE_CH3_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH3 */ +#define REG_CORE_ALERT_CODE_CH4_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH4 */ +#define REG_CORE_ALERT_CODE_CH5_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH5 */ +#define REG_CORE_ALERT_CODE_CH6_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH6 */ +#define REG_CORE_ALERT_CODE_CH7_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH7 */ +#define REG_CORE_ALERT_CODE_CH8_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH8 */ +#define REG_CORE_ALERT_CODE_CH9_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH9 */ +#define REG_CORE_ALERT_CODE_CH10_RESET 0x00000000 /* Reset Value for REG_CORE_ALERT_CODE_CH10 */ +#define REG_CORE_ALERT_CODE_CH0 0x000000B0 /* CORE Per-Channel Detailed Alert-Code Information */ +#define REG_CORE_ALERT_CODE_CH1 0x000000F0 /* CORE Per-Channel Detailed Alert-Code Information */ +#define REG_CORE_ALERT_CODE_CH2 0x00000130 /* CORE Per-Channel Detailed Alert-Code Information */ +#define REG_CORE_ALERT_CODE_CH3 0x00000170 /* CORE Per-Channel Detailed Alert-Code Information */ +#define REG_CORE_ALERT_CODE_CH4 0x000001B0 /* CORE Per-Channel Detailed Alert-Code Information */ +#define REG_CORE_ALERT_CODE_CH5 0x000001F0 /* CORE Per-Channel Detailed Alert-Code Information */ +#define REG_CORE_ALERT_CODE_CH6 0x00000230 /* CORE Per-Channel Detailed Alert-Code Information */ +#define REG_CORE_ALERT_CODE_CH7 0x00000270 /* CORE Per-Channel Detailed Alert-Code Information */ +#define REG_CORE_ALERT_CODE_CH8 0x000002B0 /* CORE Per-Channel Detailed Alert-Code Information */ +#define REG_CORE_ALERT_CODE_CH9 0x000002F0 /* CORE Per-Channel Detailed Alert-Code Information */ +#define REG_CORE_ALERT_CODE_CH10 0x00000330 /* CORE Per-Channel Detailed Alert-Code Information */ +#define REG_CORE_ALERT_CODE_CHn(i) (REG_CORE_ALERT_CODE_CH0 + ((i) * 64)) +#define REG_CORE_ALERT_CODE_CHn_COUNT 11 +#define REG_CORE_CHANNEL_SKIPn_RESET 0x00000000 /* Reset Value for Channel_Skip[n] */ +#define REG_CORE_CHANNEL_SKIP0_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP0 */ +#define REG_CORE_CHANNEL_SKIP1_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP1 */ +#define REG_CORE_CHANNEL_SKIP2_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP2 */ +#define REG_CORE_CHANNEL_SKIP3_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP3 */ +#define REG_CORE_CHANNEL_SKIP4_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP4 */ +#define REG_CORE_CHANNEL_SKIP5_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP5 */ +#define REG_CORE_CHANNEL_SKIP6_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP6 */ +#define REG_CORE_CHANNEL_SKIP7_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP7 */ +#define REG_CORE_CHANNEL_SKIP8_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP8 */ +#define REG_CORE_CHANNEL_SKIP9_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP9 */ +#define REG_CORE_CHANNEL_SKIP10_RESET 0x00000000 /* Reset Value for REG_CORE_CHANNEL_SKIP10 */ +#define REG_CORE_CHANNEL_SKIP0 0x000000B2 /* CORE Indicates If Channel Will Skip Some Measurement Cycles */ +#define REG_CORE_CHANNEL_SKIP1 0x000000F2 /* CORE Indicates If Channel Will Skip Some Measurement Cycles */ +#define REG_CORE_CHANNEL_SKIP2 0x00000132 /* CORE Indicates If Channel Will Skip Some Measurement Cycles */ +#define REG_CORE_CHANNEL_SKIP3 0x00000172 /* CORE Indicates If Channel Will Skip Some Measurement Cycles */ +#define REG_CORE_CHANNEL_SKIP4 0x000001B2 /* CORE Indicates If Channel Will Skip Some Measurement Cycles */ +#define REG_CORE_CHANNEL_SKIP5 0x000001F2 /* CORE Indicates If Channel Will Skip Some Measurement Cycles */ +#define REG_CORE_CHANNEL_SKIP6 0x00000232 /* CORE Indicates If Channel Will Skip Some Measurement Cycles */ +#define REG_CORE_CHANNEL_SKIP7 0x00000272 /* CORE Indicates If Channel Will Skip Some Measurement Cycles */ +#define REG_CORE_CHANNEL_SKIP8 0x000002B2 /* CORE Indicates If Channel Will Skip Some Measurement Cycles */ +#define REG_CORE_CHANNEL_SKIP9 0x000002F2 /* CORE Indicates If Channel Will Skip Some Measurement Cycles */ +#define REG_CORE_CHANNEL_SKIP10 0x00000332 /* CORE Indicates If Channel Will Skip Some Measurement Cycles */ +#define REG_CORE_CHANNEL_SKIPn(i) (REG_CORE_CHANNEL_SKIP0 + ((i) * 64)) +#define REG_CORE_CHANNEL_SKIPn_COUNT 11 +#define REG_CORE_SENSOR_PARAMETERn_RESET 0x7FC00000 /* Reset Value for Sensor_Parameter[n] */ +#define REG_CORE_SENSOR_PARAMETER0_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER0 */ +#define REG_CORE_SENSOR_PARAMETER1_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER1 */ +#define REG_CORE_SENSOR_PARAMETER2_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER2 */ +#define REG_CORE_SENSOR_PARAMETER3_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER3 */ +#define REG_CORE_SENSOR_PARAMETER4_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER4 */ +#define REG_CORE_SENSOR_PARAMETER5_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER5 */ +#define REG_CORE_SENSOR_PARAMETER6_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER6 */ +#define REG_CORE_SENSOR_PARAMETER7_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER7 */ +#define REG_CORE_SENSOR_PARAMETER8_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER8 */ +#define REG_CORE_SENSOR_PARAMETER9_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER9 */ +#define REG_CORE_SENSOR_PARAMETER10_RESET 0x7FC00000 /* Reset Value for REG_CORE_SENSOR_PARAMETER10 */ +#define REG_CORE_SENSOR_PARAMETER0 0x000000B4 /* CORE Sensor Parameter Adjustment */ +#define REG_CORE_SENSOR_PARAMETER1 0x000000F4 /* CORE Sensor Parameter Adjustment */ +#define REG_CORE_SENSOR_PARAMETER2 0x00000134 /* CORE Sensor Parameter Adjustment */ +#define REG_CORE_SENSOR_PARAMETER3 0x00000174 /* CORE Sensor Parameter Adjustment */ +#define REG_CORE_SENSOR_PARAMETER4 0x000001B4 /* CORE Sensor Parameter Adjustment */ +#define REG_CORE_SENSOR_PARAMETER5 0x000001F4 /* CORE Sensor Parameter Adjustment */ +#define REG_CORE_SENSOR_PARAMETER6 0x00000234 /* CORE Sensor Parameter Adjustment */ +#define REG_CORE_SENSOR_PARAMETER7 0x00000274 /* CORE Sensor Parameter Adjustment */ +#define REG_CORE_SENSOR_PARAMETER8 0x000002B4 /* CORE Sensor Parameter Adjustment */ +#define REG_CORE_SENSOR_PARAMETER9 0x000002F4 /* CORE Sensor Parameter Adjustment */ +#define REG_CORE_SENSOR_PARAMETER10 0x00000334 /* CORE Sensor Parameter Adjustment */ +#define REG_CORE_SENSOR_PARAMETERn(i) (REG_CORE_SENSOR_PARAMETER0 + ((i) * 64)) +#define REG_CORE_SENSOR_PARAMETERn_COUNT 11 #define REG_CORE_CALIBRATION_PARAMETERn_RESET 0x00000000 /* Reset Value for Calibration_Parameter[n] */ #define REG_CORE_CALIBRATION_PARAMETER0_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER0 */ #define REG_CORE_CALIBRATION_PARAMETER1_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER1 */ @@ -798,29 +650,19 @@ #define REG_CORE_CALIBRATION_PARAMETER8_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER8 */ #define REG_CORE_CALIBRATION_PARAMETER9_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER9 */ #define REG_CORE_CALIBRATION_PARAMETER10_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER10 */ -#define REG_CORE_CALIBRATION_PARAMETER11_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER11 */ -#define REG_CORE_CALIBRATION_PARAMETER12_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER12 */ -#define REG_CORE_CALIBRATION_PARAMETER13_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER13 */ -#define REG_CORE_CALIBRATION_PARAMETER14_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER14 */ -#define REG_CORE_CALIBRATION_PARAMETER15_RESET 0x00000000 /* Reset Value for REG_CORE_CALIBRATION_PARAMETER15 */ -#define REG_CORE_CALIBRATION_PARAMETER0 0x000000B8 /* ADMW_CORE Calibration Parameter Value */ -#define REG_CORE_CALIBRATION_PARAMETER1 0x000000F8 /* ADMW_CORE Calibration Parameter Value */ -#define REG_CORE_CALIBRATION_PARAMETER2 0x00000138 /* ADMW_CORE Calibration Parameter Value */ -#define REG_CORE_CALIBRATION_PARAMETER3 0x00000178 /* ADMW_CORE Calibration Parameter Value */ -#define REG_CORE_CALIBRATION_PARAMETER4 0x000001B8 /* ADMW_CORE Calibration Parameter Value */ -#define REG_CORE_CALIBRATION_PARAMETER5 0x000001F8 /* ADMW_CORE Calibration Parameter Value */ -#define REG_CORE_CALIBRATION_PARAMETER6 0x00000238 /* ADMW_CORE Calibration Parameter Value */ -#define REG_CORE_CALIBRATION_PARAMETER7 0x00000278 /* ADMW_CORE Calibration Parameter Value */ -#define REG_CORE_CALIBRATION_PARAMETER8 0x000002B8 /* ADMW_CORE Calibration Parameter Value */ -#define REG_CORE_CALIBRATION_PARAMETER9 0x000002F8 /* ADMW_CORE Calibration Parameter Value */ -#define REG_CORE_CALIBRATION_PARAMETER10 0x00000338 /* ADMW_CORE Calibration Parameter Value */ -#define REG_CORE_CALIBRATION_PARAMETER11 0x00000378 /* ADMW_CORE Calibration Parameter Value */ -#define REG_CORE_CALIBRATION_PARAMETER12 0x000003B8 /* ADMW_CORE Calibration Parameter Value */ -#define REG_CORE_CALIBRATION_PARAMETER13 0x000003F8 /* ADMW_CORE Calibration Parameter Value */ -#define REG_CORE_CALIBRATION_PARAMETER14 0x00000438 /* ADMW_CORE Calibration Parameter Value */ -#define REG_CORE_CALIBRATION_PARAMETER15 0x00000478 /* ADMW_CORE Calibration Parameter Value */ -#define REG_CORE_CALIBRATION_PARAMETERn(i) (REG_CORE_CALIBRATION_PARAMETER0 + ((i) * 64)) -#define REG_CORE_CALIBRATION_PARAMETERn_COUNT 16 +#define REG_CORE_CALIBRATION_PARAMETER0 0x000000B8 /* CORE Calibration Parameter Value */ +#define REG_CORE_CALIBRATION_PARAMETER1 0x000000F8 /* CORE Calibration Parameter Value */ +#define REG_CORE_CALIBRATION_PARAMETER2 0x00000138 /* CORE Calibration Parameter Value */ +#define REG_CORE_CALIBRATION_PARAMETER3 0x00000178 /* CORE Calibration Parameter Value */ +#define REG_CORE_CALIBRATION_PARAMETER4 0x000001B8 /* CORE Calibration Parameter Value */ +#define REG_CORE_CALIBRATION_PARAMETER5 0x000001F8 /* CORE Calibration Parameter Value */ +#define REG_CORE_CALIBRATION_PARAMETER6 0x00000238 /* CORE Calibration Parameter Value */ +#define REG_CORE_CALIBRATION_PARAMETER7 0x00000278 /* CORE Calibration Parameter Value */ +#define REG_CORE_CALIBRATION_PARAMETER8 0x000002B8 /* CORE Calibration Parameter Value */ +#define REG_CORE_CALIBRATION_PARAMETER9 0x000002F8 /* CORE Calibration Parameter Value */ +#define REG_CORE_CALIBRATION_PARAMETER10 0x00000338 /* CORE Calibration Parameter Value */ +#define REG_CORE_CALIBRATION_PARAMETERn(i) (REG_CORE_CALIBRATION_PARAMETER0 + ((i) * 64)) +#define REG_CORE_CALIBRATION_PARAMETERn_COUNT 11 #define REG_CORE_DIGITAL_SENSOR_CONFIGn_RESET 0x00000000 /* Reset Value for Digital_Sensor_Config[n] */ #define REG_CORE_DIGITAL_SENSOR_CONFIG0_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG0 */ #define REG_CORE_DIGITAL_SENSOR_CONFIG1_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG1 */ @@ -833,29 +675,19 @@ #define REG_CORE_DIGITAL_SENSOR_CONFIG8_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG8 */ #define REG_CORE_DIGITAL_SENSOR_CONFIG9_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG9 */ #define REG_CORE_DIGITAL_SENSOR_CONFIG10_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG10 */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG11_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG11 */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG12_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG12 */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG13_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG13 */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG14_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG14 */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG15_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_CONFIG15 */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG0 0x000000BC /* ADMW_CORE Digital Sensor Data Coding */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG1 0x000000FC /* ADMW_CORE Digital Sensor Data Coding */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG2 0x0000013C /* ADMW_CORE Digital Sensor Data Coding */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG3 0x0000017C /* ADMW_CORE Digital Sensor Data Coding */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG4 0x000001BC /* ADMW_CORE Digital Sensor Data Coding */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG5 0x000001FC /* ADMW_CORE Digital Sensor Data Coding */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG6 0x0000023C /* ADMW_CORE Digital Sensor Data Coding */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG7 0x0000027C /* ADMW_CORE Digital Sensor Data Coding */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG8 0x000002BC /* ADMW_CORE Digital Sensor Data Coding */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG9 0x000002FC /* ADMW_CORE Digital Sensor Data Coding */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG10 0x0000033C /* ADMW_CORE Digital Sensor Data Coding */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG11 0x0000037C /* ADMW_CORE Digital Sensor Data Coding */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG12 0x000003BC /* ADMW_CORE Digital Sensor Data Coding */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG13 0x000003FC /* ADMW_CORE Digital Sensor Data Coding */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG14 0x0000043C /* ADMW_CORE Digital Sensor Data Coding */ -#define REG_CORE_DIGITAL_SENSOR_CONFIG15 0x0000047C /* ADMW_CORE Digital Sensor Data Coding */ -#define REG_CORE_DIGITAL_SENSOR_CONFIGn(i) (REG_CORE_DIGITAL_SENSOR_CONFIG0 + ((i) * 64)) -#define REG_CORE_DIGITAL_SENSOR_CONFIGn_COUNT 16 +#define REG_CORE_DIGITAL_SENSOR_CONFIG0 0x000000BC /* CORE Digital Sensor Data Coding */ +#define REG_CORE_DIGITAL_SENSOR_CONFIG1 0x000000FC /* CORE Digital Sensor Data Coding */ +#define REG_CORE_DIGITAL_SENSOR_CONFIG2 0x0000013C /* CORE Digital Sensor Data Coding */ +#define REG_CORE_DIGITAL_SENSOR_CONFIG3 0x0000017C /* CORE Digital Sensor Data Coding */ +#define REG_CORE_DIGITAL_SENSOR_CONFIG4 0x000001BC /* CORE Digital Sensor Data Coding */ +#define REG_CORE_DIGITAL_SENSOR_CONFIG5 0x000001FC /* CORE Digital Sensor Data Coding */ +#define REG_CORE_DIGITAL_SENSOR_CONFIG6 0x0000023C /* CORE Digital Sensor Data Coding */ +#define REG_CORE_DIGITAL_SENSOR_CONFIG7 0x0000027C /* CORE Digital Sensor Data Coding */ +#define REG_CORE_DIGITAL_SENSOR_CONFIG8 0x000002BC /* CORE Digital Sensor Data Coding */ +#define REG_CORE_DIGITAL_SENSOR_CONFIG9 0x000002FC /* CORE Digital Sensor Data Coding */ +#define REG_CORE_DIGITAL_SENSOR_CONFIG10 0x0000033C /* CORE Digital Sensor Data Coding */ +#define REG_CORE_DIGITAL_SENSOR_CONFIGn(i) (REG_CORE_DIGITAL_SENSOR_CONFIG0 + ((i) * 64)) +#define REG_CORE_DIGITAL_SENSOR_CONFIGn_COUNT 11 #define REG_CORE_DIGITAL_SENSOR_ADDRESSn_RESET 0x00000000 /* Reset Value for Digital_Sensor_Address[n] */ #define REG_CORE_DIGITAL_SENSOR_ADDRESS0_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS0 */ #define REG_CORE_DIGITAL_SENSOR_ADDRESS1_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS1 */ @@ -868,29 +700,19 @@ #define REG_CORE_DIGITAL_SENSOR_ADDRESS8_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS8 */ #define REG_CORE_DIGITAL_SENSOR_ADDRESS9_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS9 */ #define REG_CORE_DIGITAL_SENSOR_ADDRESS10_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS10 */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS11_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS11 */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS12_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS12 */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS13_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS13 */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS14_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS14 */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS15_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_ADDRESS15 */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS0 0x000000BE /* ADMW_CORE Sensor Address */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS1 0x000000FE /* ADMW_CORE Sensor Address */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS2 0x0000013E /* ADMW_CORE Sensor Address */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS3 0x0000017E /* ADMW_CORE Sensor Address */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS4 0x000001BE /* ADMW_CORE Sensor Address */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS5 0x000001FE /* ADMW_CORE Sensor Address */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS6 0x0000023E /* ADMW_CORE Sensor Address */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS7 0x0000027E /* ADMW_CORE Sensor Address */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS8 0x000002BE /* ADMW_CORE Sensor Address */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS9 0x000002FE /* ADMW_CORE Sensor Address */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS10 0x0000033E /* ADMW_CORE Sensor Address */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS11 0x0000037E /* ADMW_CORE Sensor Address */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS12 0x000003BE /* ADMW_CORE Sensor Address */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS13 0x000003FE /* ADMW_CORE Sensor Address */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS14 0x0000043E /* ADMW_CORE Sensor Address */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESS15 0x0000047E /* ADMW_CORE Sensor Address */ -#define REG_CORE_DIGITAL_SENSOR_ADDRESSn(i) (REG_CORE_DIGITAL_SENSOR_ADDRESS0 + ((i) * 64)) -#define REG_CORE_DIGITAL_SENSOR_ADDRESSn_COUNT 16 +#define REG_CORE_DIGITAL_SENSOR_ADDRESS0 0x000000BE /* CORE Sensor Address */ +#define REG_CORE_DIGITAL_SENSOR_ADDRESS1 0x000000FE /* CORE Sensor Address */ +#define REG_CORE_DIGITAL_SENSOR_ADDRESS2 0x0000013E /* CORE Sensor Address */ +#define REG_CORE_DIGITAL_SENSOR_ADDRESS3 0x0000017E /* CORE Sensor Address */ +#define REG_CORE_DIGITAL_SENSOR_ADDRESS4 0x000001BE /* CORE Sensor Address */ +#define REG_CORE_DIGITAL_SENSOR_ADDRESS5 0x000001FE /* CORE Sensor Address */ +#define REG_CORE_DIGITAL_SENSOR_ADDRESS6 0x0000023E /* CORE Sensor Address */ +#define REG_CORE_DIGITAL_SENSOR_ADDRESS7 0x0000027E /* CORE Sensor Address */ +#define REG_CORE_DIGITAL_SENSOR_ADDRESS8 0x000002BE /* CORE Sensor Address */ +#define REG_CORE_DIGITAL_SENSOR_ADDRESS9 0x000002FE /* CORE Sensor Address */ +#define REG_CORE_DIGITAL_SENSOR_ADDRESS10 0x0000033E /* CORE Sensor Address */ +#define REG_CORE_DIGITAL_SENSOR_ADDRESSn(i) (REG_CORE_DIGITAL_SENSOR_ADDRESS0 + ((i) * 64)) +#define REG_CORE_DIGITAL_SENSOR_ADDRESSn_COUNT 11 #define REG_CORE_DIGITAL_SENSOR_NUM_CMDSn_RESET 0x00000000 /* Reset Value for Digital_Sensor_Num_Cmds[n] */ #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS0_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS0 */ #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS1_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS1 */ @@ -903,29 +725,19 @@ #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS8_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS8 */ #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS9_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS9 */ #define REG_CORE_DIGITAL_SENSOR_NUM_CMDS10_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS10 */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS11_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS11 */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS12_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS12 */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS13_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS13 */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS14_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS14 */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS15_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_NUM_CMDS15 */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS0 0x000000BF /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS1 0x000000FF /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS2 0x0000013F /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS3 0x0000017F /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS4 0x000001BF /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS5 0x000001FF /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS6 0x0000023F /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS7 0x0000027F /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS8 0x000002BF /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS9 0x000002FF /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS10 0x0000033F /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS11 0x0000037F /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS12 0x000003BF /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS13 0x000003FF /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS14 0x0000043F /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */ -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS15 0x0000047F /* ADMW_CORE Number of Configuration, Read Commands for Digital Sensors */ +#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS0 0x000000BF /* CORE Number of Configuration, Read Commands for Digital Sensors */ +#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS1 0x000000FF /* CORE Number of Configuration, Read Commands for Digital Sensors */ +#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS2 0x0000013F /* CORE Number of Configuration, Read Commands for Digital Sensors */ +#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS3 0x0000017F /* CORE Number of Configuration, Read Commands for Digital Sensors */ +#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS4 0x000001BF /* CORE Number of Configuration, Read Commands for Digital Sensors */ +#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS5 0x000001FF /* CORE Number of Configuration, Read Commands for Digital Sensors */ +#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS6 0x0000023F /* CORE Number of Configuration, Read Commands for Digital Sensors */ +#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS7 0x0000027F /* CORE Number of Configuration, Read Commands for Digital Sensors */ +#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS8 0x000002BF /* CORE Number of Configuration, Read Commands for Digital Sensors */ +#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS9 0x000002FF /* CORE Number of Configuration, Read Commands for Digital Sensors */ +#define REG_CORE_DIGITAL_SENSOR_NUM_CMDS10 0x0000033F /* CORE Number of Configuration, Read Commands for Digital Sensors */ #define REG_CORE_DIGITAL_SENSOR_NUM_CMDSn(i) (REG_CORE_DIGITAL_SENSOR_NUM_CMDS0 + ((i) * 64)) -#define REG_CORE_DIGITAL_SENSOR_NUM_CMDSn_COUNT 16 +#define REG_CORE_DIGITAL_SENSOR_NUM_CMDSn_COUNT 11 #define REG_CORE_DIGITAL_SENSOR_COMMSn_RESET 0x00000006 /* Reset Value for Digital_Sensor_Comms[n] */ #define REG_CORE_DIGITAL_SENSOR_COMMS0_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS0 */ #define REG_CORE_DIGITAL_SENSOR_COMMS1_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS1 */ @@ -938,29 +750,19 @@ #define REG_CORE_DIGITAL_SENSOR_COMMS8_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS8 */ #define REG_CORE_DIGITAL_SENSOR_COMMS9_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS9 */ #define REG_CORE_DIGITAL_SENSOR_COMMS10_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS10 */ -#define REG_CORE_DIGITAL_SENSOR_COMMS11_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS11 */ -#define REG_CORE_DIGITAL_SENSOR_COMMS12_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS12 */ -#define REG_CORE_DIGITAL_SENSOR_COMMS13_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS13 */ -#define REG_CORE_DIGITAL_SENSOR_COMMS14_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS14 */ -#define REG_CORE_DIGITAL_SENSOR_COMMS15_RESET 0x00000006 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMS15 */ -#define REG_CORE_DIGITAL_SENSOR_COMMS0 0x000000C0 /* ADMW_CORE Digital Sensor Communication Clock Configuration */ -#define REG_CORE_DIGITAL_SENSOR_COMMS1 0x00000100 /* ADMW_CORE Digital Sensor Communication Clock Configuration */ -#define REG_CORE_DIGITAL_SENSOR_COMMS2 0x00000140 /* ADMW_CORE Digital Sensor Communication Clock Configuration */ -#define REG_CORE_DIGITAL_SENSOR_COMMS3 0x00000180 /* ADMW_CORE Digital Sensor Communication Clock Configuration */ -#define REG_CORE_DIGITAL_SENSOR_COMMS4 0x000001C0 /* ADMW_CORE Digital Sensor Communication Clock Configuration */ -#define REG_CORE_DIGITAL_SENSOR_COMMS5 0x00000200 /* ADMW_CORE Digital Sensor Communication Clock Configuration */ -#define REG_CORE_DIGITAL_SENSOR_COMMS6 0x00000240 /* ADMW_CORE Digital Sensor Communication Clock Configuration */ -#define REG_CORE_DIGITAL_SENSOR_COMMS7 0x00000280 /* ADMW_CORE Digital Sensor Communication Clock Configuration */ -#define REG_CORE_DIGITAL_SENSOR_COMMS8 0x000002C0 /* ADMW_CORE Digital Sensor Communication Clock Configuration */ -#define REG_CORE_DIGITAL_SENSOR_COMMS9 0x00000300 /* ADMW_CORE Digital Sensor Communication Clock Configuration */ -#define REG_CORE_DIGITAL_SENSOR_COMMS10 0x00000340 /* ADMW_CORE Digital Sensor Communication Clock Configuration */ -#define REG_CORE_DIGITAL_SENSOR_COMMS11 0x00000380 /* ADMW_CORE Digital Sensor Communication Clock Configuration */ -#define REG_CORE_DIGITAL_SENSOR_COMMS12 0x000003C0 /* ADMW_CORE Digital Sensor Communication Clock Configuration */ -#define REG_CORE_DIGITAL_SENSOR_COMMS13 0x00000400 /* ADMW_CORE Digital Sensor Communication Clock Configuration */ -#define REG_CORE_DIGITAL_SENSOR_COMMS14 0x00000440 /* ADMW_CORE Digital Sensor Communication Clock Configuration */ -#define REG_CORE_DIGITAL_SENSOR_COMMS15 0x00000480 /* ADMW_CORE Digital Sensor Communication Clock Configuration */ -#define REG_CORE_DIGITAL_SENSOR_COMMSn(i) (REG_CORE_DIGITAL_SENSOR_COMMS0 + ((i) * 64)) -#define REG_CORE_DIGITAL_SENSOR_COMMSn_COUNT 16 +#define REG_CORE_DIGITAL_SENSOR_COMMS0 0x000000C0 /* CORE Digital Sensor Communication Clock Configuration */ +#define REG_CORE_DIGITAL_SENSOR_COMMS1 0x00000100 /* CORE Digital Sensor Communication Clock Configuration */ +#define REG_CORE_DIGITAL_SENSOR_COMMS2 0x00000140 /* CORE Digital Sensor Communication Clock Configuration */ +#define REG_CORE_DIGITAL_SENSOR_COMMS3 0x00000180 /* CORE Digital Sensor Communication Clock Configuration */ +#define REG_CORE_DIGITAL_SENSOR_COMMS4 0x000001C0 /* CORE Digital Sensor Communication Clock Configuration */ +#define REG_CORE_DIGITAL_SENSOR_COMMS5 0x00000200 /* CORE Digital Sensor Communication Clock Configuration */ +#define REG_CORE_DIGITAL_SENSOR_COMMS6 0x00000240 /* CORE Digital Sensor Communication Clock Configuration */ +#define REG_CORE_DIGITAL_SENSOR_COMMS7 0x00000280 /* CORE Digital Sensor Communication Clock Configuration */ +#define REG_CORE_DIGITAL_SENSOR_COMMS8 0x000002C0 /* CORE Digital Sensor Communication Clock Configuration */ +#define REG_CORE_DIGITAL_SENSOR_COMMS9 0x00000300 /* CORE Digital Sensor Communication Clock Configuration */ +#define REG_CORE_DIGITAL_SENSOR_COMMS10 0x00000340 /* CORE Digital Sensor Communication Clock Configuration */ +#define REG_CORE_DIGITAL_SENSOR_COMMSn(i) (REG_CORE_DIGITAL_SENSOR_COMMS0 + ((i) * 64)) +#define REG_CORE_DIGITAL_SENSOR_COMMSn_COUNT 11 #define REG_CORE_DIGITAL_SENSOR_COMMAND1n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command1[n] */ #define REG_CORE_DIGITAL_SENSOR_COMMAND10_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND10 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND11_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND11 */ @@ -973,29 +775,19 @@ #define REG_CORE_DIGITAL_SENSOR_COMMAND18_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND18 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND19_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND19 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND110_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND110 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND111_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND111 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND112_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND112 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND113_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND113 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND114_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND114 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND115_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND115 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND10 0x000000C2 /* ADMW_CORE Sensor Configuration Command1 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND11 0x00000102 /* ADMW_CORE Sensor Configuration Command1 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND12 0x00000142 /* ADMW_CORE Sensor Configuration Command1 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND13 0x00000182 /* ADMW_CORE Sensor Configuration Command1 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND14 0x000001C2 /* ADMW_CORE Sensor Configuration Command1 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND15 0x00000202 /* ADMW_CORE Sensor Configuration Command1 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND16 0x00000242 /* ADMW_CORE Sensor Configuration Command1 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND17 0x00000282 /* ADMW_CORE Sensor Configuration Command1 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND18 0x000002C2 /* ADMW_CORE Sensor Configuration Command1 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND19 0x00000302 /* ADMW_CORE Sensor Configuration Command1 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND110 0x00000342 /* ADMW_CORE Sensor Configuration Command1 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND111 0x00000382 /* ADMW_CORE Sensor Configuration Command1 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND112 0x000003C2 /* ADMW_CORE Sensor Configuration Command1 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND113 0x00000402 /* ADMW_CORE Sensor Configuration Command1 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND114 0x00000442 /* ADMW_CORE Sensor Configuration Command1 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND115 0x00000482 /* ADMW_CORE Sensor Configuration Command1 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND10 0x000000C2 /* CORE Sensor Configuration Command1 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND11 0x00000102 /* CORE Sensor Configuration Command1 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND12 0x00000142 /* CORE Sensor Configuration Command1 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND13 0x00000182 /* CORE Sensor Configuration Command1 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND14 0x000001C2 /* CORE Sensor Configuration Command1 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND15 0x00000202 /* CORE Sensor Configuration Command1 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND16 0x00000242 /* CORE Sensor Configuration Command1 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND17 0x00000282 /* CORE Sensor Configuration Command1 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND18 0x000002C2 /* CORE Sensor Configuration Command1 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND19 0x00000302 /* CORE Sensor Configuration Command1 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND110 0x00000342 /* CORE Sensor Configuration Command1 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND1n(i) (REG_CORE_DIGITAL_SENSOR_COMMAND10 + ((i) * 64)) -#define REG_CORE_DIGITAL_SENSOR_COMMAND1n_COUNT 16 +#define REG_CORE_DIGITAL_SENSOR_COMMAND1n_COUNT 11 #define REG_CORE_DIGITAL_SENSOR_COMMAND2n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command2[n] */ #define REG_CORE_DIGITAL_SENSOR_COMMAND20_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND20 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND21_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND21 */ @@ -1008,29 +800,19 @@ #define REG_CORE_DIGITAL_SENSOR_COMMAND28_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND28 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND29_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND29 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND210_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND210 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND211_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND211 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND212_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND212 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND213_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND213 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND214_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND214 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND215_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND215 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND20 0x000000C3 /* ADMW_CORE Sensor Configuration Command2 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND21 0x00000103 /* ADMW_CORE Sensor Configuration Command2 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND22 0x00000143 /* ADMW_CORE Sensor Configuration Command2 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND23 0x00000183 /* ADMW_CORE Sensor Configuration Command2 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND24 0x000001C3 /* ADMW_CORE Sensor Configuration Command2 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND25 0x00000203 /* ADMW_CORE Sensor Configuration Command2 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND26 0x00000243 /* ADMW_CORE Sensor Configuration Command2 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND27 0x00000283 /* ADMW_CORE Sensor Configuration Command2 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND28 0x000002C3 /* ADMW_CORE Sensor Configuration Command2 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND29 0x00000303 /* ADMW_CORE Sensor Configuration Command2 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND210 0x00000343 /* ADMW_CORE Sensor Configuration Command2 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND211 0x00000383 /* ADMW_CORE Sensor Configuration Command2 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND212 0x000003C3 /* ADMW_CORE Sensor Configuration Command2 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND213 0x00000403 /* ADMW_CORE Sensor Configuration Command2 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND214 0x00000443 /* ADMW_CORE Sensor Configuration Command2 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND215 0x00000483 /* ADMW_CORE Sensor Configuration Command2 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND20 0x000000C3 /* CORE Sensor Configuration Command2 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND21 0x00000103 /* CORE Sensor Configuration Command2 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND22 0x00000143 /* CORE Sensor Configuration Command2 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND23 0x00000183 /* CORE Sensor Configuration Command2 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND24 0x000001C3 /* CORE Sensor Configuration Command2 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND25 0x00000203 /* CORE Sensor Configuration Command2 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND26 0x00000243 /* CORE Sensor Configuration Command2 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND27 0x00000283 /* CORE Sensor Configuration Command2 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND28 0x000002C3 /* CORE Sensor Configuration Command2 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND29 0x00000303 /* CORE Sensor Configuration Command2 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND210 0x00000343 /* CORE Sensor Configuration Command2 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND2n(i) (REG_CORE_DIGITAL_SENSOR_COMMAND20 + ((i) * 64)) -#define REG_CORE_DIGITAL_SENSOR_COMMAND2n_COUNT 16 +#define REG_CORE_DIGITAL_SENSOR_COMMAND2n_COUNT 11 #define REG_CORE_DIGITAL_SENSOR_COMMAND3n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command3[n] */ #define REG_CORE_DIGITAL_SENSOR_COMMAND30_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND30 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND31_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND31 */ @@ -1043,29 +825,19 @@ #define REG_CORE_DIGITAL_SENSOR_COMMAND38_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND38 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND39_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND39 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND310_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND310 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND311_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND311 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND312_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND312 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND313_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND313 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND314_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND314 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND315_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND315 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND30 0x000000C4 /* ADMW_CORE Sensor Configuration Command3 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND31 0x00000104 /* ADMW_CORE Sensor Configuration Command3 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND32 0x00000144 /* ADMW_CORE Sensor Configuration Command3 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND33 0x00000184 /* ADMW_CORE Sensor Configuration Command3 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND34 0x000001C4 /* ADMW_CORE Sensor Configuration Command3 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND35 0x00000204 /* ADMW_CORE Sensor Configuration Command3 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND36 0x00000244 /* ADMW_CORE Sensor Configuration Command3 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND37 0x00000284 /* ADMW_CORE Sensor Configuration Command3 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND38 0x000002C4 /* ADMW_CORE Sensor Configuration Command3 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND39 0x00000304 /* ADMW_CORE Sensor Configuration Command3 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND310 0x00000344 /* ADMW_CORE Sensor Configuration Command3 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND311 0x00000384 /* ADMW_CORE Sensor Configuration Command3 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND312 0x000003C4 /* ADMW_CORE Sensor Configuration Command3 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND313 0x00000404 /* ADMW_CORE Sensor Configuration Command3 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND314 0x00000444 /* ADMW_CORE Sensor Configuration Command3 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND315 0x00000484 /* ADMW_CORE Sensor Configuration Command3 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND30 0x000000C4 /* CORE Sensor Configuration Command3 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND31 0x00000104 /* CORE Sensor Configuration Command3 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND32 0x00000144 /* CORE Sensor Configuration Command3 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND33 0x00000184 /* CORE Sensor Configuration Command3 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND34 0x000001C4 /* CORE Sensor Configuration Command3 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND35 0x00000204 /* CORE Sensor Configuration Command3 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND36 0x00000244 /* CORE Sensor Configuration Command3 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND37 0x00000284 /* CORE Sensor Configuration Command3 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND38 0x000002C4 /* CORE Sensor Configuration Command3 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND39 0x00000304 /* CORE Sensor Configuration Command3 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND310 0x00000344 /* CORE Sensor Configuration Command3 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND3n(i) (REG_CORE_DIGITAL_SENSOR_COMMAND30 + ((i) * 64)) -#define REG_CORE_DIGITAL_SENSOR_COMMAND3n_COUNT 16 +#define REG_CORE_DIGITAL_SENSOR_COMMAND3n_COUNT 11 #define REG_CORE_DIGITAL_SENSOR_COMMAND4n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command4[n] */ #define REG_CORE_DIGITAL_SENSOR_COMMAND40_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND40 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND41_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND41 */ @@ -1078,29 +850,19 @@ #define REG_CORE_DIGITAL_SENSOR_COMMAND48_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND48 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND49_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND49 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND410_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND410 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND411_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND411 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND412_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND412 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND413_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND413 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND414_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND414 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND415_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND415 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND40 0x000000C5 /* ADMW_CORE Sensor Configuration Command4 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND41 0x00000105 /* ADMW_CORE Sensor Configuration Command4 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND42 0x00000145 /* ADMW_CORE Sensor Configuration Command4 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND43 0x00000185 /* ADMW_CORE Sensor Configuration Command4 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND44 0x000001C5 /* ADMW_CORE Sensor Configuration Command4 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND45 0x00000205 /* ADMW_CORE Sensor Configuration Command4 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND46 0x00000245 /* ADMW_CORE Sensor Configuration Command4 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND47 0x00000285 /* ADMW_CORE Sensor Configuration Command4 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND48 0x000002C5 /* ADMW_CORE Sensor Configuration Command4 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND49 0x00000305 /* ADMW_CORE Sensor Configuration Command4 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND410 0x00000345 /* ADMW_CORE Sensor Configuration Command4 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND411 0x00000385 /* ADMW_CORE Sensor Configuration Command4 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND412 0x000003C5 /* ADMW_CORE Sensor Configuration Command4 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND413 0x00000405 /* ADMW_CORE Sensor Configuration Command4 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND414 0x00000445 /* ADMW_CORE Sensor Configuration Command4 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND415 0x00000485 /* ADMW_CORE Sensor Configuration Command4 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND40 0x000000C5 /* CORE Sensor Configuration Command4 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND41 0x00000105 /* CORE Sensor Configuration Command4 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND42 0x00000145 /* CORE Sensor Configuration Command4 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND43 0x00000185 /* CORE Sensor Configuration Command4 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND44 0x000001C5 /* CORE Sensor Configuration Command4 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND45 0x00000205 /* CORE Sensor Configuration Command4 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND46 0x00000245 /* CORE Sensor Configuration Command4 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND47 0x00000285 /* CORE Sensor Configuration Command4 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND48 0x000002C5 /* CORE Sensor Configuration Command4 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND49 0x00000305 /* CORE Sensor Configuration Command4 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND410 0x00000345 /* CORE Sensor Configuration Command4 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND4n(i) (REG_CORE_DIGITAL_SENSOR_COMMAND40 + ((i) * 64)) -#define REG_CORE_DIGITAL_SENSOR_COMMAND4n_COUNT 16 +#define REG_CORE_DIGITAL_SENSOR_COMMAND4n_COUNT 11 #define REG_CORE_DIGITAL_SENSOR_COMMAND5n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command5[n] */ #define REG_CORE_DIGITAL_SENSOR_COMMAND50_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND50 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND51_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND51 */ @@ -1113,29 +875,19 @@ #define REG_CORE_DIGITAL_SENSOR_COMMAND58_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND58 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND59_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND59 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND510_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND510 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND511_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND511 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND512_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND512 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND513_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND513 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND514_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND514 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND515_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND515 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND50 0x000000C6 /* ADMW_CORE Sensor Configuration Command5 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND51 0x00000106 /* ADMW_CORE Sensor Configuration Command5 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND52 0x00000146 /* ADMW_CORE Sensor Configuration Command5 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND53 0x00000186 /* ADMW_CORE Sensor Configuration Command5 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND54 0x000001C6 /* ADMW_CORE Sensor Configuration Command5 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND55 0x00000206 /* ADMW_CORE Sensor Configuration Command5 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND56 0x00000246 /* ADMW_CORE Sensor Configuration Command5 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND57 0x00000286 /* ADMW_CORE Sensor Configuration Command5 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND58 0x000002C6 /* ADMW_CORE Sensor Configuration Command5 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND59 0x00000306 /* ADMW_CORE Sensor Configuration Command5 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND510 0x00000346 /* ADMW_CORE Sensor Configuration Command5 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND511 0x00000386 /* ADMW_CORE Sensor Configuration Command5 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND512 0x000003C6 /* ADMW_CORE Sensor Configuration Command5 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND513 0x00000406 /* ADMW_CORE Sensor Configuration Command5 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND514 0x00000446 /* ADMW_CORE Sensor Configuration Command5 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND515 0x00000486 /* ADMW_CORE Sensor Configuration Command5 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND50 0x000000C6 /* CORE Sensor Configuration Command5 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND51 0x00000106 /* CORE Sensor Configuration Command5 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND52 0x00000146 /* CORE Sensor Configuration Command5 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND53 0x00000186 /* CORE Sensor Configuration Command5 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND54 0x000001C6 /* CORE Sensor Configuration Command5 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND55 0x00000206 /* CORE Sensor Configuration Command5 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND56 0x00000246 /* CORE Sensor Configuration Command5 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND57 0x00000286 /* CORE Sensor Configuration Command5 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND58 0x000002C6 /* CORE Sensor Configuration Command5 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND59 0x00000306 /* CORE Sensor Configuration Command5 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND510 0x00000346 /* CORE Sensor Configuration Command5 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND5n(i) (REG_CORE_DIGITAL_SENSOR_COMMAND50 + ((i) * 64)) -#define REG_CORE_DIGITAL_SENSOR_COMMAND5n_COUNT 16 +#define REG_CORE_DIGITAL_SENSOR_COMMAND5n_COUNT 11 #define REG_CORE_DIGITAL_SENSOR_COMMAND6n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command6[n] */ #define REG_CORE_DIGITAL_SENSOR_COMMAND60_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND60 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND61_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND61 */ @@ -1148,29 +900,19 @@ #define REG_CORE_DIGITAL_SENSOR_COMMAND68_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND68 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND69_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND69 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND610_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND610 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND611_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND611 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND612_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND612 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND613_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND613 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND614_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND614 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND615_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND615 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND60 0x000000C7 /* ADMW_CORE Sensor Configuration Command6 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND61 0x00000107 /* ADMW_CORE Sensor Configuration Command6 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND62 0x00000147 /* ADMW_CORE Sensor Configuration Command6 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND63 0x00000187 /* ADMW_CORE Sensor Configuration Command6 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND64 0x000001C7 /* ADMW_CORE Sensor Configuration Command6 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND65 0x00000207 /* ADMW_CORE Sensor Configuration Command6 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND66 0x00000247 /* ADMW_CORE Sensor Configuration Command6 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND67 0x00000287 /* ADMW_CORE Sensor Configuration Command6 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND68 0x000002C7 /* ADMW_CORE Sensor Configuration Command6 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND69 0x00000307 /* ADMW_CORE Sensor Configuration Command6 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND610 0x00000347 /* ADMW_CORE Sensor Configuration Command6 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND611 0x00000387 /* ADMW_CORE Sensor Configuration Command6 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND612 0x000003C7 /* ADMW_CORE Sensor Configuration Command6 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND613 0x00000407 /* ADMW_CORE Sensor Configuration Command6 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND614 0x00000447 /* ADMW_CORE Sensor Configuration Command6 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND615 0x00000487 /* ADMW_CORE Sensor Configuration Command6 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND60 0x000000C7 /* CORE Sensor Configuration Command6 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND61 0x00000107 /* CORE Sensor Configuration Command6 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND62 0x00000147 /* CORE Sensor Configuration Command6 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND63 0x00000187 /* CORE Sensor Configuration Command6 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND64 0x000001C7 /* CORE Sensor Configuration Command6 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND65 0x00000207 /* CORE Sensor Configuration Command6 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND66 0x00000247 /* CORE Sensor Configuration Command6 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND67 0x00000287 /* CORE Sensor Configuration Command6 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND68 0x000002C7 /* CORE Sensor Configuration Command6 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND69 0x00000307 /* CORE Sensor Configuration Command6 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND610 0x00000347 /* CORE Sensor Configuration Command6 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND6n(i) (REG_CORE_DIGITAL_SENSOR_COMMAND60 + ((i) * 64)) -#define REG_CORE_DIGITAL_SENSOR_COMMAND6n_COUNT 16 +#define REG_CORE_DIGITAL_SENSOR_COMMAND6n_COUNT 11 #define REG_CORE_DIGITAL_SENSOR_COMMAND7n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command7[n] */ #define REG_CORE_DIGITAL_SENSOR_COMMAND70_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND70 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND71_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND71 */ @@ -1183,29 +925,19 @@ #define REG_CORE_DIGITAL_SENSOR_COMMAND78_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND78 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND79_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND79 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND710_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND710 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND711_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND711 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND712_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND712 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND713_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND713 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND714_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND714 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND715_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_COMMAND715 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND70 0x000000C8 /* ADMW_CORE Sensor Configuration Command7 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND71 0x00000108 /* ADMW_CORE Sensor Configuration Command7 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND72 0x00000148 /* ADMW_CORE Sensor Configuration Command7 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND73 0x00000188 /* ADMW_CORE Sensor Configuration Command7 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND74 0x000001C8 /* ADMW_CORE Sensor Configuration Command7 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND75 0x00000208 /* ADMW_CORE Sensor Configuration Command7 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND76 0x00000248 /* ADMW_CORE Sensor Configuration Command7 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND77 0x00000288 /* ADMW_CORE Sensor Configuration Command7 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND78 0x000002C8 /* ADMW_CORE Sensor Configuration Command7 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND79 0x00000308 /* ADMW_CORE Sensor Configuration Command7 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND710 0x00000348 /* ADMW_CORE Sensor Configuration Command7 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND711 0x00000388 /* ADMW_CORE Sensor Configuration Command7 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND712 0x000003C8 /* ADMW_CORE Sensor Configuration Command7 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND713 0x00000408 /* ADMW_CORE Sensor Configuration Command7 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND714 0x00000448 /* ADMW_CORE Sensor Configuration Command7 */ -#define REG_CORE_DIGITAL_SENSOR_COMMAND715 0x00000488 /* ADMW_CORE Sensor Configuration Command7 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND70 0x000000C8 /* CORE Sensor Configuration Command7 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND71 0x00000108 /* CORE Sensor Configuration Command7 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND72 0x00000148 /* CORE Sensor Configuration Command7 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND73 0x00000188 /* CORE Sensor Configuration Command7 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND74 0x000001C8 /* CORE Sensor Configuration Command7 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND75 0x00000208 /* CORE Sensor Configuration Command7 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND76 0x00000248 /* CORE Sensor Configuration Command7 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND77 0x00000288 /* CORE Sensor Configuration Command7 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND78 0x000002C8 /* CORE Sensor Configuration Command7 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND79 0x00000308 /* CORE Sensor Configuration Command7 */ +#define REG_CORE_DIGITAL_SENSOR_COMMAND710 0x00000348 /* CORE Sensor Configuration Command7 */ #define REG_CORE_DIGITAL_SENSOR_COMMAND7n(i) (REG_CORE_DIGITAL_SENSOR_COMMAND70 + ((i) * 64)) -#define REG_CORE_DIGITAL_SENSOR_COMMAND7n_COUNT 16 +#define REG_CORE_DIGITAL_SENSOR_COMMAND7n_COUNT 11 #define REG_CORE_DIGITAL_SENSOR_READ_CMD1n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd1[n] */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD10_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD10 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD11_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD11 */ @@ -1218,29 +950,19 @@ #define REG_CORE_DIGITAL_SENSOR_READ_CMD18_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD18 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD19_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD19 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD110_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD110 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD111_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD111 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD112_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD112 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD113_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD113 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD114_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD114 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD115_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD115 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD10 0x000000C9 /* ADMW_CORE Sensor Read Command1 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD11 0x00000109 /* ADMW_CORE Sensor Read Command1 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD12 0x00000149 /* ADMW_CORE Sensor Read Command1 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD13 0x00000189 /* ADMW_CORE Sensor Read Command1 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD14 0x000001C9 /* ADMW_CORE Sensor Read Command1 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD15 0x00000209 /* ADMW_CORE Sensor Read Command1 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD16 0x00000249 /* ADMW_CORE Sensor Read Command1 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD17 0x00000289 /* ADMW_CORE Sensor Read Command1 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD18 0x000002C9 /* ADMW_CORE Sensor Read Command1 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD19 0x00000309 /* ADMW_CORE Sensor Read Command1 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD110 0x00000349 /* ADMW_CORE Sensor Read Command1 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD111 0x00000389 /* ADMW_CORE Sensor Read Command1 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD112 0x000003C9 /* ADMW_CORE Sensor Read Command1 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD113 0x00000409 /* ADMW_CORE Sensor Read Command1 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD114 0x00000449 /* ADMW_CORE Sensor Read Command1 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD115 0x00000489 /* ADMW_CORE Sensor Read Command1 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD10 0x000000C9 /* CORE Sensor Read Command1 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD11 0x00000109 /* CORE Sensor Read Command1 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD12 0x00000149 /* CORE Sensor Read Command1 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD13 0x00000189 /* CORE Sensor Read Command1 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD14 0x000001C9 /* CORE Sensor Read Command1 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD15 0x00000209 /* CORE Sensor Read Command1 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD16 0x00000249 /* CORE Sensor Read Command1 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD17 0x00000289 /* CORE Sensor Read Command1 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD18 0x000002C9 /* CORE Sensor Read Command1 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD19 0x00000309 /* CORE Sensor Read Command1 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD110 0x00000349 /* CORE Sensor Read Command1 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD1n(i) (REG_CORE_DIGITAL_SENSOR_READ_CMD10 + ((i) * 64)) -#define REG_CORE_DIGITAL_SENSOR_READ_CMD1n_COUNT 16 +#define REG_CORE_DIGITAL_SENSOR_READ_CMD1n_COUNT 11 #define REG_CORE_DIGITAL_SENSOR_READ_CMD2n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd2[n] */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD20_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD20 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD21_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD21 */ @@ -1253,29 +975,19 @@ #define REG_CORE_DIGITAL_SENSOR_READ_CMD28_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD28 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD29_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD29 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD210_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD210 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD211_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD211 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD212_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD212 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD213_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD213 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD214_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD214 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD215_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD215 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD20 0x000000CA /* ADMW_CORE Sensor Read Command2 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD21 0x0000010A /* ADMW_CORE Sensor Read Command2 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD22 0x0000014A /* ADMW_CORE Sensor Read Command2 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD23 0x0000018A /* ADMW_CORE Sensor Read Command2 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD24 0x000001CA /* ADMW_CORE Sensor Read Command2 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD25 0x0000020A /* ADMW_CORE Sensor Read Command2 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD26 0x0000024A /* ADMW_CORE Sensor Read Command2 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD27 0x0000028A /* ADMW_CORE Sensor Read Command2 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD28 0x000002CA /* ADMW_CORE Sensor Read Command2 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD29 0x0000030A /* ADMW_CORE Sensor Read Command2 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD210 0x0000034A /* ADMW_CORE Sensor Read Command2 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD211 0x0000038A /* ADMW_CORE Sensor Read Command2 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD212 0x000003CA /* ADMW_CORE Sensor Read Command2 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD213 0x0000040A /* ADMW_CORE Sensor Read Command2 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD214 0x0000044A /* ADMW_CORE Sensor Read Command2 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD215 0x0000048A /* ADMW_CORE Sensor Read Command2 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD20 0x000000CA /* CORE Sensor Read Command2 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD21 0x0000010A /* CORE Sensor Read Command2 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD22 0x0000014A /* CORE Sensor Read Command2 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD23 0x0000018A /* CORE Sensor Read Command2 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD24 0x000001CA /* CORE Sensor Read Command2 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD25 0x0000020A /* CORE Sensor Read Command2 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD26 0x0000024A /* CORE Sensor Read Command2 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD27 0x0000028A /* CORE Sensor Read Command2 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD28 0x000002CA /* CORE Sensor Read Command2 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD29 0x0000030A /* CORE Sensor Read Command2 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD210 0x0000034A /* CORE Sensor Read Command2 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD2n(i) (REG_CORE_DIGITAL_SENSOR_READ_CMD20 + ((i) * 64)) -#define REG_CORE_DIGITAL_SENSOR_READ_CMD2n_COUNT 16 +#define REG_CORE_DIGITAL_SENSOR_READ_CMD2n_COUNT 11 #define REG_CORE_DIGITAL_SENSOR_READ_CMD3n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd3[n] */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD30_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD30 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD31_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD31 */ @@ -1288,29 +1000,19 @@ #define REG_CORE_DIGITAL_SENSOR_READ_CMD38_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD38 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD39_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD39 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD310_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD310 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD311_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD311 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD312_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD312 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD313_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD313 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD314_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD314 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD315_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD315 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD30 0x000000CB /* ADMW_CORE Sensor Read Command3 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD31 0x0000010B /* ADMW_CORE Sensor Read Command3 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD32 0x0000014B /* ADMW_CORE Sensor Read Command3 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD33 0x0000018B /* ADMW_CORE Sensor Read Command3 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD34 0x000001CB /* ADMW_CORE Sensor Read Command3 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD35 0x0000020B /* ADMW_CORE Sensor Read Command3 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD36 0x0000024B /* ADMW_CORE Sensor Read Command3 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD37 0x0000028B /* ADMW_CORE Sensor Read Command3 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD38 0x000002CB /* ADMW_CORE Sensor Read Command3 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD39 0x0000030B /* ADMW_CORE Sensor Read Command3 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD310 0x0000034B /* ADMW_CORE Sensor Read Command3 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD311 0x0000038B /* ADMW_CORE Sensor Read Command3 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD312 0x000003CB /* ADMW_CORE Sensor Read Command3 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD313 0x0000040B /* ADMW_CORE Sensor Read Command3 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD314 0x0000044B /* ADMW_CORE Sensor Read Command3 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD315 0x0000048B /* ADMW_CORE Sensor Read Command3 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD30 0x000000CB /* CORE Sensor Read Command3 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD31 0x0000010B /* CORE Sensor Read Command3 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD32 0x0000014B /* CORE Sensor Read Command3 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD33 0x0000018B /* CORE Sensor Read Command3 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD34 0x000001CB /* CORE Sensor Read Command3 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD35 0x0000020B /* CORE Sensor Read Command3 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD36 0x0000024B /* CORE Sensor Read Command3 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD37 0x0000028B /* CORE Sensor Read Command3 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD38 0x000002CB /* CORE Sensor Read Command3 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD39 0x0000030B /* CORE Sensor Read Command3 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD310 0x0000034B /* CORE Sensor Read Command3 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD3n(i) (REG_CORE_DIGITAL_SENSOR_READ_CMD30 + ((i) * 64)) -#define REG_CORE_DIGITAL_SENSOR_READ_CMD3n_COUNT 16 +#define REG_CORE_DIGITAL_SENSOR_READ_CMD3n_COUNT 11 #define REG_CORE_DIGITAL_SENSOR_READ_CMD4n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd4[n] */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD40_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD40 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD41_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD41 */ @@ -1323,29 +1025,19 @@ #define REG_CORE_DIGITAL_SENSOR_READ_CMD48_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD48 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD49_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD49 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD410_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD410 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD411_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD411 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD412_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD412 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD413_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD413 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD414_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD414 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD415_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD415 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD40 0x000000CC /* ADMW_CORE Sensor Read Command4 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD41 0x0000010C /* ADMW_CORE Sensor Read Command4 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD42 0x0000014C /* ADMW_CORE Sensor Read Command4 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD43 0x0000018C /* ADMW_CORE Sensor Read Command4 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD44 0x000001CC /* ADMW_CORE Sensor Read Command4 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD45 0x0000020C /* ADMW_CORE Sensor Read Command4 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD46 0x0000024C /* ADMW_CORE Sensor Read Command4 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD47 0x0000028C /* ADMW_CORE Sensor Read Command4 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD48 0x000002CC /* ADMW_CORE Sensor Read Command4 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD49 0x0000030C /* ADMW_CORE Sensor Read Command4 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD410 0x0000034C /* ADMW_CORE Sensor Read Command4 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD411 0x0000038C /* ADMW_CORE Sensor Read Command4 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD412 0x000003CC /* ADMW_CORE Sensor Read Command4 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD413 0x0000040C /* ADMW_CORE Sensor Read Command4 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD414 0x0000044C /* ADMW_CORE Sensor Read Command4 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD415 0x0000048C /* ADMW_CORE Sensor Read Command4 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD40 0x000000CC /* CORE Sensor Read Command4 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD41 0x0000010C /* CORE Sensor Read Command4 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD42 0x0000014C /* CORE Sensor Read Command4 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD43 0x0000018C /* CORE Sensor Read Command4 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD44 0x000001CC /* CORE Sensor Read Command4 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD45 0x0000020C /* CORE Sensor Read Command4 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD46 0x0000024C /* CORE Sensor Read Command4 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD47 0x0000028C /* CORE Sensor Read Command4 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD48 0x000002CC /* CORE Sensor Read Command4 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD49 0x0000030C /* CORE Sensor Read Command4 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD410 0x0000034C /* CORE Sensor Read Command4 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD4n(i) (REG_CORE_DIGITAL_SENSOR_READ_CMD40 + ((i) * 64)) -#define REG_CORE_DIGITAL_SENSOR_READ_CMD4n_COUNT 16 +#define REG_CORE_DIGITAL_SENSOR_READ_CMD4n_COUNT 11 #define REG_CORE_DIGITAL_SENSOR_READ_CMD5n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd5[n] */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD50_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD50 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD51_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD51 */ @@ -1358,29 +1050,19 @@ #define REG_CORE_DIGITAL_SENSOR_READ_CMD58_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD58 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD59_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD59 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD510_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD510 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD511_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD511 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD512_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD512 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD513_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD513 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD514_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD514 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD515_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD515 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD50 0x000000CD /* ADMW_CORE Sensor Read Command5 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD51 0x0000010D /* ADMW_CORE Sensor Read Command5 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD52 0x0000014D /* ADMW_CORE Sensor Read Command5 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD53 0x0000018D /* ADMW_CORE Sensor Read Command5 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD54 0x000001CD /* ADMW_CORE Sensor Read Command5 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD55 0x0000020D /* ADMW_CORE Sensor Read Command5 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD56 0x0000024D /* ADMW_CORE Sensor Read Command5 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD57 0x0000028D /* ADMW_CORE Sensor Read Command5 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD58 0x000002CD /* ADMW_CORE Sensor Read Command5 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD59 0x0000030D /* ADMW_CORE Sensor Read Command5 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD510 0x0000034D /* ADMW_CORE Sensor Read Command5 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD511 0x0000038D /* ADMW_CORE Sensor Read Command5 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD512 0x000003CD /* ADMW_CORE Sensor Read Command5 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD513 0x0000040D /* ADMW_CORE Sensor Read Command5 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD514 0x0000044D /* ADMW_CORE Sensor Read Command5 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD515 0x0000048D /* ADMW_CORE Sensor Read Command5 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD50 0x000000CD /* CORE Sensor Read Command5 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD51 0x0000010D /* CORE Sensor Read Command5 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD52 0x0000014D /* CORE Sensor Read Command5 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD53 0x0000018D /* CORE Sensor Read Command5 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD54 0x000001CD /* CORE Sensor Read Command5 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD55 0x0000020D /* CORE Sensor Read Command5 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD56 0x0000024D /* CORE Sensor Read Command5 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD57 0x0000028D /* CORE Sensor Read Command5 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD58 0x000002CD /* CORE Sensor Read Command5 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD59 0x0000030D /* CORE Sensor Read Command5 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD510 0x0000034D /* CORE Sensor Read Command5 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD5n(i) (REG_CORE_DIGITAL_SENSOR_READ_CMD50 + ((i) * 64)) -#define REG_CORE_DIGITAL_SENSOR_READ_CMD5n_COUNT 16 +#define REG_CORE_DIGITAL_SENSOR_READ_CMD5n_COUNT 11 #define REG_CORE_DIGITAL_SENSOR_READ_CMD6n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd6[n] */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD60_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD60 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD61_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD61 */ @@ -1393,29 +1075,19 @@ #define REG_CORE_DIGITAL_SENSOR_READ_CMD68_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD68 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD69_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD69 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD610_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD610 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD611_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD611 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD612_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD612 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD613_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD613 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD614_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD614 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD615_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD615 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD60 0x000000CE /* ADMW_CORE Sensor Read Command6 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD61 0x0000010E /* ADMW_CORE Sensor Read Command6 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD62 0x0000014E /* ADMW_CORE Sensor Read Command6 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD63 0x0000018E /* ADMW_CORE Sensor Read Command6 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD64 0x000001CE /* ADMW_CORE Sensor Read Command6 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD65 0x0000020E /* ADMW_CORE Sensor Read Command6 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD66 0x0000024E /* ADMW_CORE Sensor Read Command6 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD67 0x0000028E /* ADMW_CORE Sensor Read Command6 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD68 0x000002CE /* ADMW_CORE Sensor Read Command6 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD69 0x0000030E /* ADMW_CORE Sensor Read Command6 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD610 0x0000034E /* ADMW_CORE Sensor Read Command6 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD611 0x0000038E /* ADMW_CORE Sensor Read Command6 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD612 0x000003CE /* ADMW_CORE Sensor Read Command6 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD613 0x0000040E /* ADMW_CORE Sensor Read Command6 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD614 0x0000044E /* ADMW_CORE Sensor Read Command6 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD615 0x0000048E /* ADMW_CORE Sensor Read Command6 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD60 0x000000CE /* CORE Sensor Read Command6 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD61 0x0000010E /* CORE Sensor Read Command6 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD62 0x0000014E /* CORE Sensor Read Command6 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD63 0x0000018E /* CORE Sensor Read Command6 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD64 0x000001CE /* CORE Sensor Read Command6 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD65 0x0000020E /* CORE Sensor Read Command6 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD66 0x0000024E /* CORE Sensor Read Command6 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD67 0x0000028E /* CORE Sensor Read Command6 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD68 0x000002CE /* CORE Sensor Read Command6 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD69 0x0000030E /* CORE Sensor Read Command6 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD610 0x0000034E /* CORE Sensor Read Command6 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD6n(i) (REG_CORE_DIGITAL_SENSOR_READ_CMD60 + ((i) * 64)) -#define REG_CORE_DIGITAL_SENSOR_READ_CMD6n_COUNT 16 +#define REG_CORE_DIGITAL_SENSOR_READ_CMD6n_COUNT 11 #define REG_CORE_DIGITAL_SENSOR_READ_CMD7n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd7[n] */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD70_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD70 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD71_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD71 */ @@ -1428,163 +1100,119 @@ #define REG_CORE_DIGITAL_SENSOR_READ_CMD78_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD78 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD79_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD79 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD710_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD710 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD711_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD711 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD712_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD712 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD713_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD713 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD714_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD714 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD715_RESET 0x00000000 /* Reset Value for REG_CORE_DIGITAL_SENSOR_READ_CMD715 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD70 0x000000CF /* ADMW_CORE Sensor Read Command7 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD71 0x0000010F /* ADMW_CORE Sensor Read Command7 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD72 0x0000014F /* ADMW_CORE Sensor Read Command7 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD73 0x0000018F /* ADMW_CORE Sensor Read Command7 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD74 0x000001CF /* ADMW_CORE Sensor Read Command7 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD75 0x0000020F /* ADMW_CORE Sensor Read Command7 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD76 0x0000024F /* ADMW_CORE Sensor Read Command7 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD77 0x0000028F /* ADMW_CORE Sensor Read Command7 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD78 0x000002CF /* ADMW_CORE Sensor Read Command7 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD79 0x0000030F /* ADMW_CORE Sensor Read Command7 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD710 0x0000034F /* ADMW_CORE Sensor Read Command7 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD711 0x0000038F /* ADMW_CORE Sensor Read Command7 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD712 0x000003CF /* ADMW_CORE Sensor Read Command7 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD713 0x0000040F /* ADMW_CORE Sensor Read Command7 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD714 0x0000044F /* ADMW_CORE Sensor Read Command7 */ -#define REG_CORE_DIGITAL_SENSOR_READ_CMD715 0x0000048F /* ADMW_CORE Sensor Read Command7 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD70 0x000000CF /* CORE Sensor Read Command7 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD71 0x0000010F /* CORE Sensor Read Command7 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD72 0x0000014F /* CORE Sensor Read Command7 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD73 0x0000018F /* CORE Sensor Read Command7 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD74 0x000001CF /* CORE Sensor Read Command7 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD75 0x0000020F /* CORE Sensor Read Command7 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD76 0x0000024F /* CORE Sensor Read Command7 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD77 0x0000028F /* CORE Sensor Read Command7 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD78 0x000002CF /* CORE Sensor Read Command7 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD79 0x0000030F /* CORE Sensor Read Command7 */ +#define REG_CORE_DIGITAL_SENSOR_READ_CMD710 0x0000034F /* CORE Sensor Read Command7 */ #define REG_CORE_DIGITAL_SENSOR_READ_CMD7n(i) (REG_CORE_DIGITAL_SENSOR_READ_CMD70 + ((i) * 64)) -#define REG_CORE_DIGITAL_SENSOR_READ_CMD7n_COUNT 16 +#define REG_CORE_DIGITAL_SENSOR_READ_CMD7n_COUNT 11 /* ============================================================================================================================ - ADMW_CORE Register BitMasks, Positions & Enumerations + CORE Register BitMasks, Positions & Enumerations ============================================================================================================================ */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_COMMAND Pos/Masks Description + CORE_COMMAND Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_COMMAND_SPECIAL_COMMAND 0 /* Special Command */ -#define BITM_CORE_COMMAND_SPECIAL_COMMAND 0x000000FF /* Special Command */ -#define ENUM_CORE_COMMAND_NOP 0x00000000 /* Special_Command: No Command */ -#define ENUM_CORE_COMMAND_CONVERT 0x00000001 /* Special_Command: Start ADC Conversions */ -#define ENUM_CORE_COMMAND_CONVERT_WITH_RAW 0x00000002 /* Special_Command: Start Conversions with Added RAW ADC Data */ -#define ENUM_CORE_COMMAND_RUN_DIAGNOSTICS 0x00000003 /* Special_Command: Initiate a Diagnostics Cycle */ -#define ENUM_CORE_COMMAND_SELF_CALIBRATION 0x00000004 /* Special_Command: Initiate a Self-Calibration Cycle */ -#define ENUM_CORE_COMMAND_LATCH_CONFIG 0x00000007 /* Special_Command: Latch Configuration. */ -#define ENUM_CORE_COMMAND_LOAD_LUT 0x00000008 /* Special_Command: Load LUT from FLASH */ -#define ENUM_CORE_COMMAND_SAVE_LUT 0x00000009 /* Special_Command: Save LUT to FLASH */ -#define ENUM_CORE_COMMAND_SYSTEM_CHECK 0x0000000A /* Special_Command: Full Suite of Measurement Diagnostics */ -#define ENUM_CORE_COMMAND_CONVERT_FFT 0x0000000B /* Special_Command: Perform FFTs on Selected Channel(s) */ -#define ENUM_CORE_COMMAND_ERASE_EXTERNAL_FLASH 0x00000010 /* Special_Command: Erase Contents of External Flash */ -#define ENUM_CORE_COMMAND_POWER_DOWN 0x00000014 /* Special_Command: Enter Low Power State */ -#define ENUM_CORE_COMMAND_LOAD_CONFIG_1 0x00000018 /* Special_Command: Load Registers with Configuration#1 from FLASH */ -#define ENUM_CORE_COMMAND_SAVE_CONFIG_1 0x00000019 /* Special_Command: Store Current Registers to FLASH Configuration#1 */ -#define ENUM_CORE_COMMAND_LOAD_CONFIG_2 0x0000001A /* Special_Command: Load Registers with Configuration#2 from FLASH */ -#define ENUM_CORE_COMMAND_SAVE_CONFIG_2 0x0000001B /* Special_Command: Store Current Registers to FLASH Configuration#2 */ -#define ENUM_CORE_COMMAND_LOAD_CONFIG_3 0x0000001C /* Special_Command: Load Registers with Configuration#3 from FLASH */ -#define ENUM_CORE_COMMAND_SAVE_CONFIG_3 0x0000001D /* Special_Command: Store Current Registers to FLASH Configuration#3 */ -#define ENUM_CORE_COMMAND_LOAD_CONFIG_4 0x0000001E /* Special_Command: Load Registers with Configuration#4 from FLASH */ -#define ENUM_CORE_COMMAND_SAVE_CONFIG_4 0x0000001F /* Special_Command: Store Current Registers to FLASH Configuration#4 */ -#define ENUM_CORE_COMMAND_CALIBRATE_DIGITAL 0x00000020 /* Special_Command: Performs a Calibration of Digital Sensor, if Supported & Enabled. */ +#define BITP_CORE_COMMAND_SPECIAL_COMMAND 0 /* Special Command */ +#define BITM_CORE_COMMAND_SPECIAL_COMMAND 0x000000FF /* Special Command */ +#define ENUM_CORE_COMMAND_NOP 0x00000000 /* Special_Command: No Command */ +#define ENUM_CORE_COMMAND_CONVERT 0x00000001 /* Special_Command: Start ADC Conversions */ +#define ENUM_CORE_COMMAND_CONVERT_WITH_RAW 0x00000002 /* Special_Command: Start Conversions with Added RAW ADC Data */ +#define ENUM_CORE_COMMAND_LATCH_CONFIG 0x00000007 /* Special_Command: Latch Configuration. */ +#define ENUM_CORE_COMMAND_LOAD_LUT 0x00000008 /* Special_Command: Load LUT from FLASH */ +#define ENUM_CORE_COMMAND_SAVE_LUT 0x00000009 /* Special_Command: Save LUT to FLASH */ +#define ENUM_CORE_COMMAND_POWER_DOWN 0x00000014 /* Special_Command: Enter Low Power State */ +#define ENUM_CORE_COMMAND_LOAD_CONFIG_1 0x00000018 /* Special_Command: Load Registers with Configuration#1 from FLASH */ +#define ENUM_CORE_COMMAND_SAVE_CONFIG_1 0x00000019 /* Special_Command: Store Current Registers to FLASH Configuration#1 */ +#define ENUM_CORE_COMMAND_CALIBRATE_DIGITAL 0x00000020 /* Special_Command: Performs a Calibration of Digital Sensor, if Supported & Enabled. */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_MODE Pos/Masks Description + CORE_MODE Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_MODE_EXT_FLASH_STORE 7 /* Indicates If Measurement Data Should Be Stored in Flash */ -#define BITP_CORE_MODE_FFT_MODE 5 /* Indicates Single or Multiple Sequence of FFTs */ -#define BITP_CORE_MODE_CALIBRATION_METHOD 4 /* Indicates If Calibration is Required on 'Latch' Command */ -#define BITP_CORE_MODE_DRDY_MODE 2 /* Indicates Behavior of DRDY with Respect to FIFO State */ -#define BITP_CORE_MODE_CONVERSION_MODE 0 /* Conversion Mode */ -#define BITM_CORE_MODE_EXT_FLASH_STORE 0x00000080 /* Indicates If Measurement Data Should Be Stored in Flash */ -#define BITM_CORE_MODE_FFT_MODE 0x00000020 /* Indicates Single or Multiple Sequence of FFTs */ -#define BITM_CORE_MODE_CALIBRATION_METHOD 0x00000010 /* Indicates If Calibration is Required on 'Latch' Command */ -#define BITM_CORE_MODE_DRDY_MODE 0x0000000C /* Indicates Behavior of DRDY with Respect to FIFO State */ -#define BITM_CORE_MODE_CONVERSION_MODE 0x00000003 /* Conversion Mode */ -#define ENUM_CORE_MODE_EXT_FLASH_NOT_USED 0x00000000 /* Ext_Flash_Store: Do Not Use External Flash */ -#define ENUM_CORE_MODE_EXT_FLASH_USED 0x00000080 /* Ext_Flash_Store: Use External Flash */ -#define ENUM_CORE_MODE_FFT_MODE_SINGLE 0x00000000 /* FFT_Mode: Perform Single Sequence of FFT(s) on Selected Channel(s) */ -#define ENUM_CORE_MODE_FFT_MODE_CONTINUOUS 0x00000020 /* FFT_Mode: Perform Continuous Sequence of FFTs on Selected Channel(s) */ -#define ENUM_CORE_MODE_NO_CAL 0x00000000 /* Calibration_Method: No Calibration Performed */ -#define ENUM_CORE_MODE_DO_CAL 0x00000010 /* Calibration_Method: Calibration Performed */ -#define ENUM_CORE_MODE_DRDY_PER_CONVERSION 0x00000000 /* Drdy_Mode: Data Ready Per Conversion */ -#define ENUM_CORE_MODE_DRDY_PER_CYCLE 0x00000004 /* Drdy_Mode: Data Ready Per Cycle */ -#define ENUM_CORE_MODE_DRDY_PER_FIFO_FILL 0x00000008 /* Drdy_Mode: Data Ready Per FIFO Fill / Multi-Cycle Burst */ -#define ENUM_CORE_MODE_SINGLECYCLE 0x00000000 /* Conversion_Mode: Single Cycle */ -#define ENUM_CORE_MODE_MULTICYCLE 0x00000001 /* Conversion_Mode: Multi Cycle */ -#define ENUM_CORE_MODE_CONTINUOUS 0x00000002 /* Conversion_Mode: Continuous Conversion */ +#define BITP_CORE_MODE_DRDY_MODE 2 /* Indicates Behavior of DRDY with Respect to FIFO State */ +#define BITP_CORE_MODE_CONVERSION_MODE 0 /* Conversion Mode */ +#define BITM_CORE_MODE_DRDY_MODE 0x0000000C /* Indicates Behavior of DRDY with Respect to FIFO State */ +#define BITM_CORE_MODE_CONVERSION_MODE 0x00000003 /* Conversion Mode */ +#define ENUM_CORE_MODE_DRDY_PER_CONVERSION 0x00000000 /* Drdy_Mode: Data Ready Per Conversion */ +#define ENUM_CORE_MODE_DRDY_PER_CYCLE 0x00000004 /* Drdy_Mode: Data Ready Per Cycle */ +#define ENUM_CORE_MODE_DRDY_PER_FIFO_FILL 0x00000008 /* Drdy_Mode: Data Ready Per FIFO Fill / Multi-Cycle Burst */ +#define ENUM_CORE_MODE_SINGLECYCLE 0x00000000 /* Conversion_Mode: Single Cycle */ +#define ENUM_CORE_MODE_MULTICYCLE 0x00000001 /* Conversion_Mode: Multi Cycle */ +#define ENUM_CORE_MODE_CONTINUOUS 0x00000002 /* Conversion_Mode: Continuous Conversion */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_POWER_CONFIG Pos/Masks Description + CORE_POWER_CONFIG Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_POWER_CONFIG_POWER_MODE_ADC 0 /* ADC Power Mode */ -#define BITM_CORE_POWER_CONFIG_POWER_MODE_ADC 0x00000003 /* ADC Power Mode */ -#define ENUM_CORE_POWER_CONFIG_ADC_LOW_POWER 0x00000000 /* Power_Mode_ADC: ADC Low Power Mode */ -#define ENUM_CORE_POWER_CONFIG_ADC_MID_POWER 0x00000001 /* Power_Mode_ADC: ADC Mid Power Mode */ -#define ENUM_CORE_POWER_CONFIG_ADC_FULL_POWER 0x00000002 /* Power_Mode_ADC: ADC Full Power Mode */ +#define BITP_CORE_POWER_CONFIG_POWER_MODE_MCU 0 /* MCU Power Mode */ +#define BITM_CORE_POWER_CONFIG_POWER_MODE_MCU 0x00000001 /* MCU Power Mode */ +#define ENUM_CORE_POWER_CONFIG_ACTIVE_MODE 0x00000000 /* Power_Mode_MCU: Part is fully powered up and either cycling through a sequence or awaiting a configuration */ +#define ENUM_CORE_POWER_CONFIG_HIBERNATION 0x00000001 /* Power_Mode_MCU: module has entede hibernation mode. All analog circuitry is disabled. All peripherals disabled apart from the Wake-up pin functionality. */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_CYCLE_CONTROL Pos/Masks Description + CORE_CYCLE_CONTROL Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_CYCLE_CONTROL_CYCLE_TIME_UNITS 14 /* Units for Cycle Time */ -#define BITP_CORE_CYCLE_CONTROL_FILTER_SETTLING 13 /* Determines ADC Filter Settling in a Multi-Channel Sequence */ -#define BITP_CORE_CYCLE_CONTROL_CYCLE_TYPE 12 /* Type of Measurement Cycle */ -#define BITP_CORE_CYCLE_CONTROL_CYCLE_TIME 0 /* Duration of a Full Measurement Cycle */ +#define BITP_CORE_CYCLE_CONTROL_CYCLE_TIME 0 /* Duration of a Full Measurement Cycle */ #define BITM_CORE_CYCLE_CONTROL_CYCLE_TIME_UNITS 0x0000C000 /* Units for Cycle Time */ -#define BITM_CORE_CYCLE_CONTROL_FILTER_SETTLING 0x00002000 /* Determines ADC Filter Settling in a Multi-Channel Sequence */ -#define BITM_CORE_CYCLE_CONTROL_CYCLE_TYPE 0x00001000 /* Type of Measurement Cycle */ -#define BITM_CORE_CYCLE_CONTROL_CYCLE_TIME 0x00000FFF /* Duration of a Full Measurement Cycle */ +#define BITM_CORE_CYCLE_CONTROL_CYCLE_TIME 0x00000FFF /* Duration of a Full Measurement Cycle */ #define ENUM_CORE_CYCLE_CONTROL_MICROSECONDS 0x00000000 /* Cycle_Time_Units: Micro-Seconds */ #define ENUM_CORE_CYCLE_CONTROL_MILLISECONDS 0x00004000 /* Cycle_Time_Units: Milli-Seconds */ -#define ENUM_CORE_CYCLE_CONTROL_SECONDS 0x00008000 /* Cycle_Time_Units: Seconds */ -#define ENUM_CORE_CYCLE_CONTROL_FILTER_SETTLING_SETTLED 0x00000000 /* Filter_Settling: ADC Result Fully Settles for Every Output */ -#define ENUM_CORE_CYCLE_CONTROL_FILTER_SETTLING_FAST 0x00002000 /* Filter_Settling: ADC Result Appears at Higher Update Rate for Consecutive Conversions */ -#define ENUM_CORE_CYCLE_CONTROL_CYCLE_TYPE_SWITCH 0x00000000 /* Cycle_Type: Switch Channels After Every Conversion */ -#define ENUM_CORE_CYCLE_CONTROL_CYCLE_TYPE_FULL 0x00001000 /* Cycle_Type: Perform Full Number Of Conversions On A Channel Consecutively */ +#define ENUM_CORE_CYCLE_CONTROL_SECONDS 0x00008000 /* Cycle_Time_Units: Seconds */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_FIFO_NUM_CYCLES Pos/Masks Description + CORE_FIFO_NUM_CYCLES Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_FIFO_NUM_CYCLES_FIFO_NUM_CYCLES 0 /* How Many Cycles to Fill FIFO */ #define BITM_CORE_FIFO_NUM_CYCLES_FIFO_NUM_CYCLES 0x000000FF /* How Many Cycles to Fill FIFO */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_MULTI_CYCLE_REPEAT_INTERVAL Pos/Masks Description + CORE_MULTI_CYCLE_REPEAT_INTERVAL Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_MULTI_CYCLE_REPEAT_INTERVAL_MULTI_CYCLE_REPEAT_INTERVAL 0 /* Defines Time Between Repetitions of Measurement Cycles. */ #define BITM_CORE_MULTI_CYCLE_REPEAT_INTERVAL_MULTI_CYCLE_REPEAT_INTERVAL 0x00FFFFFF /* Defines Time Between Repetitions of Measurement Cycles. */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_STATUS Pos/Masks Description + CORE_STATUS Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_STATUS_FIFO_ERROR 5 /* Indicates Error with FIFO */ -#define BITP_CORE_STATUS_CMD_RUNNING 4 /* Indicates a Special Command is Active */ -#define BITP_CORE_STATUS_DRDY 3 /* Indicates a New Sensor Result is Available to Be Read */ -#define BITP_CORE_STATUS_ERROR 2 /* Indicates an Error */ -#define BITP_CORE_STATUS_ALERT_ACTIVE 1 /* Indicates One or More Sensors Alerts are Active */ -#define BITM_CORE_STATUS_FIFO_ERROR 0x00000020 /* Indicates Error with FIFO */ -#define BITM_CORE_STATUS_CMD_RUNNING 0x00000010 /* Indicates a Special Command is Active */ -#define BITM_CORE_STATUS_DRDY 0x00000008 /* Indicates a New Sensor Result is Available to Be Read */ -#define BITM_CORE_STATUS_ERROR 0x00000004 /* Indicates an Error */ -#define BITM_CORE_STATUS_ALERT_ACTIVE 0x00000002 /* Indicates One or More Sensors Alerts are Active */ +#define BITP_CORE_STATUS_FIFO_ERROR 5 /* Indicates Error with FIFO */ +#define BITP_CORE_STATUS_CMD_RUNNING 4 /* Indicates a Special Command is Active */ +#define BITP_CORE_STATUS_DRDY 3 /* Indicates a New Sensor Result is Available to Be Read */ +#define BITP_CORE_STATUS_ERROR 2 /* Indicates an Error */ +#define BITP_CORE_STATUS_ALERT_ACTIVE 1 /* Indicates One or More Sensors Alerts are Active */ +#define BITM_CORE_STATUS_FIFO_ERROR 0x00000020 /* Indicates Error with FIFO */ +#define BITM_CORE_STATUS_CMD_RUNNING 0x00000010 /* Indicates a Special Command is Active */ +#define BITM_CORE_STATUS_DRDY 0x00000008 /* Indicates a New Sensor Result is Available to Be Read */ +#define BITM_CORE_STATUS_ERROR 0x00000004 /* Indicates an Error */ +#define BITM_CORE_STATUS_ALERT_ACTIVE 0x00000002 /* Indicates One or More Sensors Alerts are Active */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIAGNOSTICS_STATUS Pos/Masks Description + CORE_DIAGNOSTICS_STATUS Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_DIAGNOSTICS_STATUS_DIAG_CALIBRATION_ERROR 13 /* Indicates Error During Internal Device Calibrations */ #define BITP_CORE_DIAGNOSTICS_STATUS_DIAG_CONVERSION_ERROR 12 /* Indicates Error During Internal ADC Conversions */ -#define BITP_CORE_DIAGNOSTICS_STATUS_DIAG_SUPPLY_CAP_ERROR 3 /* Indicates Fault on Internal Supply Regulator Capacitor */ -#define BITP_CORE_DIAGNOSTICS_STATUS_DIAG_SUPPLY_MONITOR_ERROR 2 /* Indicates Low Voltage on Internal Supply Voltages */ -#define BITP_CORE_DIAGNOSTICS_STATUS_DIAG_COMMS_ERROR 1 /* Indicates Error on Internal Device Communications */ +#define BITP_CORE_DIAGNOSTICS_STATUS_DIAG_AINP_OV_ERROR 11 /* Indicates Over-Voltage Error on Positive Analog Input */ +#define BITP_CORE_DIAGNOSTICS_STATUS_DIAG_AINP_UV_ERROR 10 /* Indicates Under-Voltage Error on Positive Analog Input */ +#define BITP_CORE_DIAGNOSTICS_STATUS_DIAG_AINM_OV_ERROR 9 /* Indicates Over-Voltage Error on Negative Analog Input */ +#define BITP_CORE_DIAGNOSTICS_STATUS_DIAG_AINM_UV_ERROR 8 /* Indicates Under-Voltage Error on Negative Analog Input */ #define BITP_CORE_DIAGNOSTICS_STATUS_DIAG_CHECKSUM_ERROR 0 /* Indicates Error on Internal Checksum Calculations */ #define BITM_CORE_DIAGNOSTICS_STATUS_DIAG_CALIBRATION_ERROR 0x00002000 /* Indicates Error During Internal Device Calibrations */ #define BITM_CORE_DIAGNOSTICS_STATUS_DIAG_CONVERSION_ERROR 0x00001000 /* Indicates Error During Internal ADC Conversions */ -#define BITM_CORE_DIAGNOSTICS_STATUS_DIAG_SUPPLY_CAP_ERROR 0x00000008 /* Indicates Fault on Internal Supply Regulator Capacitor */ -#define BITM_CORE_DIAGNOSTICS_STATUS_DIAG_SUPPLY_MONITOR_ERROR 0x00000004 /* Indicates Low Voltage on Internal Supply Voltages */ -#define BITM_CORE_DIAGNOSTICS_STATUS_DIAG_COMMS_ERROR 0x00000002 /* Indicates Error on Internal Device Communications */ +#define BITM_CORE_DIAGNOSTICS_STATUS_DIAG_AINP_OV_ERROR 0x00000800 /* Indicates Over-Voltage Error on Positive Analog Input */ +#define BITM_CORE_DIAGNOSTICS_STATUS_DIAG_AINP_UV_ERROR 0x00000400 /* Indicates Under-Voltage Error on Positive Analog Input */ +#define BITM_CORE_DIAGNOSTICS_STATUS_DIAG_AINM_OV_ERROR 0x00000200 /* Indicates Over-Voltage Error on Negative Analog Input */ +#define BITM_CORE_DIAGNOSTICS_STATUS_DIAG_AINM_UV_ERROR 0x00000100 /* Indicates Under-Voltage Error on Negative Analog Input */ #define BITM_CORE_DIAGNOSTICS_STATUS_DIAG_CHECKSUM_ERROR 0x00000001 /* Indicates Error on Internal Checksum Calculations */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_CHANNEL_ALERT_STATUS Pos/Masks Description + CORE_CHANNEL_ALERT_STATUS Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH15 15 /* Indicates Channel Alert is Active */ -#define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH14 14 /* Indicates Channel Alert is Active */ -#define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH13 13 /* Indicates Channel Alert is Active */ -#define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH12 12 /* Indicates Channel Alert is Active */ #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH11 11 /* Indicates Channel Alert is Active */ #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH10 10 /* Indicates Channel Alert is Active */ #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH9 9 /* Indicates Channel Alert is Active */ @@ -1597,10 +1225,6 @@ #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH2 2 /* Indicates Channel Alert is Active */ #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH1 1 /* Indicates Channel Alert is Active */ #define BITP_CORE_CHANNEL_ALERT_STATUS_ALERT_CH0 0 /* Indicates Channel Alert is Active */ -#define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH15 0x00008000 /* Indicates Channel Alert is Active */ -#define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH14 0x00004000 /* Indicates Channel Alert is Active */ -#define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH13 0x00002000 /* Indicates Channel Alert is Active */ -#define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH12 0x00001000 /* Indicates Channel Alert is Active */ #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH11 0x00000800 /* Indicates Channel Alert is Active */ #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH10 0x00000400 /* Indicates Channel Alert is Active */ #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH9 0x00000200 /* Indicates Channel Alert is Active */ @@ -1615,25 +1239,15 @@ #define BITM_CORE_CHANNEL_ALERT_STATUS_ALERT_CH0 0x00000001 /* Indicates Channel Alert is Active */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_ALERT_STATUS_2 Pos/Masks Description + CORE_ALERT_STATUS_2 Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_ALERT_STATUS_2_EXT_FLASH_ERROR 7 /* Indicates with External Flash Memory */ -#define BITP_CORE_ALERT_STATUS_2_TEMPERATURE_ALARM_LO 6 /* Indicates Device Temperature Low Alarm */ -#define BITP_CORE_ALERT_STATUS_2_TEMPERATURE_ALARM_HI 5 /* Indicates Device Temperature High Alarm */ -#define BITP_CORE_ALERT_STATUS_2_TEMPERATURE_ALERT_LO 4 /* Indicates Device Temperature Low Alert */ -#define BITP_CORE_ALERT_STATUS_2_TEMPERATURE_ALERT_HI 3 /* Indicates Device Temperature High Alert */ #define BITP_CORE_ALERT_STATUS_2_CONFIGURATION_ERROR 2 /* Indicates Error with Programmed Configuration */ -#define BITP_CORE_ALERT_STATUS_2_LUT_ERROR 1 /* Indicates Error with One or More Look-Up-Tables */ -#define BITM_CORE_ALERT_STATUS_2_EXT_FLASH_ERROR 0x00000080 /* Indicates with External Flash Memory */ -#define BITM_CORE_ALERT_STATUS_2_TEMPERATURE_ALARM_LO 0x00000040 /* Indicates Device Temperature Low Alarm */ -#define BITM_CORE_ALERT_STATUS_2_TEMPERATURE_ALARM_HI 0x00000020 /* Indicates Device Temperature High Alarm */ -#define BITM_CORE_ALERT_STATUS_2_TEMPERATURE_ALERT_LO 0x00000010 /* Indicates Device Temperature Low Alert */ -#define BITM_CORE_ALERT_STATUS_2_TEMPERATURE_ALERT_HI 0x00000008 /* Indicates Device Temperature High Alert */ +#define BITP_CORE_ALERT_STATUS_2_LUT_ERROR 1 /* Indicates Error with One or More Look-Up-Tables */ #define BITM_CORE_ALERT_STATUS_2_CONFIGURATION_ERROR 0x00000004 /* Indicates Error with Programmed Configuration */ -#define BITM_CORE_ALERT_STATUS_2_LUT_ERROR 0x00000002 /* Indicates Error with One or More Look-Up-Tables */ +#define BITM_CORE_ALERT_STATUS_2_LUT_ERROR 0x00000002 /* Indicates Error with One or More Look-Up-Tables */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_ALERT_DETAIL_CH[n] Pos/Masks Description + CORE_ALERT_DETAIL_CH[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_ALERT_DETAIL_CH_COMP_NOT_READY 15 /* Indicates Compensation Channel Not Ready When Required */ #define BITP_CORE_ALERT_DETAIL_CH_SENSOR_NOT_READY 14 /* Indicates Digital Sensor Not Ready When Read */ @@ -1647,10 +1261,10 @@ #define BITP_CORE_ALERT_DETAIL_CH_REF_DETECT 6 /* Indicates Whether ADC Reference is Valid */ #define BITP_CORE_ALERT_DETAIL_CH_SENSOR_OPEN 5 /* Indicates Sensor Input is Open Circuit */ #define BITP_CORE_ALERT_DETAIL_CH_HIGH_LIMIT 4 /* Indicates Sensor Result is Greater Than High Limit */ -#define BITP_CORE_ALERT_DETAIL_CH_LOW_LIMIT 3 /* Indicates Sensor Result is Less Than Low Limit */ +#define BITP_CORE_ALERT_DETAIL_CH_LOW_LIMIT 3 /* Indicates Sensor Result is Less Than Low Limit */ #define BITP_CORE_ALERT_DETAIL_CH_OVER_RANGE 2 /* Indicates Channel Over-Range */ #define BITP_CORE_ALERT_DETAIL_CH_UNDER_RANGE 1 /* Indicates Channel Under-Range */ -#define BITP_CORE_ALERT_DETAIL_CH_TIME_OUT 0 /* Indicates Time-Out Error from Digital Sensor */ +#define BITP_CORE_ALERT_DETAIL_CH_TIME_OUT 0 /* Indicates Time-Out Error from Digital Sensor */ #define BITM_CORE_ALERT_DETAIL_CH_COMP_NOT_READY 0x00008000 /* Indicates Compensation Channel Not Ready When Required */ #define BITM_CORE_ALERT_DETAIL_CH_SENSOR_NOT_READY 0x00004000 /* Indicates Digital Sensor Not Ready When Read */ #define BITM_CORE_ALERT_DETAIL_CH_CORRECTION_OVERRANGE 0x00002000 /* Indicates Result Larger Than LUT/Equation Range */ @@ -1663,148 +1277,99 @@ #define BITM_CORE_ALERT_DETAIL_CH_REF_DETECT 0x00000040 /* Indicates Whether ADC Reference is Valid */ #define BITM_CORE_ALERT_DETAIL_CH_SENSOR_OPEN 0x00000020 /* Indicates Sensor Input is Open Circuit */ #define BITM_CORE_ALERT_DETAIL_CH_HIGH_LIMIT 0x00000010 /* Indicates Sensor Result is Greater Than High Limit */ -#define BITM_CORE_ALERT_DETAIL_CH_LOW_LIMIT 0x00000008 /* Indicates Sensor Result is Less Than Low Limit */ +#define BITM_CORE_ALERT_DETAIL_CH_LOW_LIMIT 0x00000008 /* Indicates Sensor Result is Less Than Low Limit */ #define BITM_CORE_ALERT_DETAIL_CH_OVER_RANGE 0x00000004 /* Indicates Channel Over-Range */ #define BITM_CORE_ALERT_DETAIL_CH_UNDER_RANGE 0x00000002 /* Indicates Channel Under-Range */ -#define BITM_CORE_ALERT_DETAIL_CH_TIME_OUT 0x00000001 /* Indicates Time-Out Error from Digital Sensor */ +#define BITM_CORE_ALERT_DETAIL_CH_TIME_OUT 0x00000001 /* Indicates Time-Out Error from Digital Sensor */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_ERROR_CODE Pos/Masks Description + CORE_ERROR_CODE Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_ERROR_CODE_ERROR_CODE 0 /* Code Indicating Type of Error */ -#define BITM_CORE_ERROR_CODE_ERROR_CODE 0x0000FFFF /* Code Indicating Type of Error */ +#define BITP_CORE_ERROR_CODE_ERROR_CODE 0 /* Code Indicating Type of Error */ +#define BITM_CORE_ERROR_CODE_ERROR_CODE 0x0000FFFF /* Code Indicating Type of Error */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_ALERT_CODE Pos/Masks Description + CORE_ALERT_CODE Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_ALERT_CODE_ALERT_CODE 0 /* Code Indicating Type of Alert */ -#define BITM_CORE_ALERT_CODE_ALERT_CODE 0x0000FFFF /* Code Indicating Type of Alert */ +#define BITP_CORE_ALERT_CODE_ALERT_CODE 0 /* Code Indicating Type of Alert */ +#define BITM_CORE_ALERT_CODE_ALERT_CODE 0x0000FFFF /* Code Indicating Type of Alert */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_EXTERNAL_REFERENCE1 Pos/Masks Description + CORE_EXTERNAL_REFERENCE_RESISTOR Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_EXTERNAL_REFERENCE1_EXT_REFIN1_VALUE 0 /* Refin1 Value */ -#define BITM_CORE_EXTERNAL_REFERENCE1_EXT_REFIN1_VALUE 0xFFFFFFFF /* Refin1 Value */ +#define BITP_CORE_EXTERNAL_REFERENCE_RESISTOR_EXT_REFIN1_VALUE 0 /* Refin1 Value */ +#define BITM_CORE_EXTERNAL_REFERENCE_RESISTOR_EXT_REFIN1_VALUE 0xFFFFFFFF /* Refin1 Value */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_EXTERNAL_REFERENCE2 Pos/Masks Description + CORE_EXTERNAL_VOLTAGE_REFERENCE Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_EXTERNAL_REFERENCE2_EXT_REFIN2_VALUE 0 /* Refin2 Value */ -#define BITM_CORE_EXTERNAL_REFERENCE2_EXT_REFIN2_VALUE 0xFFFFFFFF /* Refin2 Value */ +#define BITP_CORE_EXTERNAL_VOLTAGE_REFERENCE_EXT_REFIN2_VALUE 0 /* Refin2 Value */ +#define BITM_CORE_EXTERNAL_VOLTAGE_REFERENCE_EXT_REFIN2_VALUE 0xFFFFFFFF /* Refin2 Value */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIAGNOSTICS_CONTROL Pos/Masks Description + CORE_DIAGNOSTICS_CONTROL Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_DIAGNOSTICS_CONTROL_TEMPERARURE_ALARM_ACTION 4 /* Determines Output in Response to Temperature Alarm */ #define BITP_CORE_DIAGNOSTICS_CONTROL_DIAG_OSD_FREQ 2 /* Diagnostics Open Sensor Detect Frequency */ #define BITP_CORE_DIAGNOSTICS_CONTROL_DIAG_MEAS_EN 1 /* Diagnostics Measure Enable */ #define BITP_CORE_DIAGNOSTICS_CONTROL_DIAG_GLOBAL_EN 0 /* Diagnostics Global Enable */ -#define BITM_CORE_DIAGNOSTICS_CONTROL_TEMPERARURE_ALARM_ACTION 0x00000010 /* Determines Output in Response to Temperature Alarm */ #define BITM_CORE_DIAGNOSTICS_CONTROL_DIAG_OSD_FREQ 0x0000000C /* Diagnostics Open Sensor Detect Frequency */ #define BITM_CORE_DIAGNOSTICS_CONTROL_DIAG_MEAS_EN 0x00000002 /* Diagnostics Measure Enable */ #define BITM_CORE_DIAGNOSTICS_CONTROL_DIAG_GLOBAL_EN 0x00000001 /* Diagnostics Global Enable */ -#define ENUM_CORE_DIAGNOSTICS_CONTROL_TEMPERATURE_ALARM_NAN 0x00000000 /* Temperarure_Alarm_Action: Sensor Output Equals Not-A-Number in Response to Temperature Alarm */ -#define ENUM_CORE_DIAGNOSTICS_CONTROL_TEMPERATURE_ALARM_OUTPUT_ACTIVE 0x00000010 /* Temperarure_Alarm_Action: Sensor Output is not Clamped to Not-A-Number in Response to Temperature Alarm */ #define ENUM_CORE_DIAGNOSTICS_CONTROL_OCD_OFF 0x00000000 /* Diag_OSD_Freq: No Open-Circuit Detection During Measurement */ #define ENUM_CORE_DIAGNOSTICS_CONTROL_OCD_PER_1_CYCLE 0x00000004 /* Diag_OSD_Freq: Open-Circuit Detection Performed Once Per Measurement Cycle */ #define ENUM_CORE_DIAGNOSTICS_CONTROL_OCD_PER_100_CYCLES 0x00000008 /* Diag_OSD_Freq: Open-Circuit Detection Performed Once Per Hundred Measurement Cycles */ #define ENUM_CORE_DIAGNOSTICS_CONTROL_OCD_PER_1000_CYCLES 0x0000000C /* Diag_OSD_Freq: Open-Circuit Detection Performed Once Per Thousand Measurement Cycles */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DATA_FIFO Pos/Masks Description + CORE_DATA_FIFO Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_DATA_FIFO_DATA_FIFO 0 /* Fifo Buffer of Sensor Results */ -#define BITM_CORE_DATA_FIFO_DATA_FIFO 0x000000FF /* Fifo Buffer of Sensor Results */ - -/* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DEBUG_CODE Pos/Masks Description - ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_DEBUG_CODE_DEBUG_CODE 0 /* Additional Information on Source of Alert or Errors */ -#define BITM_CORE_DEBUG_CODE_DEBUG_CODE 0xFFFFFFFF /* Additional Information on Source of Alert or Errors */ +#define BITP_CORE_DATA_FIFO_DATA_FIFO 0 /* Fifo Buffer of Sensor Results */ +#define BITM_CORE_DATA_FIFO_DATA_FIFO 0x000000FF /* Fifo Buffer of Sensor Results */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_FFT_CONFIG Pos/Masks Description + CORE_DEBUG_CODE Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_FFT_CONFIG_FFT_NUM_CHANNELS 6 /* Indicates Number of Channels for FFT */ -#define BITP_CORE_FFT_CONFIG_FFT_OUTPUT 4 /* Indicates FFT Output Format */ -#define BITP_CORE_FFT_CONFIG_FFT_WINDOW 2 /* Indicates Window Type for FFT */ -#define BITP_CORE_FFT_CONFIG_FFT_NUM_BINS 0 /* Indicates Number of Bins in FFT */ -#define BITM_CORE_FFT_CONFIG_FFT_NUM_CHANNELS 0x000000C0 /* Indicates Number of Channels for FFT */ -#define BITM_CORE_FFT_CONFIG_FFT_OUTPUT 0x00000030 /* Indicates FFT Output Format */ -#define BITM_CORE_FFT_CONFIG_FFT_WINDOW 0x0000000C /* Indicates Window Type for FFT */ -#define BITM_CORE_FFT_CONFIG_FFT_NUM_BINS 0x00000003 /* Indicates Number of Bins in FFT */ -#define ENUM_CORE_FFT_CONFIG_FFT_CHANS_1 0x00000000 /* FFT_Num_Channels: One FFT Channel */ -#define ENUM_CORE_FFT_CONFIG_FFT_CHANS_2 0x00000040 /* FFT_Num_Channels: Two FFT Channels */ -#define ENUM_CORE_FFT_CONFIG_FFT_CHANS_3 0x00000080 /* FFT_Num_Channels: Three FFT Channels */ -#define ENUM_CORE_FFT_CONFIG_FFT_CHANS_4 0x000000C0 /* FFT_Num_Channels: Four FFT Channels */ -#define ENUM_CORE_FFT_CONFIG_FFT_OUTPUT_FULL 0x00000000 /* FFT_Output: N/2-Term Amplitude Response */ -#define ENUM_CORE_FFT_CONFIG_FFT_OUTPUT_MAX16 0x00000010 /* FFT_Output: Bin-Number and Amplitude of 16 Highest Peaks of Amplitude Response */ -#define ENUM_CORE_FFT_CONFIG_FFT_OUTPUT_FULL_WITH_RAW 0x00000020 /* FFT_Output: N/2-Term Amplitude Response Plus N Raw ADC Samples */ -#define ENUM_CORE_FFT_CONFIG_FFT_WINDOW_NONE 0x00000000 /* FFT_Window: No Window */ -#define ENUM_CORE_FFT_CONFIG_FFT_WINDOW_HANN 0x00000004 /* FFT_Window: Hann Window */ -#define ENUM_CORE_FFT_CONFIG_FFT_WINDOW_BLACKMANN_HARRIS 0x00000008 /* FFT_Window: Blackman-Harris-Nuttall Window */ -#define ENUM_CORE_FFT_CONFIG_FFT_WINDOW_TBD 0x0000000C /* FFT_Window: Reserved */ -#define ENUM_CORE_FFT_CONFIG_FFT_BINS_256 0x00000000 /* FFT_Num_Bins: FFT Size 256 */ -#define ENUM_CORE_FFT_CONFIG_FFT_BINS_512 0x00000001 /* FFT_Num_Bins: FFT Size 512 */ -#define ENUM_CORE_FFT_CONFIG_FFT_BINS_1024 0x00000002 /* FFT_Num_Bins: FFT Size 1024 */ -#define ENUM_CORE_FFT_CONFIG_FFT_BINS_2048 0x00000003 /* FFT_Num_Bins: FFT Size 2048 */ +#define BITP_CORE_DEBUG_CODE_DEBUG_CODE 0 /* Additional Information on Source of Alert or Errors */ +#define BITM_CORE_DEBUG_CODE_DEBUG_CODE 0xFFFFFFFF /* Additional Information on Source of Alert or Errors */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_ADVANCED_SENSOR_ACCESS Pos/Masks Description + CORE_ADVANCED_SENSOR_ACCESS Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_ADVANCED_SENSOR_ACCESS_ADVANCED_SENSOR_ACCESS 0 /* Write Specific Key Value to Access Advanced Sensors */ #define BITM_CORE_ADVANCED_SENSOR_ACCESS_ADVANCED_SENSOR_ACCESS 0x0000FFFF /* Write Specific Key Value to Access Advanced Sensors */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_LUT_SELECT Pos/Masks Description + CORE_LUT_SELECT Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_LUT_SELECT_LUT_RW 7 /* Read or Write LUT Data */ -#define BITM_CORE_LUT_SELECT_LUT_RW 0x00000080 /* Read or Write LUT Data */ -#define ENUM_CORE_LUT_SELECT_LUT_READ 0x00000000 /* LUT_RW: Read Addressed LUT Data */ -#define ENUM_CORE_LUT_SELECT_LUT_WRITE 0x00000080 /* LUT_RW: Write Addressed LUT Data */ +#define BITP_CORE_LUT_SELECT_LUT_RW 7 /* Read or Write LUT Data */ +#define BITM_CORE_LUT_SELECT_LUT_RW 0x00000080 /* Read or Write LUT Data */ +#define ENUM_CORE_LUT_SELECT_LUT_READ 0x00000000 /* LUT_RW: Read Addressed LUT Data */ +#define ENUM_CORE_LUT_SELECT_LUT_WRITE 0x00000080 /* LUT_RW: Write Addressed LUT Data */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_LUT_OFFSET Pos/Masks Description + CORE_LUT_OFFSET Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_LUT_OFFSET_LUT_OFFSET 0 /* Offset into Look-Up-Table */ -#define BITM_CORE_LUT_OFFSET_LUT_OFFSET 0x00003FFF /* Offset into Look-Up-Table */ - -/* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_LUT_DATA Pos/Masks Description - ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_LUT_DATA_LUT_DATA 0 /* Data Byte to Write to / Read from Look-Up-Table */ -#define BITM_CORE_LUT_DATA_LUT_DATA 0x000000FF /* Data Byte to Write to / Read from Look-Up-Table */ +#define BITP_CORE_LUT_OFFSET_LUT_OFFSET 0 /* Offset into Look-Up-Table */ +#define BITM_CORE_LUT_OFFSET_LUT_OFFSET 0x00003FFF /* Offset into Look-Up-Table */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_EXT_FLASH_INDEX Pos/Masks Description + CORE_LUT_DATA Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_EXT_FLASH_INDEX_EXT_FLASH_INDEX 0 /* Start Position (Sample No.) for Retrieval of Ext. Flash Data */ -#define BITM_CORE_EXT_FLASH_INDEX_EXT_FLASH_INDEX 0xFFFFFFFF /* Start Position (Sample No.) for Retrieval of Ext. Flash Data */ - -/* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_EXT_FLASH_SAMPLE_COUNT Pos/Masks Description - ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_EXT_FLASH_SAMPLE_COUNT_EXT_FLASH_SAMPLE_COUNT 0 /* Indicates How Many Samples Stored in External Flash */ -#define BITM_CORE_EXT_FLASH_SAMPLE_COUNT_EXT_FLASH_SAMPLE_COUNT 0xFFFFFFFF /* Indicates How Many Samples Stored in External Flash */ +#define BITP_CORE_LUT_DATA_LUT_DATA 0 /* Data Byte to Write to / Read from Look-Up-Table */ +#define BITM_CORE_LUT_DATA_LUT_DATA 0x000000FF /* Data Byte to Write to / Read from Look-Up-Table */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_EXT_FLASH_DATA Pos/Masks Description + CORE_REVISION Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_EXT_FLASH_DATA_EXT_FLASH_DATA 0 /* Data Read Back from External Flash */ -#define BITM_CORE_EXT_FLASH_DATA_EXT_FLASH_DATA 0x000000FF /* Data Read Back from External Flash */ +#define BITP_CORE_REVISION_REV_MAJOR 24 /* Major Revision Information */ +#define BITP_CORE_REVISION_REV_MINOR 16 /* Minor Revision Information */ +#define BITP_CORE_REVISION_REV_PATCH 0 /* Patch Revision Information */ +#define BITM_CORE_REVISION_REV_MAJOR 0xFF000000 /* Major Revision Information */ +#define BITM_CORE_REVISION_REV_MINOR 0x00FF0000 /* Minor Revision Information */ +#define BITM_CORE_REVISION_REV_PATCH 0x0000FFFF /* Patch Revision Information */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_REVISION Pos/Masks Description - ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_REVISION_REV_MAJOR 24 /* Major Revision Information */ -#define BITP_CORE_REVISION_REV_MINOR 16 /* Minor Revision Information */ -#define BITP_CORE_REVISION_REV_PATCH 0 /* Patch Revision Information */ -#define BITM_CORE_REVISION_REV_MAJOR 0xFF000000 /* Major Revision Information */ -#define BITM_CORE_REVISION_REV_MINOR 0x00FF0000 /* Minor Revision Information */ -#define BITM_CORE_REVISION_REV_PATCH 0x0000FFFF /* Patch Revision Information */ - -/* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_CHANNEL_COUNT[n] Pos/Masks Description + CORE_CHANNEL_COUNT[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_CHANNEL_COUNT_CHANNEL_ENABLE 7 /* Enable Channel in Measurement Cycle */ #define BITP_CORE_CHANNEL_COUNT_CHANNEL_COUNT 0 /* How Many Times Channel Should Appear in One Cycle */ @@ -1812,245 +1377,115 @@ #define BITM_CORE_CHANNEL_COUNT_CHANNEL_COUNT 0x0000007F /* How Many Times Channel Should Appear in One Cycle */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_CHANNEL_OPTIONS[n] Pos/Masks Description + CORE_CHANNEL_OPTIONS[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_CHANNEL_OPTIONS_FFT_ENABLE_CH 7 /* Indicates Channel to Be Used for FFT */ #define BITP_CORE_CHANNEL_OPTIONS_CHANNEL_PRIORITY 0 /* Indicates Priority or Position of This Channel in Sequence */ -#define BITM_CORE_CHANNEL_OPTIONS_FFT_ENABLE_CH 0x00000080 /* Indicates Channel to Be Used for FFT */ #define BITM_CORE_CHANNEL_OPTIONS_CHANNEL_PRIORITY 0x0000000F /* Indicates Priority or Position of This Channel in Sequence */ -#define ENUM_CORE_CHANNEL_OPTIONS_NO_FFT 0x00000000 /* FFT_Enable_Ch: FFT Will not be Performed on This Channel */ -#define ENUM_CORE_CHANNEL_OPTIONS_DO_FFT 0x00000080 /* FFT_Enable_Ch: FFT Will be Performed on This Channel */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_SENSOR_TYPE[n] Pos/Masks Description + CORE_SENSOR_TYPE[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_SENSOR_TYPE_SENSOR_TYPE 0 /* Sensor Type */ -#define BITM_CORE_SENSOR_TYPE_SENSOR_TYPE 0x00000FFF /* Sensor Type */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_T_DEF_L1 0x00000000 /* Sensor_Type: Thermocouple T-Type Sensor Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_J_DEF_L1 0x00000001 /* Sensor_Type: Thermocouple J-Type Sensor Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_K_DEF_L1 0x00000002 /* Sensor_Type: Thermocouple K-Type Sensor Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_1_DEF_L2 0x00000008 /* Sensor_Type: Thermocouple Sensor 1 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_2_DEF_L2 0x00000009 /* Sensor_Type: Thermocouple Sensor 2 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_3_DEF_L2 0x0000000A /* Sensor_Type: Thermocouple Sensor 3 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_4_DEF_L2 0x0000000B /* Sensor_Type: Thermocouple Sensor 4 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_T_ADV_L1 0x00000010 /* Sensor_Type: Thermocouple T-Type Sensor Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_J_ADV_L1 0x00000011 /* Sensor_Type: Thermocouple J-Type Sensor Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_K_ADV_L1 0x00000012 /* Sensor_Type: Thermocouple K-Type Sensor Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_1_ADV_L2 0x00000018 /* Sensor_Type: Thermocouple Sensor 1 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_2_ADV_L2 0x00000019 /* Sensor_Type: Thermocouple Sensor 2 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_3_ADV_L2 0x0000001A /* Sensor_Type: Thermocouple Sensor 3 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_4_ADV_L2 0x0000001B /* Sensor_Type: Thermocouple Sensor 4 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT100_DEF_L1 0x00000020 /* Sensor_Type: RTD 2 Wire PT100 Sensor Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT1000_DEF_L1 0x00000021 /* Sensor_Type: RTD 2 Wire PT1000 Sensor Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_1_DEF_L2 0x00000028 /* Sensor_Type: RTD 2 Wire Sensor 1 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_2_DEF_L2 0x00000029 /* Sensor_Type: RTD 2 Wire Sensor 2 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_3_DEF_L2 0x0000002A /* Sensor_Type: RTD 2 Wire Sensor 3 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_4_DEF_L2 0x0000002B /* Sensor_Type: RTD 2 Wire Sensor 4 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT100_ADV_L1 0x00000030 /* Sensor_Type: RTD 2 Wire PT100 Sensor Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT1000_ADV_L1 0x00000031 /* Sensor_Type: RTD 2 Wire PT1000 Sensor Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_1_ADV_L2 0x00000038 /* Sensor_Type: RTD 2 Wire Sensor 1 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_2_ADV_L2 0x00000039 /* Sensor_Type: RTD 2 Wire Sensor 2 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_3_ADV_L2 0x0000003A /* Sensor_Type: RTD 2 Wire Sensor 3 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_2W_4_ADV_L2 0x0000003B /* Sensor_Type: RTD 2 Wire Sensor 4 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT100_DEF_L1 0x00000040 /* Sensor_Type: RTD 3 Wire PT100 Sensor Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT1000_DEF_L1 0x00000041 /* Sensor_Type: RTD 3 Wire PT1000 Sensor Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_1_DEF_L2 0x00000048 /* Sensor_Type: RTD 3 Wire Sensor 1 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_2_DEF_L2 0x00000049 /* Sensor_Type: RTD 3 Wire Sensor 2 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_3_DEF_L2 0x0000004A /* Sensor_Type: RTD 3 Wire Sensor 3 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_4_DEF_L2 0x0000004B /* Sensor_Type: RTD 3 Wire Sensor 4 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT100_ADV_L1 0x00000050 /* Sensor_Type: RTD 3 Wire PT100 Sensor Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT1000_ADV_L1 0x00000051 /* Sensor_Type: RTD 3 Wire PT1000 Sensor Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_1_ADV_L2 0x00000058 /* Sensor_Type: RTD 3 Wire Sensor 1 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_2_ADV_L2 0x00000059 /* Sensor_Type: RTD 3 Wire Sensor 2 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_3_ADV_L2 0x0000005A /* Sensor_Type: RTD 3 Wire Sensor 3 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_3W_4_ADV_L2 0x0000005B /* Sensor_Type: RTD 3 Wire Sensor 4 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT100_DEF_L1 0x00000060 /* Sensor_Type: RTD 4 Wire PT100 Sensor Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT1000_DEF_L1 0x00000061 /* Sensor_Type: RTD 4 Wire PT1000 Sensor Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_1_DEF_L2 0x00000068 /* Sensor_Type: RTD 4 Wire Sensor 1 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_2_DEF_L2 0x00000069 /* Sensor_Type: RTD 4 Wire Sensor 2 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_3_DEF_L2 0x0000006A /* Sensor_Type: RTD 4 Wire Sensor 3 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_4_DEF_L2 0x0000006B /* Sensor_Type: RTD 4 Wire Sensor 4 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT100_ADV_L1 0x00000070 /* Sensor_Type: RTD 4 Wire PT100 Sensor Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT1000_ADV_L1 0x00000071 /* Sensor_Type: RTD 4 Wire PT1000 Sensor Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_1_ADV_L2 0x00000078 /* Sensor_Type: RTD 4 Wire Sensor 1 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_2_ADV_L2 0x00000079 /* Sensor_Type: RTD 4 Wire Sensor 2 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_3_ADV_L2 0x0000007A /* Sensor_Type: RTD 4 Wire Sensor 3 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_RTD_4W_4_ADV_L2 0x0000007B /* Sensor_Type: RTD 4 Wire Sensor 4 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_A_10K_DEF_L1 0x00000080 /* Sensor_Type: Thermistor Type A 10kOhm Sensor Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_B_10K_DEF_L1 0x00000081 /* Sensor_Type: Thermistor Type B 10kOhm Sensor Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_1_DEF_L2 0x00000088 /* Sensor_Type: Thermistor Sensor 1 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_2_DEF_L2 0x00000089 /* Sensor_Type: Thermistor Sensor 2 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_3_DEF_L2 0x0000008A /* Sensor_Type: Thermistor Sensor 3 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_4_DEF_L2 0x0000008B /* Sensor_Type: Thermistor Sensor 4 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_A_10K_ADV_L1 0x00000090 /* Sensor_Type: Thermistor Type A 10kOhm Sensor Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_B_10K_ADV_L1 0x00000091 /* Sensor_Type: Thermistor Type B 10kOhm Sensor Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_1_ADV_L2 0x00000098 /* Sensor_Type: Thermistor Sensor 1 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_2_ADV_L2 0x00000099 /* Sensor_Type: Thermistor Sensor 2 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_3_ADV_L2 0x0000009A /* Sensor_Type: Thermistor Sensor 3 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_4_ADV_L2 0x0000009B /* Sensor_Type: Thermistor Sensor 4 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_1_DEF_L2 0x000000A8 /* Sensor_Type: Bridge 4 Wire Sensor 1 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_2_DEF_L2 0x000000A9 /* Sensor_Type: Bridge 4 Wire Sensor 2 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_3_DEF_L2 0x000000AA /* Sensor_Type: Bridge 4 Wire Sensor 3 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_4_DEF_L2 0x000000AB /* Sensor_Type: Bridge 4 Wire Sensor 4 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_1_ADV_L2 0x000000B8 /* Sensor_Type: Bridge 4 Wire Sensor 1 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_2_ADV_L2 0x000000B9 /* Sensor_Type: Bridge 4 Wire Sensor 2 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_3_ADV_L2 0x000000BA /* Sensor_Type: Bridge 4 Wire Sensor 2 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_4_ADV_L2 0x000000BB /* Sensor_Type: Bridge 4 Wire Sensor 2 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_1_DEF_L2 0x000000C8 /* Sensor_Type: Bridge 6 Wire Sensor 1 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_2_DEF_L2 0x000000C9 /* Sensor_Type: Bridge 6 Wire Sensor 2 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_3_DEF_L2 0x000000CA /* Sensor_Type: Bridge 6 Wire Sensor 3 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_4_DEF_L2 0x000000CB /* Sensor_Type: Bridge 6 Wire Sensor 4 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_1_ADV_L2 0x000000D8 /* Sensor_Type: Bridge 6 Wire Sensor 1 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_2_ADV_L2 0x000000D9 /* Sensor_Type: Bridge 6 Wire Sensor 2 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_3_ADV_L2 0x000000DA /* Sensor_Type: Bridge 6 Wire Sensor 3 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_4_ADV_L2 0x000000DB /* Sensor_Type: Bridge 6 Wire Sensor 4 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_DIODE_2C_TYPEA_DEF_L1 0x000000E0 /* Sensor_Type: Diode 2 Current Type A Sensor Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_DIODE_3C_TYPEA_DEF_L1 0x000000E1 /* Sensor_Type: Diode 3 Current Type A Sensor Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_DIODE_2C_1_DEF_L2 0x000000E8 /* Sensor_Type: Diode 2 Current Sensor 1 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_DIODE_3C_1_DEF_L2 0x000000E9 /* Sensor_Type: Diode 3 Current Sensor 1 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_DIODE_2C_TYPEA_ADV_L1 0x000000F0 /* Sensor_Type: Diode 2 Current Type A Sensor Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_DIODE_3C_TYPEA_ADV_L1 0x000000F1 /* Sensor_Type: Diode 3 Current Type A Sensor Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_DIODE_2C_1_ADV_L2 0x000000F8 /* Sensor_Type: Diode 2 Current Sensor 1 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_DIODE_3C_1_ADV_L2 0x000000F9 /* Sensor_Type: Diode 3 Current Sensor 1 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_MICROPHONE_A_DEF_L1 0x00000100 /* Sensor_Type: Microphone With No External Amplifier Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_MICROPHONE_B_DEF_L1 0x00000101 /* Sensor_Type: Microphone With External Amplifier Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_MICROPHONE_1_DEF_L2 0x00000108 /* Sensor_Type: Microphone With No External Amplifier Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_MICROPHONE_2_DEF_L2 0x00000109 /* Sensor_Type: Microphone With External Amplifier Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_MICROPHONE_A_ADV_L1 0x00000110 /* Sensor_Type: Microphone With No External Amplifier Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_MICROPHONE_B_ADV_L1 0x00000111 /* Sensor_Type: Microphone With External Amplifier Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_MICROPHONE_1_ADV_L2 0x00000116 /* Sensor_Type: Microphone With No External Amplifier Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_MICROPHONE_2_ADV_L2 0x00000117 /* Sensor_Type: Microphone With External Amplifier Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_VOLTAGE 0x00000200 /* Sensor_Type: Voltage Input */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_A_DEF_L1 0x00000220 /* Sensor_Type: Voltage Output Pressure Sensor A Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_B_DEF_L1 0x00000221 /* Sensor_Type: Voltage Output Pressure Sensor B Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_1_DEF_L2 0x00000228 /* Sensor_Type: Voltage Output Pressure Sensor 1 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_2_DEF_L2 0x00000229 /* Sensor_Type: Voltage Output Pressure Sensor 2 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_A_ADV_L1 0x00000230 /* Sensor_Type: Voltage Output Pressure Sensor A Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_B_ADV_L1 0x00000231 /* Sensor_Type: Voltage Output Pressure Sensor B Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_1_ADV_L2 0x00000238 /* Sensor_Type: Voltage Output Pressure Sensor 1 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_2_ADV_L2 0x00000239 /* Sensor_Type: Voltage Output Pressure Sensor 2 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_CURRENT 0x00000300 /* Sensor_Type: Current Input */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_A_DEF_L1 0x00000320 /* Sensor_Type: Current Output Pressure Sensor A Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_1_DEF_L2 0x00000328 /* Sensor_Type: Current Output Pressure Sensor 1 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_2_DEF_L2 0x00000329 /* Sensor_Type: Current Output Pressure Sensor 2 Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_A_ADV_L1 0x00000330 /* Sensor_Type: Current Output Pressure Sensor A Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_1_ADV_L2 0x00000338 /* Sensor_Type: Current Output Pressure Sensor 1 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_2_ADV_L2 0x00000339 /* Sensor_Type: Current Output Pressure Sensor 2 Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_A_DEF_L1 0x00000800 /* Sensor_Type: I2C Pressure Sensor A Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_B_DEF_L1 0x00000801 /* Sensor_Type: I2C Pressure Sensor B Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_A_DEF_L2 0x00000808 /* Sensor_Type: I2C Pressure Sensor A Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_B_DEF_L2 0x00000809 /* Sensor_Type: I2C Pressure Sensor B Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_A_ADV_L1 0x00000810 /* Sensor_Type: I2C Pressure Sensor A Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_B_ADV_L1 0x00000811 /* Sensor_Type: I2C Pressure Sensor B Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_A_ADV_L2 0x00000818 /* Sensor_Type: I2C Pressure Sensor A Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_B_ADV_L2 0x00000819 /* Sensor_Type: I2C Pressure Sensor B Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_A_DEF_L1 0x00000840 /* Sensor_Type: I2C Humidity Sensor A Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_B_DEF_L1 0x00000841 /* Sensor_Type: I2C Humidity Sensor B Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_A_DEF_L2 0x00000848 /* Sensor_Type: I2C Humidity Sensor A Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_B_DEF_L2 0x00000849 /* Sensor_Type: I2C Humidity Sensor B Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_A_ADV_L1 0x00000850 /* Sensor_Type: I2C Humidity Sensor A Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_B_ADV_L1 0x00000851 /* Sensor_Type: I2C Humidity Sensor B Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_A_ADV_L2 0x00000858 /* Sensor_Type: I2C Humidity Sensor A Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_B_ADV_L2 0x00000859 /* Sensor_Type: I2C Humidity Sensor B Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_AMBIENTLIGHT_A_DEF_L1 0x00000880 /* Sensor_Type: I2C Ambient Light Sensor A Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_AMBIENTLIGHT_A_DEF_L2 0x00000888 /* Sensor_Type: I2C Ambient Light Sensor A Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_AMBIENTLIGHT_A_ADV_L1 0x00000890 /* Sensor_Type: I2C Ambient Light Sensor A Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_I2C_AMBIENTLIGHT_A_ADV_L2 0x00000898 /* Sensor_Type: I2C Ambient Light Sensor A Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_PRESSURE_A_DEF_L1 0x00000C00 /* Sensor_Type: SPI Pressure Sensor A Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_PRESSURE_A_DEF_L2 0x00000C08 /* Sensor_Type: SPI Pressure Sensor A Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_PRESSURE_A_ADV_L1 0x00000C10 /* Sensor_Type: SPI Pressure Sensor A Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_PRESSURE_A_ADV_L2 0x00000C18 /* Sensor_Type: SPI Pressure Sensor A Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_A_DEF_L1 0x00000C40 /* Sensor_Type: SPI Humidity Sensor A Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_B_DEF_L1 0x00000C41 /* Sensor_Type: SPI Humidity Sensor B Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_A_DEF_L2 0x00000C48 /* Sensor_Type: SPI Humidity Sensor A Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_B_DEF_L2 0x00000C49 /* Sensor_Type: SPI Humidity Sensor B Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_A_ADV_L1 0x00000C50 /* Sensor_Type: SPI Humidity Sensor A Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_B_ADV_L1 0x00000C51 /* Sensor_Type: SPI Humidity Sensor B Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_A_ADV_L2 0x00000C58 /* Sensor_Type: SPI Humidity Sensor A Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_B_ADV_L2 0x00000C59 /* Sensor_Type: SPI Humidity Sensor B Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_A_DEF_L1 0x00000C80 /* Sensor_Type: SPI Accelerometer Sensor A 3-Axis Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_B_DEF_L1 0x00000C81 /* Sensor_Type: SPI Accelerometer Sensor B 3-Axis Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_A_DEF_L2 0x00000C88 /* Sensor_Type: SPI Accelerometer Sensor A 3-Axis Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_B_DEF_L2 0x00000C89 /* Sensor_Type: SPI Accelerometer Sensor B 3-Axis Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_A_ADV_L1 0x00000C90 /* Sensor_Type: SPI Accelerometer Sensor A 3-Axis Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_B_ADV_L1 0x00000C91 /* Sensor_Type: SPI Accelerometer Sensor B 3-Axis Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_A_ADV_L2 0x00000C98 /* Sensor_Type: SPI Accelerometer Sensor A 3-Axis Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_B_ADV_L2 0x00000C99 /* Sensor_Type: SPI Accelerometer Sensor B 3-Axis Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_UART_CO2_A_DEF_L1 0x00000E00 /* Sensor_Type: UART CO2 Sensor A Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_UART_CO2_B_DEF_L1 0x00000E01 /* Sensor_Type: UART CO2 Sensor B Defined Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_UART_CO2_A_DEF_L2 0x00000E08 /* Sensor_Type: UART CO2 Sensor A Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_UART_CO2_B_DEF_L2 0x00000E09 /* Sensor_Type: UART CO2 Sensor B Defined Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_UART_CO2_A_ADV_L1 0x00000E10 /* Sensor_Type: UART CO2 Sensor A Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_UART_CO2_B_ADV_L1 0x00000E11 /* Sensor_Type: UART CO2 Sensor B Advanced Level 1 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_UART_CO2_A_ADV_L2 0x00000E18 /* Sensor_Type: UART CO2 Sensor A Advanced Level 2 */ -#define ENUM_CORE_SENSOR_TYPE_SENSOR_UART_CO2_B_ADV_L2 0x00000E19 /* Sensor_Type: UART CO2 Sensor B Advanced Level 2 */ +#define BITP_CORE_SENSOR_TYPE_SENSOR_TYPE 0 /* Sensor Type */ +#define BITM_CORE_SENSOR_TYPE_SENSOR_TYPE 0x00000FFF /* Sensor Type */ +#define ENUM_CORE_SENSOR_TYPE_THERMOCOUPLE_T 0x00000000 /* Sensor_Type: Thermocouple T-Type Sensor Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_THERMOCOUPLE_J 0x00000001 /* Sensor_Type: Thermocouple J-Type Sensor Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_THERMOCOUPLE_K 0x00000002 /* Sensor_Type: Thermocouple K-Type Sensor Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_RTD_2W_PT100 0x00000020 /* Sensor_Type: RTD 2 Wire PT100 Sensor Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_RTD_2W_PT1000 0x00000021 /* Sensor_Type: RTD 2 Wire PT1000 Sensor Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_RTD_3W_PT100 0x00000040 /* Sensor_Type: RTD 3 Wire PT100 Sensor Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_RTD_3W_PT1000 0x00000041 /* Sensor_Type: RTD 3 Wire PT1000 Sensor Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_RTD_4W_PT100 0x00000060 /* Sensor_Type: RTD 4 Wire PT100 Sensor Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_RTD_4W_PT1000 0x00000061 /* Sensor_Type: RTD 4 Wire PT1000 Sensor Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_THERMISTOR_A_10K 0x00000080 /* Sensor_Type: Thermistor Type A 10kOhm Sensor Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_THERMISTOR_B_10K 0x00000081 /* Sensor_Type: Thermistor Type B 10kOhm Sensor Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_BRIDGE_4W_2 0x000000A9 /* Sensor_Type: Bridge 4 Wire Sensor 2 Defined Level 2 */ +#define ENUM_CORE_SENSOR_TYPE_BRIDGE_6W_1 0x000000C8 /* Sensor_Type: Bridge 6 Wire Sensor 1 Defined Level 2 */ +#define ENUM_CORE_SENSOR_TYPE_BRIDGE_6W_2 0x000000C9 /* Sensor_Type: Bridge 6 Wire Sensor 2 Defined Level 2 */ +#define ENUM_CORE_SENSOR_TYPE_DIODE_2C_TYPEA 0x000000E0 /* Sensor_Type: Diode 2 Current Type A Sensor Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_DIODE_3C_TYPEA 0x000000E1 /* Sensor_Type: Diode 3 Current Type A Sensor Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_DIODE_2C_1 0x000000E8 /* Sensor_Type: Diode 2 Current Sensor 1 Defined Level 2 */ +#define ENUM_CORE_SENSOR_TYPE_DIODE_3C_1 0x000000E9 /* Sensor_Type: Diode 3 Current Sensor 1 Defined Level 2 */ +#define ENUM_CORE_SENSOR_TYPE_VOLTAGE 0x00000200 /* Sensor_Type: Voltage Input */ +#define ENUM_CORE_SENSOR_TYPE_VOLTAGE_PRESSURE_A 0x00000220 /* Sensor_Type: Voltage Output Pressure Sensor A Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_VOLTAGE_PRESSURE_B 0x00000221 /* Sensor_Type: Voltage Output Pressure Sensor B Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_CURRENT 0x00000300 /* Sensor_Type: Current Input */ +#define ENUM_CORE_SENSOR_TYPE_I2C_PRESSURE_A 0x00000800 /* Sensor_Type: I2C Pressure Sensor A Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_I2C_PRESSURE_B 0x00000801 /* Sensor_Type: I2C Pressure Sensor B Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_I2C_HUMIDITY_A 0x00000840 /* Sensor_Type: I2C Humidity Sensor A Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_I2C_HUMIDITY_B 0x00000841 /* Sensor_Type: I2C Humidity Sensor B Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_SPI_ACCELEROMETER_A 0x00000C80 /* Sensor_Type: SPI Accelerometer Sensor A 3-Axis Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_SPI_ACCELEROMETER_B 0x00000C81 /* Sensor_Type: SPI Accelerometer Sensor B 3-Axis Defined Level 1 */ +#define ENUM_CORE_SENSOR_TYPE_CO2_A_DEF 0x00000E00 /* Sensor_Type: CO2 Sensor A Defined Level 1 */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_SENSOR_DETAILS[n] Pos/Masks Description + CORE_SENSOR_DETAILS[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_SENSOR_DETAILS_COMPENSATION_DISABLE 31 /* Indicates Compensation Data Should Not Be Used */ -#define BITP_CORE_SENSOR_DETAILS_AVERAGING 28 /* Number of ADC Results to Average */ -#define BITP_CORE_SENSOR_DETAILS_PGA_GAIN 24 /* PGA Gain */ +#define BITP_CORE_SENSOR_DETAILS_RTD_CURVE 27 /* Select RTD Curve for Linearisation */ +#define BITP_CORE_SENSOR_DETAILS_PGA_GAIN 24 /* PGA Gain */ #define BITP_CORE_SENSOR_DETAILS_REFERENCE_SELECT 20 /* Reference Selection */ -#define BITP_CORE_SENSOR_DETAILS_VBIAS 19 /* Controls ADC Vbias Output */ -#define BITP_CORE_SENSOR_DETAILS_REFERENCE_BUFFER_DISABLE 18 /* Enable or Disable ADC Reference Buffer */ +#define BITP_CORE_SENSOR_DETAILS_VBIAS 19 /* Controls ADC Vbias Output */ #define BITP_CORE_SENSOR_DETAILS_DO_NOT_PUBLISH 17 /* Do Not Publish Channel Result */ #define BITP_CORE_SENSOR_DETAILS_UNITY_LUT_SELECT 16 /* Selects Unity Transfer Function Instead of Sensor Default */ #define BITP_CORE_SENSOR_DETAILS_COMPENSATION_CHANNEL 4 /* Indicates Which Channel is Used to Compensate Sensor Result */ #define BITP_CORE_SENSOR_DETAILS_MEASUREMENT_UNITS 0 /* Units of Sensor Measurement */ #define BITM_CORE_SENSOR_DETAILS_COMPENSATION_DISABLE 0x80000000 /* Indicates Compensation Data Should Not Be Used */ -#define BITM_CORE_SENSOR_DETAILS_AVERAGING 0x70000000 /* Number of ADC Results to Average */ -#define BITM_CORE_SENSOR_DETAILS_PGA_GAIN 0x07000000 /* PGA Gain */ +#define BITM_CORE_SENSOR_DETAILS_RTD_CURVE 0x18000000 /* Select RTD Curve for Linearisation */ +#define BITM_CORE_SENSOR_DETAILS_PGA_GAIN 0x07000000 /* PGA Gain */ #define BITM_CORE_SENSOR_DETAILS_REFERENCE_SELECT 0x00F00000 /* Reference Selection */ -#define BITM_CORE_SENSOR_DETAILS_VBIAS 0x00080000 /* Controls ADC Vbias Output */ -#define BITM_CORE_SENSOR_DETAILS_REFERENCE_BUFFER_DISABLE 0x00040000 /* Enable or Disable ADC Reference Buffer */ +#define BITM_CORE_SENSOR_DETAILS_VBIAS 0x00080000 /* Controls ADC Vbias Output */ #define BITM_CORE_SENSOR_DETAILS_DO_NOT_PUBLISH 0x00020000 /* Do Not Publish Channel Result */ #define BITM_CORE_SENSOR_DETAILS_UNITY_LUT_SELECT 0x00010000 /* Selects Unity Transfer Function Instead of Sensor Default */ #define BITM_CORE_SENSOR_DETAILS_COMPENSATION_CHANNEL 0x000000F0 /* Indicates Which Channel is Used to Compensate Sensor Result */ #define BITM_CORE_SENSOR_DETAILS_MEASUREMENT_UNITS 0x0000000F /* Units of Sensor Measurement */ -#define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_1 0x00000000 /* PGA_Gain: Gain of 1 */ -#define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_2 0x01000000 /* PGA_Gain: Gain of 2 */ -#define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_4 0x02000000 /* PGA_Gain: Gain of 4 */ -#define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_8 0x03000000 /* PGA_Gain: Gain of 8 */ +#define ENUM_CORE_SENSOR_DETAILS_EUROPEAN_CURVE 0x00000000 /* RTD_Curve: European Curve */ +#define ENUM_CORE_SENSOR_DETAILS_AMERICAN_CURVE 0x08000000 /* RTD_Curve: American Curve */ +#define ENUM_CORE_SENSOR_DETAILS_JAPANESE_CURVE 0x10000000 /* RTD_Curve: Japanese Curve */ +#define ENUM_CORE_SENSOR_DETAILS_ITS90_CURVE 0x18000000 /* RTD_Curve: ITS-90 Curve */ +#define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_1 0x00000000 /* PGA_Gain: Gain of 1 */ +#define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_2 0x01000000 /* PGA_Gain: Gain of 2 */ +#define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_4 0x02000000 /* PGA_Gain: Gain of 4 */ +#define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_8 0x03000000 /* PGA_Gain: Gain of 8 */ #define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_16 0x04000000 /* PGA_Gain: Gain of 16 */ #define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_32 0x05000000 /* PGA_Gain: Gain of 32 */ #define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_64 0x06000000 /* PGA_Gain: Gain of 64 */ #define ENUM_CORE_SENSOR_DETAILS_PGA_GAIN_128 0x07000000 /* PGA_Gain: Gain of 128 */ -#define ENUM_CORE_SENSOR_DETAILS_REF_INT 0x00000000 /* Reference_Select: Internal Reference */ -#define ENUM_CORE_SENSOR_DETAILS_REF_AVDD 0x00100000 /* Reference_Select: AVDD */ -#define ENUM_CORE_SENSOR_DETAILS_REF_VEXT1 0x00200000 /* Reference_Select: External Voltage on Refin1 */ -#define ENUM_CORE_SENSOR_DETAILS_REF_VEXT2 0x00300000 /* Reference_Select: External Voltage on Refin2 */ -#define ENUM_CORE_SENSOR_DETAILS_REF_RINT1 0x00400000 /* Reference_Select: Internal Resistor1 */ -#define ENUM_CORE_SENSOR_DETAILS_REF_RINT2 0x00500000 /* Reference_Select: Internal Resistor2 */ -#define ENUM_CORE_SENSOR_DETAILS_REF_REXT1 0x00600000 /* Reference_Select: External Resistor on Refin1 */ -#define ENUM_CORE_SENSOR_DETAILS_REF_REXT2 0x00700000 /* Reference_Select: External Resistor on Refin2 */ -#define ENUM_CORE_SENSOR_DETAILS_REF_EXC 0x00800000 /* Reference_Select: Bridge Excitation Voltage */ +#define ENUM_CORE_SENSOR_DETAILS_REF_VINT 0x00000000 /* Reference_Select: Internal voltage reference (1.2V) */ +#define ENUM_CORE_SENSOR_DETAILS_REF_VEXT1 0x00100000 /* Reference_Select: External Voltage reference applied to VERF+ and VREF- */ +#define ENUM_CORE_SENSOR_DETAILS_REF_REXT 0x00200000 /* Reference_Select: External Reference Resistor Applied Across RSENSE+/-, Reference Resistor Register Used to Specify Value */ +#define ENUM_CORE_SENSOR_DETAILS_REF_AVDD 0x00300000 /* Reference_Select: AVDD Supply Used as Excitation and Internally applied as Reference */ #define ENUM_CORE_SENSOR_DETAILS_UNITS_UNSPECIFIED 0x00000000 /* Measurement_Units: Not Specified */ #define ENUM_CORE_SENSOR_DETAILS_UNITS_RESERVED 0x00000001 /* Measurement_Units: Reserved */ -#define ENUM_CORE_SENSOR_DETAILS_UNITS_DEGC 0x00000002 /* Measurement_Units: Degrees C */ -#define ENUM_CORE_SENSOR_DETAILS_UNITS_DEGF 0x00000003 /* Measurement_Units: Degrees F */ +#define ENUM_CORE_SENSOR_DETAILS_UNITS_DEGC 0x00000002 /* Measurement_Units: Degrees C */ +#define ENUM_CORE_SENSOR_DETAILS_UNITS_DEGF 0x00000003 /* Measurement_Units: Degrees F */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_CHANNEL_EXCITATION[n] Pos/Masks Description + CORE_CHANNEL_EXCITATION[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_CHANNEL_EXCITATION_IOUT_DONT_SWAP_3WIRE 7 /* Indicates 3-Wire Excitation Currents Should Not Be Swapped */ -#define BITP_CORE_CHANNEL_EXCITATION_IOUT_DIODE_RATIO 5 /* Modify Current Ratios Used for Diode Sensor */ +#define BITP_CORE_CHANNEL_EXCITATION_IOUT_DIODE_RATIO 6 /* Modify Current Ratios Used for Diode Sensor */ #define BITP_CORE_CHANNEL_EXCITATION_IOUT_EXCITATION_CURRENT 0 /* Current Source Value */ -#define BITM_CORE_CHANNEL_EXCITATION_IOUT_DONT_SWAP_3WIRE 0x00000080 /* Indicates 3-Wire Excitation Currents Should Not Be Swapped */ -#define BITM_CORE_CHANNEL_EXCITATION_IOUT_DIODE_RATIO 0x00000020 /* Modify Current Ratios Used for Diode Sensor */ -#define BITM_CORE_CHANNEL_EXCITATION_IOUT_EXCITATION_CURRENT 0x00000007 /* Current Source Value */ -#define ENUM_CORE_CHANNEL_EXCITATION_IOUT_DIODE_DEFAULT 0x00000000 /* IOUT_Diode_Ratio: Default Excitation Current Ratios */ -#define ENUM_CORE_CHANNEL_EXCITATION_IOUT_DIODE_MAX 0x00000020 /* IOUT_Diode_Ratio: Higher Excitation Current Ratios */ -#define ENUM_CORE_CHANNEL_EXCITATION_IEXC_OFF 0x00000000 /* IOUT_Excitation_Current: Disabled */ -#define ENUM_CORE_CHANNEL_EXCITATION_IEXC_50UA 0x00000001 /* IOUT_Excitation_Current: 50 \mu;A */ -#define ENUM_CORE_CHANNEL_EXCITATION_IEXC_100UA 0x00000002 /* IOUT_Excitation_Current: 100 \mu;A */ -#define ENUM_CORE_CHANNEL_EXCITATION_IEXC_250UA 0x00000003 /* IOUT_Excitation_Current: 250 \mu;A */ -#define ENUM_CORE_CHANNEL_EXCITATION_IEXC_500UA 0x00000004 /* IOUT_Excitation_Current: 500 \mu;A */ -#define ENUM_CORE_CHANNEL_EXCITATION_IEXC_750UA 0x00000005 /* IOUT_Excitation_Current: 750 \mu;A */ -#define ENUM_CORE_CHANNEL_EXCITATION_IEXC_1000UA 0x00000006 /* IOUT_Excitation_Current: 1000 \mu;A */ +#define BITM_CORE_CHANNEL_EXCITATION_IOUT_DIODE_RATIO 0x000001C0 /* Modify Current Ratios Used for Diode Sensor */ +#define BITM_CORE_CHANNEL_EXCITATION_IOUT_EXCITATION_CURRENT 0x0000000F /* Current Source Value */ +#define ENUM_CORE_CHANNEL_EXCITATION_DIODE_2PT_10UA_100UA 0x00000000 /* IOUT_Diode_Ratio: 2 Current measurement 10uA 100uA */ +#define ENUM_CORE_CHANNEL_EXCITATION_DIODE_2PT_20UA_160UA 0x00000040 /* IOUT_Diode_Ratio: 2 Current measurement 20uA 160uA */ +#define ENUM_CORE_CHANNEL_EXCITATION_DIODE_2PT_50UA_300UA 0x00000080 /* IOUT_Diode_Ratio: 2 Current measurement 50uA 300uA */ +#define ENUM_CORE_CHANNEL_EXCITATION_DIODE_2PT_100UA_600UA 0x000000C0 /* IOUT_Diode_Ratio: 2 Current measurement 100uA 600uA */ +#define ENUM_CORE_CHANNEL_EXCITATION_DIODE_3PT_10UA_50UA_100UA 0x00000100 /* IOUT_Diode_Ratio: 3 current measuremet 10uA 50uA 100uA */ +#define ENUM_CORE_CHANNEL_EXCITATION_DIODE_3PT_20UA_100UA_160UA 0x00000140 /* IOUT_Diode_Ratio: 3 current measuremet 20uA 100uA 160uA */ +#define ENUM_CORE_CHANNEL_EXCITATION_DIODE_3PT_50UA_150UA_300UA 0x00000180 /* IOUT_Diode_Ratio: 3 current measuremet 50uA 150uA 300uA */ +#define ENUM_CORE_CHANNEL_EXCITATION_DIODE_3PT_100UA_300UA_600UA 0x000001C0 /* IOUT_Diode_Ratio: 3 current measuremet 100uA 300uA 600uA */ +#define ENUM_CORE_CHANNEL_EXCITATION_EXTERNAL 0x00000000 /* IOUT_Excitation_Current: External Current Sourced */ +#define ENUM_CORE_CHANNEL_EXCITATION_RESERVED 0x00000001 /* IOUT_Excitation_Current: Reserved */ +#define ENUM_CORE_CHANNEL_EXCITATION_IEXC_10UA 0x00000002 /* IOUT_Excitation_Current: 10 \mu;A */ +#define ENUM_CORE_CHANNEL_EXCITATION_RESERVED2 0x00000003 /* IOUT_Excitation_Current: Reserved */ +#define ENUM_CORE_CHANNEL_EXCITATION_IEXC_50UA 0x00000004 /* IOUT_Excitation_Current: 50 \mu;A */ +#define ENUM_CORE_CHANNEL_EXCITATION_IEXC_100UA 0x00000005 /* IOUT_Excitation_Current: 100 \mu;A */ +#define ENUM_CORE_CHANNEL_EXCITATION_IEXC_250UA 0x00000006 /* IOUT_Excitation_Current: 250 \mu;A */ +#define ENUM_CORE_CHANNEL_EXCITATION_IEXC_500UA 0x00000007 /* IOUT_Excitation_Current: 500 \mu;A */ +#define ENUM_CORE_CHANNEL_EXCITATION_IEXC_1000UA 0x00000008 /* IOUT_Excitation_Current: 1000 \mu;A */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_SETTLING_TIME[n] Pos/Masks Description + CORE_SETTLING_TIME[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_SETTLING_TIME_SETTLING_TIME_UNITS 14 /* Units for Settling Time */ #define BITP_CORE_SETTLING_TIME_SETTLING_TIME 0 /* Settling Time to Allow When Switching to Channel */ @@ -2058,64 +1493,80 @@ #define BITM_CORE_SETTLING_TIME_SETTLING_TIME 0x00003FFF /* Settling Time to Allow When Switching to Channel */ #define ENUM_CORE_SETTLING_TIME_MICROSECONDS 0x00000000 /* Settling_Time_Units: Micro-Seconds */ #define ENUM_CORE_SETTLING_TIME_MILLISECONDS 0x00004000 /* Settling_Time_Units: Milli-Seconds */ -#define ENUM_CORE_SETTLING_TIME_SECONDS 0x00008000 /* Settling_Time_Units: Seconds */ +#define ENUM_CORE_SETTLING_TIME_SECONDS 0x00008000 /* Settling_Time_Units: Seconds */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_FILTER_SELECT[n] Pos/Masks Description + CORE_MEASUREMENT_SETUP[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_FILTER_SELECT_ADC_FILTER_TYPE 11 /* ADC Digital Filter Type */ -#define BITP_CORE_FILTER_SELECT_ADC_FS 0 /* ADC Digital Filter Select */ -#define BITM_CORE_FILTER_SELECT_ADC_FILTER_TYPE 0x0000F800 /* ADC Digital Filter Type */ -#define BITM_CORE_FILTER_SELECT_ADC_FS 0x000007FF /* ADC Digital Filter Select */ -#define ENUM_CORE_FILTER_SELECT_FILTER_FIR_25SPS 0x00000000 /* ADC_Filter_Type: FIR Filter 25 SPS */ -#define ENUM_CORE_FILTER_SELECT_FILTER_FIR_20SPS 0x00000800 /* ADC_Filter_Type: FIR Filter 20 SPS */ -#define ENUM_CORE_FILTER_SELECT_FILTER_SINC4 0x00001000 /* ADC_Filter_Type: Sinc4 Filter */ -#define ENUM_CORE_FILTER_SELECT_FILTER_TBD 0x00001800 /* ADC_Filter_Type: TBD Filter */ +#define BITP_CORE_MEASUREMENT_SETUP_GND_SW 13 /* GND_SW */ +#define BITP_CORE_MEASUREMENT_SETUP_ADC_FILTER_TYPE 12 /* ADC Digital Filter Type */ +#define BITP_CORE_MEASUREMENT_SETUP_CHOP_MODE 10 /* Enabled and Disable Chop Mode */ +#define BITP_CORE_MEASUREMENT_SETUP_PST_MEAS_EXC_CTRL 9 /* Disabled Current Sources After Measurement Has Been Complete */ +#define BITP_CORE_MEASUREMENT_SETUP_NOTCH_EN_2 8 /* Enable Notch 2 Filter Mode */ +#define BITP_CORE_MEASUREMENT_SETUP_CUSTOM_CALIBRATION 7 /* Enables Custom Calibration for Selected Sensor */ +#define BITP_CORE_MEASUREMENT_SETUP_ADC_SF 0 /* ADC Digital Filter Select */ +#define BITM_CORE_MEASUREMENT_SETUP_GND_SW 0x00006000 /* GND_SW */ +#define BITM_CORE_MEASUREMENT_SETUP_ADC_FILTER_TYPE 0x00001000 /* ADC Digital Filter Type */ +#define BITM_CORE_MEASUREMENT_SETUP_CHOP_MODE 0x00000C00 /* Enabled and Disable Chop Mode */ +#define BITM_CORE_MEASUREMENT_SETUP_PST_MEAS_EXC_CTRL 0x00000200 /* Disabled Current Sources After Measurement Has Been Complete */ +#define BITM_CORE_MEASUREMENT_SETUP_NOTCH_EN_2 0x00000100 /* Enable Notch 2 Filter Mode */ +#define BITM_CORE_MEASUREMENT_SETUP_CUSTOM_CALIBRATION 0x00000080 /* Enables Custom Calibration for Selected Sensor */ +#define BITM_CORE_MEASUREMENT_SETUP_ADC_SF 0x0000007F /* ADC Digital Filter Select */ +#define ENUM_CORE_MEASUREMENT_SETUP_GND_SW_OPEN 0x00000000 /* GND_SW: GND_SW Open. The GND SW is not enabled for the sensor measurement */ +#define ENUM_CORE_MEASUREMENT_SETUP_GND_SW_CLOSED 0x00002000 /* GND_SW: GND_SW Closed. The GND SW is enabled for the sensor measurement, bit wiil Remain Closed After the Measurement */ +#define ENUM_CORE_MEASUREMENT_SETUP_ENABLE_SINC4 0x00000000 /* ADC_Filter_Type: Enabled SINC4 Filter */ +#define ENUM_CORE_MEASUREMENT_SETUP_ENABLE_SINC3 0x00001000 /* ADC_Filter_Type: Enabled SINC3 Filter */ +#define ENUM_CORE_MEASUREMENT_SETUP_DISABLE_CHOP 0x00000000 /* Chop_Mode: Chop Mode Disabled */ +#define ENUM_CORE_MEASUREMENT_SETUP_ENABLE_CHOP 0x00000800 /* Chop_Mode: Chop Mode Enabled */ +#define ENUM_CORE_MEASUREMENT_SETUP_NOTCH_DIS 0x00000000 /* NOTCH_EN_2: Disable Notch Filter */ +#define ENUM_CORE_MEASUREMENT_SETUP_NOTCH_EN 0x00000100 /* NOTCH_EN_2: Enable Notch 2 Filter option. Places a addtional notch at 1.2X ODR. Can be used for 50 and 60Hz rejection simultaneously */ +#define ENUM_CORE_MEASUREMENT_SETUP_INTERNAL_CALIBRATION 0x00000000 +#define ENUM_CORE_MEASUREMENT_SETUP_CUSTOM_CALIBRATION 0x00000080 /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_HIGH_THRESHOLD_LIMIT[n] Pos/Masks Description + CORE_HIGH_THRESHOLD_LIMIT[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_HIGH_THRESHOLD_LIMIT_HIGH_THRESHOLD 0 /* Upper Limit for Sensor Alert Comparison */ #define BITM_CORE_HIGH_THRESHOLD_LIMIT_HIGH_THRESHOLD 0xFFFFFFFF /* Upper Limit for Sensor Alert Comparison */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_LOW_THRESHOLD_LIMIT[n] Pos/Masks Description + CORE_LOW_THRESHOLD_LIMIT[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_LOW_THRESHOLD_LIMIT_LOW_THRESHOLD 0 /* Lower Limit for Sensor Alert Comparison */ #define BITM_CORE_LOW_THRESHOLD_LIMIT_LOW_THRESHOLD 0xFFFFFFFF /* Lower Limit for Sensor Alert Comparison */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_SENSOR_OFFSET[n] Pos/Masks Description + CORE_SENSOR_OFFSET[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_SENSOR_OFFSET_SENSOR_OFFSET 0 /* Sensor Offset Adjustment */ #define BITM_CORE_SENSOR_OFFSET_SENSOR_OFFSET 0xFFFFFFFF /* Sensor Offset Adjustment */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_SENSOR_GAIN[n] Pos/Masks Description + CORE_SENSOR_GAIN[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_SENSOR_GAIN_SENSOR_GAIN 0 /* Sensor Gain Adjustment */ -#define BITM_CORE_SENSOR_GAIN_SENSOR_GAIN 0xFFFFFFFF /* Sensor Gain Adjustment */ +#define BITP_CORE_SENSOR_GAIN_SENSOR_GAIN 0 /* Sensor Gain Adjustment */ +#define BITM_CORE_SENSOR_GAIN_SENSOR_GAIN 0xFFFFFFFF /* Sensor Gain Adjustment */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_ALERT_CODE_CH[n] Pos/Masks Description + CORE_ALERT_CODE_CH[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_ALERT_CODE_CH_ALERT_CODE_CH 0 /* Per-Channel Code Indicating Type of Alert */ #define BITM_CORE_ALERT_CODE_CH_ALERT_CODE_CH 0x0000FFFF /* Per-Channel Code Indicating Type of Alert */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_CHANNEL_SKIP[n] Pos/Masks Description + CORE_CHANNEL_SKIP[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_CHANNEL_SKIP_CHANNEL_SKIP 0 /* Indicates If Channel Will Skip Some Measurement Cycles */ -#define BITM_CORE_CHANNEL_SKIP_CHANNEL_SKIP 0x000000FF /* Indicates If Channel Will Skip Some Measurement Cycles */ +#define BITP_CORE_CHANNEL_SKIP_CHANNEL_SKIP 0 /* Indicates If Channel Will Skip Some Measurement Cycles */ +#define BITM_CORE_CHANNEL_SKIP_CHANNEL_SKIP 0x000000FF /* Indicates If Channel Will Skip Some Measurement Cycles */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_SENSOR_PARAMETER[n] Pos/Masks Description + CORE_SENSOR_PARAMETER[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_SENSOR_PARAMETER_SENSOR_PARAMETER 0 /* Sensor Parameter Adjustment */ #define BITM_CORE_SENSOR_PARAMETER_SENSOR_PARAMETER 0xFFFFFFFF /* Sensor Parameter Adjustment */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_CALIBRATION_PARAMETER[n] Pos/Masks Description + CORE_CALIBRATION_PARAMETER[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_CALIBRATION_PARAMETER_CALIBRATION_PARAMETER_ENABLE 24 /* Enables Use of Calibration_Parameter */ #define BITP_CORE_CALIBRATION_PARAMETER_CALIBRATION_PARAMETER 0 /* Calibration Parameter Value */ @@ -2123,7 +1574,7 @@ #define BITM_CORE_CALIBRATION_PARAMETER_CALIBRATION_PARAMETER 0x00FFFFFF /* Calibration Parameter Value */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIGITAL_SENSOR_CONFIG[n] Pos/Masks Description + CORE_DIGITAL_SENSOR_CONFIG[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_DATA_BITS 11 /* Number of Relevant Data Bits */ #define BITP_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_READ_BYTES 8 /* Number of Bytes to Read from the Sensor */ @@ -2143,13 +1594,13 @@ #define ENUM_CORE_DIGITAL_SENSOR_CONFIG_CODING_OFFSET_BINARY 0x00000003 /* Digital_Sensor_Coding: Offset Binary */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIGITAL_SENSOR_ADDRESS[n] Pos/Masks Description + CORE_DIGITAL_SENSOR_ADDRESS[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_DIGITAL_SENSOR_ADDRESS_DIGITAL_SENSOR_ADDRESS 0 /* I2C Address or Write Address Command for SPI Sensor */ #define BITM_CORE_DIGITAL_SENSOR_ADDRESS_DIGITAL_SENSOR_ADDRESS 0x000000FF /* I2C Address or Write Address Command for SPI Sensor */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIGITAL_SENSOR_NUM_CMDS[n] Pos/Masks Description + CORE_DIGITAL_SENSOR_NUM_CMDS[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_DIGITAL_SENSOR_NUM_CMDS_DIGITAL_SENSOR_NUM_READ_CMDS 4 /* Number of Read Commands for Digital Sensor */ #define BITP_CORE_DIGITAL_SENSOR_NUM_CMDS_DIGITAL_SENSOR_NUM_CFG_CMDS 0 /* Number of Configuration Commands for Digital Sensor */ @@ -2157,148 +1608,126 @@ #define BITM_CORE_DIGITAL_SENSOR_NUM_CMDS_DIGITAL_SENSOR_NUM_CFG_CMDS 0x00000007 /* Number of Configuration Commands for Digital Sensor */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIGITAL_SENSOR_COMMS[n] Pos/Masks Description + CORE_DIGITAL_SENSOR_COMMS[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ -#define BITP_CORE_DIGITAL_SENSOR_COMMS_UART_MODE 12 /* Configuration for Sensor UART Protocol */ #define BITP_CORE_DIGITAL_SENSOR_COMMS_SPI_MODE 10 /* Configuration for Sensor SPI Protocol */ -#define BITP_CORE_DIGITAL_SENSOR_COMMS_UART_BAUD 7 /* Controls Baud Rate for UART Sensors */ #define BITP_CORE_DIGITAL_SENSOR_COMMS_I2C_CLOCK 5 /* Controls SCLK Frequency for I2C Sensors */ #define BITP_CORE_DIGITAL_SENSOR_COMMS_SPI_CLOCK 1 /* Controls Clock Frequency for SPI Sensors */ #define BITP_CORE_DIGITAL_SENSOR_COMMS_DIGITAL_SENSOR_COMMS_EN 0 /* Enable Digital Sensor Comms Register Parameters */ -#define BITM_CORE_DIGITAL_SENSOR_COMMS_UART_MODE 0x0000F000 /* Configuration for Sensor UART Protocol */ #define BITM_CORE_DIGITAL_SENSOR_COMMS_SPI_MODE 0x00000C00 /* Configuration for Sensor SPI Protocol */ -#define BITM_CORE_DIGITAL_SENSOR_COMMS_UART_BAUD 0x00000380 /* Controls Baud Rate for UART Sensors */ #define BITM_CORE_DIGITAL_SENSOR_COMMS_I2C_CLOCK 0x00000060 /* Controls SCLK Frequency for I2C Sensors */ #define BITM_CORE_DIGITAL_SENSOR_COMMS_SPI_CLOCK 0x0000001E /* Controls Clock Frequency for SPI Sensors */ #define BITM_CORE_DIGITAL_SENSOR_COMMS_DIGITAL_SENSOR_COMMS_EN 0x00000001 /* Enable Digital Sensor Comms Register Parameters */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8N1 0x00000000 /* Uart_Mode: 8 Data Bits No Parity 1 Stop Bit */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8N2 0x00001000 /* Uart_Mode: 8 Data Bits No Parity 2 Stop Bits */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8N3 0x00002000 /* Uart_Mode: 8 Data Bits No Parity 3 Stop Bits */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8E1 0x00004000 /* Uart_Mode: 8 Data Bits Even Parity 1 Stop Bit */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8E2 0x00005000 /* Uart_Mode: 8 Data Bits Even Parity 2 Stop Bits */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8E3 0x00006000 /* Uart_Mode: 8 Data Bits Even Parity 3 Stop Bits */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8O1 0x00008000 /* Uart_Mode: 8 Data Bits Odd Parity 1 Stop Bit */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8O2 0x00009000 /* Uart_Mode: 8 Data Bits Odd Parity 2 Stop Bits */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8O3 0x0000A000 /* Uart_Mode: 8 Data Bits Odd Parity 3 Stop Bits */ #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_0 0x00000000 /* SPI_Mode: Clock Polarity = 0 Clock Phase = 0 */ #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_1 0x00000400 /* SPI_Mode: Clock Polarity = 0 Clock Phase = 1 */ #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_2 0x00000800 /* SPI_Mode: Clock Polarity = 1 Clock Phase = 0 */ #define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_3 0x00000C00 /* SPI_Mode: Clock Polarity = 1 Clock Phase = 1 */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_UART_115200 0x00000000 /* Uart_Baud: 115200 bps */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_UART_57600 0x00000080 /* Uart_Baud: 57600 bps */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_UART_38400 0x00000100 /* Uart_Baud: 38400 bps */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_UART_19200 0x00000180 /* Uart_Baud: 19200 bps */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_UART_9600 0x00000200 /* Uart_Baud: 9600 bps */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_UART_4800 0x00000280 /* Uart_Baud: 4800 bps */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_UART_2400 0x00000300 /* Uart_Baud: 2400 bps */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_UART_1200 0x00000380 /* Uart_Baud: 1200 bps */ #define ENUM_CORE_DIGITAL_SENSOR_COMMS_I2C_100K 0x00000000 /* I2C_Clock: 100kHz SCL */ #define ENUM_CORE_DIGITAL_SENSOR_COMMS_I2C_400K 0x00000020 /* I2C_Clock: 400kHz SCL */ #define ENUM_CORE_DIGITAL_SENSOR_COMMS_I2C_RESERVED1 0x00000040 /* I2C_Clock: Reserved */ #define ENUM_CORE_DIGITAL_SENSOR_COMMS_I2C_RESERVED2 0x00000060 /* I2C_Clock: Reserved */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_13MHZ 0x00000000 /* SPI_Clock: 13 MHz */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_6_5MHZ 0x00000002 /* SPI_Clock: 6.5 MHz */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_3_25MHZ 0x00000004 /* SPI_Clock: 3.25 MHz */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_1_625MHZ 0x00000006 /* SPI_Clock: 1.625 MHz */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_812KHZ 0x00000008 /* SPI_Clock: 812.5kHz */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_406KHZ 0x0000000A /* SPI_Clock: 406.2kHz */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_203KHZ 0x0000000C /* SPI_Clock: 203.1kHz */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_101KHZ 0x0000000E /* SPI_Clock: 101.5kHz */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_50KHZ 0x00000010 /* SPI_Clock: 50.8kHz */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_25KHZ 0x00000012 /* SPI_Clock: 25.4kHz */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_12KHZ 0x00000014 /* SPI_Clock: 12.7kHz */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_6KHZ 0x00000016 /* SPI_Clock: 6.3kHz */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_3KHZ 0x00000018 /* SPI_Clock: 3.2kHz */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_1_5KHZ 0x0000001A /* SPI_Clock: 1.58kHz */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_793HZ 0x0000001C /* SPI_Clock: 793Hz */ -#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_396HZ 0x0000001E /* SPI_Clock: 396Hz */ +#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_8MHZ 0x00000000 /* SPI_Clock: 8MHz */ +#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_4MHZ 0x00000002 /* SPI_Clock: 4MHz */ +#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_2MHZ 0x00000004 /* SPI_Clock: 2MHz */ +#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_1MHZ 0x00000006 /* SPI_Clock: 1MHz */ +#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_500KHZ 0x00000008 /* SPI_Clock: 500kHz */ +#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_250KHZ 0x0000000A /* SPI_Clock: 250kHz */ +#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_125KHZ 0x0000000C /* SPI_Clock: 125kHz */ +#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_62P5KHZ 0x0000000E /* SPI_Clock: 62.5kHz */ +#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_31P3KHZ 0x00000010 /* SPI_Clock: 31.25kHz */ +#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_15P6KHZ 0x00000012 /* SPI_Clock: 15.625kHz */ +#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_7P8KHZ 0x00000014 /* SPI_Clock: 7.8kHz */ +#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_3P9KHZ 0x00000016 /* SPI_Clock: 3.9kHz */ +#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_1P9KHZ 0x00000018 /* SPI_Clock: 1.95kHz */ +#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_488HZ 0x0000001C /* SPI_Clock: 488Hz */ +#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_244HZ 0x0000001E /* SPI_Clock: 244Hz */ +#define ENUM_CORE_DIGITAL_SENSOR_COMMS_SPI_977HZ 0x0000001A /* SPI_Clock: 977Hz */ #define ENUM_CORE_DIGITAL_SENSOR_COMMS_DIGITAL_COMMS_DEFAULT 0x00000000 /* Digital_Sensor_Comms_En: Default Parameters Used for Digital Sensor Communications */ #define ENUM_CORE_DIGITAL_SENSOR_COMMS_DIGITAL_COMMS_USER 0x00000001 /* Digital_Sensor_Comms_En: User Supplied Parameters Used for Digital Sensor Communications */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIGITAL_SENSOR_COMMAND1[n] Pos/Masks Description + CORE_DIGITAL_SENSOR_COMMAND1[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_DIGITAL_SENSOR_COMMAND1_DIGITAL_SENSOR_COMMAND1 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */ #define BITM_CORE_DIGITAL_SENSOR_COMMAND1_DIGITAL_SENSOR_COMMAND1 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIGITAL_SENSOR_COMMAND2[n] Pos/Masks Description + CORE_DIGITAL_SENSOR_COMMAND2[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_DIGITAL_SENSOR_COMMAND2_DIGITAL_SENSOR_COMMAND2 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */ #define BITM_CORE_DIGITAL_SENSOR_COMMAND2_DIGITAL_SENSOR_COMMAND2 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIGITAL_SENSOR_COMMAND3[n] Pos/Masks Description + CORE_DIGITAL_SENSOR_COMMAND3[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_DIGITAL_SENSOR_COMMAND3_DIGITAL_SENSOR_COMMAND3 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */ #define BITM_CORE_DIGITAL_SENSOR_COMMAND3_DIGITAL_SENSOR_COMMAND3 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIGITAL_SENSOR_COMMAND4[n] Pos/Masks Description + CORE_DIGITAL_SENSOR_COMMAND4[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_DIGITAL_SENSOR_COMMAND4_DIGITAL_SENSOR_COMMAND4 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */ #define BITM_CORE_DIGITAL_SENSOR_COMMAND4_DIGITAL_SENSOR_COMMAND4 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIGITAL_SENSOR_COMMAND5[n] Pos/Masks Description + CORE_DIGITAL_SENSOR_COMMAND5[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_DIGITAL_SENSOR_COMMAND5_DIGITAL_SENSOR_COMMAND5 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */ #define BITM_CORE_DIGITAL_SENSOR_COMMAND5_DIGITAL_SENSOR_COMMAND5 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIGITAL_SENSOR_COMMAND6[n] Pos/Masks Description + CORE_DIGITAL_SENSOR_COMMAND6[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_DIGITAL_SENSOR_COMMAND6_DIGITAL_SENSOR_COMMAND6 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */ #define BITM_CORE_DIGITAL_SENSOR_COMMAND6_DIGITAL_SENSOR_COMMAND6 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIGITAL_SENSOR_COMMAND7[n] Pos/Masks Description + CORE_DIGITAL_SENSOR_COMMAND7[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_DIGITAL_SENSOR_COMMAND7_DIGITAL_SENSOR_COMMAND7 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */ #define BITM_CORE_DIGITAL_SENSOR_COMMAND7_DIGITAL_SENSOR_COMMAND7 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIGITAL_SENSOR_READ_CMD1[n] Pos/Masks Description + CORE_DIGITAL_SENSOR_READ_CMD1[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_DIGITAL_SENSOR_READ_CMD1_DIGITAL_SENSOR_READ_CMD1 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */ #define BITM_CORE_DIGITAL_SENSOR_READ_CMD1_DIGITAL_SENSOR_READ_CMD1 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIGITAL_SENSOR_READ_CMD2[n] Pos/Masks Description + CORE_DIGITAL_SENSOR_READ_CMD2[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_DIGITAL_SENSOR_READ_CMD2_DIGITAL_SENSOR_READ_CMD2 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */ #define BITM_CORE_DIGITAL_SENSOR_READ_CMD2_DIGITAL_SENSOR_READ_CMD2 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIGITAL_SENSOR_READ_CMD3[n] Pos/Masks Description + CORE_DIGITAL_SENSOR_READ_CMD3[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_DIGITAL_SENSOR_READ_CMD3_DIGITAL_SENSOR_READ_CMD3 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */ #define BITM_CORE_DIGITAL_SENSOR_READ_CMD3_DIGITAL_SENSOR_READ_CMD3 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIGITAL_SENSOR_READ_CMD4[n] Pos/Masks Description + CORE_DIGITAL_SENSOR_READ_CMD4[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_DIGITAL_SENSOR_READ_CMD4_DIGITAL_SENSOR_READ_CMD4 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */ #define BITM_CORE_DIGITAL_SENSOR_READ_CMD4_DIGITAL_SENSOR_READ_CMD4 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIGITAL_SENSOR_READ_CMD5[n] Pos/Masks Description + CORE_DIGITAL_SENSOR_READ_CMD5[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_DIGITAL_SENSOR_READ_CMD5_DIGITAL_SENSOR_READ_CMD5 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */ #define BITM_CORE_DIGITAL_SENSOR_READ_CMD5_DIGITAL_SENSOR_READ_CMD5 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIGITAL_SENSOR_READ_CMD6[n] Pos/Masks Description + CORE_DIGITAL_SENSOR_READ_CMD6[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_DIGITAL_SENSOR_READ_CMD6_DIGITAL_SENSOR_READ_CMD6 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */ #define BITM_CORE_DIGITAL_SENSOR_READ_CMD6_DIGITAL_SENSOR_READ_CMD6 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */ /* ------------------------------------------------------------------------------------------------------------------------- - ADMW_CORE_DIGITAL_SENSOR_READ_CMD7[n] Pos/Masks Description + CORE_DIGITAL_SENSOR_READ_CMD7[n] Pos/Masks Description ------------------------------------------------------------------------------------------------------------------------- */ #define BITP_CORE_DIGITAL_SENSOR_READ_CMD7_DIGITAL_SENSOR_READ_CMD7 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */ #define BITM_CORE_DIGITAL_SENSOR_READ_CMD7_DIGITAL_SENSOR_READ_CMD7 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */ -#endif /* end ifndef _DEF1000_REGISTERS_H */ - +#endif /* end ifndef _DEF_ADMW1001_REGISTERS_H */
--- a/inc/admw1001/ADMW1001_REGISTERS_typedefs.h Wed Jun 05 05:39:15 2019 +0000 +++ b/inc/admw1001/ADMW1001_REGISTERS_typedefs.h Sat Jun 15 14:30:49 2019 +0000 @@ -4,9 +4,9 @@ File : ADMW1001_REGISTERS_typedefs.h Description : C Register Structures - Date : Nov 5, 2018 + Date : Apr 30, 2019 - Copyright (c) 2018 Analog Devices, Inc. All Rights Reserved. + Copyright (c) 2019 Analog Devices, Inc. All Rights Reserved. This software is proprietary and confidential to Analog Devices, Inc. and its licensors. @@ -47,7 +47,7 @@ *! \struct ADMW_SPI_Interface_Config_A_Struct *! \brief Interface Configuration A Register bit field structure * ========================================================================== */ -typedef struct _ADMW_SPI_Interface_Config_A_t { +typedef struct SPI_Interface_Config_A_t { union { struct { uint8_t SW_ResetX : 1; /**< Second of Two of SW_RESET Bits. */ @@ -250,8 +250,8 @@ * ========================================================================= */ typedef enum { - ADMW_SPI_SPI_REVISION_ADMW_SPI = 0, /**< */ - ADMW_SPI_SPI_REVISION_LPT_SPI = 2 /**< */ + SPI_SPI_REVISION_ADI_SPI = 0, /**< */ + SPI_SPI_REVISION_LPT_SPI = 2 /**< */ } ADMW_SPI_SPI_Revision_SPI_Type; @@ -259,7 +259,7 @@ *! \struct ADMW_SPI_SPI_Revision_Struct *! \brief SPI Revision Register bit field structure * ========================================================================== */ -typedef struct _ADMW_SPI_SPI_Revision_t { +typedef struct SPI_SPI_Revision_t { union { struct { uint8_t Version : 6; /**< SPI Version */ @@ -280,7 +280,7 @@ *! \struct ADMW_SPI_Vendor_L_Struct *! \brief Vendor ID Low Register bit field structure * ========================================================================== */ -typedef struct _ADMW_SPI_Vendor_L_t { +typedef struct SPI_Vendor_L_t { union { struct { uint8_t VID : 8; /**< VID[7:0] Analog Devices Vendor ID */ @@ -300,7 +300,7 @@ *! \struct ADMW_SPI_Vendor_H_Struct *! \brief Vendor ID High Register bit field structure * ========================================================================== */ -typedef struct _ADMW_SPI_Vendor_H_t { +typedef struct SPI_Vendor_H_t { union { struct { uint8_t VID : 8; /**< VID[15:8] Analog Devices Vendor ID */ @@ -320,7 +320,7 @@ *! \struct ADMW_SPI_Stream_Mode_Struct *! \brief Stream Mode Register bit field structure * ========================================================================== */ -typedef struct _ADMW_SPI_Stream_Mode_t { +typedef struct SPI_Stream_Mode_t { union { struct { uint8_t Loop_Count : 8; /**< Sets the Data Byte Count Before Looping to Start Address */ @@ -342,8 +342,8 @@ * ========================================================================= */ typedef enum { - ADMW_SPI_TRANSFER_CONFIG_UPDATE_ON_WRITE = 0, /**< Transfers after each byte/mulit-byte register */ - ADMW_SPI_TRANSFER_CONFIG_UPDATE_ON_ADDRESS_LOOP = 1 /**< Transfers when address loops */ + SPI_TRANSFER_CONFIG_UPDATE_ON_WRITE = 0, /**< Transfers after each byte/mulit-byte register */ + SPI_TRANSFER_CONFIG_UPDATE_ON_ADDRESS_LOOP = 1 /**< Transfers when address loops */ } ADMW_SPI_Transfer_Config_Stream_Mode; @@ -351,7 +351,7 @@ *! \struct ADMW_SPI_Transfer_Config_Struct *! \brief Transfer Config Register bit field structure * ========================================================================== */ -typedef struct _ADMW_SPI_Transfer_Config_t { +typedef struct SPI_Transfer_Config_t { union { struct { uint8_t reserved0 : 1; @@ -375,8 +375,8 @@ * ========================================================================= */ typedef enum { - ADMW_SPI_INTERFACE_CONFIG_C_NORMAL_ACCESS = 0, /**< Normal mode, no access restrictions */ - ADMW_SPI_INTERFACE_CONFIG_C_STRICT_ACCESS = 1 /**< Strict mode, multi-byte registers require all bytes read/written */ + SPI_INTERFACE_CONFIG_C_NORMAL_ACCESS = 0, /**< Normal mode, no access restrictions */ + SPI_INTERFACE_CONFIG_C_STRICT_ACCESS = 1 /**< Strict mode, multi-byte registers require all bytes read/written */ } ADMW_SPI_Interface_Config_C_Strict_Register_Access; @@ -386,8 +386,8 @@ * ========================================================================= */ typedef enum { - ADMW_SPI_INTERFACE_CONFIG_C_DISABLED = 0, /**< CRC Disabled */ - ADMW_SPI_INTERFACE_CONFIG_C_ENABLED = 1 /**< CRC Enabled */ + SPI_INTERFACE_CONFIG_C_DISABLED = 0, /**< CRC Disabled */ + SPI_INTERFACE_CONFIG_C_ENABLED = 1 /**< CRC Enabled */ } ADMW_SPI_Interface_Config_C_CRC_Enable; @@ -395,7 +395,7 @@ *! \struct ADMW_SPI_Interface_Config_C_Struct *! \brief Interface Configuration C Register bit field structure * ========================================================================== */ -typedef struct _ADMW_SPI_Interface_Config_C_t { +typedef struct SPI_Interface_Config_C_t { union { struct { uint8_t CRC_EnableB : 2; /**< Inverted CRC Enable */ @@ -419,7 +419,7 @@ *! \struct ADMW_SPI_Interface_Status_A_Struct *! \brief Interface Status A Register bit field structure * ========================================================================== */ -typedef struct _ADMW_SPI_Interface_Status_A_t { +typedef struct SPI_Interface_Status_A_t { union { struct { uint8_t Address_Invalid_Error : 1; /**< Attempt to Read/Write Non-existent Register Address */ @@ -447,27 +447,16 @@ * ========================================================================= */ typedef enum { - CORE_COMMAND_NOP = 0, /**< No Command */ - CORE_COMMAND_CONVERT = 1, /**< Start ADC Conversions */ - CORE_COMMAND_CONVERT_WITH_RAW = 2, /**< Start Conversions with Added RAW ADC Data */ - CORE_COMMAND_RUN_DIAGNOSTICS = 3, /**< Initiate a Diagnostics Cycle */ - CORE_COMMAND_SELF_CALIBRATION = 4, /**< Initiate a Self-Calibration Cycle */ - CORE_COMMAND_LATCH_CONFIG = 7, /**< Latch Configuration. */ - CORE_COMMAND_LOAD_LUT = 8, /**< Load LUT from FLASH */ - CORE_COMMAND_SAVE_LUT = 9, /**< Save LUT to FLASH */ - CORE_COMMAND_SYSTEM_CHECK = 10, /**< Full Suite of Measurement Diagnostics */ - CORE_COMMAND_CONVERT_FFT = 11, /**< Perform FFTs on Selected Channel(s) */ - CORE_COMMAND_ERASE_EXTERNAL_FLASH = 16, /**< Erase Contents of External Flash */ - CORE_COMMAND_POWER_DOWN = 20, /**< Enter Low Power State */ - CORE_COMMAND_LOAD_CONFIG_1 = 24, /**< Load Registers with Configuration#1 from FLASH */ - CORE_COMMAND_SAVE_CONFIG_1 = 25, /**< Store Current Registers to FLASH Configuration#1 */ - CORE_COMMAND_LOAD_CONFIG_2 = 26, /**< Load Registers with Configuration#2 from FLASH */ - CORE_COMMAND_SAVE_CONFIG_2 = 27, /**< Store Current Registers to FLASH Configuration#2 */ - CORE_COMMAND_LOAD_CONFIG_3 = 28, /**< Load Registers with Configuration#3 from FLASH */ - CORE_COMMAND_SAVE_CONFIG_3 = 29, /**< Store Current Registers to FLASH Configuration#3 */ - CORE_COMMAND_LOAD_CONFIG_4 = 30, /**< Load Registers with Configuration#4 from FLASH */ - CORE_COMMAND_SAVE_CONFIG_4 = 31, /**< Store Current Registers to FLASH Configuration#4 */ - CORE_COMMAND_CALIBRATE_DIGITAL = 32 /**< Performs a Calibration of Digital Sensor, if Supported & Enabled. */ + CORE_COMMAND_NOP = 0, /**< No Command */ + CORE_COMMAND_CONVERT = 1, /**< Start ADC Conversions */ + CORE_COMMAND_CONVERT_WITH_RAW = 2, /**< Start Conversions with Added RAW ADC Data */ + CORE_COMMAND_LATCH_CONFIG = 7, /**< Latch Configuration. */ + CORE_COMMAND_LOAD_LUT = 8, /**< Load LUT from FLASH */ + CORE_COMMAND_SAVE_LUT = 9, /**< Save LUT to FLASH */ + CORE_COMMAND_POWER_DOWN = 20, /**< Enter Low Power State */ + CORE_COMMAND_LOAD_CONFIG_1 = 24, /**< Load Registers with Configuration#1 from FLASH */ + CORE_COMMAND_SAVE_CONFIG_1 = 25, /**< Store Current Registers to FLASH Configuration#1 */ + CORE_COMMAND_CALIBRATE_DIGITAL = 32 /**< Performs a Calibration of Digital Sensor, if Supported & Enabled. */ } CORE_Command_Special_Command; @@ -515,39 +504,6 @@ } CORE_Mode_Drdy_Mode; -/* ========================================================================= - *! \enum CORE_Mode_Calibration_Method - *! \brief Indicates If Calibration is Required on 'Latch' Command (Calibration_Method) Enumerations - * ========================================================================= */ -typedef enum -{ - CORE_MODE_NO_CAL = 0, /**< No Calibration Performed */ - CORE_MODE_DO_CAL = 1 /**< Calibration Performed */ -} CORE_Mode_Calibration_Method; - - -/* ========================================================================= - *! \enum CORE_Mode_FFT_Mode - *! \brief Indicates Single or Multiple Sequence of FFTs (FFT_Mode) Enumerations - * ========================================================================= */ -typedef enum -{ - CORE_MODE_FFT_MODE_SINGLE = 0, /**< Perform Single Sequence of FFT(s) on Selected Channel(s) */ - CORE_MODE_FFT_MODE_CONTINUOUS = 1 /**< Perform Continuous Sequence of FFTs on Selected Channel(s) */ -} CORE_Mode_FFT_Mode; - - -/* ========================================================================= - *! \enum CORE_Mode_Ext_Flash_Store - *! \brief Indicates If Measurement Data Should Be Stored in Flash (Ext_Flash_Store) Enumerations - * ========================================================================= */ -typedef enum -{ - CORE_MODE_EXT_FLASH_NOT_USED = 0, /**< Do Not Use External Flash */ - CORE_MODE_EXT_FLASH_USED = 1 /**< Use External Flash */ -} CORE_Mode_Ext_Flash_Store; - - /* ========================================================================== *! \struct CORE_Mode_Struct *! \brief Operating Mode and DRDY Control Register bit field structure @@ -557,10 +513,7 @@ struct { uint8_t Conversion_Mode : 2; /**< Conversion Mode */ uint8_t Drdy_Mode : 2; /**< Indicates Behavior of DRDY with Respect to FIFO State */ - uint8_t Calibration_Method : 1; /**< Indicates If Calibration is Required on 'Latch' Command */ - uint8_t FFT_Mode : 1; /**< Indicates Single or Multiple Sequence of FFTs */ - uint8_t reserved6 : 1; - uint8_t Ext_Flash_Store : 1; /**< Indicates If Measurement Data Should Be Stored in Flash */ + uint8_t reserved4 : 4; }; uint8_t VALUE8; }; @@ -574,15 +527,14 @@ */ /* ========================================================================= - *! \enum CORE_Power_Config_Power_Mode_ADC - *! \brief ADC Power Mode (Power_Mode_ADC) Enumerations + *! \enum CORE_Power_Config_Power_Mode_MCU + *! \brief MCU Power Mode (Power_Mode_MCU) Enumerations * ========================================================================= */ typedef enum { - CORE_POWER_CONFIG_ADC_LOW_POWER = 0, /**< ADC Low Power Mode */ - CORE_POWER_CONFIG_ADC_MID_POWER = 1, /**< ADC Mid Power Mode */ - CORE_POWER_CONFIG_ADC_FULL_POWER = 2 /**< ADC Full Power Mode */ -} CORE_Power_Config_Power_Mode_ADC; + CORE_POWER_CONFIG_ACTIVE_MODE = 0, /**< Part is fully powered up and either cycling through a sequence or awaiting a configuration */ + CORE_POWER_CONFIG_HIBERNATION = 1 /**< module has entede hibernation mode. All analog circuitry is disabled. All peripherals disabled apart from the Wake-up pin functionality. */ +} CORE_Power_Config_Power_Mode_MCU; /* ========================================================================== @@ -592,8 +544,8 @@ typedef struct CORE_Power_Config_t { union { struct { - uint8_t Power_Mode_ADC : 2; /**< ADC Power Mode */ - uint8_t reserved2 : 6; + uint8_t Power_Mode_MCU : 1; /**< MCU Power Mode */ + uint8_t reserved1 : 7; }; uint8_t VALUE8; }; @@ -607,28 +559,6 @@ */ /* ========================================================================= - *! \enum CORE_Cycle_Control_Cycle_Type - *! \brief Type of Measurement Cycle (Cycle_Type) Enumerations - * ========================================================================= */ -typedef enum -{ - CORE_CYCLE_CONTROL_CYCLE_TYPE_SWITCH = 0, /**< Switch Channels After Every Conversion */ - CORE_CYCLE_CONTROL_CYCLE_TYPE_FULL = 1 /**< Perform Full Number Of Conversions On A Channel Consecutively */ -} CORE_Cycle_Control_Cycle_Type; - - -/* ========================================================================= - *! \enum CORE_Cycle_Control_Filter_Settling - *! \brief Determines ADC Filter Settling in a Multi-Channel Sequence (Filter_Settling) Enumerations - * ========================================================================= */ -typedef enum -{ - CORE_CYCLE_CONTROL_FILTER_SETTLING_SETTLED = 0, /**< ADC Result Fully Settles for Every Output */ - CORE_CYCLE_CONTROL_FILTER_SETTLING_FAST = 1 /**< ADC Result Appears at Higher Update Rate for Consecutive Conversions */ -} CORE_Cycle_Control_Filter_Settling; - - -/* ========================================================================= *! \enum CORE_Cycle_Control_Cycle_Time_Units *! \brief Units for Cycle Time (Cycle_Time_Units) Enumerations * ========================================================================= */ @@ -648,8 +578,7 @@ union { struct { uint16_t Cycle_Time : 12; /**< Duration of a Full Measurement Cycle */ - uint16_t Cycle_Type : 1; /**< Type of Measurement Cycle */ - uint16_t Filter_Settling : 1; /**< Determines ADC Filter Settling in a Multi-Channel Sequence */ + uint16_t reserved12 : 2; uint16_t Cycle_Time_Units : 2; /**< Units for Cycle Time */ }; uint16_t VALUE16; @@ -738,13 +667,14 @@ union { struct { uint16_t Diag_Checksum_Error : 1; /**< Indicates Error on Internal Checksum Calculations */ - uint16_t Diag_Comms_Error : 1; /**< Indicates Error on Internal Device Communications */ - uint16_t Diag_Supply_Monitor_Error : 1; /**< Indicates Low Voltage on Internal Supply Voltages */ - uint16_t Diag_Supply_Cap_Error : 1; /**< Indicates Fault on Internal Supply Regulator Capacitor */ - uint16_t reserved4 : 8; - uint16_t Diag_Conversion_Error : 1; /**< Indicates Error During Internal ADC Conversions */ - uint16_t Diag_Calibration_Error : 1; /**< Indicates Error During Internal Device Calibrations */ - uint16_t reserved14 : 2; + uint16_t reserved1 : 7; + uint16_t Diag_Ainm_UV_Error : 1; /**< Indicates Under-Voltage Error on Negative Analog Input */ + uint16_t Diag_Ainm_OV_Error : 1; /**< Indicates Over-Voltage Error on Negative Analog Input */ + uint16_t Diag_Ainp_UV_Error : 1; /**< Indicates Under-Voltage Error on Positive Analog Input */ + uint16_t Diag_Ainp_OV_Error : 1; /**< Indicates Over-Voltage Error on Positive Analog Input */ + uint16_t Diag_Conversion_Error : 1; /**< Indicates Error During Internal ADC Conversions */ + uint16_t Diag_Calibration_Error : 1; /**< Indicates Error During Internal Device Calibrations */ + uint16_t reserved14 : 2; }; uint16_t VALUE16; }; @@ -776,10 +706,7 @@ uint16_t Alert_Ch9 : 1; /**< Indicates Channel Alert is Active */ uint16_t Alert_Ch10 : 1; /**< Indicates Channel Alert is Active */ uint16_t Alert_Ch11 : 1; /**< Indicates Channel Alert is Active */ - uint16_t Alert_Ch12 : 1; /**< Indicates Channel Alert is Active */ - uint16_t Alert_Ch13 : 1; /**< Indicates Channel Alert is Active */ - uint16_t Alert_Ch14 : 1; /**< Indicates Channel Alert is Active */ - uint16_t Alert_Ch15 : 1; /**< Indicates Channel Alert is Active */ + uint16_t reserved12 : 4; }; uint16_t VALUE16; }; @@ -802,12 +729,7 @@ uint16_t reserved0 : 1; uint16_t LUT_Error : 1; /**< Indicates Error with One or More Look-Up-Tables */ uint16_t Configuration_Error : 1; /**< Indicates Error with Programmed Configuration */ - uint16_t Temperature_Alert_Hi : 1; /**< Indicates Device Temperature High Alert */ - uint16_t Temperature_Alert_Lo : 1; /**< Indicates Device Temperature Low Alert */ - uint16_t Temperature_Alarm_Hi : 1; /**< Indicates Device Temperature High Alarm */ - uint16_t Temperature_Alarm_Lo : 1; /**< Indicates Device Temperature Low Alarm */ - uint16_t Ext_Flash_Error : 1; /**< Indicates with External Flash Memory */ - uint16_t reserved8 : 8; + uint16_t reserved3 : 13; }; uint16_t VALUE16; }; @@ -890,43 +812,43 @@ /*@}*/ -/** @defgroup External_Reference1 External Reference Information (External_Reference1) Register - * External Reference Information (External_Reference1) Register. +/** @defgroup External_Reference_Resistor External Reference Information (External_Reference_Resistor) Register + * External Reference Information (External_Reference_Resistor) Register. * @{ */ /* ========================================================================== - *! \struct CORE_External_Reference1_Struct + *! \struct CORE_External_Reference_Resistor_Struct *! \brief External Reference Information Register bit field structure * ========================================================================== */ -typedef struct CORE_External_Reference1_t { +typedef struct CORE_External_Reference_Resistor_t { union { struct { float Ext_Refin1_Value; /**< Refin1 Value */ }; float VALUE32; }; -} CORE_External_Reference1_t; +} CORE_External_Reference_Resistor_t; /*@}*/ -/** @defgroup External_Reference2 External Reference Information (External_Reference2) Register - * External Reference Information (External_Reference2) Register. +/** @defgroup External_Voltage_Reference External Reference Information (External_Voltage_Reference) Register + * External Reference Information (External_Voltage_Reference) Register. * @{ */ /* ========================================================================== - *! \struct CORE_External_Reference2_Struct + *! \struct CORE_External_Voltage_Reference_Struct *! \brief External Reference Information Register bit field structure * ========================================================================== */ -typedef struct CORE_External_Reference2_t { +typedef struct CORE_External_Voltage_Reference_t { union { struct { float Ext_Refin2_Value; /**< Refin2 Value */ }; float VALUE32; }; -} CORE_External_Reference2_t; +} CORE_External_Voltage_Reference_t; /*@}*/ @@ -948,17 +870,6 @@ } CORE_Diagnostics_Control_Diag_OSD_Freq; -/* ========================================================================= - *! \enum CORE_Diagnostics_Control_Temperarure_Alarm_Action - *! \brief Determines Output in Response to Temperature Alarm (Temperarure_Alarm_Action) Enumerations - * ========================================================================= */ -typedef enum -{ - CORE_DIAGNOSTICS_CONTROL_TEMPERATURE_ALARM_NAN = 0, /**< Sensor Output Equals Not-A-Number in Response to Temperature Alarm */ - CORE_DIAGNOSTICS_CONTROL_TEMPERATURE_ALARM_OUTPUT_ACTIVE = 1 /**< Sensor Output is not Clamped to Not-A-Number in Response to Temperature Alarm */ -} CORE_Diagnostics_Control_Temperarure_Alarm_Action; - - /* ========================================================================== *! \struct CORE_Diagnostics_Control_Struct *! \brief Diagnostic Control Register bit field structure @@ -969,8 +880,7 @@ uint16_t Diag_Global_En : 1; /**< Diagnostics Global Enable */ uint16_t Diag_Meas_En : 1; /**< Diagnostics Measure Enable */ uint16_t Diag_OSD_Freq : 2; /**< Diagnostics Open Sensor Detect Frequency */ - uint16_t Temperarure_Alarm_Action : 1; /**< Determines Output in Response to Temperature Alarm */ - uint16_t reserved5 : 11; + uint16_t reserved4 : 12; }; uint16_t VALUE16; }; @@ -1018,81 +928,6 @@ /*@}*/ -/** @defgroup FFT_Config FFT Configuration (FFT_Config) Register - * FFT Configuration (FFT_Config) Register. - * @{ - */ - -/* ========================================================================= - *! \enum CORE_FFT_Config_FFT_Num_Bins - *! \brief Indicates Number of Bins in FFT (FFT_Num_Bins) Enumerations - * ========================================================================= */ -typedef enum -{ - CORE_FFT_CONFIG_FFT_BINS_256 = 0, /**< FFT Size 256 */ - CORE_FFT_CONFIG_FFT_BINS_512 = 1, /**< FFT Size 512 */ - CORE_FFT_CONFIG_FFT_BINS_1024 = 2, /**< FFT Size 1024 */ - CORE_FFT_CONFIG_FFT_BINS_2048 = 3 /**< FFT Size 2048 */ -} CORE_FFT_Config_FFT_Num_Bins; - - -/* ========================================================================= - *! \enum CORE_FFT_Config_FFT_Window - *! \brief Indicates Window Type for FFT (FFT_Window) Enumerations - * ========================================================================= */ -typedef enum -{ - CORE_FFT_CONFIG_FFT_WINDOW_NONE = 0, /**< No Window */ - CORE_FFT_CONFIG_FFT_WINDOW_HANN = 1, /**< Hann Window */ - CORE_FFT_CONFIG_FFT_WINDOW_BLACKMANN_HARRIS = 2, /**< Blackman-Harris-Nuttall Window */ - CORE_FFT_CONFIG_FFT_WINDOW_TBD = 3 /**< Reserved */ -} CORE_FFT_Config_FFT_Window; - - -/* ========================================================================= - *! \enum CORE_FFT_Config_FFT_Output - *! \brief Indicates FFT Output Format (FFT_Output) Enumerations - * ========================================================================= */ -typedef enum -{ - CORE_FFT_CONFIG_FFT_OUTPUT_FULL = 0, /**< N/2-Term Amplitude Response */ - CORE_FFT_CONFIG_FFT_OUTPUT_MAX16 = 1, /**< Bin-Number and Amplitude of 16 Highest Peaks of Amplitude Response */ - CORE_FFT_CONFIG_FFT_OUTPUT_FULL_WITH_RAW = 2 /**< N/2-Term Amplitude Response Plus N Raw ADC Samples */ -} CORE_FFT_Config_FFT_Output; - - -/* ========================================================================= - *! \enum CORE_FFT_Config_FFT_Num_Channels - *! \brief Indicates Number of Channels for FFT (FFT_Num_Channels) Enumerations - * ========================================================================= */ -typedef enum -{ - CORE_FFT_CONFIG_FFT_CHANS_1 = 0, /**< One FFT Channel */ - CORE_FFT_CONFIG_FFT_CHANS_2 = 1, /**< Two FFT Channels */ - CORE_FFT_CONFIG_FFT_CHANS_3 = 2, /**< Three FFT Channels */ - CORE_FFT_CONFIG_FFT_CHANS_4 = 3 /**< Four FFT Channels */ -} CORE_FFT_Config_FFT_Num_Channels; - - -/* ========================================================================== - *! \struct CORE_FFT_Config_Struct - *! \brief FFT Configuration Register bit field structure - * ========================================================================== */ -typedef struct CORE_FFT_Config_t { - union { - struct { - uint32_t FFT_Num_Bins : 2; /**< Indicates Number of Bins in FFT */ - uint32_t FFT_Window : 2; /**< Indicates Window Type for FFT */ - uint32_t FFT_Output : 2; /**< Indicates FFT Output Format */ - uint32_t FFT_Num_Channels : 2; /**< Indicates Number of Channels for FFT */ - uint32_t reserved8 : 24; - }; - uint32_t VALUE32; - }; -} CORE_FFT_Config_t; - -/*@}*/ - /** @defgroup Advanced_Sensor_Access Enables Access to Advanced Sensor Configuration (Advanced_Sensor_Access) Register * Enables Access to Advanced Sensor Configuration (Advanced_Sensor_Access) Register. * @{ @@ -1186,66 +1021,6 @@ /*@}*/ -/** @defgroup Ext_Flash_Index Start Position (Sample No.) for Retrieval of Ext. Flash Data (Ext_Flash_Index) Register - * Start Position (Sample No.) for Retrieval of Ext. Flash Data (Ext_Flash_Index) Register. - * @{ - */ - -/* ========================================================================== - *! \struct CORE_Ext_Flash_Index_Struct - *! \brief Start Position (Sample No.) for Retrieval of Ext. Flash Data Register bit field structure - * ========================================================================== */ -typedef struct CORE_Ext_Flash_Index_t { - union { - struct { - uint32_t Ext_Flash_Index : 32; /**< Start Position (Sample No.) for Retrieval of Ext. Flash Data */ - }; - uint32_t VALUE32; - }; -} CORE_Ext_Flash_Index_t; - -/*@}*/ - -/** @defgroup Ext_Flash_Sample_Count Indicates How Many Samples Stored in External Flash (Ext_Flash_Sample_Count) Register - * Indicates How Many Samples Stored in External Flash (Ext_Flash_Sample_Count) Register. - * @{ - */ - -/* ========================================================================== - *! \struct CORE_Ext_Flash_Sample_Count_Struct - *! \brief Indicates How Many Samples Stored in External Flash Register bit field structure - * ========================================================================== */ -typedef struct CORE_Ext_Flash_Sample_Count_t { - union { - struct { - uint32_t Ext_Flash_Sample_Count : 32; /**< Indicates How Many Samples Stored in External Flash */ - }; - uint32_t VALUE32; - }; -} CORE_Ext_Flash_Sample_Count_t; - -/*@}*/ - -/** @defgroup Ext_Flash_Data Data Read Back from External Flash (Ext_Flash_Data) Register - * Data Read Back from External Flash (Ext_Flash_Data) Register. - * @{ - */ - -/* ========================================================================== - *! \struct CORE_Ext_Flash_Data_Struct - *! \brief Data Read Back from External Flash Register bit field structure - * ========================================================================== */ -typedef struct CORE_Ext_Flash_Data_t { - union { - struct { - uint8_t Ext_Flash_Data : 8; /**< Data Read Back from External Flash */ - }; - uint8_t VALUE8; - }; -} CORE_Ext_Flash_Data_t; - -/*@}*/ - /** @defgroup Revision Hardware, Firmware Revision (Revision) Register * Hardware, Firmware Revision (Revision) Register. * @{ @@ -1294,17 +1069,6 @@ * @{ */ -/* ========================================================================= - *! \enum CORE_Channel_Options_FFT_Enable_Ch - *! \brief Indicates Channel to Be Used for FFT (FFT_Enable_Ch) Enumerations - * ========================================================================= */ -typedef enum -{ - CORE_CHANNEL_OPTIONS_NO_FFT = 0, /**< FFT Will not be Performed on This Channel */ - CORE_CHANNEL_OPTIONS_DO_FFT = 1 /**< FFT Will be Performed on This Channel */ -} CORE_Channel_Options_FFT_Enable_Ch; - - /* ========================================================================== *! \struct CORE_Channel_Options_Struct *! \brief Position of Channel Within Sequence and Enable for FFT Register bit field structure @@ -1313,8 +1077,7 @@ union { struct { uint8_t Channel_Priority : 4; /**< Indicates Priority or Position of This Channel in Sequence */ - uint8_t reserved4 : 3; - uint8_t FFT_Enable_Ch : 1; /**< Indicates Channel to Be Used for FFT */ + uint8_t reserved4 : 4; }; uint8_t VALUE8; }; @@ -1333,164 +1096,35 @@ * ========================================================================= */ typedef enum { - CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_T_DEF_L1 = 0, /**< Thermocouple T-Type Sensor Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_J_DEF_L1 = 1, /**< Thermocouple J-Type Sensor Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_K_DEF_L1 = 2, /**< Thermocouple K-Type Sensor Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_1_DEF_L2 = 8, /**< Thermocouple Sensor 1 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_2_DEF_L2 = 9, /**< Thermocouple Sensor 2 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_3_DEF_L2 = 10, /**< Thermocouple Sensor 3 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_4_DEF_L2 = 11, /**< Thermocouple Sensor 4 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_T_ADV_L1 = 16, /**< Thermocouple T-Type Sensor Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_J_ADV_L1 = 17, /**< Thermocouple J-Type Sensor Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_K_ADV_L1 = 18, /**< Thermocouple K-Type Sensor Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_1_ADV_L2 = 24, /**< Thermocouple Sensor 1 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_2_ADV_L2 = 25, /**< Thermocouple Sensor 2 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_3_ADV_L2 = 26, /**< Thermocouple Sensor 3 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_4_ADV_L2 = 27, /**< Thermocouple Sensor 4 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT100_DEF_L1 = 32, /**< RTD 2 Wire PT100 Sensor Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT1000_DEF_L1 = 33, /**< RTD 2 Wire PT1000 Sensor Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_RTD_2W_1_DEF_L2 = 40, /**< RTD 2 Wire Sensor 1 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_2W_2_DEF_L2 = 41, /**< RTD 2 Wire Sensor 2 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_2W_3_DEF_L2 = 42, /**< RTD 2 Wire Sensor 3 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_2W_4_DEF_L2 = 43, /**< RTD 2 Wire Sensor 4 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT100_ADV_L1 = 48, /**< RTD 2 Wire PT100 Sensor Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT1000_ADV_L1 = 49, /**< RTD 2 Wire PT1000 Sensor Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_RTD_2W_1_ADV_L2 = 56, /**< RTD 2 Wire Sensor 1 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_2W_2_ADV_L2 = 57, /**< RTD 2 Wire Sensor 2 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_2W_3_ADV_L2 = 58, /**< RTD 2 Wire Sensor 3 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_2W_4_ADV_L2 = 59, /**< RTD 2 Wire Sensor 4 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT100_DEF_L1 = 64, /**< RTD 3 Wire PT100 Sensor Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT1000_DEF_L1 = 65, /**< RTD 3 Wire PT1000 Sensor Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_RTD_3W_1_DEF_L2 = 72, /**< RTD 3 Wire Sensor 1 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_3W_2_DEF_L2 = 73, /**< RTD 3 Wire Sensor 2 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_3W_3_DEF_L2 = 74, /**< RTD 3 Wire Sensor 3 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_3W_4_DEF_L2 = 75, /**< RTD 3 Wire Sensor 4 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT100_ADV_L1 = 80, /**< RTD 3 Wire PT100 Sensor Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT1000_ADV_L1 = 81, /**< RTD 3 Wire PT1000 Sensor Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_RTD_3W_1_ADV_L2 = 88, /**< RTD 3 Wire Sensor 1 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_3W_2_ADV_L2 = 89, /**< RTD 3 Wire Sensor 2 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_3W_3_ADV_L2 = 90, /**< RTD 3 Wire Sensor 3 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_3W_4_ADV_L2 = 91, /**< RTD 3 Wire Sensor 4 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT100_DEF_L1 = 96, /**< RTD 4 Wire PT100 Sensor Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT1000_DEF_L1 = 97, /**< RTD 4 Wire PT1000 Sensor Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_RTD_4W_1_DEF_L2 = 104, /**< RTD 4 Wire Sensor 1 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_4W_2_DEF_L2 = 105, /**< RTD 4 Wire Sensor 2 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_4W_3_DEF_L2 = 106, /**< RTD 4 Wire Sensor 3 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_4W_4_DEF_L2 = 107, /**< RTD 4 Wire Sensor 4 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT100_ADV_L1 = 112, /**< RTD 4 Wire PT100 Sensor Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT1000_ADV_L1 = 113, /**< RTD 4 Wire PT1000 Sensor Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_RTD_4W_1_ADV_L2 = 120, /**< RTD 4 Wire Sensor 1 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_4W_2_ADV_L2 = 121, /**< RTD 4 Wire Sensor 2 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_4W_3_ADV_L2 = 122, /**< RTD 4 Wire Sensor 3 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_RTD_4W_4_ADV_L2 = 123, /**< RTD 4 Wire Sensor 4 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_THERMISTOR_A_10K_DEF_L1 = 128, /**< Thermistor Type A 10kOhm Sensor Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_THERMISTOR_B_10K_DEF_L1 = 129, /**< Thermistor Type B 10kOhm Sensor Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_THERMISTOR_1_DEF_L2 = 136, /**< Thermistor Sensor 1 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_THERMISTOR_2_DEF_L2 = 137, /**< Thermistor Sensor 2 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_THERMISTOR_3_DEF_L2 = 138, /**< Thermistor Sensor 3 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_THERMISTOR_4_DEF_L2 = 139, /**< Thermistor Sensor 4 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_THERMISTOR_A_10K_ADV_L1 = 144, /**< Thermistor Type A 10kOhm Sensor Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_THERMISTOR_B_10K_ADV_L1 = 145, /**< Thermistor Type B 10kOhm Sensor Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_THERMISTOR_1_ADV_L2 = 152, /**< Thermistor Sensor 1 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_THERMISTOR_2_ADV_L2 = 153, /**< Thermistor Sensor 2 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_THERMISTOR_3_ADV_L2 = 154, /**< Thermistor Sensor 3 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_THERMISTOR_4_ADV_L2 = 155, /**< Thermistor Sensor 4 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_1_DEF_L2 = 168, /**< Bridge 4 Wire Sensor 1 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_2_DEF_L2 = 169, /**< Bridge 4 Wire Sensor 2 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_3_DEF_L2 = 170, /**< Bridge 4 Wire Sensor 3 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_4_DEF_L2 = 171, /**< Bridge 4 Wire Sensor 4 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_1_ADV_L2 = 184, /**< Bridge 4 Wire Sensor 1 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_2_ADV_L2 = 185, /**< Bridge 4 Wire Sensor 2 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_3_ADV_L2 = 186, /**< Bridge 4 Wire Sensor 2 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_4_ADV_L2 = 187, /**< Bridge 4 Wire Sensor 2 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_1_DEF_L2 = 200, /**< Bridge 6 Wire Sensor 1 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_2_DEF_L2 = 201, /**< Bridge 6 Wire Sensor 2 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_3_DEF_L2 = 202, /**< Bridge 6 Wire Sensor 3 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_4_DEF_L2 = 203, /**< Bridge 6 Wire Sensor 4 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_1_ADV_L2 = 216, /**< Bridge 6 Wire Sensor 1 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_2_ADV_L2 = 217, /**< Bridge 6 Wire Sensor 2 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_3_ADV_L2 = 218, /**< Bridge 6 Wire Sensor 3 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_4_ADV_L2 = 219, /**< Bridge 6 Wire Sensor 4 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_DIODE_2C_TYPEA_DEF_L1 = 224, /**< Diode 2 Current Type A Sensor Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_DIODE_3C_TYPEA_DEF_L1 = 225, /**< Diode 3 Current Type A Sensor Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_DIODE_2C_1_DEF_L2 = 232, /**< Diode 2 Current Sensor 1 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_DIODE_3C_1_DEF_L2 = 233, /**< Diode 3 Current Sensor 1 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_DIODE_2C_TYPEA_ADV_L1 = 240, /**< Diode 2 Current Type A Sensor Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_DIODE_3C_TYPEA_ADV_L1 = 241, /**< Diode 3 Current Type A Sensor Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_DIODE_2C_1_ADV_L2 = 248, /**< Diode 2 Current Sensor 1 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_DIODE_3C_1_ADV_L2 = 249, /**< Diode 3 Current Sensor 1 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_MICROPHONE_A_DEF_L1 = 256, /**< Microphone With No External Amplifier Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_MICROPHONE_B_DEF_L1 = 257, /**< Microphone With External Amplifier Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_MICROPHONE_1_DEF_L2 = 264, /**< Microphone With No External Amplifier Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_MICROPHONE_2_DEF_L2 = 265, /**< Microphone With External Amplifier Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_MICROPHONE_A_ADV_L1 = 272, /**< Microphone With No External Amplifier Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_MICROPHONE_B_ADV_L1 = 273, /**< Microphone With External Amplifier Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_MICROPHONE_1_ADV_L2 = 278, /**< Microphone With No External Amplifier Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_MICROPHONE_2_ADV_L2 = 279, /**< Microphone With External Amplifier Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_VOLTAGE = 512, /**< Voltage Input */ - CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_A_DEF_L1 = 544, /**< Voltage Output Pressure Sensor A Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_B_DEF_L1 = 545, /**< Voltage Output Pressure Sensor B Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_1_DEF_L2 = 552, /**< Voltage Output Pressure Sensor 1 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_2_DEF_L2 = 553, /**< Voltage Output Pressure Sensor 2 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_A_ADV_L1 = 560, /**< Voltage Output Pressure Sensor A Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_B_ADV_L1 = 561, /**< Voltage Output Pressure Sensor B Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_1_ADV_L2 = 568, /**< Voltage Output Pressure Sensor 1 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_2_ADV_L2 = 569, /**< Voltage Output Pressure Sensor 2 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_CURRENT = 768, /**< Current Input */ - CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_A_DEF_L1 = 800, /**< Current Output Pressure Sensor A Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_1_DEF_L2 = 808, /**< Current Output Pressure Sensor 1 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_2_DEF_L2 = 809, /**< Current Output Pressure Sensor 2 Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_A_ADV_L1 = 816, /**< Current Output Pressure Sensor A Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_1_ADV_L2 = 824, /**< Current Output Pressure Sensor 1 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_2_ADV_L2 = 825, /**< Current Output Pressure Sensor 2 Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_A_DEF_L1 = 2048, /**< I2C Pressure Sensor A Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_B_DEF_L1 = 2049, /**< I2C Pressure Sensor B Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_A_DEF_L2 = 2056, /**< I2C Pressure Sensor A Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_B_DEF_L2 = 2057, /**< I2C Pressure Sensor B Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_A_ADV_L1 = 2064, /**< I2C Pressure Sensor A Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_B_ADV_L1 = 2065, /**< I2C Pressure Sensor B Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_A_ADV_L2 = 2072, /**< I2C Pressure Sensor A Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_B_ADV_L2 = 2073, /**< I2C Pressure Sensor B Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_A_DEF_L1 = 2112, /**< I2C Humidity Sensor A Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_B_DEF_L1 = 2113, /**< I2C Humidity Sensor B Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_A_DEF_L2 = 2120, /**< I2C Humidity Sensor A Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_B_DEF_L2 = 2121, /**< I2C Humidity Sensor B Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_A_ADV_L1 = 2128, /**< I2C Humidity Sensor A Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_B_ADV_L1 = 2129, /**< I2C Humidity Sensor B Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_A_ADV_L2 = 2136, /**< I2C Humidity Sensor A Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_B_ADV_L2 = 2137, /**< I2C Humidity Sensor B Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_I2C_AMBIENTLIGHT_A_DEF_L1 = 2176, /**< I2C Ambient Light Sensor A Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_I2C_AMBIENTLIGHT_A_DEF_L2 = 2184, /**< I2C Ambient Light Sensor A Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_I2C_AMBIENTLIGHT_A_ADV_L1 = 2192, /**< I2C Ambient Light Sensor A Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_I2C_AMBIENTLIGHT_A_ADV_L2 = 2200, /**< I2C Ambient Light Sensor A Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_SPI_PRESSURE_A_DEF_L1 = 3072, /**< SPI Pressure Sensor A Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_SPI_PRESSURE_A_DEF_L2 = 3080, /**< SPI Pressure Sensor A Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_SPI_PRESSURE_A_ADV_L1 = 3088, /**< SPI Pressure Sensor A Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_SPI_PRESSURE_A_ADV_L2 = 3096, /**< SPI Pressure Sensor A Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_A_DEF_L1 = 3136, /**< SPI Humidity Sensor A Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_B_DEF_L1 = 3137, /**< SPI Humidity Sensor B Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_A_DEF_L2 = 3144, /**< SPI Humidity Sensor A Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_B_DEF_L2 = 3145, /**< SPI Humidity Sensor B Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_A_ADV_L1 = 3152, /**< SPI Humidity Sensor A Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_B_ADV_L1 = 3153, /**< SPI Humidity Sensor B Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_A_ADV_L2 = 3160, /**< SPI Humidity Sensor A Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_B_ADV_L2 = 3161, /**< SPI Humidity Sensor B Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_A_DEF_L1 = 3200, /**< SPI Accelerometer Sensor A 3-Axis Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_B_DEF_L1 = 3201, /**< SPI Accelerometer Sensor B 3-Axis Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_A_DEF_L2 = 3208, /**< SPI Accelerometer Sensor A 3-Axis Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_B_DEF_L2 = 3209, /**< SPI Accelerometer Sensor B 3-Axis Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_A_ADV_L1 = 3216, /**< SPI Accelerometer Sensor A 3-Axis Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_B_ADV_L1 = 3217, /**< SPI Accelerometer Sensor B 3-Axis Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_A_ADV_L2 = 3224, /**< SPI Accelerometer Sensor A 3-Axis Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_B_ADV_L2 = 3225, /**< SPI Accelerometer Sensor B 3-Axis Advanced Level 2 */ - CORE_SENSOR_TYPE_SENSOR_UART_CO2_A_DEF_L1 = 3584, /**< UART CO2 Sensor A Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_UART_CO2_B_DEF_L1 = 3585, /**< UART CO2 Sensor B Defined Level 1 */ - CORE_SENSOR_TYPE_SENSOR_UART_CO2_A_DEF_L2 = 3592, /**< UART CO2 Sensor A Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_UART_CO2_B_DEF_L2 = 3593, /**< UART CO2 Sensor B Defined Level 2 */ - CORE_SENSOR_TYPE_SENSOR_UART_CO2_A_ADV_L1 = 3600, /**< UART CO2 Sensor A Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_UART_CO2_B_ADV_L1 = 3601, /**< UART CO2 Sensor B Advanced Level 1 */ - CORE_SENSOR_TYPE_SENSOR_UART_CO2_A_ADV_L2 = 3608, /**< UART CO2 Sensor A Advanced Level 2 */ - CORE_CYCLE_TYPE_SENSOR_UART_CO2_B_ADV_L2 = 3609 /**< UART CO2 Sensor B Advanced Level 2 */ + CORE_SENSOR_TYPE_THERMOCOUPLE_T = 0, /**< Thermocouple T-Type Sensor Defined Level 1 */ + CORE_SENSOR_TYPE_THERMOCOUPLE_J = 1, /**< Thermocouple J-Type Sensor Defined Level 1 */ + CORE_SENSOR_TYPE_THERMOCOUPLE_K = 2, /**< Thermocouple K-Type Sensor Defined Level 1 */ + CORE_SENSOR_TYPE_RTD_2W_PT100 = 32, /**< RTD 2 Wire PT100 Sensor Defined Level 1 */ + CORE_SENSOR_TYPE_RTD_2W_PT1000 = 33, /**< RTD 2 Wire PT1000 Sensor Defined Level 1 */ + CORE_SENSOR_TYPE_RTD_3W_PT100 = 64, /**< RTD 3 Wire PT100 Sensor Defined Level 1 */ + CORE_SENSOR_TYPE_RTD_3W_PT1000 = 65, /**< RTD 3 Wire PT1000 Sensor Defined Level 1 */ + CORE_SENSOR_TYPE_RTD_4W_PT100 = 96, /**< RTD 4 Wire PT100 Sensor Defined Level 1 */ + CORE_SENSOR_TYPE_RTD_4W_PT1000 = 97, /**< RTD 4 Wire PT1000 Sensor Defined Level 1 */ + CORE_SENSOR_TYPE_THERMISTOR_A_10K = 128, /**< Thermistor Type A 10kOhm Sensor Defined Level 1 */ + CORE_SENSOR_TYPE_THERMISTOR_B_10K = 129, /**< Thermistor Type B 10kOhm Sensor Defined Level 1 */ + CORE_SENSOR_TYPE_BRIDGE_4W_2 = 169, /**< Bridge 4 Wire Sensor 2 Defined Level 2 */ + CORE_SENSOR_TYPE_BRIDGE_6W_1 = 200, /**< Bridge 6 Wire Sensor 1 Defined Level 2 */ + CORE_SENSOR_TYPE_BRIDGE_6W_2 = 201, /**< Bridge 6 Wire Sensor 2 Defined Level 2 */ + CORE_SENSOR_TYPE_DIODE_2C_TYPEA = 224, /**< Diode 2 Current Type A Sensor Defined Level 1 */ + CORE_SENSOR_TYPE_DIODE_3C_TYPEA = 225, /**< Diode 3 Current Type A Sensor Defined Level 1 */ + CORE_SENSOR_TYPE_DIODE_2C_1 = 232, /**< Diode 2 Current Sensor 1 Defined Level 2 */ + CORE_SENSOR_TYPE_DIODE_3C_1 = 233, /**< Diode 3 Current Sensor 1 Defined Level 2 */ + CORE_SENSOR_TYPE_VOLTAGE = 512, /**< Voltage Input */ + CORE_SENSOR_TYPE_VOLTAGE_PRESSURE_A = 544, /**< Voltage Output Pressure Sensor A Defined Level 1 */ + CORE_SENSOR_TYPE_VOLTAGE_PRESSURE_B = 545, /**< Voltage Output Pressure Sensor B Defined Level 1 */ + CORE_SENSOR_TYPE_CURRENT = 768, /**< Current Input */ + CORE_SENSOR_TYPE_I2C_PRESSURE_A = 2048, /**< I2C Pressure Sensor A Defined Level 1 */ + CORE_SENSOR_TYPE_I2C_PRESSURE_B = 2049, /**< I2C Pressure Sensor B Defined Level 1 */ + CORE_SENSOR_TYPE_I2C_HUMIDITY_A = 2112, /**< I2C Humidity Sensor A Defined Level 1 */ + CORE_SENSOR_TYPE_I2C_HUMIDITY_B = 2113, /**< I2C Humidity Sensor B Defined Level 1 */ + CORE_SENSOR_TYPE_SPI_ACCELEROMETER_A = 3200, /**< SPI Accelerometer Sensor A 3-Axis Defined Level 1 */ + CORE_SENSOR_TYPE_SPI_ACCELEROMETER_B = 3201, /**< SPI Accelerometer Sensor B 3-Axis Defined Level 1 */ + CORE_SENSOR_TYPE_CO2_A_DEF = 3584 /**< CO2 Sensor A Defined Level 1 */ } CORE_Sensor_Type_Sensor_Type; @@ -1527,6 +1161,20 @@ CORE_SENSOR_DETAILS_UNITS_DEGF = 3 /**< Degrees F */ } CORE_Sensor_Details_Measurement_Units; +/* ========================================================================= + *! \enum ADMW_CORE_Sensor_Details_LUT_Select + *! \brief Lookup Table Select (LUT_Select) Enumerations + * ========================================================================= */ +typedef enum +{ + CORE_SENSOR_DETAILS_LUT_DEFAULT = 0, /**< Default Lookup Table for Selected Sensor Type */ + CORE_SENSOR_DETAILS_LUT_UNITY = 1, /**< Unity Lookup Table. 1:1 Mapping From Input to Output */ + CORE_SENSOR_DETAILS_LUT_CUSTOM = 2, /**< User Defined Custom Lookup Table. */ + CORE_SENSOR_DETAILS_LUT_RESERVED = 3 /**< Reserved */ +} CORE_Sensor_Details_LUT_Select; + + +/* ========================================================================= /* ========================================================================= *! \enum CORE_Sensor_Details_Reference_Select @@ -1534,15 +1182,11 @@ * ========================================================================= */ typedef enum { - CORE_SENSOR_DETAILS_REF_INT = 0, /**< Internal Reference */ - CORE_SENSOR_DETAILS_REF_AVDD = 1, /**< AVDD */ - CORE_SENSOR_DETAILS_REF_VEXT1 = 2, /**< External Voltage on Refin1 */ - CORE_SENSOR_DETAILS_REF_VEXT2 = 3, /**< External Voltage on Refin2 */ - CORE_SENSOR_DETAILS_REF_RINT1 = 4, /**< Internal Resistor1 */ - CORE_SENSOR_DETAILS_REF_RINT2 = 5, /**< Internal Resistor2 */ - CORE_SENSOR_DETAILS_REF_REXT1 = 6, /**< External Resistor on Refin1 */ - CORE_SENSOR_DETAILS_REF_REXT2 = 7, /**< External Resistor on Refin2 */ - CORE_SENSOR_DETAILS_REF_EXC = 8 /**< Bridge Excitation Voltage */ + CORE_SENSOR_DETAILS_REF_INT = 0, /**< Internal Reference */ + CORE_SENSOR_DETAILS_REF_AVDD = 1, /**< AVDD */ + CORE_SENSOR_DETAILS_REF_VEXT1 = 2, /**< External Voltage on Refin1 */ + CORE_SENSOR_DETAILS_REF_REXT1 = 6, /**< External Resistor on RSENSE+ and RSENSE- */ + CORE_SENSOR_DETAILS_REF_EXC = 8 /**< Bridge Excitation Voltage from VREF+ and VREF- */ } CORE_Sensor_Details_Reference_Select; @@ -1563,6 +1207,19 @@ } CORE_Sensor_Details_PGA_Gain; +/* ========================================================================= + *! \enum CORE_Sensor_Details_RTD_Curve + *! \brief Select RTD Curve for Linearisation (RTD_Curve) Enumerations + * ========================================================================= */ +typedef enum +{ + CORE_SENSOR_DETAILS_EUROPEAN_CURVE = 0, /**< European Curve */ + CORE_SENSOR_DETAILS_AMERICAN_CURVE = 1, /**< American Curve */ + CORE_SENSOR_DETAILS_JAPANESE_CURVE = 2, /**< Japanese Curve */ + CORE_SENSOR_DETAILS_ITS90_CURVE = 3 /**< ITS-90 Curve */ +} CORE_Sensor_Details_RTD_Curve; + + /* ========================================================================== *! \struct CORE_Sensor_Details_Struct *! \brief Sensor Details Register bit field structure @@ -1575,13 +1232,13 @@ uint32_t reserved8 : 8; uint32_t Unity_LUT_Select : 1; /**< Selects Unity Transfer Function Instead of Sensor Default */ uint32_t Do_Not_Publish : 1; /**< Do Not Publish Channel Result */ - uint32_t Reference_Buffer_Disable : 1; /**< Enable or Disable ADC Reference Buffer */ - uint32_t Vbias : 1; /**< Controls ADC Vbias Output */ - uint32_t Reference_Select : 4; /**< Reference Selection */ - uint32_t PGA_Gain : 3; /**< PGA Gain */ - uint32_t reserved27 : 1; - uint32_t Averaging : 3; /**< Number of ADC Results to Average */ - uint32_t Compensation_Disable : 1; /**< Indicates Compensation Data Should Not Be Used */ + uint32_t reserved18 : 1; + uint32_t Vbias : 1; /**< Controls ADC Vbias Output */ + uint32_t Reference_Select : 4; /**< Reference Selection */ + uint32_t PGA_Gain : 3; /**< PGA Gain */ + uint32_t RTD_Curve : 2; /**< Select RTD Curve for Linearisation */ + uint32_t reserved29 : 2; + uint32_t Compensation_Disable : 1; /**< Indicates Compensation Data Should Not Be Used */ }; uint32_t VALUE32; }; @@ -1600,13 +1257,15 @@ * ========================================================================= */ typedef enum { - CORE_CHANNEL_EXCITATION_IEXC_OFF = 0, /**< Disabled */ - CORE_CHANNEL_EXCITATION_IEXC_50UA = 1, /**< 50 \mu;A */ - CORE_CHANNEL_EXCITATION_IEXC_100UA = 2, /**< 100 \mu;A */ - CORE_CHANNEL_EXCITATION_IEXC_250UA = 3, /**< 250 \mu;A */ - CORE_CHANNEL_EXCITATION_IEXC_500UA = 4, /**< 500 \mu;A */ - CORE_CHANNEL_EXCITATION_IEXC_750UA = 5, /**< 750 \mu;A */ - CORE_CHANNEL_EXCITATION_IEXC_1000UA = 6 /**< 1000 \mu;A */ + CORE_CHANNEL_EXCITATION_EXTERNAL = 0, /**< External Current Sourced */ + CORE_CHANNEL_EXCITATION_RESERVED = 1, /**< Reserved */ + CORE_CHANNEL_EXCITATION_IEXC_10UA = 2, /**< 10 \mu;A */ + CORE_CHANNEL_EXCITATION_RESERVED2 = 3, /**< Reserved */ + CORE_CHANNEL_EXCITATION_IEXC_50UA = 4, /**< 50 \mu;A */ + CORE_CHANNEL_EXCITATION_IEXC_100UA = 5, /**< 100 \mu;A */ + CORE_CHANNEL_EXCITATION_IEXC_250UA = 6, /**< 250 \mu;A */ + CORE_CHANNEL_EXCITATION_IEXC_500UA = 7, /**< 500 \mu;A */ + CORE_CHANNEL_EXCITATION_IEXC_1000UA = 8 /**< 1000 \mu;A */ } CORE_Channel_Excitation_IOUT_Excitation_Current; @@ -1616,8 +1275,14 @@ * ========================================================================= */ typedef enum { - CORE_CHANNEL_EXCITATION_IOUT_DIODE_DEFAULT = 0, /**< Default Excitation Current Ratios */ - CORE_CHANNEL_EXCITATION_IOUT_DIODE_MAX = 1 /**< Higher Excitation Current Ratios */ + CORE_CHANNEL_EXCITATION_DIODE_2PT_10UA_100UA = 0, /**< 2 Current measurement 10uA 100uA */ + CORE_CHANNEL_EXCITATION_DIODE_2PT_20UA_160UA = 1, /**< 2 Current measurement 20uA 160uA */ + CORE_CHANNEL_EXCITATION_DIODE_2PT_50UA_300UA = 2, /**< 2 Current measurement 50uA 300uA */ + CORE_CHANNEL_EXCITATION_DIODE_2PT_100UA_600UA = 3, /**< 2 Current measurement 100uA 600uA */ + CORE_CHANNEL_EXCITATION_DIODE_3PT_10UA_50UA_100UA = 4, /**< 3 current measuremet 10uA 50uA 100uA */ + CORE_CHANNEL_EXCITATION_DIODE_3PT_20UA_100UA_160UA = 5, /**< 3 current measuremet 20uA 100uA 160uA */ + CORE_CHANNEL_EXCITATION_DIODE_3PT_50UA_150UA_300UA = 6, /**< 3 current measuremet 50uA 150uA 300uA */ + CORE_CHANNEL_EXCITATION_DIODE_3PT_100UA_300UA_600UA = 7 /**< 3 current measuremet 100uA 300uA 600uA */ } CORE_Channel_Excitation_IOUT_Diode_Ratio; @@ -1628,13 +1293,12 @@ typedef struct CORE_Channel_Excitation_t { union { struct { - uint8_t IOUT_Excitation_Current : 3; /**< Current Source Value */ - uint8_t reserved3 : 2; - uint8_t IOUT_Diode_Ratio : 1; /**< Modify Current Ratios Used for Diode Sensor */ - uint8_t reserved6 : 1; - uint8_t IOUT_Dont_Swap_3Wire : 1; /**< Indicates 3-Wire Excitation Currents Should Not Be Swapped */ + uint16_t IOUT_Excitation_Current : 4; /**< Current Source Value */ + uint16_t reserved4 : 2; + uint16_t IOUT_Diode_Ratio : 3; /**< Modify Current Ratios Used for Diode Sensor */ + uint16_t reserved9 : 7; }; - uint8_t VALUE8; + uint16_t VALUE16; }; } CORE_Channel_Excitation_t; @@ -1673,38 +1337,85 @@ /*@}*/ -/** @defgroup Filter_Select ADC Digital Filter Selection (Filter_Select) Register - * ADC Digital Filter Selection (Filter_Select) Register. +/** @defgroup Measurement_Setup ADC Digital Filter Selection (Measurement_Setup) Register + * ADC Digital Filter Selection (Measurement_Setup) Register. * @{ */ /* ========================================================================= - *! \enum CORE_Filter_Select_ADC_Filter_Type + *! \enum CORE_Measurement_Setup_Custom_Calibration + *! \brief Enables Custom Calibration for Selected Sensor (Custom_Calibration) Enumerations + * ========================================================================= */ +typedef enum +{ + CORE_MEASUREMENT_SETUP_INTERNAL_CALIBRATION = 0, /**< */ + CORE_MEASUREMENT_SETUP_CUSTOM_CALIBRATION = 1 /**< */ +} CORE_Measurement_Setup_Custom_Calibration; + + +/* ========================================================================= + *! \enum CORE_Measurement_Setup_NOTCH_EN_2 + *! \brief Enable Notch 2 Filter Mode (NOTCH_EN_2) Enumerations + * ========================================================================= */ +typedef enum +{ + CORE_MEASUREMENT_SETUP_NOTCH_DIS = 0, /**< Disable Notch Filter */ + CORE_MEASUREMENT_SETUP_NOTCH_EN = 1 /**< Enable Notch 2 Filter option. Places a addtional notch at 1.2X ODR. Can be used for 50 and 60Hz rejection simultaneously */ +} CORE_Measurement_Setup_NOTCH_EN_2; + + +/* ========================================================================= + *! \enum CORE_Measurement_Setup_Chop_Mode + *! \brief Enabled and Disable Chop Mode (Chop_Mode) Enumerations + * ========================================================================= */ +typedef enum +{ + CORE_MEASUREMENT_SETUP_DISABLE_CHOP = 0, /**< Chop Mode Disabled */ + CORE_MEASUREMENT_SETUP_ENABLE_CHOP = 2 /**< Chop Mode Enabled */ +} CORE_Measurement_Setup_Chop_Mode; + + +/* ========================================================================= + *! \enum CORE_Measurement_Setup_ADC_Filter_Type *! \brief ADC Digital Filter Type (ADC_Filter_Type) Enumerations * ========================================================================= */ typedef enum { - CORE_FILTER_SELECT_FILTER_FIR_25SPS = 0, /**< FIR Filter 25 SPS */ - CORE_FILTER_SELECT_FILTER_FIR_20SPS = 1, /**< FIR Filter 20 SPS */ - CORE_FILTER_SELECT_FILTER_SINC4 = 2, /**< Sinc4 Filter */ - CORE_FILTER_SELECT_FILTER_TBD = 3 /**< TBD Filter */ -} CORE_Filter_Select_ADC_Filter_Type; + CORE_MEASUREMENT_SETUP_ENABLE_SINC4 = 0, /**< Enabled SINC4 Filter */ + CORE_MEASUREMENT_SETUP_ENABLE_SINC3 = 1 /**< Enabled SINC3 Filter */ +} CORE_Measurement_Setup_ADC_Filter_Type; + + +/* ========================================================================= + *! \enum CORE_Measurement_Setup_GND_SW + *! \brief GND_SW (GND_SW) Enumerations + * ========================================================================= */ +typedef enum +{ + CORE_MEASUREMENT_SETUP_GND_SW_OPEN = 0, /**< GND_SW Open. The GND SW is not enabled for the sensor measurement */ + CORE_MEASUREMENT_SETUP_GND_SW_CLOSED = 1 /**< GND_SW Closed. The GND SW is enabled for the sensor measurement, bit wiil Remain Closed After the Measurement */ +} CORE_Measurement_Setup_GND_SW; /* ========================================================================== - *! \struct CORE_Filter_Select_Struct + *! \struct CORE_Measurement_Setup_Struct *! \brief ADC Digital Filter Selection Register bit field structure * ========================================================================== */ -typedef struct CORE_Filter_Select_t { +typedef struct CORE_Measurement_Setup_t { union { struct { - uint32_t ADC_FS : 11; /**< ADC Digital Filter Select */ - uint32_t ADC_Filter_Type : 5; /**< ADC Digital Filter Type */ - uint32_t reserved16 : 16; + uint32_t ADC_SF : 7; /**< ADC Digital Filter Select */ + uint32_t Custom_Calibration : 1; /**< Enables Custom Calibration for Selected Sensor */ + uint32_t NOTCH_EN_2 : 1; /**< Enable Notch 2 Filter Mode */ + uint32_t PST_MEAS_EXC_CTRL : 1; /**< Disabled Current Sources After Measurement Has Been Complete */ + uint32_t Chop_Mode : 2; /**< Enabled and Disable Chop Mode */ + uint32_t ADC_Filter_Type : 1; /**< ADC Digital Filter Type */ + uint32_t GND_SW : 2; /**< GND_SW */ + uint32_t reserved15 : 17; }; uint32_t VALUE32; }; -} CORE_Filter_Select_t; +} CORE_Measurement_Setup_t; /*@}*/ @@ -2007,23 +1718,6 @@ /* ========================================================================= - *! \enum CORE_Digital_Sensor_Comms_Uart_Baud - *! \brief Controls Baud Rate for UART Sensors (Uart_Baud) Enumerations - * ========================================================================= */ -typedef enum -{ - CORE_DIGITAL_SENSOR_COMMS_UART_115200 = 0, /**< 115200 bps */ - CORE_DIGITAL_SENSOR_COMMS_UART_57600 = 1, /**< 57600 bps */ - CORE_DIGITAL_SENSOR_COMMS_UART_38400 = 2, /**< 38400 bps */ - CORE_DIGITAL_SENSOR_COMMS_UART_19200 = 3, /**< 19200 bps */ - CORE_DIGITAL_SENSOR_COMMS_UART_9600 = 4, /**< 9600 bps */ - CORE_DIGITAL_SENSOR_COMMS_UART_4800 = 5, /**< 4800 bps */ - CORE_DIGITAL_SENSOR_COMMS_UART_2400 = 6, /**< 2400 bps */ - CORE_DIGITAL_SENSOR_COMMS_UART_1200 = 7 /**< 1200 bps */ -} CORE_Digital_Sensor_Comms_Uart_Baud; - - -/* ========================================================================= *! \enum CORE_Digital_Sensor_Comms_SPI_Mode *! \brief Configuration for Sensor SPI Protocol (SPI_Mode) Enumerations * ========================================================================= */ @@ -2036,24 +1730,6 @@ } CORE_Digital_Sensor_Comms_SPI_Mode; -/* ========================================================================= - *! \enum CORE_Digital_Sensor_Comms_Uart_Mode - *! \brief Configuration for Sensor UART Protocol (Uart_Mode) Enumerations - * ========================================================================= */ -typedef enum -{ - CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8N1 = 0, /**< 8 Data Bits No Parity 1 Stop Bit */ - CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8N2 = 1, /**< 8 Data Bits No Parity 2 Stop Bits */ - CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8N3 = 2, /**< 8 Data Bits No Parity 3 Stop Bits */ - CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8E1 = 4, /**< 8 Data Bits Even Parity 1 Stop Bit */ - CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8E2 = 5, /**< 8 Data Bits Even Parity 2 Stop Bits */ - CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8E3 = 6, /**< 8 Data Bits Even Parity 3 Stop Bits */ - CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8O1 = 8, /**< 8 Data Bits Odd Parity 1 Stop Bit */ - CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8O2 = 9, /**< 8 Data Bits Odd Parity 2 Stop Bits */ - CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8O3 = 10 /**< 8 Data Bits Odd Parity 3 Stop Bits */ -} CORE_Digital_Sensor_Comms_Uart_Mode; - - /* ========================================================================== *! \struct CORE_Digital_Sensor_Comms_Struct *! \brief Digital Sensor Communication Clock Configuration Register bit field structure @@ -2064,9 +1740,9 @@ uint16_t Digital_Sensor_Comms_En : 1; /**< Enable Digital Sensor Comms Register Parameters */ uint16_t SPI_Clock : 4; /**< Controls Clock Frequency for SPI Sensors */ uint16_t I2C_Clock : 2; /**< Controls SCLK Frequency for I2C Sensors */ - uint16_t Uart_Baud : 3; /**< Controls Baud Rate for UART Sensors */ + uint16_t reserved7 : 3; uint16_t SPI_Mode : 2; /**< Configuration for Sensor SPI Protocol */ - uint16_t Uart_Mode : 4; /**< Configuration for Sensor UART Protocol */ + uint16_t reserved12 : 4; }; uint16_t VALUE16; }; @@ -2360,4 +2036,3 @@ #endif #endif -
--- a/inc/admw1001/admw1001_api.h Wed Jun 05 05:39:15 2019 +0000 +++ b/inc/admw1001/admw1001_api.h Sat Jun 15 14:30:49 2019 +0000 @@ -59,6 +59,32 @@ THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,/* +Copyright 2019 (c) Analog Devices, Inc. + +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in + the documentation and/or other materials provided with the + distribution. + - Neither the name of Analog Devices, Inc. nor the names of its + contributors may be used to endorse or promote products derived + from this software without specific prior written permission. + - The use of this software may or may not infringe the patent rights + of one or more patent holders. This license does not release you + from the requirement that you obtain separate licenses from these + patent holders to use this software. + - Use of the software either in source or binary form, must be run + on or directly connected to an Analog Devices Inc. component. + +THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR +IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, +MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR @@ -66,19 +92,18 @@ CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ + */ /*! ****************************************************************************** - * @file: adi_sense_api.h - * @brief: ADSNS1000 Host Library Application Programming Interface (API) + * @file: admw_1001_api.h + * @brief: ADMW1001 Host Library Application Programming Interface (API) *----------------------------------------------------------------------------- */ #ifndef __ADMW1001_API_H__ #define __ADMW1001_API_H__ - #include "inc/admw_types.h" #include "inc/admw_config_types.h" #include "inc/admw_platform.h" @@ -115,6 +140,28 @@ * according to documentation for those registers. */ ADMW_RESULT admw1001_ReadRegister( + ADMW_DEVICE_HANDLE const hDevice, + uint16_t const nAddress, + void * const pData, + unsigned const nLength); +/*! + * @brief Read one or more device registers at the specified debug register address. + * + * @param[in] hDevice ADMW1001 device context handle + * @param[in] nAddress Register map address to read from + * @param[out] pData Pointer to return the register map data + * @param[in] nLength Number of bytes of data to read from the register map + * + * @return Status + * - #ADMW_SUCCESS Call completed successfully. + * + * @details Provides direct byte-level read access to the device register map. + * The size and format of the register(s) must be known. + * + * @note Reads from special "keyhole" or "FIFO" registers will be handled + * according to documentation for those registers. + */ +ADMW_RESULT admw1001_Read_Debug_Register( ADMW_DEVICE_HANDLE const hDevice, uint16_t const nAddress, void * const pData, @@ -123,7 +170,7 @@ /*! * @brief Write one or more device registers at the specified register address. * - * @param[in] hDevice ADISENSE device context handle + * @param[in] hDevice ADMW1001 device context handle * @param[in] nAddress Register map address to read from * @param[out] pData Pointer to return the register map data * @param[in] nLength Number of bytes of data to read from the register map @@ -145,9 +192,29 @@ unsigned const nLength); /*! + * @brief Write one or more device registers at the specified debug register address. + * + * @param[in] hDevice ADMW1001 device context handle + * @param[in] nAddress Register map address to read from + * @param[out] pData Pointer to return the register map data + * @param[in] nLength Number of bytes of data to read from the register map + * + * @return Status + * - #ADMW_SUCCESS Call completed successfully. + * + * @details Provides direct byte-level write access to the device register map. + * The size and format of the register(s) must be known. + * + */ +ADMW_RESULT admw1001_Write_Debug_Register( + ADMW_DEVICE_HANDLE const hDevice, + uint16_t const nAddress, + void * const pData, + unsigned const nLength); +/* * @brief Update power configuration settings on the device. * - * @param[in] hDevice ADISENSE device context handle + * @param[in] hDevice ADMW1001 device context handle * @param[in] pPowerConfig Power configuration details * * @return Status @@ -156,7 +223,7 @@ * @details Translates configuration details provided into device-specific * register settings and updates device configuration registers. * - * @note Settings are not applied until adi_sense_ApplyConfigUpdates() is called + * @note Settings are not applied until admw_ApplyConfigUpdates() is called */ ADMW_RESULT admw1001_SetPowerConfig( ADMW_DEVICE_HANDLE hDevice, @@ -165,7 +232,7 @@ /*! * @brief Update measurement configuration settings on the device. * - * @param[in] hDevice ADISENSE device context handle + * @param[in] hDevice ADMW1001 device context handle * @param[in] pMeasurementConfig Measurement configuration details * * @return Status @@ -174,7 +241,7 @@ * @details Translates configuration details provided into device-specific * register settings and updates device configuration registers. * - * @note Settings are not applied until adi_sense_ApplyConfigUpdates() is called + * @note Settings are not applied until admw_ApplyConfigUpdates() is called */ ADMW_RESULT admw1001_SetMeasurementConfig( ADMW_DEVICE_HANDLE hDevice, @@ -183,7 +250,7 @@ /*! * @brief Update diagnostics configuration settings on the device. * - * @param[in] hDevice ADISENSE device context handle + * @param[in] hDevice ADMW1001 device context handle * @param[in] pDiagnosticsConfig Diagnostics configuration details * * @return Status @@ -192,7 +259,7 @@ * @details Translates configuration details provided into device-specific * register settings and updates device configuration registers. * - * @note Settings are not applied until adi_sense_ApplyConfigUpdates() is called + * @note Settings are not applied until admw_ApplyConfigUpdates() is called */ ADMW_RESULT admw1001_SetDiagnosticsConfig( ADMW_DEVICE_HANDLE hDevice, @@ -201,7 +268,7 @@ /*! * @brief Update channel configuration settings for a specific channel. * - * @param[in] hDevice ADISENSE device context handle + * @param[in] hDevice ADMW1001 device context handle * @param[in] eChannelId Selects the channel to be updated * @param[in] pChannelConfig Channel configuration details * @@ -213,7 +280,7 @@ * Allows individual channel configuration details to be dynamically * adjusted without rewriting the full device configuration. * - * @note Settings are not applied until adi_sense_ApplyConfigUpdates() is called + * @note Settings are not applied until admw_ApplyConfigUpdates() is called */ ADMW_RESULT admw1001_SetChannelConfig( ADMW_DEVICE_HANDLE hDevice, @@ -223,7 +290,7 @@ /*! * @brief Update number of measurements-per-cycle for a specific channel. * - * @param[in] hDevice ADISENSE device context handle + * @param[in] hDevice ADMW1001 device context handle * @param[in] eChannelId Selects the channel to be updated * @param[in] nMeasurementsPerCycle Specifies the number of measurements to be * obtained from this channel in each @@ -238,7 +305,7 @@ * Allows individual channels to be dynamically enabled/disabled, and * measurements-per-cycle to be adjusted. * - * @note Settings are not applied until adi_sense_ApplyConfigUpdates() is called + * @note Settings are not applied until admw_ApplyConfigUpdates() is called */ ADMW_RESULT admw1001_SetChannelCount( ADMW_DEVICE_HANDLE hDevice, @@ -248,7 +315,7 @@ /*! * @brief Update priority level for a specific channel. * - * @param[in] hDevice ADI Sense device context handle + * @param[in] hDevice ADMW1001 device context handle * @param[in] eChannelId Selects the channel to be updated * @param[in] ePriority Specifies the channel priority level * @@ -259,7 +326,7 @@ * register settings and updates device configuration registers. * Allows individual channels to be dynamically re-prioritised. * - * @note Settings are not applied until adi_sense_ApplyConfigUpdates() is called + * @note Settings are not applied until admw_ApplyConfigUpdates() is called */ ADMW_RESULT admw1001_SetChannelPriority( ADMW_DEVICE_HANDLE hDevice, @@ -269,7 +336,7 @@ /*! * @brief Update the measurement threshold limits for a specified channel. * - * @param[in] hDevice ADISENSE device context handle + * @param[in] hDevice ADMW1001 device context handle * @param[in] eChannelId Selects the channel to be updated * @param[in] fHighThresholdLimit Optional maximum threshold value for each * processed sample, to be checked prior to @@ -289,7 +356,7 @@ * register settings and updates device configuration registers. * Allows individual channel thresholds to be dynamically adjusted. * - * @note Settings are not applied until adi_sense_ApplyConfigUpdates() is called + * @note Settings are not applied until admw_ApplyConfigUpdates() is called */ ADMW_RESULT admw1001_SetChannelThresholdLimits( ADMW_DEVICE_HANDLE hDevice, @@ -301,7 +368,7 @@ /*! * @brief Set a sensor specific parameter for a specified channel. * - * @param[in] hDevice ADI Sense device context handle + * @param[in] hDevice ADMW1001 device context handle * @param[in] eChannelId Selects the channel to be updated * @param[in] fSensorParam Sensor specific parameter * @@ -312,7 +379,7 @@ * register settings and updates device configuration registers. * Allows optional sensor-specific parameter to be specified * - * @note Settings are not applied until adi_sense_ApplyConfigUpdates() is called + * @note Settings are not applied until admw_ApplyConfigUpdates() is called */ ADMW_RESULT admw1001_SetSensorParameter( ADMW_DEVICE_HANDLE hDevice, @@ -321,7 +388,7 @@ /*! * @brief Update the extra settling time for a specified channel. * - * @param[in] hDevice ADISENSE device context handle + * @param[in] hDevice ADMW1001 device context handle * @param[in] eChannelId Selects the channel to be updated * @param[in] nSettlingTime A minimum settling time is applied internally for * each channel, based on the sensor type. However, @@ -336,7 +403,7 @@ * register settings and updates device configuration registers. * Allows individual channel settling times to be dynamically adjusted. * - * @note Settings are not applied until adi_sense_ApplyConfigUpdates() is called + * @note Settings are not applied until admw_ApplyConfigUpdates() is called */ ADMW_RESULT admw1001_SetChannelSettlingTime( ADMW_DEVICE_HANDLE hDevice, @@ -347,7 +414,7 @@ /*! * @brief Enable access to advanced sensor configuration options. * - * @param[in] hDevice ADISENSE device context handle + * @param[in] hDevice ADMW1001 device context handle * @param[in] key Key to unlock advanced access * * @return Status @@ -356,7 +423,7 @@ * @details When the correct access key is provided, access to advanced sensor * configuration options and use of advanced sensor types is enabled. * - * @note Settings are not applied until adi_sense_ApplyConfigUpdates() is called + * @note Settings are not applied until admw_ApplyConfigUpdates() is called */ ADMW_RESULT admw1001_SetAdvancedAccess( ADMW_DEVICE_HANDLE const hDevice, @@ -396,7 +463,7 @@ /*! * @brief Write Look-Up Table data to the device memory * - * @param[in] hDevice ADISENSE device context handle + * @param[in] hDevice ADMW1001 device context handle * @param[out] pLutData Pointer to the Look-Up Table data structure * * @return Status @@ -405,7 +472,7 @@ * @details Validates the Look-Up Table data format and loads it into * device memory via dedicated keyhole registers. * - * @note Settings are not applied until adi_sense_ApplyConfigUpdates() is called + * @note Settings are not applied until admw_ApplyConfigUpdates() is called */ ADMW_RESULT admw1001_SetLutData( ADMW_DEVICE_HANDLE const hDevice, @@ -414,7 +481,7 @@ /*! * @brief Write Look-Up Table raw data to the device memory * - * @param[in] hDevice ADISENSE device context handle + * @param[in] hDevice ADMW device context handle * @param[out] pLutData Pointer to the Look-Up Table raw data structure * * @return Status @@ -424,7 +491,7 @@ * loading LUT data from the alternative raw data format. See * @ref admw1001_SetLutData for more information. * - * @note Settings are not applied until adi_sense_ApplyConfigUpdates() is called + * @note Settings are not applied until admw_ApplyConfigUpdates() is called */ ADMW_RESULT admw1001_SetLutDataRaw( ADMW_DEVICE_HANDLE const hDevice, @@ -433,9 +500,9 @@ /*! * @brief Get the number of samples available when DATAREADY status is asserted. * - * @param[in] hDevice ADISENSE device context handle + * @param[in] hDevice ADMW device context handle * @param[in] eMeasurementMode Must be set to the same value used for @ref - * adi_sense_StartMeasurement(). + * admw_StartMeasurement(). * @param[out] peOperatingMode Pointer to return the configured operating mode * @param[out] peDataReadyMode Pointer to return the configured data publishing mode * @param[out] pnSamplesPerDataready Pointer to return the calculated number of samples @@ -470,5 +537,4 @@ * @} */ -#endif /* __ADMW1001_API_H__ */ - +#endif /* __ADMW1001_API_H__ */ \ No newline at end of file
--- a/inc/admw1001/admw1001_config.h Wed Jun 05 05:39:15 2019 +0000 +++ b/inc/admw1001/admw1001_config.h Sat Jun 15 14:30:49 2019 +0000 @@ -1,5 +1,5 @@ /* -Copyright 2018 (c) Analog Devices, Inc. +Copyright 2019 (c) Analog Devices, Inc. All rights reserved. @@ -33,45 +33,6 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* -Copyright (c) 2017 Analog Devices, Inc. - -All rights reserved. - -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. - - Modified versions of the software must be conspicuously marked as such. - - This software is licensed solely and exclusively for use with processors - manufactured by or for Analog Devices, Inc. - - This software may not be combined or merged with other code in any manner - that would cause the software to become subject to terms and conditions - which differ from those listed here. - - Neither the name of Analog Devices, Inc. nor the names of its - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - The use of this software may or may not infringe the patent rights of one - or more patent holders. This license does not release you from the - requirement that you obtain separate licenses from these patent holders - to use this software. - -THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY -EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, -TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, -INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES -(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL -PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING -NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, -EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - /*! ****************************************************************************** * @file: admw1001_config.h @@ -156,43 +117,21 @@ */ } ADMW1001_DATAREADY_MODE; -/*! ADMW1001 calibration mode options */ -typedef enum { - ADMW1001_NO_CALIBRATION = 0, - /*!< No full scale ADC calibration is performed after a latch command is sent. - */ - ADMW1001_DO_CALIBRATION, - /*!< Full scale ADC Calibration is performed after a latch command is sent. - */ -} ADMW1001_CALIBRATION_MODE; - /*! ADMW1001 power mode options */ typedef enum { - ADMW1001_POWER_MODE_LOW = 1, - /*!< Lowest ADC power consumption mode, with lowest conversion rate */ - ADMW1001_POWER_MODE_MID, - /*!< Medium ADC power consumption mode, with medium conversion rate */ - ADMW1001_POWER_MODE_FULL, - /*!< Highest ADC power consumption mode, with highest conversion rate */ + ADMW1001_POWER_MODE_HIBERNATION = 0, + /*!< module has entede hibernation mode. All analog circuitry is disabled. All peripherals disabled apart from the Wake-up pin functionality. */ + ADMW1001_POWER_MODE_ACTIVE, + /*!< Part is fully powered up and either cycling through a sequence or awaiting a configuration */ } ADMW1001_POWER_MODE; -/*! ADMW1001 measurement cycle types */ -typedef enum -{ - ADMW1001_CYCLE_TYPE_SWITCH = 0, - /*!< Switch channels after every conversion */ - ADMW1001_CYCLE_TYPE_FULL = 1 - /*!< Perform full number of requested conversions on a channel - * consecutively before switching to the next channel */ -} ADMW1001_CYCLE_TYPE; - #ifdef __V2_3_CFG_FMT__ /*! ADMW1001 measurement analog filter settling options */ typedef enum { ADMW1001_FILTER_SETTLING_ALWAYS = 0, /*!< Allow full settling time to elapse between every measurement from an analog sensor */ - ADMW1001_FILTER_SETTLING_FAST = 1 + ADMW1001_FILTER_SETTLING_FAST, /*!< Skip settling time between consecutive measurements from an analog sensor */ } ADMW1001_FILTER_SETTLING; #endif @@ -229,7 +168,7 @@ ADMW1001_OPEN_SENSOR_DIAGNOSTICS_PER_100_CYCLES, /*!< No Open-Sensor Detection is performed at intervals of 100 cycles */ ADMW1001_OPEN_SENSOR_DIAGNOSTICS_PER_1000_CYCLES, - /*!< No Open-Sensor Detection is performed at intervals of 1000 cycles */ + /*!< No Open-Sensor Detection is performed at intervals of 1001 cycles */ } ADMW1001_OPEN_SENSOR_DIAGNOSTICS; /*! ADMW1001 analog input signal amplification gain options @@ -237,6 +176,20 @@ * @note applicable only to ADC analog sensor channels */ typedef enum { + ADMW1001_ADC_RTD_CURVE_EUROPEAN = 0, + /*!< EUROPEAN RTD curve used. */ + ADMW1001_ADC_RTD_CURVE_AMERICAN, + /*!< AMERICAN RTD curve used. */ + ADMW1001_ADC_RTD_CURVE_JAPANESE, + /*!< JAPANESE RTD curve used. */ + ADMW1001_ADC_RTD_CURVE_ITS90, + /*!< ITS90 RTD curve used. */ +} ADMW1001_ADC_RTD_CURVE; +/*! ADMW1001 analog input signal amplification gain options + * + * @note applicable only to ADC analog sensor channels + */ +typedef enum { ADMW1001_ADC_GAIN_1X = 0, /*!< no amplification gain */ ADMW1001_ADC_GAIN_2X, @@ -255,14 +208,26 @@ /*!< x128 amplification gain */ } ADMW1001_ADC_GAIN; +/*! ADMW1001 analog sensor excitation state options + * + * @note applicable only to ADC analog sensor channels, and + * specific sensor types + */ +typedef enum { + ADMW1001_ADC_EXC_STATE_ALWAYS_ON, + /*!< Excitation for measurement is always on */ + ADMW1001_ADC_EXC_STATE_CYCLE_POWER, + /*!< Excitation for measurement is active only during measurement */ +} ADMW1001_ADC_EXC_STATE; + /*! ADMW1001 analog sensor excitation current output level options * * @note applicable only to ADC analog sensor channels, and * specific sensor types */ typedef enum { - ADMW1001_ADC_EXC_CURRENT_NONE = 0, - /*!< Excitation current disabled */ + ADMW1001_ADC_EXC_CURRENT_EXTERNAL = 0, + /*!< External excitation is provided */ ADMW1001_ADC_EXC_CURRENT_50uA, /*!< 50uA excitation current enabled */ ADMW1001_ADC_EXC_CURRENT_100uA, @@ -271,8 +236,6 @@ /*!< 250uA excitation current enabled */ ADMW1001_ADC_EXC_CURRENT_500uA, /*!< 500uA excitation current enabled */ - ADMW1001_ADC_EXC_CURRENT_750uA, - /*!< 750uA excitation current enabled */ ADMW1001_ADC_EXC_CURRENT_1000uA, /*!< 1mA excitation current enabled */ } ADMW1001_ADC_EXC_CURRENT; @@ -282,8 +245,22 @@ * @note applicable only to a diode sensor */ typedef enum { - ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_DEFAULT = 0, - ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_MAX, + ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_10UA_100UA = 0, + /**< 2 Current measurement 10uA 100uA */ + ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_20UA_160UA, + /**< 2 Current measurement 20uA 160uA */ + ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_50UA_300UA, + /**< 2 Current measurement 50uA 300uA */ + ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_100UA_600UA, + /**< 2 Current measurement 100uA 600uA */ + ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_10UA_50UA_100UA, + /**< 3 current measuremetn 10uA 50uA 100uA */ + ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_20UA_100UA_160UA, + /**< 3 current measuremetn 20uA 100uA 160uA */ + ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_50UA_150UA_300UA, + /**< 3 current measuremetn 50uA 150uA 300uA */ + ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_100UA_300UA_600UA, + /**< 3 current measuremetn 100uA 300uA 600uA */ } ADMW1001_ADC_EXC_CURRENT_DIODE_RATIO; /*! ADMW1001 analog reference selection options @@ -298,7 +275,7 @@ ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_1, /*!< Internal reference resistor #1 (4320 ohms) is selected */ ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_2, - /*!< Internal reference resistor #2 (10000 ohms) is selected */ + /*!< Internal reference resistor #2 (10010 ohms) is selected */ ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, /*!< Internal ADC voltage reference (2.5V) is selected */ ADMW1001_ADC_REFERENCE_VOLTAGE_AVDD, @@ -331,76 +308,32 @@ * (see @ref ADMW1001_ADC_SENSOR_TYPE) */ } ADMW1001_ADC_REFERENCE_TYPE; +/*! ADMW1001 ADC Reference configuration + * + * @note applicable only to ADC analog sensor channels + */ +typedef enum { + ADMW1001_ADC_GND_SW_OPEN = 0, + /*!< Ground switch not enabled for measurement. */ + ADMW1001_ADC_GND_SW_CLOSED, + /*!< Ground switch closed for measurement. */ +} ADMW1001_ADC_GND_SW; + /*! ADMW1001 analog filter selection options * * @note applicable only to ADC analog sensor channels */ typedef enum { - ADMW1001_ADC_FILTER_SINC4 = 1, + ADMW1001_ADC_FILTER_SINC4 = 0, /*!< SINC4 filter * * @note The number of input samples to be averaged by the filter * must be specified by fs (see @ref ADMW1001_ADC_FILTER_CONFIG). * The fs value affects the output sample rate and settling times * of the ADC */ - ADMW1001_ADC_FILTER_FIR_20SPS, - /*!< FIR post filter, producing a 20sps output sample rate */ - ADMW1001_ADC_FILTER_FIR_25SPS, - /*!< FIR post filter, producing a 25sps output sample rate */ + ADMW1001_ADC_FILTER_SINC3, } ADMW1001_ADC_FILTER_TYPE; -/*! ADMW1001 FFT sequence mode options - * - * @note applicable only for FFT measurement modes - */ -typedef enum { - ADMW1001_FFT_MODE_SINGLE = 0, - /*!< Performs a single sequence of FFTs on selected channels and stops */ - ADMW1001_FFT_MODE_CONTINUOUS, - /*!< Performs continuous sequences of FFTs on selected channels */ -} ADMW1001_FFT_MODE; - -/*! ADMW1001 FFT size options (number of bins) - * - * @note applicable only for FFT measurement modes - */ -typedef enum { - ADMW1001_FFT_SIZE_256 = 0, - /*!< 256 bins */ - ADMW1001_FFT_SIZE_512, - /*!< 512 bins */ - ADMW1001_FFT_SIZE_1024, - /*!< 1024 bins */ - ADMW1001_FFT_SIZE_2048, - /*!< 2048 bins */ -} ADMW1001_FFT_SIZE; - -/*! ADMW1001 FFT window type options - * - * @note applicable only for FFT measurement modes - */ -typedef enum { - ADMW1001_FFT_WINDOW_NONE = 0, - /*!< No Window */ - ADMW1001_FFT_WINDOW_HANN, - /*!< Hann Window */ - ADMW1001_FFT_WINDOW_BLACKMAN_HARRIS, - /*!< Blackman-Harris Window */ -} ADMW1001_FFT_WINDOW; - -/*! ADMW1001 FFT output format options - * - * @note applicable only for FFT measurement modes - */ -typedef enum { - ADMW1001_FFT_OUTPUT_FULL = 0, - /*!< N/2-Term Amplitude Response */ - ADMW1001_FFT_OUTPUT_FULL_WITH_RAW, - /**< N/2-Term Amplitude Response Plus N Raw ADC Samples */ - ADMW1001_FFT_OUTPUT_MAX16, - /*!< Bin-Number and Amplitude of 16 Highest Peaks of Amplitude Response */ -} ADMW1001_FFT_OUTPUT; - /*! ADMW1001 I2C clock speed options * * @note applicable only for I2C sensors @@ -413,56 +346,6 @@ /*!< 400kHz I2C clock speed */ } ADMW1001_DIGITAL_SENSOR_COMMS_I2C_CLOCK_SPEED; -/*! ADMW1001 UART baud rate options - * - * @note applicable only for UART sensors - */ -typedef enum -{ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_BAUD_RATE_115200 = 0, - /*!< 115200 UART baud rate */ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_BAUD_RATE_57600, - /*!< 57600 UART baud rate */ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_BAUD_RATE_38400, - /*!< 38400 UART baud rate */ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_BAUD_RATE_19200, - /*!< 19200 UART baud rate */ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_BAUD_RATE_9600, - /*!< 9600 UART baud rate */ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_BAUD_RATE_4800, - /*!< 4800 UART baud rate */ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_BAUD_RATE_2400, - /*!< 2400 UART baud rate */ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_BAUD_RATE_1200, - /*!< 1200 UART baud rate */ -} ADMW1001_DIGITAL_SENSOR_COMMS_UART_BAUD_RATE; - -/*! ADMW1001 UART line config options - * - * @note applicable only for UART sensors - */ -typedef enum -{ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG_8N1 = 0, - /*!< UART line control 8 data bits / no parity / 1 stop bit */ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG_8N2, - /*!< UART line control 8 data bits / no parity / 2 stop bits */ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG_8N3, - /*!< UART line control 8 data bits / no parity / 3 stop bits */ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG_8E1, - /*!< UART line control 8 data bits / even parity / 1 stop bit */ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG_8E2, - /*!< UART line control 8 data bits / even parity / 2 stop bits */ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG_8E3, - /*!< UART line control 8 data bits / even parity / 3 stop bits */ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG_8O1, - /*!< UART line control 8 data bits / odd parity / 1 stop bit */ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG_8O2, - /*!< UART line control 8 data bits / odd parity / 2 stop bits */ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG_8O3, - /*!< UART line control 8 data bits / odd parity / 3 stop bits */ -} ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG; - /*! ADMW1001 SPI mode options * * @note applicable only for SPI sensors @@ -543,22 +426,16 @@ /*!< Operating mode - specifies how measurement cycles are scheduled */ ADMW1001_DATAREADY_MODE dataReadyMode; /*!< Data read mode - specifies how output samples are stored for reading */ - ADMW1001_CALIBRATION_MODE calibrationMode; - /*!< Calibration mode - specifies if adc calibration is performed after a latch command */ ADMW1001_MULTICYCLE_CONFIG multiCycleConfig; /*!< Multi-Cycle configuration - specifies how bursts of measurement cycles * are scheduled. Applicable only when operatingMode is * ADMW1001_OPERATING_MODE_MULTICYCLE */ - uint32_t cycleInterval; + uint32_t cycleInterval; /*!< Cycle interval - specifies the time interval between the start of each * successive measurement cycle. Applicable only when operatingMode is * not ADMW1001_OPERATING_MODE_SINGLECYCLE */ - ADMW1001_CYCLE_TYPE cycleType; - /*!< Cycle type - specifies how the channel list is traversed with each - * conversion during the cycle. - */ #ifdef __V2_3_CFG_FMT__ ADMW1001_FILTER_SETTLING filterSettling; /*!< Analog filter settling - specifies the policy for settling time @@ -574,13 +451,6 @@ * ADMW1001_ADC_REFERENCE_RESISTOR_EXTERNAL_1 or * ADMW1001_ADC_REFERENCE_VOLTAGE_EXTERNAL_1 * (see @ref ADMW1001_ADC_REFERENCE_TYPE) - */ - float32_t externalRef2Value; - /*!< Resistance/voltage value connected to external reference input #2. - * Applicable only if the selected reference type is - * ADMW1001_ADC_REFERENCE_RESISTOR_EXTERNAL_2 or - * ADMW1001_ADC_REFERENCE_VOLTAGE_EXTERNAL_2 - * (see @ref ADMW1001_ADC_REFERENCE_TYPE) */ bool enableExternalFlash; /*!< Enable the use of external flash memory for storage of samples. @@ -593,6 +463,8 @@ * specific sensor types */ typedef struct { + ADMW1001_ADC_EXC_STATE excitationState; + /*!< Excitation current state */ ADMW1001_ADC_EXC_CURRENT outputLevel; /*!< Excitation current output level */ ADMW1001_ADC_EXC_CURRENT_DIODE_RATIO diodeRatio; @@ -606,9 +478,14 @@ typedef struct { ADMW1001_ADC_FILTER_TYPE type; /*!< Filter type selection */ - uint32_t fs; - /*!< Number of input samples to accumulate and average in the filter. - * Applicable only when type is ADMW1001_ADC_FILTER_SINC4 */ + uint32_t sf; + /*!< SF value used along with filter type to determine speed */ + bool filterChop; + /*!< Enable filter chop */ + bool notch1p2; + /*!< Enable Notch 2 Filter Mode */ + ADMW1001_ADC_GND_SW groundSwitch; + /*!< Option to open or close sensor ground switch */ } ADMW1001_ADC_FILTER_CONFIG; /*! ADMW1001 ADC Referemce configuration @@ -616,10 +493,8 @@ * @note applicable only to ADC analog sensor channels */ typedef struct { - ADMW1001_ADC_REFERENCE_TYPE type; + ADMW1001_ADC_REFERENCE_TYPE type; /*!< Filter type selection */ - bool disableBuffer; - /*!< Option to disable internal ADC reference buffer */ } ADMW1001_ADC_REFERENCE_CONFIG; /*! ADMW1001 ADC analog channel configuration details @@ -629,6 +504,8 @@ typedef struct { ADMW1001_ADC_SENSOR_TYPE sensor; /*!< Sensor type selection */ + ADMW1001_ADC_RTD_CURVE rtdCurve; + /*!< Rtd curve selection */ ADMW1001_ADC_GAIN gain; /*!< ADC Gain selection */ ADMW1001_ADC_EXC_CURRENT_CONFIG current; @@ -637,7 +514,7 @@ /*!< ADC Filter configuration */ ADMW1001_ADC_REFERENCE_CONFIG reference; /*!< ADC Reference configuration */ - bool enableVbias; + bool enableVbias; /*!< Option to enable internal ADC voltage bias */ } ADMW1001_ADC_CHANNEL_CONFIG; @@ -715,10 +592,6 @@ /*!< Optional parameter to configure specific spi mode for spi sensor */ ADMW1001_DIGITAL_SENSOR_COMMS_SPI_CLOCK spiClock; /*!< Optional parameter to configure specific spi clock for spi sensor */ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_BAUD_RATE uartBaudRate; - /*!< Optional parameter to configure specific uart baud rate for uart sensor */ - ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG uartLineConfig; - /*!< Optional parameter to configure specific uart line control for uart sensor */ } ADMW1001_DIGITAL_SENSOR_COMMS; /*! ADMW1001 I2C digital channel configuration details @@ -795,33 +668,11 @@ */ } ADMW1001_SPI_CHANNEL_CONFIG; -/*! ADMW1001 UART digital channel configuration details - * - * @note applicable only to UART digital sensor channels - */ -typedef struct { - ADMW1001_UART_SENSOR_TYPE sensor; - /*!< Sensor type selection */ - ADMW1001_DIGITAL_CALIBRATION_COMMAND digitalCalibrationParam; - /*!< This is used to supply an independently established environmental variable - * that must be used during calibration of a [digital] sensor which a) - * supports calibration and b) expects an environmental parameter. - * An example is a CO2 sensor, which may require the CO2 concentration level - * when performing a calibration - */ - ADMW1001_DIGITAL_SENSOR_COMMS configureComms; - /*!< Optional configuration to setup a user communication config. - * A default configuration will be used if this is not specified. - * Applicable only to specific UART sensor types. - */ -} ADMW1001_UART_CHANNEL_CONFIG; /*! ADMW1001 Measurement Channel configuration details */ typedef struct { bool enableChannel; /*!< Option to include this channel in normal measurement cycles */ - bool enableFFT; - /*!< Option to include this channel in FFT measurement cycles */ bool disablePublishing; /*!< Option to disable publishing of data samples from this channel. The * channel may still be included in measurement cycles, but data samples @@ -829,7 +680,7 @@ * used for channels which are required only as a compensation reference * for another channel (e.g. Cold-Junction Compensation channels). */ - ADMW1001_CHANNEL_ID compensationChannel; + ADMW1001_CHANNEL_ID compensationChannel; /*!< Optional compensation channel. Set to ADMW1001_CHANNEL_ID_NONE if not * required. Typically used for thermocouple sensors that require a * separate measurement of the "cold-junction" temperature, which can be @@ -840,7 +691,7 @@ * fundamental measurement for the sensor (typically mV or Ohms) * would be returned as the measurement result. */ - ADMW1001_MEASUREMENT_UNIT measurementUnit; + ADMW1001_MEASUREMENT_UNIT measurementUnit; /*!< Optional measurement unit selection for conversion results. Applicable * only for certain sensor types. Set to * ADMW1001_MEASUREMENT_UNIT_DEFAULT if not applicable. @@ -887,7 +738,7 @@ * on the sensor type. However, additional settling time (microseconds) * can optionally be specified. Set to 0 if not required. */ - ADMW1001_CHANNEL_PRIORITY priority; + ADMW1001_CHANNEL_PRIORITY priority; /*!< By default, channels are arranged in the measurement sequence based on * ascending order of channel ID. However, a priority-level may be * specified per channel to force a different ordering of the channels, @@ -903,12 +754,10 @@ /*!< I2C channel configuration - applicable only to I2C channels */ ADMW1001_SPI_CHANNEL_CONFIG spiChannelConfig; /*!< SPI channel configuration - applicable only to SPI channels */ - ADMW1001_UART_CHANNEL_CONFIG uartChannelConfig; - /*!< UART channel configuration - applicable only to UART channels */ }; - /*!< Only one of adcChannelConfig, i2cChannelConfig, spiChannelConfig or - * uartChannelConfig is required, depending on the channel designation - * (analog, I2C, SPI or UART) + /*!< Only one of adcChannelConfig, i2cChannelConfig, spiChannelConfig + * is required, depending on the channel designation + * (analog, I2C, SPI) */ } ADMW1001_CHANNEL_CONFIG; @@ -934,18 +783,6 @@ /*!< Option to enable Open-Circuit Detection at a selected cycle interval */ } ADMW1001_DIAGNOSTICS_CONFIG; -/*! ADMW1001 FFT Measurement Mode configuration options */ -typedef struct { - ADMW1001_FFT_MODE mode; - /*!< FFT sequence mode */ - ADMW1001_FFT_SIZE size; - /*!< FFT size selection */ - ADMW1001_FFT_WINDOW window; - /*!< FFT window type selection */ - ADMW1001_FFT_OUTPUT output; - /*!< FFT output type selection */ -} ADMW1001_FFT_CONFIG; - #ifdef __V2_3_CFG_FMT__ typedef uint16_t ADMW1001_ADVANCED_ACCESS_KEY; #endif @@ -957,8 +794,6 @@ ADMW1001_MEASUREMENT_CONFIG measurement; /*!< Measurement configuration details */ ADMW1001_DIAGNOSTICS_CONFIG diagnostics; - /*!< Diagnostics configuration details */ - ADMW1001_FFT_CONFIG fft; /*!< FFT configuration details */ ADMW1001_CHANNEL_CONFIG channels[ADMW1001_MAX_CHANNELS]; /*!< Channel-specific configuration details */ @@ -977,4 +812,3 @@ */ #endif /* __ADMW1001_CONFIG_H__ */ -
--- a/inc/admw1001/admw1001_host_comms.h Wed Jun 05 05:39:15 2019 +0000 +++ b/inc/admw1001/admw1001_host_comms.h Sat Jun 15 14:30:49 2019 +0000 @@ -1,12 +1,43 @@ /* -Copyright (c) 2018 by ADI. This model is the confidential and -proprietary property of ADI and the possession or use of this -file requires a written license. -*/ +Copyright 2019 (c) Analog Devices, Inc. + +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in + the documentation and/or other materials provided with the + distribution. + - Neither the name of Analog Devices, Inc. nor the names of its + contributors may be used to endorse or promote products derived + from this software without specific prior written permission. + - The use of this software may or may not infringe the patent rights + of one or more patent holders. This license does not release you + from the requirement that you obtain separate licenses from these + patent holders to use this software. + - Use of the software either in source or binary form, must be run + on or directly connected to an Analog Devices Inc. component. + +THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR +IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, +MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, +INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR +SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + #ifndef __ADMW1001_HOST_COMMS_H__ #define __ADMW1001_HOST_COMMS_H__ #include "admw_types.h" + /* * The host is expected to transfer a 16-bit command, followed by data bytes, in 2 * separate transfers delineated by the CS signal and a short delay in between. @@ -28,6 +59,9 @@ #define ADMW1001_HOST_COMMS_WRITE_CMD 0x8000 #define ADMW1001_HOST_COMMS_READ_CMD 0x4000 +#define ADMW1001_HOST_COMMS_DEBUG_WRITE_CMD 0x8800 +#define ADMW1001_HOST_COMMS_DEBUG_READ_CMD 0x4800 + /* * The following bytes are sent back to the host when a command is recieved, * to be used by the host to verify that we were ready to receive the command. @@ -42,7 +76,7 @@ #define ADMW1001_HOST_COMMS_XFER_DELAY (60) /*! ADMW1001 Sensor Result bit field structure */ -typedef struct _ADMW1001_Sensor_Result_t { +typedef struct ADMW1001_Sensor_Result_t { union { struct { float32_t Sensor_Result; /**< Linearized and compensated sensor result */ @@ -58,4 +92,3 @@ } ADMW1001_Sensor_Result_t; #endif /* __ADMW1001_HOST_COMMS_H__ */ -
--- a/inc/admw1001/admw1001_lut_data.h Wed Jun 05 05:39:15 2019 +0000 +++ b/inc/admw1001/admw1001_lut_data.h Sat Jun 15 14:30:49 2019 +0000 @@ -1,5 +1,5 @@ /* -Copyright 2017 (c) Analog Devices, Inc. +Copyright 2019 (c) Analog Devices, Inc. All rights reserved. @@ -36,7 +36,7 @@ /*! ****************************************************************************** * @file: - * @brief: Look-Up Table data-type definitions for ADSNS1000 API. + * @brief: Look-Up Table data-type definitions for ADMW1001 API. *----------------------------------------------------------------------------- */ @@ -69,7 +69,7 @@ typedef enum { ADMW1001_LUT_GEOMETRY_RESERVED = 0x00, /**< reserved - for internal use only */ - ADMW1001_LUT_GEOMETRY_COEFFS = 0x01, + ADMW1001_LUT_GEOMETRY_COEFFS = 0x01, /**< 1D/2D equation coefficient list */ ADMW1001_LUT_GEOMETRY_NES_1D = 0x02, /**< 1-dimensional not-equally-spaced look-up table */ @@ -83,49 +83,49 @@ /*! Linearisation equation type */ typedef enum { - ADMW1001_LUT_EQUATION_POLYN, + ADMW1001_LUT_EQUATION_POLYN, /**< Polynomial equation, typically used for Thermocouple and RTD * linearisation */ - ADMW1001_LUT_EQUATION_POLYNEXP, + ADMW1001_LUT_EQUATION_POLYNEXP, /**< Polynomial + exponential equation, typically used for Thermocouple * inverse linearisation */ - ADMW1001_LUT_EQUATION_QUADRATIC, + ADMW1001_LUT_EQUATION_QUADRATIC, /**< Quadratic linearisation equation, typically used for RTD * linearisation */ - ADMW1001_LUT_EQUATION_STEINHART, + ADMW1001_LUT_EQUATION_STEINHART, /**< Steinhart-Hart equation, typically used for Thermistor * linearisation */ - ADMW1001_LUT_EQUATION_LOGARITHMIC, + ADMW1001_LUT_EQUATION_LOGARITHMIC, /**< Beta-based logarithmic equation, typically used for Thermistor * linearisation */ - ADMW1001_LUT_EQUATION_BIVARIATE_POLYN, + ADMW1001_LUT_EQUATION_BIVARIATE_POLYN, /**< Bi-variate polynomial equation, typically used for bridge pressure * sensor linearisation * @note 2nd-degree is the maximum currently supported */ - ADMW1001_LUT_EQUATION_COUNT, + ADMW1001_LUT_EQUATION_COUNT, /**< Enum count value - for internal use only */ - ADMW1001_LUT_EQUATION_LUT, + ADMW1001_LUT_EQUATION_LUT, /**< Hard-coded Look-Up Table - for internal use only */ } ADMW1001_LUT_EQUATION; typedef enum { - ADMW1001_LUT_TC_DIRECTION_FORWARD, + ADMW1001_LUT_TC_DIRECTION_FORWARD, /**< Thermocouple forward (mV to Celsius) linearisation * Use this value by default for non-thermocouple sensors */ - ADMW1001_LUT_TC_DIRECTION_BACKWARD, + ADMW1001_LUT_TC_DIRECTION_BACKWARD, /**< Thermocouple inverse (Celsius to mV) linearisation */ - ADMW1001_LUT_TC_DIRECTION_COUNT, + ADMW1001_LUT_TC_DIRECTION_COUNT, /**< Enum count value - for internal use only */ } ADMW1001_LUT_TC_DIRECTION; /*! Linearisation data vector format */ typedef enum { - ADMW1001_LUT_DATA_TYPE_RESERVED = 0, + ADMW1001_LUT_DATA_TYPE_RESERVED = 0, /**< Reserved - for internal use only */ - ADMW1001_LUT_DATA_TYPE_FLOAT32 = 1, + ADMW1001_LUT_DATA_TYPE_FLOAT32 = 1, /**< Single-precision 32-bit floating-point */ - ADMW1001_LUT_DATA_TYPE_FLOAT64 = 2, + ADMW1001_LUT_DATA_TYPE_FLOAT64 = 2, /**< Double-precision 64-bit floating-point */ } ADMW1001_LUT_DATA_TYPE; @@ -137,7 +137,7 @@ /**< look-up table range - minimum */ float32_t rangeMax; /**< look-up table range - maximum */ - float64_t coeffs[]; + float64_t coeffs[]; /**< C99 flexible array: sorted by ascending exponent in polynomials */ } ADMW1001_LUT_COEFF_LIST; @@ -145,11 +145,11 @@ typedef struct __attribute__((packed, aligned(4))){ uint32_t nElements; /**< number of elements. */ - float32_t initInputValue; + float32_t initInputValue; /**< initial input value, corresponding to first table element */ - float32_t inputValueIncrement; + float32_t inputValueIncrement; /**< interval between successive input values */ - float32_t lut[]; + float32_t lut[]; /**< C99 flexible array */ } ADMW1001_LUT_1D_ES; @@ -317,21 +317,21 @@ /*! LUT data header structure */ typedef struct __attribute__((packed, aligned(4))) { uint32_t signature; - /**< Hard-coded signature value (@ref ADMW1001_LUT_SIGNATURE) */ + /**< Hard-coded signature value (@ref ADMW_LUT_SIGNATURE) */ ADMW1001_LUT_VERSION version; - /**< LUT data format version (@ref ADMW1001_LUT_VERSION) */ + /**< LUT data format version (@ref ADMW_LUT_VERSION) */ uint16_t numTables; /**< Total number of tables */ uint32_t totalLength; /**< Total length (in bytes) of all table descriptors and data * (excluding this header) - * This, plus the header length, must not exceed ADMW1001_LUT_MAX_SIZE + * This, plus the header length, must not exceed ADMW_LUT_MAX_SIZE */ } ADMW1001_LUT_HEADER; /*! LUT data top-level structure */ typedef struct __attribute__((packed, aligned(4))) { - ADMW1001_LUT_HEADER header; + ADMW1001_LUT_HEADER header; /*!< LUT data top-level header structure */ ADMW1001_LUT_TABLE tables[]; /*!< Variable-length array of one-or-more look-up table structures */ @@ -341,10 +341,10 @@ * * @note This is intended to be used for encapsulating the storage of static * LUT data declarations in C files. The rawTableData can be cast - * to the ADMW1001_LUT type for further parsing/processing. + * to the ADMW_LUT type for further parsing/processing. */ typedef struct __attribute__((packed, aligned(4))) { - ADMW1001_LUT_HEADER header; + ADMW1001_LUT_HEADER header; /*!< LUT data top-level header structure */ uint8_t rawTableData[]; /*!< Variable-length byte array of look-up tables in raw binary format */ @@ -359,4 +359,3 @@ */ #endif /* __ADMW1001_LUT_DATA_H__ */ -
--- a/inc/admw1001/admw1001_sensor_types.h Wed Jun 05 05:39:15 2019 +0000 +++ b/inc/admw1001/admw1001_sensor_types.h Sat Jun 15 14:30:49 2019 +0000 @@ -1,5 +1,5 @@ /* -Copyright 2017 (c) Analog Devices, Inc. +Copyright 2019 (c) Analog Devices, Inc. All rights reserved. @@ -54,24 +54,17 @@ /*! ADMW1001 measurement channel identifiers */ typedef enum { ADMW1001_CHANNEL_ID_NONE = -1, - /*!< Used to indicate when no channel is selected (e.g. compensation channel) */ + /*!< Used to indicate when no channel is selected*/ - ADMW1001_CHANNEL_ID_CJC_0 = 0, - /*!< Cold-Juction Compensation channel #0 */ - ADMW1001_CHANNEL_ID_CJC_1, - /*!< Cold-Juction Compensation channel #1 */ - ADMW1001_CHANNEL_ID_SENSOR_0, - /*!< Analog Sensor channel #0 */ - ADMW1001_CHANNEL_ID_SENSOR_1, - /*!< Analog Sensor channel #1 */ - ADMW1001_CHANNEL_ID_SENSOR_2, - /*!< Analog Sensor channel #2 */ - ADMW1001_CHANNEL_ID_SENSOR_3, - /*!< Analog Sensor channel #3 */ - ADMW1001_CHANNEL_ID_VOLTAGE_0, - /*!< Analog 0-10V Voltage Sensor channel #0 */ - ADMW1001_CHANNEL_ID_CURRENT_0, - /*!< Analog 4-20mA Current Sensor channel #0 */ + ADMW1001_CHANNEL_ID_ANALOG_1_UNIVERSAL = 0, + /*!< Universal channel 1 universal channel */ + ADMW1001_CHANNEL_ID_ANALOG_2_UNIVERSAL, + /*!< Universal channel 2 universal channel */ + ADMW1001_CHANNEL_ID_ANALOG_1_DIFFERENTIAL, + /*!< Universal channel 1 differential channel */ + ADMW1001_CHANNEL_ID_ANALOG_2_DIFFERENTIAL, + /*!< Universal channel 2 differential channel */ + ADMW1001_CHANNEL_ID_I2C_0, /*!< Digital I2C Sensor channel #0 */ ADMW1001_CHANNEL_ID_I2C_1, @@ -82,8 +75,6 @@ /*!< Digital SPI Sensor channel #1 */ ADMW1001_CHANNEL_ID_SPI_2, /*!< Digital SPI Sensor channel #2 */ - ADMW1001_CHANNEL_ID_UART, - /*!< Digital UART Sensor channel #0 */ ADMW1001_MAX_CHANNELS, /*!< Maximum number of measurement channels on ADMW1001 */ @@ -416,7 +407,7 @@ * @note For use with Analog Sensor channels only */ ADMW1001_ADC_SENSOR_THERMISTOR_A_10K_DEF_L1 = 128, - /*!< Standard 10kOhm NTC Thermistor temperature sensor with Steinhart–Hart + /*!< Standard 10kOhm NTC Thermistor temperature sensor with Steinhart–Hart * linearisation equation and default configuration options * * @note For use with Analog Sensor channels only @@ -452,7 +443,7 @@ * @note For use with Analog Sensor channels only */ ADMW1001_ADC_SENSOR_THERMISTOR_A_10K_ADV_L1 = 144, - /*!< 10kOhm NTC Thermistor temperature sensor with Steinhart–Hart + /*!< 10kOhm NTC Thermistor temperature sensor with Steinhart–Hart * linearisation equation and advanced configuration options * * @note For use with Analog Sensor channels only @@ -987,64 +978,6 @@ */ } ADMW1001_SPI_SENSOR_TYPE; -/*! ADMW1001 UART digital sensor type options - * - * Select the sensor type that is connected to an UART digital measurement - * channel. - * - * @note These are pre-defined sensors using built-in linearisation data - */ -typedef enum { - ADMW1001_UART_SENSOR_UART_CO2_A_DEF_L1 = 3584, - /*!< COZIR AMB 2,000 ppm CO2 Sensor with default linearisation - * and default configuration options - * - * @note For use with UART Digital Sensor channels only - */ - ADMW1001_UART_SENSOR_UART_CO2_B_DEF_L1 = 3585, - /*!< COZIR LP Miniature 5,000ppm CO2 Sensor with default linearisation - * and default configuration options - * - * @note For use with UART Digital Sensor channels only - */ - ADMW1001_UART_SENSOR_UART_CO2_A_DEF_L2 = 3592, - /*!< COZIR AMB 2,000 ppm CO2 Sensor with user-defined linearisation - * and default configuration options - * - * @note For use with UART Digital Sensor channels only - */ - ADMW1001_UART_SENSOR_UART_CO2_B_DEF_L2 = 3593, - /*!< COZIR LP Miniature 5,000ppm CO2 Sensor with user-defined linearisation - * and default configuration options - * - * @note For use with UART Digital Sensor channels only - */ - ADMW1001_UART_SENSOR_UART_CO2_A_ADV_L1 = 3600, - /*!< COZIR AMB 2,000 ppm CO2 Sensor with default linearisation - * and advanced configuration options - * - * @note For use with UART Digital Sensor channels only - */ - ADMW1001_UART_SENSOR_UART_CO2_B_ADV_L1 = 3601, - /*!< COZIR LP Miniature 5,000ppm CO2 Sensor with default linearisation - * and advanced configuration options - * - * @note For use with UART Digital Sensor channels only - */ - ADMW1001_UART_SENSOR_UART_CO2_A_ADV_L2 = 3608, - /*!< COZIR AMB 2,000 ppm CO2 Sensor with user-defined linearisation - * and advanced configuration options - * - * @note For use with UART Digital Sensor channels only - */ - ADMW1001_UART_SENSOR_UART_CO2_B_ADV_L2 = 3609, - /*!< COZIR LP Miniature 5,000ppm CO2 Sensor with user-defined linearisation - * and advanced configuration options - * - * @note For use with UART Digital Sensor channels only - */ -} ADMW1001_UART_SENSOR_TYPE; - #ifdef __cplusplus } #endif @@ -1054,4 +987,3 @@ */ #endif /* __ADMW1001_SENSOR_TYPES_H__ */ -
--- a/inc/admw_api.h Wed Jun 05 05:39:15 2019 +0000 +++ b/inc/admw_api.h Sat Jun 15 14:30:49 2019 +0000 @@ -1,5 +1,5 @@ /* -Copyright 2017 (c) Analog Devices, Inc. +Copyright 2019 (c) Analog Devices, Inc. All rights reserved. @@ -33,15 +33,15 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* +/*! ****************************************************************************** * @file: admw_api.h * @brief: ADMW Host Library Application Programming Interface (API) *----------------------------------------------------------------------------- */ -#ifndef __ADMW_API_H__ -#define __ADMW_API_H__ +#ifndef _ADMW_API_H__ +#define _ADMW_API_H__ #include "inc/admw_types.h" #include "inc/admw_config_types.h" @@ -101,20 +101,12 @@ /*!< Indicates that a configuration error condition has been detected by the device */ ADMW_DEVICE_STATUS_LUT_ERROR = (1 << 6), /*!< Indicates that a look-up table error condition has been detected by the device */ - ADMW_DEVICE_STATUS_EXT_FLASH_ERROR = (1 << 7), - /*!< Indicates that an external flash memory error condition has been detected by the device */ } ADMW_DEVICE_STATUS_FLAGS; /*! Bit masks (flags) for the different diagnostics status indicators. */ typedef enum { ADMW_DIAGNOSTICS_STATUS_CHECKSUM_ERROR = (1 << 0), /*!< Indicates Error on Internal Checksum Calculations */ - ADMW_DIAGNOSTICS_STATUS_COMMS_ERROR = (1 << 1), - /*!< Indicates Error on Internal Device Communications */ - ADMW_DIAGNOSTICS_STATUS_SUPPLY_MONITOR_ERROR = (1 << 2), - /*!< Indicates Low Voltage on Internal Supply Voltages */ - ADMW_DIAGNOSTICS_STATUS_SUPPLY_CAP_ERROR = (1 << 3), - /*!< Indicates Fault on Internal Supply Regulator Capacitor */ ADMW_DIAGNOSTICS_STATUS_CONVERSION_ERROR = (1 << 8), /*!< Indicates Error During Internal ADC Conversions */ ADMW_DIAGNOSTICS_STATUS_CALIBRATION_ERROR = (1 << 9), @@ -175,7 +167,7 @@ /*!< Device summary status snapshot when the sample was recorded */ uint32_t channelId; /*!< The measurement channel from which this sample was obtained */ - int32_t rawValue; + uint32_t rawValue; /*!< The raw (unprocessed) value obtained directly from the measurement * channel, if available */ @@ -190,27 +182,17 @@ * @ref admw_StartMeasurement */ typedef enum { - ADMW_MEASUREMENT_MODE_HEALTHCHECK = 1, - /*!< In this mode, a special health-check measurement cycle is executed, - * carrying out a single conversion per channel with measurement - * diagnostics enabled, intended for use as a system health check. */ - ADMW_MEASUREMENT_MODE_NORMAL, + ADMW_MEASUREMENT_MODE_NORMAL = 0, /*!< In this mode, normal measurement cycle(s) are executed and data samples * are returned with raw measurement values included. */ ADMW_MEASUREMENT_MODE_OMIT_RAW, /*!< In this mode, normal measurement cycle(s) are executed and data samples * are returned with raw measurement values omitted for efficiency. */ - ADMW_MEASUREMENT_MODE_FFT, - /*!< In this mode, FFT mode measurement cycle(s) are executed and data - * samples are returned based on FFT-specific configuration parameters. */ } ADMW_MEASUREMENT_MODE; /*! Identifiers for the user configuration slots in persistent memory. */ typedef enum { ADMW_FLASH_CONFIG_1, - ADMW_FLASH_CONFIG_2, - ADMW_FLASH_CONFIG_3, - ADMW_FLASH_CONFIG_4, } ADMW_USER_CONFIG_SLOT; @@ -235,7 +217,7 @@ * - #ADMW_INVALID_DEVICE_NUM Invalid device index specified * * @details Configure and initialise the Log interface and the SPI/GPIO - * communication interface to the ADMW module. + * communication interface to the ADISense module. */ ADMW_RESULT admw_Open( unsigned const nDeviceIndex, @@ -697,5 +679,4 @@ * @} */ -#endif /* __ADMW_API_H__ */ - +#endif /* _ADMW_API_H__ */
--- a/inc/admw_config_types.h Wed Jun 05 05:39:15 2019 +0000 +++ b/inc/admw_config_types.h Sat Jun 15 14:30:49 2019 +0000 @@ -1,5 +1,5 @@ /* -Copyright (c) 2017 Analog Devices, Inc. +Copyright (c) 2019 Analog Devices, Inc. All rights reserved. @@ -37,7 +37,7 @@ EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* +/*! ****************************************************************************** * @file: admw_config_types.h * @brief: Type definitions for ADMW API. @@ -61,19 +61,19 @@ /*! A list of supported product identifiers */ typedef enum { ADMW_PRODUCT_ID_ADMW1001 = 0x0020, - /*!< ADMW1001 */ + /*!< ADSNS1000 */ } ADMW_PRODUCT_ID; -/*! ADISENSE Configuration schema version */ +/*! ADMW Configuration schema version */ typedef struct { uint8_t major; /*!< Major version number */ uint8_t minor; /*!< Minor version number */ } ADMW_CONFIG_VERSION_ID; -/*! ADISENSE UUID string length */ +/*! ADMW UUID string length */ #define ADMW_UUID_LEN 36 -/*! ADISENSE global configuration details */ +/*! ADMW global configuration details */ typedef struct { const char configUuid[ADMW_UUID_LEN]; /*!< Optional unique identifier for this configuration */ @@ -84,8 +84,8 @@ union { ADMW1001_CONFIG admw1001; - /*!< ADMW1001 product configuration parameters. Used if productId - * selected is ADMW_PRODUCT_ID_ADMW1001 */ + /*!< ADSNS1000 product configuration parameters. Used if productId + * selected is ADMW_PRODUCT_ID_ADSNS1000 */ }; /*!< Product-specific configuration parameters, selected based on productId. * @note Other product variants may be added here in the future */ @@ -100,4 +100,3 @@ */ #endif /* __ADMW_CONFIG_TYPES_H__ */ -
--- a/multichannel_continuous_config.c Wed Jun 05 05:39:15 2019 +0000 +++ b/multichannel_continuous_config.c Sat Jun 15 14:30:49 2019 +0000 @@ -46,7 +46,7 @@ .productId = ADMW_PRODUCT_ID_ADMW1001, .admw1001 = { .power = { - .powerMode = ADMW1001_POWER_MODE_FULL, + .powerMode = ADMW1001_POWER_MODE_ACTIVE, }, .measurement = { .operatingMode = ADMW1001_OPERATING_MODE_CONTINUOUS, @@ -54,7 +54,7 @@ .cycleInterval = 5000000, }, .channels = { - [ADMW1001_CHANNEL_ID_CJC_0] = { + [ADMW1001_CHANNEL_ID_ANALOG_1_UNIVERSAL] = { .enableChannel = true, .disablePublishing = false, .compensationChannel = ADMW1001_CHANNEL_ID_NONE, @@ -68,39 +68,15 @@ .outputLevel = ADMW1001_ADC_EXC_CURRENT_500uA, }, .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, + .type = ADMW1001_ADC_FILTER_SINC3, }, .reference = { .type = ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_1, - .disableBuffer = false, }, .enableVbias = false, }, }, - [ADMW1001_CHANNEL_ID_CJC_1] = { - .enableChannel = true, - .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_NONE, - .measurementUnit = ADMW1001_MEASUREMENT_UNIT_CELSIUS, - .measurementsPerCycle = 10, - .extraSettlingTime = 0, - .adcChannelConfig = { - .sensor = ADMW1001_ADC_SENSOR_RTD_2WIRE_PT100_DEF_L1, - .gain = ADMW1001_ADC_GAIN_8X, - .current = { - .outputLevel = ADMW1001_ADC_EXC_CURRENT_500uA, - }, - .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, - }, - .reference = { - .type = ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_1, - .disableBuffer = false, - }, - .enableVbias = false, - }, - }, - [ADMW1001_CHANNEL_ID_SENSOR_0] = { + [ADMW1001_CHANNEL_ID_ANALOG_2_UNIVERSAL] = { .enableChannel = true, .disablePublishing = false, .compensationChannel = ADMW1001_CHANNEL_ID_NONE, @@ -114,19 +90,42 @@ .outputLevel = ADMW1001_ADC_EXC_CURRENT_500uA, }, .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, + .type = ADMW1001_CHANNEL_ID_ANALOG_2_UNIVERSAL, }, .reference = { .type = ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_1, - .disableBuffer = false, + }, .enableVbias = false, }, }, - [ADMW1001_CHANNEL_ID_SENSOR_1] = { + [ADMW1001_CHANNEL_ID_ANALOG_1_DIFFERENTIAL] = { .enableChannel = true, .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_CJC_1, + .compensationChannel = ADMW1001_CHANNEL_ID_NONE, + .measurementUnit = ADMW1001_MEASUREMENT_UNIT_CELSIUS, + .measurementsPerCycle = 10, + .extraSettlingTime = 0, + .adcChannelConfig = { + .sensor = ADMW1001_ADC_SENSOR_RTD_2WIRE_PT100_DEF_L1, + .gain = ADMW1001_ADC_GAIN_8X, + .current = { + .outputLevel = ADMW1001_ADC_EXC_CURRENT_500uA, + }, + .filter = { + .type = ADMW1001_ADC_FILTER_SINC3, + }, + .reference = { + .type = ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_1, + + }, + .enableVbias = false, + }, + }, + [ADMW1001_CHANNEL_ID_ANALOG_2_DIFFERENTIAL] = { + .enableChannel = true, + .disablePublishing = false, + .compensationChannel = ADMW1001_CHANNEL_ID_ANALOG_2_UNIVERSAL, .measurementUnit = ADMW1001_MEASUREMENT_UNIT_CELSIUS, .measurementsPerCycle = 10, .extraSettlingTime = 0, @@ -134,93 +133,14 @@ .sensor = ADMW1001_ADC_SENSOR_THERMOCOUPLE_K_DEF_L1, .gain = ADMW1001_ADC_GAIN_32X, .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, - }, - .reference = { - .type = ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, - .disableBuffer = true, - }, - .enableVbias = true, - }, - }, - [ADMW1001_CHANNEL_ID_SENSOR_2] = { - .enableChannel = true, - .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_CJC_0, - .measurementUnit = ADMW1001_MEASUREMENT_UNIT_CELSIUS, - .measurementsPerCycle = 10, - .extraSettlingTime = 0, - .adcChannelConfig = { - .sensor = ADMW1001_ADC_SENSOR_THERMOCOUPLE_T_DEF_L1, - .gain = ADMW1001_ADC_GAIN_32X, - .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, + .type = ADMW1001_ADC_FILTER_SINC3, }, .reference = { .type = ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, - .disableBuffer = true, - }, - .enableVbias = true, - }, - }, - [ADMW1001_CHANNEL_ID_SENSOR_3] = { - .enableChannel = true, - .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_CJC_0, - .measurementUnit = ADMW1001_MEASUREMENT_UNIT_CELSIUS, - .measurementsPerCycle = 10, - .extraSettlingTime = 0, - .adcChannelConfig = { - .sensor = ADMW1001_ADC_SENSOR_THERMOCOUPLE_J_DEF_L1, - .gain = ADMW1001_ADC_GAIN_32X, - .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, - }, - .reference = { - .type = ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, - .disableBuffer = true, }, .enableVbias = true, }, }, - [ADMW1001_CHANNEL_ID_VOLTAGE_0] = { - .enableChannel = true, - .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_NONE, - .measurementsPerCycle = 10, - .extraSettlingTime = 0, - .adcChannelConfig = { - .sensor = ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_A_DEF_L1, - .gain = ADMW1001_ADC_GAIN_2X, - .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, - }, - .reference = { - .type = ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, - .disableBuffer = true, - }, - .enableVbias = false, - }, - }, - [ADMW1001_CHANNEL_ID_CURRENT_0] = { - .enableChannel = true, - .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_NONE, - .measurementsPerCycle = 10, - .extraSettlingTime = 0, - .adcChannelConfig = { - .sensor = ADMW1001_ADC_SENSOR_CURRENT_PRESSURE_A_DEF_L1, - .gain = ADMW1001_ADC_GAIN_2X, - .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, - }, - .reference = { - .type = ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, - .disableBuffer = true, - }, - .enableVbias = false, - }, - }, [ADMW1001_CHANNEL_ID_I2C_0] = { .enableChannel = true, .disablePublishing = false,
--- a/multichannel_multicycle_config.c Wed Jun 05 05:39:15 2019 +0000 +++ b/multichannel_multicycle_config.c Sat Jun 15 14:30:49 2019 +0000 @@ -46,7 +46,7 @@ .productId = ADMW_PRODUCT_ID_ADMW1001, .admw1001 = { .power = { - .powerMode = ADMW1001_POWER_MODE_FULL, + .powerMode = ADMW1001_POWER_MODE_ACTIVE, }, .measurement = { .operatingMode = ADMW1001_OPERATING_MODE_MULTICYCLE, @@ -58,7 +58,7 @@ }, }, .channels = { - [ADMW1001_CHANNEL_ID_CJC_0] = { + [ADMW1001_CHANNEL_ID_ANALOG_1_UNIVERSAL] = { .enableChannel = true, .disablePublishing = false, .compensationChannel = ADMW1001_CHANNEL_ID_NONE, @@ -72,39 +72,15 @@ .outputLevel = ADMW1001_ADC_EXC_CURRENT_500uA, }, .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, + .type = ADMW1001_ADC_FILTER_SINC3, }, .reference = { .type = ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_1, - .disableBuffer = false, }, .enableVbias = false, }, }, - [ADMW1001_CHANNEL_ID_CJC_1] = { - .enableChannel = true, - .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_NONE, - .measurementUnit = ADMW1001_MEASUREMENT_UNIT_CELSIUS, - .measurementsPerCycle = 10, - .extraSettlingTime = 0, - .adcChannelConfig = { - .sensor = ADMW1001_ADC_SENSOR_RTD_2WIRE_PT100_DEF_L1, - .gain = ADMW1001_ADC_GAIN_8X, - .current = { - .outputLevel = ADMW1001_ADC_EXC_CURRENT_500uA, - }, - .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, - }, - .reference = { - .type = ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_1, - .disableBuffer = false, - }, - .enableVbias = false, - }, - }, - [ADMW1001_CHANNEL_ID_SENSOR_0] = { + [ADMW1001_CHANNEL_ID_ANALOG_2_UNIVERSAL] = { .enableChannel = true, .disablePublishing = false, .compensationChannel = ADMW1001_CHANNEL_ID_NONE, @@ -118,19 +94,40 @@ .outputLevel = ADMW1001_ADC_EXC_CURRENT_500uA, }, .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, + .type = ADMW1001_ADC_FILTER_SINC3, }, .reference = { .type = ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_1, - .disableBuffer = false, }, .enableVbias = false, }, }, - [ADMW1001_CHANNEL_ID_SENSOR_1] = { + [ADMW1001_CHANNEL_ID_ANALOG_1_DIFFERENTIAL] = { .enableChannel = true, .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_CJC_1, + .compensationChannel = ADMW1001_CHANNEL_ID_NONE, + .measurementUnit = ADMW1001_MEASUREMENT_UNIT_CELSIUS, + .measurementsPerCycle = 10, + .extraSettlingTime = 0, + .adcChannelConfig = { + .sensor = ADMW1001_ADC_SENSOR_RTD_2WIRE_PT100_DEF_L1, + .gain = ADMW1001_ADC_GAIN_8X, + .current = { + .outputLevel = ADMW1001_ADC_EXC_CURRENT_500uA, + }, + .filter = { + .type = ADMW1001_ADC_FILTER_SINC3, + }, + .reference = { + .type = ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_1, + }, + .enableVbias = false, + }, + }, + [ADMW1001_CHANNEL_ID_ANALOG_2_DIFFERENTIAL] = { + .enableChannel = true, + .disablePublishing = false, + .compensationChannel = ADMW1001_CHANNEL_ID_ANALOG_2_UNIVERSAL, .measurementUnit = ADMW1001_MEASUREMENT_UNIT_CELSIUS, .measurementsPerCycle = 10, .extraSettlingTime = 0, @@ -138,93 +135,14 @@ .sensor = ADMW1001_ADC_SENSOR_THERMOCOUPLE_K_DEF_L1, .gain = ADMW1001_ADC_GAIN_32X, .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, - }, - .reference = { - .type = ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, - .disableBuffer = true, - }, - .enableVbias = true, - }, - }, - [ADMW1001_CHANNEL_ID_SENSOR_2] = { - .enableChannel = true, - .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_CJC_0, - .measurementUnit = ADMW1001_MEASUREMENT_UNIT_CELSIUS, - .measurementsPerCycle = 10, - .extraSettlingTime = 0, - .adcChannelConfig = { - .sensor = ADMW1001_ADC_SENSOR_THERMOCOUPLE_T_DEF_L1, - .gain = ADMW1001_ADC_GAIN_32X, - .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, + .type = ADMW1001_ADC_FILTER_SINC3, }, .reference = { .type = ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, - .disableBuffer = true, - }, - .enableVbias = true, - }, - }, - [ADMW1001_CHANNEL_ID_SENSOR_3] = { - .enableChannel = true, - .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_CJC_0, - .measurementUnit = ADMW1001_MEASUREMENT_UNIT_CELSIUS, - .measurementsPerCycle = 10, - .extraSettlingTime = 0, - .adcChannelConfig = { - .sensor = ADMW1001_ADC_SENSOR_THERMOCOUPLE_J_DEF_L1, - .gain = ADMW1001_ADC_GAIN_32X, - .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, - }, - .reference = { - .type = ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, - .disableBuffer = true, }, .enableVbias = true, }, }, - [ADMW1001_CHANNEL_ID_VOLTAGE_0] = { - .enableChannel = true, - .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_NONE, - .measurementsPerCycle = 10, - .extraSettlingTime = 0, - .adcChannelConfig = { - .sensor = ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_A_DEF_L1, - .gain = ADMW1001_ADC_GAIN_2X, - .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, - }, - .reference = { - .type = ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, - .disableBuffer = true, - }, - .enableVbias = false, - }, - }, - [ADMW1001_CHANNEL_ID_CURRENT_0] = { - .enableChannel = true, - .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_NONE, - .measurementsPerCycle = 10, - .extraSettlingTime = 0, - .adcChannelConfig = { - .sensor = ADMW1001_ADC_SENSOR_CURRENT_PRESSURE_A_DEF_L1, - .gain = ADMW1001_ADC_GAIN_2X, - .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, - }, - .reference = { - .type = ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, - .disableBuffer = true, - }, - .enableVbias = false, - }, - }, [ADMW1001_CHANNEL_ID_I2C_0] = { .enableChannel = true, .disablePublishing = false,
--- a/multichannel_singlecycle_config.c Wed Jun 05 05:39:15 2019 +0000 +++ b/multichannel_singlecycle_config.c Sat Jun 15 14:30:49 2019 +0000 @@ -46,14 +46,14 @@ .productId = ADMW_PRODUCT_ID_ADMW1001, .admw1001 = { .power = { - .powerMode = ADMW1001_POWER_MODE_FULL, + .powerMode = ADMW1001_POWER_MODE_ACTIVE, }, .measurement = { .operatingMode = ADMW1001_OPERATING_MODE_SINGLECYCLE, .dataReadyMode = ADMW1001_DATAREADY_PER_CONVERSION, }, .channels = { - [ADMW1001_CHANNEL_ID_CJC_0] = { + [ADMW1001_CHANNEL_ID_ANALOG_1_UNIVERSAL] = { .enableChannel = true, .disablePublishing = false, .compensationChannel = ADMW1001_CHANNEL_ID_NONE, @@ -67,39 +67,15 @@ .outputLevel = ADMW1001_ADC_EXC_CURRENT_500uA, }, .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, + .type = ADMW1001_ADC_FILTER_SINC3, }, .reference = { .type = ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_1, - .disableBuffer = false, }, .enableVbias = false, }, }, - [ADMW1001_CHANNEL_ID_CJC_1] = { - .enableChannel = true, - .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_NONE, - .measurementUnit = ADMW1001_MEASUREMENT_UNIT_CELSIUS, - .measurementsPerCycle = 10, - .extraSettlingTime = 0, - .adcChannelConfig = { - .sensor = ADMW1001_ADC_SENSOR_RTD_2WIRE_PT100_DEF_L1, - .gain = ADMW1001_ADC_GAIN_8X, - .current = { - .outputLevel = ADMW1001_ADC_EXC_CURRENT_500uA, - }, - .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, - }, - .reference = { - .type = ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_1, - .disableBuffer = false, - }, - .enableVbias = false, - }, - }, - [ADMW1001_CHANNEL_ID_SENSOR_0] = { + [ADMW1001_CHANNEL_ID_ANALOG_2_UNIVERSAL] = { .enableChannel = true, .disablePublishing = false, .compensationChannel = ADMW1001_CHANNEL_ID_NONE, @@ -113,19 +89,40 @@ .outputLevel = ADMW1001_ADC_EXC_CURRENT_500uA, }, .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, + .type = ADMW1001_ADC_FILTER_SINC3, }, .reference = { .type = ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_1, - .disableBuffer = false, }, .enableVbias = false, }, }, - [ADMW1001_CHANNEL_ID_SENSOR_1] = { + [ADMW1001_CHANNEL_ID_ANALOG_1_DIFFERENTIAL] = { .enableChannel = true, .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_CJC_1, + .compensationChannel = ADMW1001_CHANNEL_ID_NONE, + .measurementUnit = ADMW1001_MEASUREMENT_UNIT_CELSIUS, + .measurementsPerCycle = 10, + .extraSettlingTime = 0, + .adcChannelConfig = { + .sensor = ADMW1001_ADC_SENSOR_RTD_2WIRE_PT100_DEF_L1, + .gain = ADMW1001_ADC_GAIN_8X, + .current = { + .outputLevel = ADMW1001_ADC_EXC_CURRENT_500uA, + }, + .filter = { + .type = ADMW1001_ADC_FILTER_SINC3, + }, + .reference = { + .type = ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_1, + }, + .enableVbias = false, + }, + }, + [ADMW1001_CHANNEL_ID_ANALOG_2_DIFFERENTIAL] = { + .enableChannel = true, + .disablePublishing = false, + .compensationChannel = ADMW1001_CHANNEL_ID_ANALOG_2_UNIVERSAL, .measurementUnit = ADMW1001_MEASUREMENT_UNIT_CELSIUS, .measurementsPerCycle = 10, .extraSettlingTime = 0, @@ -133,93 +130,14 @@ .sensor = ADMW1001_ADC_SENSOR_THERMOCOUPLE_K_DEF_L1, .gain = ADMW1001_ADC_GAIN_32X, .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, - }, - .reference = { - .type = ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, - .disableBuffer = true, - }, - .enableVbias = true, - }, - }, - [ADMW1001_CHANNEL_ID_SENSOR_2] = { - .enableChannel = true, - .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_CJC_0, - .measurementUnit = ADMW1001_MEASUREMENT_UNIT_CELSIUS, - .measurementsPerCycle = 10, - .extraSettlingTime = 0, - .adcChannelConfig = { - .sensor = ADMW1001_ADC_SENSOR_THERMOCOUPLE_T_DEF_L1, - .gain = ADMW1001_ADC_GAIN_32X, - .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, + .type = ADMW1001_ADC_FILTER_SINC3, }, .reference = { .type = ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, - .disableBuffer = true, - }, - .enableVbias = true, - }, - }, - [ADMW1001_CHANNEL_ID_SENSOR_3] = { - .enableChannel = true, - .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_CJC_0, - .measurementUnit = ADMW1001_MEASUREMENT_UNIT_CELSIUS, - .measurementsPerCycle = 10, - .extraSettlingTime = 0, - .adcChannelConfig = { - .sensor = ADMW1001_ADC_SENSOR_THERMOCOUPLE_J_DEF_L1, - .gain = ADMW1001_ADC_GAIN_32X, - .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, - }, - .reference = { - .type = ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, - .disableBuffer = true, }, .enableVbias = true, }, }, - [ADMW1001_CHANNEL_ID_VOLTAGE_0] = { - .enableChannel = true, - .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_NONE, - .measurementsPerCycle = 10, - .extraSettlingTime = 0, - .adcChannelConfig = { - .sensor = ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_A_DEF_L1, - .gain = ADMW1001_ADC_GAIN_2X, - .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, - }, - .reference = { - .type = ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, - .disableBuffer = true, - }, - .enableVbias = false, - }, - }, - [ADMW1001_CHANNEL_ID_CURRENT_0] = { - .enableChannel = true, - .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_NONE, - .measurementsPerCycle = 10, - .extraSettlingTime = 0, - .adcChannelConfig = { - .sensor = ADMW1001_ADC_SENSOR_CURRENT_PRESSURE_A_DEF_L1, - .gain = ADMW1001_ADC_GAIN_2X, - .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, - }, - .reference = { - .type = ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, - .disableBuffer = true, - }, - .enableVbias = false, - }, - }, [ADMW1001_CHANNEL_ID_I2C_0] = { .enableChannel = true, .disablePublishing = false,
--- a/sensor0_typeK_cjc0_config.c Wed Jun 05 05:39:15 2019 +0000 +++ b/sensor0_typeK_cjc0_config.c Sat Jun 15 14:30:49 2019 +0000 @@ -47,14 +47,14 @@ .productId = ADMW_PRODUCT_ID_ADMW1001, .admw1001 = { .power = { - .powerMode = ADMW1001_POWER_MODE_FULL, + .powerMode = ADMW1001_POWER_MODE_ACTIVE, }, .measurement = { .operatingMode = ADMW1001_OPERATING_MODE_SINGLECYCLE, .dataReadyMode = ADMW1001_DATAREADY_PER_CYCLE, }, .channels = { - [ADMW1001_CHANNEL_ID_CJC_0] = { + [ADMW1001_CHANNEL_ID_ANALOG_1_UNIVERSAL] = { .enableChannel = true, .disablePublishing = false, .compensationChannel = ADMW1001_CHANNEL_ID_NONE, @@ -68,19 +68,18 @@ .outputLevel = ADMW1001_ADC_EXC_CURRENT_250uA, }, .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, + .type = ADMW1001_ADC_FILTER_SINC3, }, .reference = { .type = ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_1, - .disableBuffer = false, }, .enableVbias = false, }, }, - [ADMW1001_CHANNEL_ID_SENSOR_0] = { + [ADMW1001_CHANNEL_ID_ANALOG_1_UNIVERSAL] = { .enableChannel = true, .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_CJC_0, + .compensationChannel = ADMW1001_CHANNEL_ID_ANALOG_1_UNIVERSAL, .measurementUnit = ADMW1001_MEASUREMENT_UNIT_CELSIUS, .measurementsPerCycle = 10, .extraSettlingTime = 0, @@ -88,11 +87,10 @@ .sensor = ADMW1001_ADC_SENSOR_THERMOCOUPLE_K_DEF_L1, .gain = ADMW1001_ADC_GAIN_32X, .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, + .type = ADMW1001_ADC_FILTER_SINC3, }, .reference = { .type = ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, - .disableBuffer = true, }, .enableVbias = true, },
--- a/sensor1_rtd-3w-pt100_config.c Wed Jun 05 05:39:15 2019 +0000 +++ b/sensor1_rtd-3w-pt100_config.c Sat Jun 15 14:30:49 2019 +0000 @@ -47,14 +47,14 @@ .productId = ADMW_PRODUCT_ID_ADMW1001, .admw1001 = { .power = { - .powerMode = ADMW1001_POWER_MODE_FULL, + .powerMode = ADMW1001_POWER_MODE_ACTIVE, }, .measurement = { .operatingMode = ADMW1001_OPERATING_MODE_SINGLECYCLE, .dataReadyMode = ADMW1001_DATAREADY_PER_CYCLE, }, .channels = { - [ADMW1001_CHANNEL_ID_SENSOR_1] = { + [ADMW1001_CHANNEL_ID_ANALOG_2_DIFFERENTIAL] = { .enableChannel = true, .disablePublishing = false, .compensationChannel = ADMW1001_CHANNEL_ID_NONE, @@ -68,11 +68,10 @@ .outputLevel = ADMW1001_ADC_EXC_CURRENT_250uA, }, .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, + .type = ADMW1001_ADC_FILTER_SINC3, }, .reference = { .type = ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_1, - .disableBuffer = false, }, .enableVbias = false, },
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/sensor2_bridge-6w-pressure_config.c Sat Jun 15 14:30:49 2019 +0000 @@ -0,0 +1,78 @@ +/* +Copyright 2017 (c) Analog Devices, Inc. + +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in + the documentation and/or other materials provided with the + distribution. + - Neither the name of Analog Devices, Inc. nor the names of its + contributors may be used to endorse or promote products derived + from this software without specific prior written permission. + - The use of this software may or may not infringe the patent rights + of one or more patent holders. This license does not release you + from the requirement that you obtain separate licenses from these + patent holders to use this software. + - Use of the software either in source or binary form, must be run + on or directly connected to an Analog Devices Inc. component. + +THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR +IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, +MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, +INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR +SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *****************************************************************************/ + +/*! + ****************************************************************************** + * @file: + * @brief: + *----------------------------------------------------------------------------- + */ +#include "admw_config_types.h" + +ADMW_CONFIG sensor2_bridge_6w_pressure_config = { + .versionId = { .major = 1, .minor = 4 }, + .productId = ADMW_PRODUCT_ID_ADMW1001, + .admw1001 = { + .power = { + .powerMode = ADMW1001_POWER_MODE_ACTIVE, + }, + .measurement = { + .operatingMode = ADMW1001_OPERATING_MODE_SINGLECYCLE, + .dataReadyMode = ADMW1001_DATAREADY_PER_CYCLE, + }, + .channels = { + [ADMW1001_CHANNEL_ID_ANALOG_1_UNIVERSAL] = { + .enableChannel = true, + .disablePublishing = false, + .compensationChannel = ADMW1001_CHANNEL_ID_NONE, + .measurementsPerCycle = 10, + .extraSettlingTime = 0, + .enableUnityLut = true, + .adcChannelConfig = { + .sensor = ADMW1001_ADC_SENSOR_BRIDGE_6WIRE_1_DEF_L2, + .gain = ADMW1001_ADC_GAIN_1X, + .filter = { + .type = ADMW1001_ADC_FILTER_SINC4, + }, + .reference = { + .type = ADMW1001_ADC_REFERENCE_BRIDGE_EXCITATION, + }, + .enableVbias = false, + }, + }, + }, + }, +};
--- a/sensor2_typeT_cjc0_config.c Wed Jun 05 05:39:15 2019 +0000 +++ b/sensor2_typeT_cjc0_config.c Sat Jun 15 14:30:49 2019 +0000 @@ -46,14 +46,14 @@ .productId = ADMW_PRODUCT_ID_ADMW1001, .admw1001 = { .power = { - .powerMode = ADMW1001_POWER_MODE_FULL, + .powerMode = ADMW1001_POWER_MODE_ACTIVE, }, .measurement = { .operatingMode = ADMW1001_OPERATING_MODE_SINGLECYCLE, .dataReadyMode = ADMW1001_DATAREADY_PER_CYCLE, }, .channels = { - [ADMW1001_CHANNEL_ID_CJC_0] = { + [ADMW1001_CHANNEL_ID_ANALOG_1_UNIVERSAL] = { .enableChannel = true, .disablePublishing = false, .compensationChannel = ADMW1001_CHANNEL_ID_NONE, @@ -67,36 +67,15 @@ .outputLevel = ADMW1001_ADC_EXC_CURRENT_250uA, }, .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, + .type = ADMW1001_ADC_FILTER_SINC3, }, .reference = { .type = ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_1, - .disableBuffer = false, }, .enableVbias = false, }, - }, - [ADMW1001_CHANNEL_ID_SENSOR_2] = { - .enableChannel = true, - .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_CJC_0, - .measurementUnit = ADMW1001_MEASUREMENT_UNIT_CELSIUS, - .measurementsPerCycle = 10, - .extraSettlingTime = 0, - .adcChannelConfig = { - .sensor = ADMW1001_ADC_SENSOR_THERMOCOUPLE_T_DEF_L1, - .gain = ADMW1001_ADC_GAIN_32X, - .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, - }, - .reference = { - .type = ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, - .disableBuffer = true, - }, - .enableVbias = true, - }, + }, }, }, - }, };
--- a/sensor3_typeJ_cjc0_config.c Wed Jun 05 05:39:15 2019 +0000 +++ b/sensor3_typeJ_cjc0_config.c Sat Jun 15 14:30:49 2019 +0000 @@ -49,14 +49,14 @@ .productId = ADMW_PRODUCT_ID_ADMW1001, .admw1001 = { .power = { - .powerMode = ADMW1001_POWER_MODE_FULL, + .powerMode = ADMW1001_POWER_MODE_ACTIVE, }, .measurement = { .operatingMode = ADMW1001_OPERATING_MODE_SINGLECYCLE, .dataReadyMode = ADMW1001_DATAREADY_PER_CYCLE, }, .channels = { - [ADMW1001_CHANNEL_ID_CJC_0] = { + [ADMW1001_CHANNEL_ID_ANALOG_1_UNIVERSAL] = { .enableChannel = true, .disablePublishing = false, .compensationChannel = ADMW1001_CHANNEL_ID_NONE, @@ -70,35 +70,14 @@ .outputLevel = ADMW1001_ADC_EXC_CURRENT_250uA, }, .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, + .type = ADMW1001_ADC_FILTER_SINC3, }, .reference = { .type = ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_1, - .disableBuffer = false, }, .enableVbias = false, }, }, - [ADMW1001_CHANNEL_ID_SENSOR_3] = { - .enableChannel = true, - .disablePublishing = false, - .compensationChannel = ADMW1001_CHANNEL_ID_CJC_0, - .measurementUnit = ADMW1001_MEASUREMENT_UNIT_CELSIUS, - .measurementsPerCycle = 10, - .extraSettlingTime = 0, - .adcChannelConfig = { - .sensor = ADMW1001_ADC_SENSOR_THERMOCOUPLE_J_DEF_L1, - .gain = ADMW1001_ADC_GAIN_32X, - .filter = { - .type = ADMW1001_ADC_FILTER_FIR_25SPS, - }, - .reference = { - .type = ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL, - .disableBuffer = true, - }, - .enableVbias = true, - }, - }, }, }, };
--- a/spi0_adiAdxl362_config.c Wed Jun 05 05:39:15 2019 +0000 +++ b/spi0_adiAdxl362_config.c Sat Jun 15 14:30:49 2019 +0000 @@ -47,7 +47,7 @@ .productId = ADMW_PRODUCT_ID_ADMW1001, .admw1001 = { .power = { - .powerMode = ADMW1001_POWER_MODE_FULL, + .powerMode = ADMW1001_POWER_MODE_ACTIVE, }, .measurement = { .operatingMode = ADMW1001_OPERATING_MODE_CONTINUOUS,
--- a/src/admw_1001.c Wed Jun 05 05:39:15 2019 +0000 +++ b/src/admw_1001.c Sat Jun 15 14:30:49 2019 +0000 @@ -90,7 +90,8 @@ #include "admw1001/admw1001_host_comms.h" #include "crc16.h" - +#define VERSIONID_MAJOR 1 +#define VERSIONID_MINOR 7 uint32_t getDataCnt = 0; @@ -106,13 +107,13 @@ /* Checks if a value is outside the bounds of the specified register field */ #define CHECK_REG_FIELD_VAL(_field, _val) \ do { \ - uint32_t _mask = BITM_##_field; \ - uint32_t _shift = BITP_##_field; \ + uint32_t _mask = BITM_##_field; \ + uint32_t _shift = BITP_##_field; \ if ((((_val) << _shift) & ~(_mask)) != 0) { \ - ADMW_LOG_ERROR("Value 0x%08X invalid for register field %s", \ + ADMW_LOG_ERROR("Value 0x%08X invalid for register field %s",\ (uint32_t)(_val), \ - STRINGIFY(ADMW_##_field)); \ - return ADMW_INVALID_PARAM; \ + STRINGIFY(ADMW_##_field)); \ + return ADMW_INVALID_PARAM; \ } \ } while(false) @@ -122,26 +123,26 @@ */ #define WRITE_REG(_hdev, _val, _name, _type) \ do { \ - ADMW_RESULT _res; \ + ADMW_RESULT _res; \ _type _regval = _val; \ - _res = admw1001_WriteRegister((_hdev), \ - REG_##_name, \ + _res = admw1001_WriteRegister((_hdev), \ + REG_##_name, \ &_regval, sizeof(_regval)); \ - if (_res != ADMW_SUCCESS) \ + if (_res != ADMW_SUCCESS) \ return _res; \ } while(false) /* Wrapper macro to write a value to a uint32_t register */ -#define WRITE_REG_U32(_hdev, _val, _name) \ +#define WRITE_REG_U32(_hdev, _val, _name) \ WRITE_REG(_hdev, _val, _name, uint32_t) /* Wrapper macro to write a value to a uint16_t register */ -#define WRITE_REG_U16(_hdev, _val, _name) \ +#define WRITE_REG_U16(_hdev, _val, _name) \ WRITE_REG(_hdev, _val, _name, uint16_t) /* Wrapper macro to write a value to a uint8_t register */ -#define WRITE_REG_U8(_hdev, _val, _name) \ +#define WRITE_REG_U8(_hdev, _val, _name) \ WRITE_REG(_hdev, _val, _name, uint8_t) /* Wrapper macro to write a value to a float32_t register */ -#define WRITE_REG_FLOAT(_hdev, _val, _name) \ +#define WRITE_REG_FLOAT(_hdev, _val, _name) \ WRITE_REG(_hdev, _val, _name, float32_t) /* @@ -150,27 +151,27 @@ */ #define READ_REG(_hdev, _val, _name, _type) \ do { \ - ADMW_RESULT _res; \ + ADMW_RESULT _res; \ _type _regval; \ - _res = admw1001_ReadRegister((_hdev), \ - REG_##_name, \ + _res = admw1001_ReadRegister((_hdev), \ + REG_##_name, \ &_regval, sizeof(_regval)); \ - if (_res != ADMW_SUCCESS) \ + if (_res != ADMW_SUCCESS) \ return _res; \ _val = _regval; \ } while(false) /* Wrapper macro to read a value from a uint32_t register */ -#define READ_REG_U32(_hdev, _val, _name) \ +#define READ_REG_U32(_hdev, _val, _name) \ READ_REG(_hdev, _val, _name, uint32_t) /* Wrapper macro to read a value from a uint16_t register */ -#define READ_REG_U16(_hdev, _val, _name) \ +#define READ_REG_U16(_hdev, _val, _name) \ READ_REG(_hdev, _val, _name, uint16_t) /* Wrapper macro to read a value from a uint8_t register */ -#define READ_REG_U8(_hdev, _val, _name) \ +#define READ_REG_U8(_hdev, _val, _name) \ READ_REG(_hdev, _val, _name, uint8_t) /* Wrapper macro to read a value from a float32_t register */ -#define READ_REG_FLOAT(_hdev, _val, _name) \ +#define READ_REG_FLOAT(_hdev, _val, _name) \ READ_REG(_hdev, _val, _name, float32_t) /* @@ -178,45 +179,45 @@ * NOTE - this is intended only for writing to a keyhole data register */ #define WRITE_REG_U8_ARRAY(_hdev, _arr, _len, _name) \ - do { \ - ADMW_RESULT _res; \ - _res = admw1001_WriteRegister(_hdev, \ - REG_##_name, \ - _arr, _len); \ - if (_res != ADMW_SUCCESS) \ - return _res; \ + do { \ + ADMW_RESULT _res; \ + _res = admw1001_WriteRegister(_hdev, \ + REG_##_name, \ + _arr, _len); \ + if (_res != ADMW_SUCCESS) \ + return _res; \ } while(false) /* * Wrapper macro to read an array of values from a uint8_t register * NOTE - this is intended only for reading from a keyhole data register */ -#define READ_REG_U8_ARRAY(_hdev, _arr, _len, _name) \ - do { \ - ADMW_RESULT _res; \ - _res = admw1001_ReadRegister((_hdev), \ - REG_##_name, \ - _arr, _len); \ - if (_res != ADMW_SUCCESS) \ - return _res; \ +#define READ_REG_U8_ARRAY(_hdev, _arr, _len, _name) \ + do { \ + ADMW_RESULT _res; \ + _res = admw1001_ReadRegister((_hdev), \ + REG##_name, \ + _arr, _len); \ + if (_res != ADMW_SUCCESS) \ + return _res; \ } while(false) -#define ADMW1001_CHANNEL_IS_ADC(c) \ - ((c) >= ADMW1001_CHANNEL_ID_CJC_0 && (c) <= ADMW1001_CHANNEL_ID_CURRENT_0) - -#define ADMW1001_CHANNEL_IS_ADC_CJC(c) \ - ((c) >= ADMW1001_CHANNEL_ID_CJC_0 && (c) <= ADMW1001_CHANNEL_ID_CJC_1) - -#define ADMW1001_CHANNEL_IS_ADC_SENSOR(c) \ - ((c) >= ADMW1001_CHANNEL_ID_SENSOR_0 && (c) <= ADMW1001_CHANNEL_ID_SENSOR_3) - -#define ADMW1001_CHANNEL_IS_ADC_VOLTAGE(c) \ - ((c) == ADMW1001_CHANNEL_ID_VOLTAGE_0) - -#define ADMW1001_CHANNEL_IS_ADC_CURRENT(c) \ - ((c) == ADMW1001_CHANNEL_ID_CURRENT_0) - -#define ADMW1001_CHANNEL_IS_VIRTUAL(c) \ +#define ADMW1001_CHANNEL_IS_ADC(c) \ + ((c) >= ADMW1001_CHANNEL_ID_ANALOG_1_UNIVERSAL && (c) <= ADMW1001_CHANNEL_ID_ANALOG_2_DIFFERENTIAL) + +#define ADMW1001_CHANNEL_IS_ADC_CJC(c) \ + ((c) >= ADMW1001_CHANNEL_ID_ANALOG_1_UNIVERSAL && (c) <= ADMW1001_CHANNEL_ID_ANALOG_2_UNIVERSAL) + +#define ADMW1001_CHANNEL_IS_ADC_SENSOR(c) \ + ((c) >= ADMW1001_CHANNEL_ID_ANALOG_1_UNIVERSAL && (c) <= ADMW1001_CHANNEL_ID_ANALOG_2_UNIVERSAL) + +#define ADMW1001_CHANNEL_IS_ADC_VOLTAGE(c) \ + ((c) == ADMW1001_CHANNEL_ID_ANALOG_1_DIFFERENTIAL || ADMW1001_CHANNEL_ID_ANALOG_2_DIFFERENTIAL) + +#define ADMW1001_CHANNEL_IS_ADC_CURRENT(c) \ + ((c) == ADMW1001_CHANNEL_ID_ANALOG_1_UNIVERSAL || (c) == ADMW1001_CHANNEL_ID_ANALOG_2_UNIVERSAL) + +#define ADMW1001_CHANNEL_IS_VIRTUAL(c) \ ((c) == ADMW1001_CHANNEL_ID_SPI_1 || (c) == ADMW1001_CHANNEL_ID_SPI_2) typedef struct @@ -353,8 +354,6 @@ pStatus->deviceStatus |= ADMW_DEVICE_STATUS_DATAREADY; if (statusReg.FIFO_Error) pStatus->deviceStatus |= ADMW_DEVICE_STATUS_FIFO_ERROR; - if (alert2Reg.Ext_Flash_Error) - pStatus->deviceStatus |= ADMW_DEVICE_STATUS_EXT_FLASH_ERROR; if (statusReg.Alert_Active) { pStatus->deviceStatus |= ADMW_DEVICE_STATUS_ALERT; @@ -427,12 +426,6 @@ if (diagStatusReg.Diag_Checksum_Error) pStatus->diagnosticsStatus |= ADMW_DIAGNOSTICS_STATUS_CHECKSUM_ERROR; - if (diagStatusReg.Diag_Comms_Error) - pStatus->diagnosticsStatus |= ADMW_DIAGNOSTICS_STATUS_COMMS_ERROR; - if (diagStatusReg.Diag_Supply_Monitor_Error) - pStatus->diagnosticsStatus |= ADMW_DIAGNOSTICS_STATUS_SUPPLY_MONITOR_ERROR; - if (diagStatusReg.Diag_Supply_Cap_Error) - pStatus->diagnosticsStatus |= ADMW_DIAGNOSTICS_STATUS_SUPPLY_CAP_ERROR; if (diagStatusReg.Diag_Conversion_Error) pStatus->diagnosticsStatus |= ADMW_DIAGNOSTICS_STATUS_CONVERSION_ERROR; if (diagStatusReg.Diag_Calibration_Error) @@ -477,10 +470,10 @@ /* * Don't allow another command to be issued if one is already running, but - * make an exception for CORE_COMMAND_NOP which can be used to + * make an exception for ENUM_CORE_COMMAND_NOP which can be used to * request a running command to be stopped (e.g. continuous measurement) */ - if (command != CORE_COMMAND_NOP) + if (command != ENUM_CORE_COMMAND_NOP) { eRet = admw_GetCommandRunningState(hDevice, &bCommandRunning); if (eRet) @@ -542,14 +535,10 @@ { switch (eMeasurementMode) { - case ADMW_MEASUREMENT_MODE_HEALTHCHECK: - return executeCommand(hDevice, CORE_COMMAND_SYSTEM_CHECK, false); case ADMW_MEASUREMENT_MODE_NORMAL: return executeCommand(hDevice, CORE_COMMAND_CONVERT_WITH_RAW, false); case ADMW_MEASUREMENT_MODE_OMIT_RAW: return executeCommand(hDevice, CORE_COMMAND_CONVERT, false); - case ADMW_MEASUREMENT_MODE_FFT: - return executeCommand(hDevice, CORE_COMMAND_CONVERT_FFT, false); default: ADMW_LOG_ERROR("Invalid measurement mode %d specified", eMeasurementMode); @@ -571,12 +560,6 @@ { case ADMW_FLASH_CONFIG_1: return executeCommand(hDevice, CORE_COMMAND_SAVE_CONFIG_1, true); - case ADMW_FLASH_CONFIG_2: - return executeCommand(hDevice, CORE_COMMAND_SAVE_CONFIG_2, true); - case ADMW_FLASH_CONFIG_3: - return executeCommand(hDevice, CORE_COMMAND_SAVE_CONFIG_3, true); - case ADMW_FLASH_CONFIG_4: - return executeCommand(hDevice, CORE_COMMAND_SAVE_CONFIG_4, true); default: ADMW_LOG_ERROR("Invalid user config target slot %d specified", eSlotId); @@ -596,12 +579,6 @@ { case ADMW_FLASH_CONFIG_1: return executeCommand(hDevice, CORE_COMMAND_LOAD_CONFIG_1, true); - case ADMW_FLASH_CONFIG_2: - return executeCommand(hDevice, CORE_COMMAND_LOAD_CONFIG_2, true); - case ADMW_FLASH_CONFIG_3: - return executeCommand(hDevice, CORE_COMMAND_LOAD_CONFIG_3, true); - case ADMW_FLASH_CONFIG_4: - return executeCommand(hDevice, CORE_COMMAND_LOAD_CONFIG_4, true); default: ADMW_LOG_ERROR("Invalid user config source slot %d specified", eSlotId); @@ -610,126 +587,6 @@ } /* - * Erase the entire external flash memory. - * No other command must be running when this is called. - */ -ADMW_RESULT admw_EraseExternalFlash( - ADMW_DEVICE_HANDLE const hDevice) -{ - return executeCommand(hDevice, CORE_COMMAND_ERASE_EXTERNAL_FLASH, true); -} - -/* - * Read the number of samples stored in external flash memory. - * No other command must be running when this is called. - */ -ADMW_RESULT admw_GetExternalFlashSampleCount( - ADMW_DEVICE_HANDLE const hDevice, - uint32_t * nSampleCount) -{ - CORE_Ext_Flash_Sample_Count_t nCount; - - READ_REG_U32(hDevice, nCount.VALUE32, CORE_EXT_FLASH_SAMPLE_COUNT); - - *nSampleCount = nCount.VALUE32; - - return ADMW_SUCCESS; -} - -// DEBUG - TO BE DELETED -ADMW_RESULT admw_SetExternalFlashIndex( - ADMW_DEVICE_HANDLE const hDevice, - uint32_t nStartIndex) -{ - WRITE_REG_U32(hDevice, nStartIndex, CORE_EXT_FLASH_INDEX); - - return ADMW_SUCCESS; -} - -/* - * Read a set of data samples stored in the device external flash memory. - * This may be called at any time. - */ -ADMW_RESULT admw_GetExternalFlashData( - ADMW_DEVICE_HANDLE const hDevice, - ADMW_DATA_SAMPLE * const pSamples, - uint32_t const nStartIndex, - uint32_t const nRequested, - uint32_t * const pnReturned) -{ - ADMW_DEVICE_CONTEXT *pCtx = hDevice; - uint16_t command = ADMW1001_HOST_COMMS_READ_CMD | - (REG_CORE_EXT_FLASH_DATA & ADMW1001_HOST_COMMS_ADR_MASK); - uint8_t commandData[2] = { - command >> 8, - command & 0xFF - }; - uint8_t commandResponse[2]; - unsigned nValidSamples = 0; - ADMW_RESULT eRet = ADMW_SUCCESS; - - /* Setup initial sample */ - WRITE_REG_U32(hDevice, nStartIndex, CORE_EXT_FLASH_INDEX); - - /* Send flash read command */ - do { - eRet = admw_SpiTransfer(pCtx->hSpi, commandData, commandResponse, - sizeof(command), false); - if (eRet) - { - ADMW_LOG_ERROR("Failed to send read command for external flash"); - return eRet; - } - - admw_TimeDelayUsec(ADMW1001_HOST_COMMS_XFER_DELAY); - } while ((commandResponse[0] != ADMW1001_HOST_COMMS_CMD_RESP_0) || - (commandResponse[1] != ADMW1001_HOST_COMMS_CMD_RESP_1)); - - /* Read samples from external flash memory */ - for (unsigned i = 0; i < nRequested; i++) - { - ADMW1001_Sensor_Result_t sensorResult; - bool bHoldCs = true; - - /* Keep the CS signal asserted for all but the last sample */ - if ((i + 1) == nRequested) - bHoldCs = false; - - eRet = admw_SpiTransfer(pCtx->hSpi, NULL, (uint8_t *) (&sensorResult), - 8, bHoldCs); - if (eRet) - { - ADMW_LOG_ERROR("Failed to read data from external flash"); - return eRet; - } - - ADMW_DATA_SAMPLE *pSample = &pSamples[nValidSamples]; - - pSample->status = (ADMW_DEVICE_STATUS_FLAGS)0; - if (sensorResult.Ch_Error) - pSample->status |= ADMW_DEVICE_STATUS_ERROR; - if (sensorResult.Ch_Alert) - pSample->status |= ADMW_DEVICE_STATUS_ALERT; - - if (sensorResult.Ch_Raw) - pSample->rawValue = sensorResult.Raw_Sample; - else - pSample->rawValue = 0; - - pSample->channelId = sensorResult.Channel_ID; - pSample->processedValue = sensorResult.Sensor_Result; - - nValidSamples++; - } - *pnReturned = nValidSamples; - - admw_TimeDelayUsec(ADMW1001_HOST_COMMS_XFER_DELAY); - - return eRet; -} - - -/* * Store the LUT data to persistent memory on the device. * No other command must be running when this is called. * Do not power down the device while this command is running. @@ -761,28 +618,6 @@ } /* - * Run built-in diagnostic checks on the device. - * Diagnostics are executed according to the current applied settings. - * No other command must be running when this is called. - */ -ADMW_RESULT admw_RunDiagnostics( - ADMW_DEVICE_HANDLE const hDevice) -{ - return executeCommand(hDevice, CORE_COMMAND_RUN_DIAGNOSTICS, true); -} - -/* - * Run self-calibration routines on the device. - * Calibration is executed according to the current applied settings. - * No other command must be running when this is called. - */ -ADMW_RESULT admw_RunCalibration( - ADMW_DEVICE_HANDLE const hDevice) -{ - return executeCommand(hDevice, CORE_COMMAND_SELF_CALIBRATION, true); -} - -/* * Run digital calibration routines on the device. * Calibration is executed according to the current applied settings. * No other command must be running when this is called. @@ -942,6 +777,48 @@ return ADMW_SUCCESS; } +ADMW_RESULT admw1001_Write_Debug_Register( + ADMW_DEVICE_HANDLE hDevice, + uint16_t nAddress, + void *pData, + unsigned nLength) +{ + ADMW_RESULT eRet; + ADMW_DEVICE_CONTEXT *pCtx = hDevice; + uint16_t command = ADMW1001_HOST_COMMS_DEBUG_WRITE_CMD | + (nAddress & ADMW1001_HOST_COMMS_ADR_MASK); + uint8_t commandData[2] = { + command >> 8, + command & 0xFF + }; + uint8_t commandResponse[2]; + + do { + eRet = admw_SpiTransfer(pCtx->hSpi, commandData, commandResponse, + sizeof(command), false); + if (eRet) + { + ADMW_LOG_ERROR("Failed to send write command for register %u", + nAddress); + return eRet; + } + + admw_TimeDelayUsec(ADMW1001_HOST_COMMS_XFER_DELAY); + } while ((commandResponse[0] != ADMW1001_HOST_COMMS_CMD_RESP_0) || + (commandResponse[1] != ADMW1001_HOST_COMMS_CMD_RESP_1)); + + eRet = admw_SpiTransfer(pCtx->hSpi, pData, NULL, nLength, false); + if (eRet) + { + ADMW_LOG_ERROR("Failed to write data (%dB) to register %u", + nLength, nAddress); + return eRet; + } + + admw_TimeDelayUsec(ADMW1001_HOST_COMMS_XFER_DELAY); + + return ADMW_SUCCESS; +} ADMW_RESULT admw1001_ReadRegister( ADMW_DEVICE_HANDLE hDevice, uint16_t nAddress, @@ -985,6 +862,48 @@ return ADMW_SUCCESS; } +ADMW_RESULT admw1001_Read_Debug_Register( + ADMW_DEVICE_HANDLE hDevice, + uint16_t nAddress, + void *pData, + unsigned nLength) +{ + ADMW_RESULT eRet; + ADMW_DEVICE_CONTEXT *pCtx = hDevice; + uint16_t command = ADMW1001_HOST_COMMS_DEBUG_READ_CMD | + (nAddress & ADMW1001_HOST_COMMS_ADR_MASK); + uint8_t commandData[2] = { + command >> 8, + command & 0xFF + }; + uint8_t commandResponse[2]; + + do { + eRet = admw_SpiTransfer(pCtx->hSpi, commandData, commandResponse, + sizeof(command), false); + if (eRet) + { + ADMW_LOG_ERROR("Failed to send read command for register %u", + nAddress); + return eRet; + } + + admw_TimeDelayUsec(ADMW1001_HOST_COMMS_XFER_DELAY); + } while ((commandResponse[0] != ADMW1001_HOST_COMMS_CMD_RESP_0) || + (commandResponse[1] != ADMW1001_HOST_COMMS_CMD_RESP_1)); + + eRet = admw_SpiTransfer(pCtx->hSpi, NULL, pData, nLength, false); + if (eRet) + { + ADMW_LOG_ERROR("Failed to read data (%uB) from register %u", + nLength, nAddress); + return eRet; + } + + admw_TimeDelayUsec(ADMW1001_HOST_COMMS_XFER_DELAY); + + return ADMW_SUCCESS; +} ADMW_RESULT admw_GetDeviceReadyState( ADMW_DEVICE_HANDLE const hDevice, bool * const bReady) @@ -1013,167 +932,94 @@ CORE_Mode_t modeReg; READ_REG_U8(hDevice, modeReg.VALUE8, CORE_MODE); - if ((eMeasurementMode == ADMW_MEASUREMENT_MODE_HEALTHCHECK) || - (modeReg.Conversion_Mode == CORE_MODE_SINGLECYCLE)) + if (eMeasurementMode == (modeReg.Conversion_Mode == CORE_MODE_SINGLECYCLE)) *peOperatingMode = ADMW1001_OPERATING_MODE_SINGLECYCLE; else if (modeReg.Conversion_Mode == CORE_MODE_MULTICYCLE) *peOperatingMode = ADMW1001_OPERATING_MODE_MULTICYCLE; else *peOperatingMode = ADMW1001_OPERATING_MODE_CONTINUOUS; - - /* FFT mode is quite different to the other modes: - * - Each FFT result produces a batch of samples - * - The size of the batch depends on selected FFT size and output config options - * - DATAREADY will fire for each FFT result (once per channel) - * - The size of the cycle depends on the number of channels enabled for FFT - */ - if (eMeasurementMode == ADMW_MEASUREMENT_MODE_FFT) + if (eMeasurementMode == ADMW_MEASUREMENT_MODE_OMIT_RAW) { - CORE_FFT_Config_t fftConfigReg; - - unsigned nFftChannels; - unsigned nSamplesPerChannel; - - READ_REG_U32(hDevice, fftConfigReg.VALUE32, CORE_FFT_CONFIG); - - nFftChannels = fftConfigReg.FFT_Num_Channels + 1; - - if (fftConfigReg.FFT_Output == CORE_FFT_CONFIG_FFT_OUTPUT_MAX16) - { - nSamplesPerChannel = 16; - *pnBytesPerSample = 8; - } - else if (fftConfigReg.FFT_Output == CORE_FFT_CONFIG_FFT_OUTPUT_FULL) - { - nSamplesPerChannel = (256 << fftConfigReg.FFT_Num_Bins) >> 1; - *pnBytesPerSample = 5; - } - else if (fftConfigReg.FFT_Output == CORE_FFT_CONFIG_FFT_OUTPUT_FULL_WITH_RAW) - { - nSamplesPerChannel = (256 << fftConfigReg.FFT_Num_Bins); - *pnBytesPerSample = 8; - } - else - { - ADMW_LOG_ERROR("Invalid FFT output format option %d configured", - fftConfigReg.FFT_Output); - return ADMW_INVALID_PARAM; - } - - *pnSamplesPerDataready = nSamplesPerChannel; - *pnSamplesPerCycle = nSamplesPerChannel * nFftChannels; - - *peDataReadyMode = ADMW1001_DATAREADY_PER_CYCLE; - - if (modeReg.FFT_Mode == CORE_MODE_FFT_MODE_CONTINUOUS) - { - *peOperatingMode = ADMW1001_OPERATING_MODE_CONTINUOUS; - } - else - { - *peOperatingMode = ADMW1001_OPERATING_MODE_SINGLECYCLE; - } + *pnBytesPerSample = 5; } else { - if (eMeasurementMode == ADMW_MEASUREMENT_MODE_OMIT_RAW) - { - *pnBytesPerSample = 5; - } - else - { - *pnBytesPerSample = 8; - } - - for (ADMW1001_CHANNEL_ID chId = ADMW1001_CHANNEL_ID_CJC_0; - chId < ADMW1001_MAX_CHANNELS; - chId++) + *pnBytesPerSample = 8; + } + + for (ADMW1001_CHANNEL_ID chId = ADMW1001_CHANNEL_ID_ANALOG_1_UNIVERSAL; + chId < ADMW1001_MAX_CHANNELS; + chId++) + { + CORE_Sensor_Details_t sensorDetailsReg; + CORE_Channel_Count_t channelCountReg; + + if (ADMW1001_CHANNEL_IS_VIRTUAL(chId)) + continue; + + READ_REG_U8(hDevice, channelCountReg.VALUE8, CORE_CHANNEL_COUNTn(chId)); + READ_REG_U32(hDevice, sensorDetailsReg.VALUE32, CORE_SENSOR_DETAILSn(chId)); + + if (channelCountReg.Channel_Enable && !sensorDetailsReg.Do_Not_Publish) + { + CORE_Sensor_Type_t sensorTypeReg; + unsigned nActualChannels = 1; + + READ_REG_U16(hDevice, sensorTypeReg.VALUE16, CORE_SENSOR_TYPEn(chId)); + + if (chId == ADMW1001_CHANNEL_ID_SPI_0) { - CORE_Sensor_Details_t sensorDetailsReg; - CORE_Channel_Count_t channelCountReg; - - if (ADMW1001_CHANNEL_IS_VIRTUAL(chId)) - continue; - - READ_REG_U8(hDevice, channelCountReg.VALUE8, CORE_CHANNEL_COUNTn(chId)); - READ_REG_U32(hDevice, sensorDetailsReg.VALUE32, CORE_SENSOR_DETAILSn(chId)); - - if (channelCountReg.Channel_Enable && !sensorDetailsReg.Do_Not_Publish) - { - CORE_Sensor_Type_t sensorTypeReg; - unsigned nActualChannels = 1; - - READ_REG_U16(hDevice, sensorTypeReg.VALUE16, CORE_SENSOR_TYPEn(chId)); - - if (chId == ADMW1001_CHANNEL_ID_SPI_0) - { - /* Some sensors automatically generate samples on additional "virtual" channels - * so these channels must be counted as active when those sensors are selected - * and we use the count from the corresponding "physical" channel */ - if ((sensorTypeReg.Sensor_Type >= - CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_A_DEF_L1) && - (sensorTypeReg.Sensor_Type <= - CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_B_ADV_L2)) - nActualChannels += 2; - } - - nChannelsEnabled += nActualChannels; - if (eMeasurementMode == ADMW_MEASUREMENT_MODE_HEALTHCHECK) - /* Assume a single sample per channel in test mode */ - nSamplesPerCycle += nActualChannels; - else - nSamplesPerCycle += nActualChannels * - (channelCountReg.Channel_Count + 1); - } + /* Some sensors automatically generate samples on additional "virtual" channels + * so these channels must be counted as active when those sensors are selected + * and we use the count from the corresponding "physical" channel */ + if ((sensorTypeReg.Sensor_Type >= + CORE_SENSOR_TYPE_SPI_ACCELEROMETER_A) && + (sensorTypeReg.Sensor_Type <= + CORE_SENSOR_TYPE_SPI_ACCELEROMETER_B)) + nActualChannels += 2; } - - if (nChannelsEnabled == 0) - { - *pnSamplesPerDataready = 0; - *pnSamplesPerCycle = 0; - return ADMW_SUCCESS; - } - - *pnSamplesPerCycle = nSamplesPerCycle; - - if (modeReg.Drdy_Mode == CORE_MODE_DRDY_PER_CONVERSION) - { - *pnSamplesPerDataready = 1; - } - else if (modeReg.Drdy_Mode == CORE_MODE_DRDY_PER_CYCLE) - { - *pnSamplesPerDataready = nSamplesPerCycle; - } - else - { - /* Assume DRDY will be asserted after max. 1 cycle in test mode */ - if (eMeasurementMode == ADMW_MEASUREMENT_MODE_HEALTHCHECK) - { - *pnSamplesPerDataready = nSamplesPerCycle; - } - else - { - CORE_Fifo_Num_Cycles_t fifoNumCyclesReg; - READ_REG_U8(hDevice, fifoNumCyclesReg.VALUE8, CORE_FIFO_NUM_CYCLES); - - *pnSamplesPerDataready = - nSamplesPerCycle * fifoNumCyclesReg.Fifo_Num_Cycles; - } - } - - if (modeReg.Drdy_Mode == CORE_MODE_DRDY_PER_CONVERSION) - *peDataReadyMode = ADMW1001_DATAREADY_PER_CONVERSION; - else if (modeReg.Drdy_Mode == CORE_MODE_DRDY_PER_CYCLE) - *peDataReadyMode = ADMW1001_DATAREADY_PER_CYCLE; - else - { - /* Assume DRDY will be asserted after max. 1 cycle in test mode */ - if (eMeasurementMode == ADMW_MEASUREMENT_MODE_HEALTHCHECK) - *peDataReadyMode = ADMW1001_DATAREADY_PER_CYCLE; - else - *peDataReadyMode = ADMW1001_DATAREADY_PER_MULTICYCLE_BURST; - } + + nChannelsEnabled += nActualChannels; + + nSamplesPerCycle += nActualChannels * + (channelCountReg.Channel_Count + 1); + } + } + + if (nChannelsEnabled == 0) + { + *pnSamplesPerDataready = 0; + *pnSamplesPerCycle = 0; + return ADMW_SUCCESS; + } + + *pnSamplesPerCycle = nSamplesPerCycle; + + if (modeReg.Drdy_Mode == ENUM_CORE_MODE_DRDY_PER_CONVERSION) + { + *pnSamplesPerDataready = 1; + } + else if (modeReg.Drdy_Mode == ENUM_CORE_MODE_DRDY_PER_CYCLE) + { + *pnSamplesPerDataready = nSamplesPerCycle; + } + else + { + CORE_Fifo_Num_Cycles_t fifoNumCyclesReg; + READ_REG_U8(hDevice, fifoNumCyclesReg.VALUE8, CORE_FIFO_NUM_CYCLES); + + *pnSamplesPerDataready = + nSamplesPerCycle * fifoNumCyclesReg.Fifo_Num_Cycles; + } + + if (modeReg.Drdy_Mode == ENUM_CORE_MODE_DRDY_PER_CONVERSION) + *peDataReadyMode = ADMW1001_DATAREADY_PER_CONVERSION; + else if (modeReg.Drdy_Mode == ENUM_CORE_MODE_DRDY_PER_CYCLE) + *peDataReadyMode = ADMW1001_DATAREADY_PER_CYCLE; + else + { + *peDataReadyMode = ADMW1001_DATAREADY_PER_MULTICYCLE_BURST; } return ADMW_SUCCESS; @@ -1200,17 +1046,13 @@ { CORE_Power_Config_t powerConfigReg; - if (powerMode == ADMW1001_POWER_MODE_LOW) - { - powerConfigReg.Power_Mode_ADC = CORE_POWER_CONFIG_ADC_LOW_POWER; - } - else if (powerMode == ADMW1001_POWER_MODE_MID) + if (powerMode == ADMW1001_POWER_MODE_HIBERNATION) { - powerConfigReg.Power_Mode_ADC = CORE_POWER_CONFIG_ADC_MID_POWER; + powerConfigReg.Power_Mode_MCU = CORE_POWER_CONFIG_HIBERNATION; } - else if (powerMode == ADMW1001_POWER_MODE_FULL) + else if (powerMode == ADMW1001_POWER_MODE_ACTIVE) { - powerConfigReg.Power_Mode_ADC = CORE_POWER_CONFIG_ADC_FULL_POWER; + powerConfigReg.Power_Mode_MCU = CORE_POWER_CONFIG_ACTIVE_MODE; } else { @@ -1243,7 +1085,6 @@ ADMW_DEVICE_HANDLE hDevice, ADMW1001_OPERATING_MODE eOperatingMode, ADMW1001_DATAREADY_MODE eDataReadyMode, - ADMW1001_CALIBRATION_MODE eCalibrationMode, bool bEnableExtFlash) { CORE_Mode_t modeReg; @@ -1297,25 +1138,6 @@ return ADMW_INVALID_PARAM; } - if (eCalibrationMode == ADMW1001_NO_CALIBRATION) - { - modeReg.Calibration_Method = CORE_MODE_NO_CAL; - } - else if (eCalibrationMode == ADMW1001_DO_CALIBRATION) - { - modeReg.Calibration_Method = CORE_MODE_DO_CAL; - } - else - { - ADMW_LOG_ERROR("Invalid calibration mode %d specified", - eCalibrationMode); - return ADMW_INVALID_PARAM; - } - - modeReg.Ext_Flash_Store = (bEnableExtFlash ? - CORE_MODE_EXT_FLASH_USED : - CORE_MODE_EXT_FLASH_NOT_USED); - WRITE_REG_U8(hDevice, modeReg.VALUE8, CORE_MODE); return ADMW_SUCCESS; @@ -1323,13 +1145,13 @@ ADMW_RESULT admw_SetCycleControl( ADMW_DEVICE_HANDLE hDevice, - uint32_t nCycleInterval, + uint32_t nCycleInterval #ifdef __V2_3_CFG_FMT__ - ADMW1001_CYCLE_TYPE eCycleType, + , ADMW1001_CYCLE_TYPE eCycleType, ADMW1001_FILTER_SETTLING eFilterSettling) #else - ADMW1001_CYCLE_TYPE eCycleType) + ) #endif { CORE_Cycle_Control_t cycleControlReg; @@ -1354,20 +1176,6 @@ CHECK_REG_FIELD_VAL(CORE_CYCLE_CONTROL_CYCLE_TIME, nCycleInterval); cycleControlReg.Cycle_Time = nCycleInterval; - if (eCycleType == ADMW1001_CYCLE_TYPE_SWITCH) - { - cycleControlReg.Cycle_Type = CORE_CYCLE_CONTROL_CYCLE_TYPE_SWITCH; - } - else if (eCycleType == ADMW1001_CYCLE_TYPE_FULL) - { - cycleControlReg.Cycle_Type = CORE_CYCLE_CONTROL_CYCLE_TYPE_FULL; - } - else - { - ADMW_LOG_ERROR("Invalid cycle type %d specified", eCycleType); - return ADMW_INVALID_PARAM; - } - #ifdef __V2_3_CFG_FMT__ if (eFilterSettling == ADMW1001_FILTER_SETTLING_ALWAYS) { @@ -1407,11 +1215,9 @@ static ADMW_RESULT admw_SetExternalReferenceValues( ADMW_DEVICE_HANDLE hDevice, - float32_t externalRef1Value, - float32_t externalRef2Value) + float32_t externalRef1Value) { - WRITE_REG_FLOAT(hDevice, externalRef1Value, CORE_EXTERNAL_REFERENCE1); - WRITE_REG_FLOAT(hDevice, externalRef2Value, CORE_EXTERNAL_REFERENCE2); + WRITE_REG_FLOAT(hDevice, externalRef1Value, CORE_EXTERNAL_REFERENCE_RESISTOR); return ADMW_SUCCESS; } @@ -1425,7 +1231,6 @@ eRet = admw_SetMode(hDevice, pMeasConfig->operatingMode, pMeasConfig->dataReadyMode, - pMeasConfig->calibrationMode, pMeasConfig->enableExternalFlash); if (eRet != ADMW_SUCCESS) { @@ -1434,8 +1239,7 @@ } eRet = admw_SetCycleControl(hDevice, - pMeasConfig->cycleInterval, - pMeasConfig->cycleType); + pMeasConfig->cycleInterval); if (eRet != ADMW_SUCCESS) { ADMW_LOG_ERROR("Failed to set cycle control"); @@ -1452,10 +1256,12 @@ return eRet; } } - - eRet = admw_SetExternalReferenceValues(hDevice, - pMeasConfig->externalRef1Value, - pMeasConfig->externalRef2Value); + if(pMeasConfig->externalRef1Value>0) + eRet = admw_SetExternalReferenceValues(hDevice, + pMeasConfig->externalRef1Value); + else + ; + if (eRet != ADMW_SUCCESS) { ADMW_LOG_ERROR("Failed to set external reference values"); @@ -1508,118 +1314,6 @@ return ADMW_SUCCESS; } -ADMW_RESULT admw1001_SetFftConfig( - ADMW_DEVICE_HANDLE hDevice, - ADMW1001_FFT_CONFIG *pFftConfig, - ADMW1001_CHANNEL_CONFIG *pChannels) -{ - CORE_FFT_Config_t fftConfigReg; - CORE_Mode_t modeReg; - uint32_t numFftChannels = 0; - - fftConfigReg.VALUE32 = REG_RESET_VAL(CORE_FFT_CONFIG); - - for (ADMW1001_CHANNEL_ID id = ADMW1001_CHANNEL_ID_CJC_0; - id < ADMW1001_MAX_CHANNELS; - id++) - { - if (pChannels[id].enableFFT) - { - if (numFftChannels >= 4) /* TODO - temporary limit */ - { - ADMW_LOG_ERROR("Maximum limit of 4 FFT channels exceeded"); - return ADMW_INVALID_PARAM; - } - - numFftChannels++; - } - } - - if (numFftChannels > 0) - { - fftConfigReg.FFT_Num_Channels = numFftChannels - 1; - - switch (pFftConfig->size) - { - case ADMW1001_FFT_SIZE_256: - fftConfigReg.FFT_Num_Bins = CORE_FFT_CONFIG_FFT_BINS_256; - break; - case ADMW1001_FFT_SIZE_512: - fftConfigReg.FFT_Num_Bins = CORE_FFT_CONFIG_FFT_BINS_512; - break; - case ADMW1001_FFT_SIZE_1024: - fftConfigReg.FFT_Num_Bins = CORE_FFT_CONFIG_FFT_BINS_1024; - break; - case ADMW1001_FFT_SIZE_2048: - fftConfigReg.FFT_Num_Bins = CORE_FFT_CONFIG_FFT_BINS_2048; - break; - default: - ADMW_LOG_ERROR("Invalid FFT size option %d specified", - pFftConfig->size); - return ADMW_INVALID_PARAM; - } - - switch (pFftConfig->window) - { - case ADMW1001_FFT_WINDOW_NONE: - fftConfigReg.FFT_Window = CORE_FFT_CONFIG_FFT_WINDOW_NONE; - break; - case ADMW1001_FFT_WINDOW_HANN: - fftConfigReg.FFT_Window = CORE_FFT_CONFIG_FFT_WINDOW_HANN; - break; - case ADMW1001_FFT_WINDOW_BLACKMAN_HARRIS: - fftConfigReg.FFT_Window = CORE_FFT_CONFIG_FFT_WINDOW_BLACKMANN_HARRIS; - break; - default: - ADMW_LOG_ERROR("Invalid FFT window option %d specified", - pFftConfig->window); - return ADMW_INVALID_PARAM; - } - - switch (pFftConfig->output) - { - case ADMW1001_FFT_OUTPUT_FULL: - fftConfigReg.FFT_Output = CORE_FFT_CONFIG_FFT_OUTPUT_FULL; - break; - case ADMW1001_FFT_OUTPUT_MAX16: - fftConfigReg.FFT_Output = CORE_FFT_CONFIG_FFT_OUTPUT_MAX16; - break; - case ADMW1001_FFT_OUTPUT_FULL_WITH_RAW: - fftConfigReg.FFT_Output = CORE_FFT_CONFIG_FFT_OUTPUT_FULL_WITH_RAW; - break; - default: - ADMW_LOG_ERROR("Invalid FFT output format option %d specified", - pFftConfig->output); - return ADMW_INVALID_PARAM; - } - } - WRITE_REG_U32(hDevice, fftConfigReg.VALUE32, CORE_FFT_CONFIG); - - if (numFftChannels > 0) - { - READ_REG_U8(hDevice, modeReg.VALUE8, CORE_MODE); - - if (pFftConfig->mode == ADMW1001_FFT_MODE_SINGLE) - { - modeReg.FFT_Mode = CORE_MODE_FFT_MODE_SINGLE; - } - else if (pFftConfig->mode == ADMW1001_FFT_MODE_CONTINUOUS) - { - modeReg.FFT_Mode = CORE_MODE_FFT_MODE_CONTINUOUS; - } - else - { - ADMW_LOG_ERROR("Invalid FFT mode %d specified", - pFftConfig->mode); - return ADMW_INVALID_PARAM; - } - - WRITE_REG_U8(hDevice, modeReg.VALUE8, CORE_MODE); - } - - return ADMW_SUCCESS; -} - ADMW_RESULT admw1001_SetChannelCount( ADMW_DEVICE_HANDLE hDevice, ADMW1001_CHANNEL_ID eChannelId, @@ -1652,8 +1346,7 @@ ADMW_RESULT admw1001_SetChannelOptions( ADMW_DEVICE_HANDLE hDevice, ADMW1001_CHANNEL_ID eChannelId, - ADMW1001_CHANNEL_PRIORITY ePriority, - bool bEnableFft) + ADMW1001_CHANNEL_PRIORITY ePriority) { CORE_Channel_Options_t channelOptionsReg; @@ -1661,7 +1354,6 @@ CHECK_REG_FIELD_VAL(CORE_CHANNEL_OPTIONS_CHANNEL_PRIORITY, ePriority); channelOptionsReg.Channel_Priority = ePriority; - channelOptionsReg.FFT_Enable_Ch = bEnableFft ? 1 : 0; WRITE_REG_U8(hDevice, channelOptionsReg.VALUE8, CORE_CHANNEL_OPTIONSn(eChannelId)); @@ -1698,153 +1390,145 @@ /* Ensure that the sensor type is valid for this channel */ switch(sensorType) { - case ADMW1001_ADC_SENSOR_THERMOCOUPLE_J_DEF_L1: - case ADMW1001_ADC_SENSOR_THERMOCOUPLE_K_DEF_L1: - case ADMW1001_ADC_SENSOR_THERMOCOUPLE_T_DEF_L1: - case ADMW1001_ADC_SENSOR_THERMOCOUPLE_1_DEF_L2: - case ADMW1001_ADC_SENSOR_THERMOCOUPLE_2_DEF_L2: - case ADMW1001_ADC_SENSOR_THERMOCOUPLE_3_DEF_L2: - case ADMW1001_ADC_SENSOR_THERMOCOUPLE_4_DEF_L2: - case ADMW1001_ADC_SENSOR_THERMOCOUPLE_J_ADV_L1: - case ADMW1001_ADC_SENSOR_THERMOCOUPLE_K_ADV_L1: - case ADMW1001_ADC_SENSOR_THERMOCOUPLE_T_ADV_L1: - case ADMW1001_ADC_SENSOR_THERMOCOUPLE_1_ADV_L2: - case ADMW1001_ADC_SENSOR_THERMOCOUPLE_2_ADV_L2: - case ADMW1001_ADC_SENSOR_THERMOCOUPLE_3_ADV_L2: - case ADMW1001_ADC_SENSOR_THERMOCOUPLE_4_ADV_L2: - case ADMW1001_ADC_SENSOR_BRIDGE_4WIRE_1_DEF_L2: - case ADMW1001_ADC_SENSOR_BRIDGE_4WIRE_2_DEF_L2: - case ADMW1001_ADC_SENSOR_BRIDGE_4WIRE_3_DEF_L2: - case ADMW1001_ADC_SENSOR_BRIDGE_4WIRE_4_DEF_L2: - case ADMW1001_ADC_SENSOR_BRIDGE_4WIRE_1_ADV_L2: - case ADMW1001_ADC_SENSOR_BRIDGE_4WIRE_2_ADV_L2: - case ADMW1001_ADC_SENSOR_BRIDGE_4WIRE_3_ADV_L2: - case ADMW1001_ADC_SENSOR_BRIDGE_4WIRE_4_ADV_L2: - case ADMW1001_ADC_SENSOR_BRIDGE_6WIRE_1_DEF_L2: - case ADMW1001_ADC_SENSOR_BRIDGE_6WIRE_2_DEF_L2: - case ADMW1001_ADC_SENSOR_BRIDGE_6WIRE_3_DEF_L2: - case ADMW1001_ADC_SENSOR_BRIDGE_6WIRE_4_DEF_L2: - case ADMW1001_ADC_SENSOR_BRIDGE_6WIRE_1_ADV_L2: - case ADMW1001_ADC_SENSOR_BRIDGE_6WIRE_2_ADV_L2: - case ADMW1001_ADC_SENSOR_BRIDGE_6WIRE_3_ADV_L2: - case ADMW1001_ADC_SENSOR_BRIDGE_6WIRE_4_ADV_L2: - if (! ADMW1001_CHANNEL_IS_ADC_SENSOR(eChannelId)) - { - ADMW_LOG_ERROR( - "Invalid ADC sensor type %d specified for channel %d", - sensorType, eChannelId); + case ADMW1001_ADC_SENSOR_RTD_3WIRE_PT100_DEF_L1: + case ADMW1001_ADC_SENSOR_RTD_3WIRE_PT1000_DEF_L1: + case ADMW1001_ADC_SENSOR_RTD_3WIRE_1_DEF_L2: + case ADMW1001_ADC_SENSOR_RTD_3WIRE_2_DEF_L2: + case ADMW1001_ADC_SENSOR_RTD_3WIRE_3_DEF_L2: + case ADMW1001_ADC_SENSOR_RTD_3WIRE_4_DEF_L2: + case ADMW1001_ADC_SENSOR_RTD_3WIRE_PT100_ADV_L1: + case ADMW1001_ADC_SENSOR_RTD_3WIRE_PT1000_ADV_L1: + case ADMW1001_ADC_SENSOR_RTD_3WIRE_1_ADV_L2: + case ADMW1001_ADC_SENSOR_RTD_3WIRE_2_ADV_L2: + case ADMW1001_ADC_SENSOR_RTD_3WIRE_3_ADV_L2: + case ADMW1001_ADC_SENSOR_RTD_3WIRE_4_ADV_L2: + case ADMW1001_ADC_SENSOR_RTD_4WIRE_PT100_DEF_L1: + case ADMW1001_ADC_SENSOR_RTD_4WIRE_PT1000_DEF_L1: + case ADMW1001_ADC_SENSOR_RTD_4WIRE_1_DEF_L2: + case ADMW1001_ADC_SENSOR_RTD_4WIRE_2_DEF_L2: + case ADMW1001_ADC_SENSOR_RTD_4WIRE_3_DEF_L2: + case ADMW1001_ADC_SENSOR_RTD_4WIRE_4_DEF_L2: + case ADMW1001_ADC_SENSOR_RTD_4WIRE_PT100_ADV_L1: + case ADMW1001_ADC_SENSOR_RTD_4WIRE_PT1000_ADV_L1: + case ADMW1001_ADC_SENSOR_RTD_4WIRE_1_ADV_L2: + case ADMW1001_ADC_SENSOR_RTD_4WIRE_2_ADV_L2: + case ADMW1001_ADC_SENSOR_RTD_4WIRE_3_ADV_L2: + case ADMW1001_ADC_SENSOR_RTD_4WIRE_4_ADV_L2: + case ADMW1001_ADC_SENSOR_BRIDGE_4WIRE_1_DEF_L2: + case ADMW1001_ADC_SENSOR_BRIDGE_4WIRE_2_DEF_L2: + case ADMW1001_ADC_SENSOR_BRIDGE_4WIRE_3_DEF_L2: + case ADMW1001_ADC_SENSOR_BRIDGE_4WIRE_4_DEF_L2: + case ADMW1001_ADC_SENSOR_BRIDGE_4WIRE_1_ADV_L2: + case ADMW1001_ADC_SENSOR_BRIDGE_4WIRE_2_ADV_L2: + case ADMW1001_ADC_SENSOR_BRIDGE_4WIRE_3_ADV_L2: + case ADMW1001_ADC_SENSOR_BRIDGE_4WIRE_4_ADV_L2: + case ADMW1001_ADC_SENSOR_BRIDGE_6WIRE_1_DEF_L2: + case ADMW1001_ADC_SENSOR_BRIDGE_6WIRE_2_DEF_L2: + case ADMW1001_ADC_SENSOR_BRIDGE_6WIRE_3_DEF_L2: + case ADMW1001_ADC_SENSOR_BRIDGE_6WIRE_4_DEF_L2: + case ADMW1001_ADC_SENSOR_BRIDGE_6WIRE_1_ADV_L2: + case ADMW1001_ADC_SENSOR_BRIDGE_6WIRE_2_ADV_L2: + case ADMW1001_ADC_SENSOR_BRIDGE_6WIRE_3_ADV_L2: + case ADMW1001_ADC_SENSOR_BRIDGE_6WIRE_4_ADV_L2: + case ADMW1001_ADC_SENSOR_MICROPHONE_A_DEF_L1: + case ADMW1001_ADC_SENSOR_MICROPHONE_B_DEF_L1: + case ADMW1001_ADC_SENSOR_MICROPHONE_1_DEF_L2: + case ADMW1001_ADC_SENSOR_MICROPHONE_2_DEF_L2: + case ADMW1001_ADC_SENSOR_MICROPHONE_A_ADV_L1: + case ADMW1001_ADC_SENSOR_MICROPHONE_B_ADV_L1: + case ADMW1001_ADC_SENSOR_MICROPHONE_1_ADV_L2: + case ADMW1001_ADC_SENSOR_MICROPHONE_2_ADV_L2: + case ADMW1001_ADC_SENSOR_RTD_2WIRE_PT100_DEF_L1: + case ADMW1001_ADC_SENSOR_RTD_2WIRE_PT1000_DEF_L1: + case ADMW1001_ADC_SENSOR_RTD_2WIRE_1_DEF_L2: + case ADMW1001_ADC_SENSOR_RTD_2WIRE_2_DEF_L2: + case ADMW1001_ADC_SENSOR_RTD_2WIRE_3_DEF_L2: + case ADMW1001_ADC_SENSOR_RTD_2WIRE_4_DEF_L2: + case ADMW1001_ADC_SENSOR_RTD_2WIRE_PT100_ADV_L1: + case ADMW1001_ADC_SENSOR_RTD_2WIRE_PT1000_ADV_L1: + case ADMW1001_ADC_SENSOR_RTD_2WIRE_1_ADV_L2: + case ADMW1001_ADC_SENSOR_RTD_2WIRE_2_ADV_L2: + case ADMW1001_ADC_SENSOR_RTD_2WIRE_3_ADV_L2: + case ADMW1001_ADC_SENSOR_RTD_2WIRE_4_ADV_L2: + case ADMW1001_ADC_SENSOR_DIODE_2C_TYPEA_DEF_L1: + case ADMW1001_ADC_SENSOR_DIODE_3C_TYPEA_DEF_L1: + case ADMW1001_ADC_SENSOR_DIODE_2C_1_DEF_L2: + case ADMW1001_ADC_SENSOR_DIODE_3C_1_DEF_L2: + case ADMW1001_ADC_SENSOR_DIODE_2C_TYPEA_ADV_L1: + case ADMW1001_ADC_SENSOR_DIODE_3C_TYPEA_ADV_L1: + case ADMW1001_ADC_SENSOR_DIODE_2C_1_ADV_L2: + case ADMW1001_ADC_SENSOR_DIODE_3C_1_ADV_L2: + case ADMW1001_ADC_SENSOR_THERMISTOR_A_10K_DEF_L1: + case ADMW1001_ADC_SENSOR_THERMISTOR_B_10K_DEF_L1: + case ADMW1001_ADC_SENSOR_THERMISTOR_1_DEF_L2: + case ADMW1001_ADC_SENSOR_THERMISTOR_2_DEF_L2: + case ADMW1001_ADC_SENSOR_THERMISTOR_3_DEF_L2: + case ADMW1001_ADC_SENSOR_THERMISTOR_4_DEF_L2: + case ADMW1001_ADC_SENSOR_THERMISTOR_A_10K_ADV_L1: + case ADMW1001_ADC_SENSOR_THERMISTOR_B_10K_ADV_L1: + case ADMW1001_ADC_SENSOR_THERMISTOR_1_ADV_L2: + case ADMW1001_ADC_SENSOR_THERMISTOR_2_ADV_L2: + case ADMW1001_ADC_SENSOR_THERMISTOR_3_ADV_L2: + case ADMW1001_ADC_SENSOR_THERMISTOR_4_ADV_L2: + if (! (ADMW1001_CHANNEL_IS_ADC_SENSOR(eChannelId) || + ADMW1001_CHANNEL_IS_ADC_CJC(eChannelId))) + { + ADMW_LOG_ERROR( + "Invalid ADC sensor type %d specified for channel %d", + sensorType, eChannelId); + return ADMW_INVALID_PARAM; + } + break; + case ADMW1001_ADC_SENSOR_VOLTAGE: + case ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_A_DEF_L1: + case ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_B_DEF_L1: + case ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_1_DEF_L2: + case ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_2_DEF_L2: + case ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_A_ADV_L1: + case ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_B_ADV_L1: + case ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_1_ADV_L2: + case ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_2_ADV_L2: + case ADMW1001_ADC_SENSOR_THERMOCOUPLE_J_DEF_L1: + case ADMW1001_ADC_SENSOR_THERMOCOUPLE_K_DEF_L1: + case ADMW1001_ADC_SENSOR_THERMOCOUPLE_T_DEF_L1: + case ADMW1001_ADC_SENSOR_THERMOCOUPLE_1_DEF_L2: + case ADMW1001_ADC_SENSOR_THERMOCOUPLE_2_DEF_L2: + case ADMW1001_ADC_SENSOR_THERMOCOUPLE_3_DEF_L2: + case ADMW1001_ADC_SENSOR_THERMOCOUPLE_4_DEF_L2: + case ADMW1001_ADC_SENSOR_THERMOCOUPLE_J_ADV_L1: + case ADMW1001_ADC_SENSOR_THERMOCOUPLE_K_ADV_L1: + case ADMW1001_ADC_SENSOR_THERMOCOUPLE_T_ADV_L1: + case ADMW1001_ADC_SENSOR_THERMOCOUPLE_1_ADV_L2: + case ADMW1001_ADC_SENSOR_THERMOCOUPLE_2_ADV_L2: + case ADMW1001_ADC_SENSOR_THERMOCOUPLE_3_ADV_L2: + case ADMW1001_ADC_SENSOR_THERMOCOUPLE_4_ADV_L2: + if (! ADMW1001_CHANNEL_IS_ADC_VOLTAGE(eChannelId)) + { + ADMW_LOG_ERROR( + "Invalid ADC sensor type %d specified for channel %d", + sensorType, eChannelId); + return ADMW_INVALID_PARAM; + } + break; + case ADMW1001_ADC_SENSOR_CURRENT: + case ADMW1001_ADC_SENSOR_CURRENT_PRESSURE_A_DEF_L1: + case ADMW1001_ADC_SENSOR_CURRENT_PRESSURE_1_DEF_L2: + case ADMW1001_ADC_SENSOR_CURRENT_PRESSURE_2_DEF_L2: + case ADMW1001_ADC_SENSOR_CURRENT_PRESSURE_A_ADV_L1: + case ADMW1001_ADC_SENSOR_CURRENT_PRESSURE_1_ADV_L2: + case ADMW1001_ADC_SENSOR_CURRENT_PRESSURE_2_ADV_L2: + if (! ADMW1001_CHANNEL_IS_ADC_CURRENT(eChannelId)) + { + ADMW_LOG_ERROR( + "Invalid ADC sensor type %d specified for channel %d", + sensorType, eChannelId); + return ADMW_INVALID_PARAM; + } + break; + default: + ADMW_LOG_ERROR("Invalid/unsupported ADC sensor type %d specified", + sensorType); return ADMW_INVALID_PARAM; - } - break; - case ADMW1001_ADC_SENSOR_RTD_2WIRE_PT100_DEF_L1: - case ADMW1001_ADC_SENSOR_RTD_2WIRE_PT1000_DEF_L1: - case ADMW1001_ADC_SENSOR_RTD_2WIRE_1_DEF_L2: - case ADMW1001_ADC_SENSOR_RTD_2WIRE_2_DEF_L2: - case ADMW1001_ADC_SENSOR_RTD_2WIRE_3_DEF_L2: - case ADMW1001_ADC_SENSOR_RTD_2WIRE_4_DEF_L2: - case ADMW1001_ADC_SENSOR_RTD_2WIRE_PT100_ADV_L1: - case ADMW1001_ADC_SENSOR_RTD_2WIRE_PT1000_ADV_L1: - case ADMW1001_ADC_SENSOR_RTD_2WIRE_1_ADV_L2: - case ADMW1001_ADC_SENSOR_RTD_2WIRE_2_ADV_L2: - case ADMW1001_ADC_SENSOR_RTD_2WIRE_3_ADV_L2: - case ADMW1001_ADC_SENSOR_RTD_2WIRE_4_ADV_L2: - case ADMW1001_ADC_SENSOR_RTD_3WIRE_PT100_DEF_L1: - case ADMW1001_ADC_SENSOR_RTD_3WIRE_PT1000_DEF_L1: - case ADMW1001_ADC_SENSOR_RTD_3WIRE_1_DEF_L2: - case ADMW1001_ADC_SENSOR_RTD_3WIRE_2_DEF_L2: - case ADMW1001_ADC_SENSOR_RTD_3WIRE_3_DEF_L2: - case ADMW1001_ADC_SENSOR_RTD_3WIRE_4_DEF_L2: - case ADMW1001_ADC_SENSOR_RTD_3WIRE_PT100_ADV_L1: - case ADMW1001_ADC_SENSOR_RTD_3WIRE_PT1000_ADV_L1: - case ADMW1001_ADC_SENSOR_RTD_3WIRE_1_ADV_L2: - case ADMW1001_ADC_SENSOR_RTD_3WIRE_2_ADV_L2: - case ADMW1001_ADC_SENSOR_RTD_3WIRE_3_ADV_L2: - case ADMW1001_ADC_SENSOR_RTD_3WIRE_4_ADV_L2: - case ADMW1001_ADC_SENSOR_RTD_4WIRE_PT100_DEF_L1: - case ADMW1001_ADC_SENSOR_RTD_4WIRE_PT1000_DEF_L1: - case ADMW1001_ADC_SENSOR_RTD_4WIRE_1_DEF_L2: - case ADMW1001_ADC_SENSOR_RTD_4WIRE_2_DEF_L2: - case ADMW1001_ADC_SENSOR_RTD_4WIRE_3_DEF_L2: - case ADMW1001_ADC_SENSOR_RTD_4WIRE_4_DEF_L2: - case ADMW1001_ADC_SENSOR_RTD_4WIRE_PT100_ADV_L1: - case ADMW1001_ADC_SENSOR_RTD_4WIRE_PT1000_ADV_L1: - case ADMW1001_ADC_SENSOR_RTD_4WIRE_1_ADV_L2: - case ADMW1001_ADC_SENSOR_RTD_4WIRE_2_ADV_L2: - case ADMW1001_ADC_SENSOR_RTD_4WIRE_3_ADV_L2: - case ADMW1001_ADC_SENSOR_RTD_4WIRE_4_ADV_L2: - if (!ADMW1001_CHANNEL_IS_ADC_CJC(eChannelId)) - { - ADMW_LOG_ERROR( - "Invalid ADC sensor type %d specified for channel %d", - sensorType, eChannelId); - return ADMW_INVALID_PARAM; - } - break; - case ADMW1001_ADC_SENSOR_DIODE_2C_TYPEA_DEF_L1: - case ADMW1001_ADC_SENSOR_DIODE_3C_TYPEA_DEF_L1: - case ADMW1001_ADC_SENSOR_DIODE_2C_1_DEF_L2: - case ADMW1001_ADC_SENSOR_DIODE_3C_1_DEF_L2: - case ADMW1001_ADC_SENSOR_DIODE_2C_TYPEA_ADV_L1: - case ADMW1001_ADC_SENSOR_DIODE_3C_TYPEA_ADV_L1: - case ADMW1001_ADC_SENSOR_DIODE_2C_1_ADV_L2: - case ADMW1001_ADC_SENSOR_DIODE_3C_1_ADV_L2: - case ADMW1001_ADC_SENSOR_THERMISTOR_A_10K_DEF_L1: - case ADMW1001_ADC_SENSOR_THERMISTOR_B_10K_DEF_L1: - case ADMW1001_ADC_SENSOR_THERMISTOR_1_DEF_L2: - case ADMW1001_ADC_SENSOR_THERMISTOR_2_DEF_L2: - case ADMW1001_ADC_SENSOR_THERMISTOR_3_DEF_L2: - case ADMW1001_ADC_SENSOR_THERMISTOR_4_DEF_L2: - case ADMW1001_ADC_SENSOR_THERMISTOR_A_10K_ADV_L1: - case ADMW1001_ADC_SENSOR_THERMISTOR_B_10K_ADV_L1: - case ADMW1001_ADC_SENSOR_THERMISTOR_1_ADV_L2: - case ADMW1001_ADC_SENSOR_THERMISTOR_2_ADV_L2: - case ADMW1001_ADC_SENSOR_THERMISTOR_3_ADV_L2: - case ADMW1001_ADC_SENSOR_THERMISTOR_4_ADV_L2: - if (! (ADMW1001_CHANNEL_IS_ADC_SENSOR(eChannelId) || - ADMW1001_CHANNEL_IS_ADC_CJC(eChannelId))) - { - ADMW_LOG_ERROR( - "Invalid ADC sensor type %d specified for channel %d", - sensorType, eChannelId); - return ADMW_INVALID_PARAM; - } - break; - case ADMW1001_ADC_SENSOR_VOLTAGE: - case ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_A_DEF_L1: - case ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_B_DEF_L1: - case ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_1_DEF_L2: - case ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_2_DEF_L2: - case ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_A_ADV_L1: - case ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_B_ADV_L1: - case ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_1_ADV_L2: - case ADMW1001_ADC_SENSOR_VOLTAGE_PRESSURE_2_ADV_L2: - if (! ADMW1001_CHANNEL_IS_ADC_VOLTAGE(eChannelId)) - { - ADMW_LOG_ERROR( - "Invalid ADC sensor type %d specified for channel %d", - sensorType, eChannelId); - return ADMW_INVALID_PARAM; - } - break; - case ADMW1001_ADC_SENSOR_CURRENT: - case ADMW1001_ADC_SENSOR_CURRENT_PRESSURE_A_DEF_L1: - case ADMW1001_ADC_SENSOR_CURRENT_PRESSURE_1_DEF_L2: - case ADMW1001_ADC_SENSOR_CURRENT_PRESSURE_2_DEF_L2: - case ADMW1001_ADC_SENSOR_CURRENT_PRESSURE_A_ADV_L1: - case ADMW1001_ADC_SENSOR_CURRENT_PRESSURE_1_ADV_L2: - case ADMW1001_ADC_SENSOR_CURRENT_PRESSURE_2_ADV_L2: - if (! ADMW1001_CHANNEL_IS_ADC_CURRENT(eChannelId)) - { - ADMW_LOG_ERROR( - "Invalid ADC sensor type %d specified for channel %d", - sensorType, eChannelId); - return ADMW_INVALID_PARAM; - } - break; - default: - ADMW_LOG_ERROR("Invalid/unsupported ADC sensor type %d specified", - sensorType); - return ADMW_INVALID_PARAM; } sensorTypeReg.Sensor_Type = sensorType; @@ -1908,10 +1592,7 @@ switch(pRefConfig->type) { case ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_1: - sensorDetailsReg.Reference_Select = CORE_SENSOR_DETAILS_REF_RINT1; - break; - case ADMW1001_ADC_REFERENCE_RESISTOR_INTERNAL_2: - sensorDetailsReg.Reference_Select = CORE_SENSOR_DETAILS_REF_RINT2; + sensorDetailsReg.Reference_Select = CORE_SENSOR_DETAILS_REF_INT; break; case ADMW1001_ADC_REFERENCE_VOLTAGE_INTERNAL: sensorDetailsReg.Reference_Select = CORE_SENSOR_DETAILS_REF_INT; @@ -1922,15 +1603,6 @@ case ADMW1001_ADC_REFERENCE_RESISTOR_EXTERNAL_1: sensorDetailsReg.Reference_Select = CORE_SENSOR_DETAILS_REF_REXT1; break; - case ADMW1001_ADC_REFERENCE_RESISTOR_EXTERNAL_2: - sensorDetailsReg.Reference_Select = CORE_SENSOR_DETAILS_REF_REXT2; - break; - case ADMW1001_ADC_REFERENCE_VOLTAGE_EXTERNAL_1: - sensorDetailsReg.Reference_Select = CORE_SENSOR_DETAILS_REF_VEXT1; - break; - case ADMW1001_ADC_REFERENCE_VOLTAGE_EXTERNAL_2: - sensorDetailsReg.Reference_Select = CORE_SENSOR_DETAILS_REF_VEXT2; - break; case ADMW1001_ADC_REFERENCE_BRIDGE_EXCITATION: sensorDetailsReg.Reference_Select = CORE_SENSOR_DETAILS_REF_EXC; break; @@ -1939,7 +1611,7 @@ pRefConfig->type); return ADMW_INVALID_PARAM; } - + switch(pAdcChannelConfig->gain) { case ADMW1001_ADC_GAIN_1X: @@ -1972,16 +1644,31 @@ return ADMW_INVALID_PARAM; } + switch(pAdcChannelConfig->rtdCurve) + { + case ADMW1001_ADC_RTD_CURVE_EUROPEAN: + sensorDetailsReg.RTD_Curve = CORE_SENSOR_DETAILS_EUROPEAN_CURVE; + break; + case ADMW1001_ADC_RTD_CURVE_AMERICAN: + sensorDetailsReg.RTD_Curve = CORE_SENSOR_DETAILS_AMERICAN_CURVE; + break; + case ADMW1001_ADC_RTD_CURVE_JAPANESE: + sensorDetailsReg.RTD_Curve = CORE_SENSOR_DETAILS_JAPANESE_CURVE; + break; + case ADMW1001_ADC_RTD_CURVE_ITS90: + sensorDetailsReg.RTD_Curve = CORE_SENSOR_DETAILS_ITS90_CURVE; + break; + default: + ADMW_LOG_ERROR("Invalid RTD Curve %d specified", + pAdcChannelConfig->rtdCurve); + return ADMW_INVALID_PARAM; + } + if (pAdcChannelConfig->enableVbias) sensorDetailsReg.Vbias = 1; else sensorDetailsReg.Vbias = 0; - if (pAdcChannelConfig->reference.disableBuffer) - sensorDetailsReg.Reference_Buffer_Disable = 1; - else - sensorDetailsReg.Reference_Buffer_Disable = 0; - if (pChannelConfig->disablePublishing) sensorDetailsReg.Do_Not_Publish = 1; else @@ -2002,22 +1689,18 @@ ADMW1001_CHANNEL_ID eChannelId, ADMW1001_ADC_FILTER_CONFIG *pFilterConfig) { - CORE_Filter_Select_t filterSelectReg; - - filterSelectReg.VALUE32 = REG_RESET_VAL(CORE_FILTER_SELECTn); + CORE_Measurement_Setup_t MeasSetupReg; + MeasSetupReg.VALUE32 = REG_RESET_VAL(CORE_MEASUREMENT_SETUPn); if (pFilterConfig->type == ADMW1001_ADC_FILTER_SINC4) { - filterSelectReg.ADC_Filter_Type = CORE_FILTER_SELECT_FILTER_SINC4; - filterSelectReg.ADC_FS = pFilterConfig->fs; + MeasSetupReg.ADC_Filter_Type = CORE_MEASUREMENT_SETUP_ENABLE_SINC4; + MeasSetupReg.ADC_SF = pFilterConfig->sf; } - else if (pFilterConfig->type == ADMW1001_ADC_FILTER_FIR_20SPS) + else if (pFilterConfig->type == ADMW1001_ADC_FILTER_SINC3) { - filterSelectReg.ADC_Filter_Type = CORE_FILTER_SELECT_FILTER_FIR_20SPS; - } - else if (pFilterConfig->type == ADMW1001_ADC_FILTER_FIR_25SPS) - { - filterSelectReg.ADC_Filter_Type = CORE_FILTER_SELECT_FILTER_FIR_25SPS; + MeasSetupReg.ADC_Filter_Type = CORE_MEASUREMENT_SETUP_ENABLE_SINC3; + MeasSetupReg.ADC_SF = pFilterConfig->sf; } else { @@ -2025,8 +1708,32 @@ pFilterConfig->type); return ADMW_INVALID_PARAM; } - - WRITE_REG_U32(hDevice, filterSelectReg.VALUE32, CORE_FILTER_SELECTn(eChannelId)); + + if(pFilterConfig->filterChop) + MeasSetupReg.Chop_Mode = 1; + else + MeasSetupReg.Chop_Mode = 1; + + if(pFilterConfig->notch1p2) + MeasSetupReg.NOTCH_EN_2 = 1; + else + MeasSetupReg.NOTCH_EN_2 = 0; + + switch(pFilterConfig->groundSwitch) + { + case ADMW1001_ADC_GND_SW_OPEN: + MeasSetupReg.GND_SW = CORE_MEASUREMENT_SETUP_GND_SW_OPEN; + break; + case ADMW1001_ADC_GND_SW_CLOSED: + MeasSetupReg.GND_SW = CORE_MEASUREMENT_SETUP_GND_SW_CLOSED; + break; + default: + ADMW_LOG_ERROR("Invalid ground switch state %d specified", + pFilterConfig->groundSwitch); + return ADMW_INVALID_PARAM; + } + + WRITE_REG_U32(hDevice, MeasSetupReg.VALUE32, CORE_MEASUREMENT_SETUPn(eChannelId)); return ADMW_SUCCESS; } @@ -2038,44 +1745,61 @@ { CORE_Channel_Excitation_t channelExcitationReg; - channelExcitationReg.VALUE8 = REG_RESET_VAL(CORE_CHANNEL_EXCITATIONn); - - if (pCurrentConfig->outputLevel == ADMW1001_ADC_EXC_CURRENT_NONE) - { - channelExcitationReg.IOUT_Excitation_Current = CORE_CHANNEL_EXCITATION_IEXC_OFF; - } + channelExcitationReg.VALUE16 = REG_RESET_VAL(CORE_CHANNEL_EXCITATIONn); + + + if (pCurrentConfig->outputLevel == ADMW1001_ADC_EXC_CURRENT_EXTERNAL) + channelExcitationReg.IOUT_Excitation_Current = CORE_CHANNEL_EXCITATION_EXTERNAL; + if (pCurrentConfig->outputLevel == ADMW1001_ADC_EXC_CURRENT_50uA) + channelExcitationReg.IOUT_Excitation_Current = CORE_CHANNEL_EXCITATION_IEXC_50UA; + else if (pCurrentConfig->outputLevel == ADMW1001_ADC_EXC_CURRENT_100uA) + channelExcitationReg.IOUT_Excitation_Current = CORE_CHANNEL_EXCITATION_IEXC_100UA; + else if (pCurrentConfig->outputLevel == ADMW1001_ADC_EXC_CURRENT_250uA) + channelExcitationReg.IOUT_Excitation_Current = CORE_CHANNEL_EXCITATION_IEXC_250UA; + else if (pCurrentConfig->outputLevel == ADMW1001_ADC_EXC_CURRENT_500uA) + channelExcitationReg.IOUT_Excitation_Current = CORE_CHANNEL_EXCITATION_IEXC_500UA; + else if (pCurrentConfig->outputLevel == ADMW1001_ADC_EXC_CURRENT_1000uA) + channelExcitationReg.IOUT_Excitation_Current = CORE_CHANNEL_EXCITATION_IEXC_1000UA; else { - if (pCurrentConfig->outputLevel == ADMW1001_ADC_EXC_CURRENT_50uA) - channelExcitationReg.IOUT_Excitation_Current = CORE_CHANNEL_EXCITATION_IEXC_50UA; - else if (pCurrentConfig->outputLevel == ADMW1001_ADC_EXC_CURRENT_100uA) - channelExcitationReg.IOUT_Excitation_Current = CORE_CHANNEL_EXCITATION_IEXC_100UA; - else if (pCurrentConfig->outputLevel == ADMW1001_ADC_EXC_CURRENT_250uA) - channelExcitationReg.IOUT_Excitation_Current = CORE_CHANNEL_EXCITATION_IEXC_250UA; - else if (pCurrentConfig->outputLevel == ADMW1001_ADC_EXC_CURRENT_500uA) - channelExcitationReg.IOUT_Excitation_Current = CORE_CHANNEL_EXCITATION_IEXC_500UA; - else if (pCurrentConfig->outputLevel == ADMW1001_ADC_EXC_CURRENT_750uA) - channelExcitationReg.IOUT_Excitation_Current = CORE_CHANNEL_EXCITATION_IEXC_750UA; - else if (pCurrentConfig->outputLevel == ADMW1001_ADC_EXC_CURRENT_1000uA) - channelExcitationReg.IOUT_Excitation_Current = CORE_CHANNEL_EXCITATION_IEXC_1000UA; - else - { - ADMW_LOG_ERROR("Invalid ADC excitation current %d specified", - pCurrentConfig->outputLevel); - return ADMW_INVALID_PARAM; - } + ADMW_LOG_ERROR("Invalid ADC excitation current %d specified", + pCurrentConfig->outputLevel); + return ADMW_INVALID_PARAM; } - if (pCurrentConfig->diodeRatio == ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_DEFAULT) - { - channelExcitationReg.IOUT_Diode_Ratio = 0; + + switch(pCurrentConfig->diodeRatio) { + case ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_10UA_100UA: + channelExcitationReg.IOUT_Diode_Ratio = CORE_CHANNEL_EXCITATION_DIODE_2PT_10UA_100UA; + break; + case ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_20UA_160UA: + channelExcitationReg.IOUT_Diode_Ratio = CORE_CHANNEL_EXCITATION_DIODE_2PT_20UA_160UA; + break; + case ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_50UA_300UA: + channelExcitationReg.IOUT_Diode_Ratio = CORE_CHANNEL_EXCITATION_DIODE_2PT_50UA_300UA; + break; + case ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_100UA_600UA: + channelExcitationReg.IOUT_Diode_Ratio = CORE_CHANNEL_EXCITATION_DIODE_2PT_100UA_600UA; + break; + case ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_10UA_50UA_100UA: + channelExcitationReg.IOUT_Diode_Ratio = CORE_CHANNEL_EXCITATION_DIODE_3PT_10UA_50UA_100UA; + break; + case ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_20UA_100UA_160UA: + channelExcitationReg.IOUT_Diode_Ratio = CORE_CHANNEL_EXCITATION_DIODE_3PT_20UA_100UA_160UA; + break; + case ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_50UA_150UA_300UA: + channelExcitationReg.IOUT_Diode_Ratio = CORE_CHANNEL_EXCITATION_DIODE_3PT_50UA_150UA_300UA; + break; + case ADMW1001_ADC_EXC_CURRENT_IOUT_DIODE_100UA_300UA_600UA: + channelExcitationReg.IOUT_Diode_Ratio = CORE_CHANNEL_EXCITATION_DIODE_3PT_100UA_300UA_600UA; + break; + default: + ADMW_LOG_ERROR("Invalid diode ratio %d specified", + pCurrentConfig->diodeRatio); + return ADMW_INVALID_PARAM; } - else - { - channelExcitationReg.IOUT_Diode_Ratio = 1; - } - - WRITE_REG_U8(hDevice, channelExcitationReg.VALUE8, CORE_CHANNEL_EXCITATIONn(eChannelId)); + + WRITE_REG_U16(hDevice, channelExcitationReg.VALUE16, CORE_CHANNEL_EXCITATIONn(eChannelId)); return ADMW_SUCCESS; } @@ -2169,7 +1893,6 @@ sensorDetailsReg.Unity_LUT_Select = 0; sensorDetailsReg.Vbias = 0; - sensorDetailsReg.Reference_Buffer_Disable = 1; WRITE_REG_U32(hDevice, sensorDetailsReg.VALUE32, CORE_SENSOR_DETAILSn(eChannelId)); @@ -2512,73 +2235,6 @@ pDigitalComms->spiClock); return ADMW_INVALID_PARAM; } - - switch (pDigitalComms->uartLineConfig) - { - case ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG_8N1: - digitalSensorComms.Uart_Mode = CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8N1; - break; - case ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG_8N2: - digitalSensorComms.Uart_Mode = CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8N2; - break; - case ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG_8N3: - digitalSensorComms.Uart_Mode = CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8N3; - break; - case ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG_8E1: - digitalSensorComms.Uart_Mode = CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8E1; - break; - case ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG_8E2: - digitalSensorComms.Uart_Mode = CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8E2; - break; - case ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG_8E3: - digitalSensorComms.Uart_Mode = CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8E3; - break; - case ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG_8O1: - digitalSensorComms.Uart_Mode = CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8O1; - break; - case ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG_8O2: - digitalSensorComms.Uart_Mode = CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8O2; - break; - case ADMW1001_DIGITAL_SENSOR_COMMS_UART_LINE_CONFIG_8O3: - digitalSensorComms.Uart_Mode = CORE_DIGITAL_SENSOR_COMMS_LINECONTROL_8O3; - break; - default: - ADMW_LOG_ERROR("Invalid UART mode %d specified", - pDigitalComms->uartLineConfig); - return ADMW_INVALID_PARAM; - } - - switch (pDigitalComms->uartBaudRate) - { - case ADMW1001_DIGITAL_SENSOR_COMMS_UART_BAUD_RATE_115200: - digitalSensorComms.Uart_Baud = CORE_DIGITAL_SENSOR_COMMS_UART_115200; - break; - case ADMW1001_DIGITAL_SENSOR_COMMS_UART_BAUD_RATE_57600: - digitalSensorComms.Uart_Baud = CORE_DIGITAL_SENSOR_COMMS_UART_57600; - break; - case ADMW1001_DIGITAL_SENSOR_COMMS_UART_BAUD_RATE_38400: - digitalSensorComms.Uart_Baud = CORE_DIGITAL_SENSOR_COMMS_UART_38400; - break; - case ADMW1001_DIGITAL_SENSOR_COMMS_UART_BAUD_RATE_19200: - digitalSensorComms.Uart_Baud = CORE_DIGITAL_SENSOR_COMMS_UART_19200; - break; - case ADMW1001_DIGITAL_SENSOR_COMMS_UART_BAUD_RATE_9600: - digitalSensorComms.Uart_Baud = CORE_DIGITAL_SENSOR_COMMS_UART_9600; - break; - case ADMW1001_DIGITAL_SENSOR_COMMS_UART_BAUD_RATE_4800: - digitalSensorComms.Uart_Baud = CORE_DIGITAL_SENSOR_COMMS_UART_4800; - break; - case ADMW1001_DIGITAL_SENSOR_COMMS_UART_BAUD_RATE_2400: - digitalSensorComms.Uart_Baud = CORE_DIGITAL_SENSOR_COMMS_UART_2400; - break; - case ADMW1001_DIGITAL_SENSOR_COMMS_UART_BAUD_RATE_1200: - digitalSensorComms.Uart_Baud = CORE_DIGITAL_SENSOR_COMMS_UART_1200; - break; - default: - ADMW_LOG_ERROR("Invalid UART baud rate %d specified", - pDigitalComms->uartBaudRate); - return ADMW_INVALID_PARAM; - } } else { @@ -2769,87 +2425,6 @@ return ADMW_SUCCESS; } -static ADMW_RESULT admw_SetChannelUartSensorType( - ADMW_DEVICE_HANDLE hDevice, - ADMW1001_CHANNEL_ID eChannelId, - ADMW1001_UART_SENSOR_TYPE sensorType) -{ - CORE_Sensor_Type_t sensorTypeReg; - - sensorTypeReg.VALUE16 = REG_RESET_VAL(CORE_SENSOR_TYPEn); - - /* Ensure that the sensor type is valid for this channel */ - switch(sensorType) - { - case ADMW1001_UART_SENSOR_UART_CO2_A_DEF_L1: - case ADMW1001_UART_SENSOR_UART_CO2_B_DEF_L1: - case ADMW1001_UART_SENSOR_UART_CO2_A_DEF_L2: - case ADMW1001_UART_SENSOR_UART_CO2_B_DEF_L2: - case ADMW1001_UART_SENSOR_UART_CO2_A_ADV_L1: - case ADMW1001_UART_SENSOR_UART_CO2_B_ADV_L1: - case ADMW1001_UART_SENSOR_UART_CO2_A_ADV_L2: - case ADMW1001_UART_SENSOR_UART_CO2_B_ADV_L2: - sensorTypeReg.Sensor_Type = sensorType; - break; - default: - ADMW_LOG_ERROR("Unsupported UART sensor type %d specified", sensorType); - return ADMW_INVALID_PARAM; - } - - WRITE_REG_U16(hDevice, sensorTypeReg.VALUE16, CORE_SENSOR_TYPEn(eChannelId)); - - return ADMW_SUCCESS; -} - -ADMW_RESULT admw_SetUartChannelConfig( - ADMW_DEVICE_HANDLE hDevice, - ADMW1001_CHANNEL_ID eChannelId, - ADMW1001_CHANNEL_CONFIG *pChannelConfig) -{ - ADMW_RESULT eRet; - ADMW1001_UART_CHANNEL_CONFIG *pUartChannelConfig = - &pChannelConfig->uartChannelConfig; - - eRet = admw_SetChannelUartSensorType(hDevice, eChannelId, - pUartChannelConfig->sensor); - if (eRet != ADMW_SUCCESS) - { - ADMW_LOG_ERROR("Failed to set UART sensor type for channel %d", - eChannelId); - return eRet; - } - - eRet = admw_SetChannelDigitalSensorDetails(hDevice, eChannelId, - pChannelConfig); - if (eRet != ADMW_SUCCESS) - { - ADMW_LOG_ERROR("Failed to set UART sensor details for channel %d", - eChannelId); - return eRet; - } - - eRet = admw_SetDigitalCalibrationParam(hDevice, eChannelId, - &pUartChannelConfig->digitalCalibrationParam); - if (eRet != ADMW_SUCCESS) - { - ADMW_LOG_ERROR("Failed to set UART digital calibration param for channel %d", - eChannelId); - return eRet; - } - - eRet = admw_SetDigitalChannelComms(hDevice, eChannelId, - &pUartChannelConfig->configureComms); - if (eRet != ADMW_SUCCESS) - { - ADMW_LOG_ERROR("Failed to set UART comms for channel %d", - eChannelId); - return eRet; - } - - - return ADMW_SUCCESS; -} - ADMW_RESULT admw1001_SetChannelThresholdLimits( ADMW_DEVICE_HANDLE hDevice, ADMW1001_CHANNEL_ID eChannelId, @@ -2962,8 +2537,7 @@ } eRet = admw1001_SetChannelOptions(hDevice, eChannelId, - pChannelConfig->priority, - pChannelConfig->enableFFT); + pChannelConfig->priority); if (eRet != ADMW_SUCCESS) { ADMW_LOG_ERROR("Failed to set priority for channel %d", @@ -2972,7 +2546,7 @@ } /* If the channel is not enabled, we can skip the following steps */ - if (pChannelConfig->enableChannel || pChannelConfig->enableFFT) + if (pChannelConfig->enableChannel) { eRet = admw1001_SetChannelSkipCount(hDevice, eChannelId, pChannelConfig->cycleSkipCount); @@ -2985,14 +2559,10 @@ switch (eChannelId) { - case ADMW1001_CHANNEL_ID_CJC_0: - case ADMW1001_CHANNEL_ID_CJC_1: - case ADMW1001_CHANNEL_ID_SENSOR_0: - case ADMW1001_CHANNEL_ID_SENSOR_1: - case ADMW1001_CHANNEL_ID_SENSOR_2: - case ADMW1001_CHANNEL_ID_SENSOR_3: - case ADMW1001_CHANNEL_ID_VOLTAGE_0: - case ADMW1001_CHANNEL_ID_CURRENT_0: + case ADMW1001_CHANNEL_ID_ANALOG_1_UNIVERSAL: + case ADMW1001_CHANNEL_ID_ANALOG_2_UNIVERSAL: + case ADMW1001_CHANNEL_ID_ANALOG_1_DIFFERENTIAL: + case ADMW1001_CHANNEL_ID_ANALOG_2_DIFFERENTIAL: eRet = admw_SetAdcChannelConfig(hDevice, eChannelId, pChannelConfig); break; case ADMW1001_CHANNEL_ID_I2C_0: @@ -3002,9 +2572,6 @@ case ADMW1001_CHANNEL_ID_SPI_0: eRet = admw_SetSpiChannelConfig(hDevice, eChannelId, pChannelConfig); break; - case ADMW1001_CHANNEL_ID_UART: - eRet = admw_SetUartChannelConfig(hDevice, eChannelId, pChannelConfig); - break; default: ADMW_LOG_ERROR("Invalid channel ID %d specified", eChannelId); return ADMW_INVALID_PARAM; @@ -3021,7 +2588,7 @@ } } - if (pChannelConfig->enableChannel || pChannelConfig->enableFFT) + if (pChannelConfig->enableChannel) { /* Threshold limits can be configured individually for virtual channels */ eRet = admw1001_SetChannelThresholdLimits(hDevice, eChannelId, @@ -3073,7 +2640,15 @@ pConfig->productId, ADMW_PRODUCT_ID_ADMW1001); return ADMW_INVALID_PARAM; } - + + if(!((pConfig->versionId.major==VERSIONID_MAJOR) && (pConfig->versionId.minor==VERSIONID_MINOR))) + { + ADMW_LOG_ERROR("Configuration Version ID (0x%X) is not supported", + pConfig->versionId); + return ADMW_INVALID_PARAM; + } + + /* Check that the actual Product ID is a match? */ eRet = admw_GetProductID(hDevice, &productId); if (eRet) @@ -3111,7 +2686,7 @@ return eRet; } - for (ADMW1001_CHANNEL_ID id = ADMW1001_CHANNEL_ID_CJC_0; + for (ADMW1001_CHANNEL_ID id = ADMW1001_CHANNEL_ID_ANALOG_1_UNIVERSAL; id < ADMW1001_MAX_CHANNELS; id++) { @@ -3124,17 +2699,10 @@ } } - eRet = admw1001_SetFftConfig(hDevice, &pDeviceConfig->fft, - pDeviceConfig->channels); - if (eRet) - { - ADMW_LOG_ERROR("Failed to set FFT configuration"); - return eRet; - } - return ADMW_SUCCESS; } + ADMW_RESULT admw1001_SetLutData( ADMW_DEVICE_HANDLE const hDevice, ADMW1001_LUT * const pLutData) @@ -3339,4 +2907,3 @@ return ADMW_SUCCESS; } -